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6077ce8d TV |
1 | /* |
2 | * NEC NL8048HL11 Panel driver | |
3 | * | |
4 | * Copyright (C) 2010 Texas Instruments Inc. | |
5 | * Author: Erik Gilling <konkers@android.com> | |
6 | * Converted to new DSS device model: Tomi Valkeinen <tomi.valkeinen@ti.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/delay.h> | |
16 | #include <linux/spi/spi.h> | |
17 | #include <linux/fb.h> | |
d0196c8d | 18 | #include <linux/gpio/consumer.h> |
b36250d8 | 19 | #include <linux/of_gpio.h> |
6077ce8d TV |
20 | |
21 | #include <video/omapdss.h> | |
6077ce8d TV |
22 | |
23 | struct panel_drv_data { | |
24 | struct omap_dss_device dssdev; | |
25 | struct omap_dss_device *in; | |
26 | ||
27 | struct omap_video_timings videomode; | |
28 | ||
29 | int data_lines; | |
30 | ||
31 | int res_gpio; | |
32 | int qvga_gpio; | |
33 | ||
34 | struct spi_device *spi; | |
35 | }; | |
36 | ||
37 | #define LCD_XRES 800 | |
38 | #define LCD_YRES 480 | |
39 | /* | |
40 | * NEC PIX Clock Ratings | |
41 | * MIN:21.8MHz TYP:23.8MHz MAX:25.7MHz | |
42 | */ | |
d8d78941 | 43 | #define LCD_PIXEL_CLOCK 23800000 |
6077ce8d TV |
44 | |
45 | static const struct { | |
46 | unsigned char addr; | |
47 | unsigned char dat; | |
48 | } nec_8048_init_seq[] = { | |
49 | { 3, 0x01 }, { 0, 0x00 }, { 1, 0x01 }, { 4, 0x00 }, { 5, 0x14 }, | |
50 | { 6, 0x24 }, { 16, 0xD7 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x55 }, | |
51 | { 20, 0x01 }, { 21, 0x70 }, { 22, 0x1E }, { 23, 0x25 }, { 24, 0x25 }, | |
52 | { 25, 0x02 }, { 26, 0x02 }, { 27, 0xA0 }, { 32, 0x2F }, { 33, 0x0F }, | |
53 | { 34, 0x0F }, { 35, 0x0F }, { 36, 0x0F }, { 37, 0x0F }, { 38, 0x0F }, | |
54 | { 39, 0x00 }, { 40, 0x02 }, { 41, 0x02 }, { 42, 0x02 }, { 43, 0x0F }, | |
55 | { 44, 0x0F }, { 45, 0x0F }, { 46, 0x0F }, { 47, 0x0F }, { 48, 0x0F }, | |
56 | { 49, 0x0F }, { 50, 0x00 }, { 51, 0x02 }, { 52, 0x02 }, { 53, 0x02 }, | |
57 | { 80, 0x0C }, { 83, 0x42 }, { 84, 0x42 }, { 85, 0x41 }, { 86, 0x14 }, | |
58 | { 89, 0x88 }, { 90, 0x01 }, { 91, 0x00 }, { 92, 0x02 }, { 93, 0x0C }, | |
59 | { 94, 0x1C }, { 95, 0x27 }, { 98, 0x49 }, { 99, 0x27 }, { 102, 0x76 }, | |
60 | { 103, 0x27 }, { 112, 0x01 }, { 113, 0x0E }, { 114, 0x02 }, | |
61 | { 115, 0x0C }, { 118, 0x0C }, { 121, 0x30 }, { 130, 0x00 }, | |
62 | { 131, 0x00 }, { 132, 0xFC }, { 134, 0x00 }, { 136, 0x00 }, | |
63 | { 138, 0x00 }, { 139, 0x00 }, { 140, 0x00 }, { 141, 0xFC }, | |
64 | { 143, 0x00 }, { 145, 0x00 }, { 147, 0x00 }, { 148, 0x00 }, | |
65 | { 149, 0x00 }, { 150, 0xFC }, { 152, 0x00 }, { 154, 0x00 }, | |
66 | { 156, 0x00 }, { 157, 0x00 }, { 2, 0x00 }, | |
67 | }; | |
68 | ||
69 | static const struct omap_video_timings nec_8048_panel_timings = { | |
70 | .x_res = LCD_XRES, | |
71 | .y_res = LCD_YRES, | |
d8d78941 | 72 | .pixelclock = LCD_PIXEL_CLOCK, |
6077ce8d TV |
73 | .hfp = 6, |
74 | .hsw = 1, | |
75 | .hbp = 4, | |
76 | .vfp = 3, | |
77 | .vsw = 1, | |
78 | .vbp = 4, | |
79 | ||
80 | .vsync_level = OMAPDSS_SIG_ACTIVE_LOW, | |
81 | .hsync_level = OMAPDSS_SIG_ACTIVE_LOW, | |
82 | .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE, | |
83 | .de_level = OMAPDSS_SIG_ACTIVE_HIGH, | |
84 | .sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE, | |
85 | }; | |
86 | ||
87 | #define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev) | |
88 | ||
89 | static int nec_8048_spi_send(struct spi_device *spi, unsigned char reg_addr, | |
90 | unsigned char reg_data) | |
91 | { | |
92 | int ret = 0; | |
93 | unsigned int cmd = 0, data = 0; | |
94 | ||
95 | cmd = 0x0000 | reg_addr; /* register address write */ | |
96 | data = 0x0100 | reg_data; /* register data write */ | |
97 | data = (cmd << 16) | data; | |
98 | ||
99 | ret = spi_write(spi, (unsigned char *)&data, 4); | |
100 | if (ret) | |
101 | pr_err("error in spi_write %x\n", data); | |
102 | ||
103 | return ret; | |
104 | } | |
105 | ||
106 | static int init_nec_8048_wvga_lcd(struct spi_device *spi) | |
107 | { | |
108 | unsigned int i; | |
109 | /* Initialization Sequence */ | |
110 | /* nec_8048_spi_send(spi, REG, VAL) */ | |
111 | for (i = 0; i < (ARRAY_SIZE(nec_8048_init_seq) - 1); i++) | |
112 | nec_8048_spi_send(spi, nec_8048_init_seq[i].addr, | |
113 | nec_8048_init_seq[i].dat); | |
114 | udelay(20); | |
115 | nec_8048_spi_send(spi, nec_8048_init_seq[i].addr, | |
116 | nec_8048_init_seq[i].dat); | |
117 | return 0; | |
118 | } | |
119 | ||
120 | static int nec_8048_connect(struct omap_dss_device *dssdev) | |
121 | { | |
122 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
123 | struct omap_dss_device *in = ddata->in; | |
124 | int r; | |
125 | ||
126 | if (omapdss_device_is_connected(dssdev)) | |
127 | return 0; | |
128 | ||
129 | r = in->ops.dpi->connect(in, dssdev); | |
130 | if (r) | |
131 | return r; | |
132 | ||
133 | return 0; | |
134 | } | |
135 | ||
136 | static void nec_8048_disconnect(struct omap_dss_device *dssdev) | |
137 | { | |
138 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
139 | struct omap_dss_device *in = ddata->in; | |
140 | ||
141 | if (!omapdss_device_is_connected(dssdev)) | |
142 | return; | |
143 | ||
144 | in->ops.dpi->disconnect(in, dssdev); | |
145 | } | |
146 | ||
147 | static int nec_8048_enable(struct omap_dss_device *dssdev) | |
148 | { | |
149 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
150 | struct omap_dss_device *in = ddata->in; | |
151 | int r; | |
152 | ||
153 | if (!omapdss_device_is_connected(dssdev)) | |
154 | return -ENODEV; | |
155 | ||
156 | if (omapdss_device_is_enabled(dssdev)) | |
157 | return 0; | |
158 | ||
b36250d8 TV |
159 | if (ddata->data_lines) |
160 | in->ops.dpi->set_data_lines(in, ddata->data_lines); | |
6077ce8d TV |
161 | in->ops.dpi->set_timings(in, &ddata->videomode); |
162 | ||
163 | r = in->ops.dpi->enable(in); | |
164 | if (r) | |
165 | return r; | |
166 | ||
167 | if (gpio_is_valid(ddata->res_gpio)) | |
168 | gpio_set_value_cansleep(ddata->res_gpio, 1); | |
169 | ||
170 | dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; | |
171 | ||
172 | return 0; | |
173 | } | |
174 | ||
175 | static void nec_8048_disable(struct omap_dss_device *dssdev) | |
176 | { | |
177 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
178 | struct omap_dss_device *in = ddata->in; | |
179 | ||
180 | if (!omapdss_device_is_enabled(dssdev)) | |
181 | return; | |
182 | ||
183 | if (gpio_is_valid(ddata->res_gpio)) | |
184 | gpio_set_value_cansleep(ddata->res_gpio, 0); | |
185 | ||
186 | in->ops.dpi->disable(in); | |
187 | ||
188 | dssdev->state = OMAP_DSS_DISPLAY_DISABLED; | |
189 | } | |
190 | ||
191 | static void nec_8048_set_timings(struct omap_dss_device *dssdev, | |
192 | struct omap_video_timings *timings) | |
193 | { | |
194 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
195 | struct omap_dss_device *in = ddata->in; | |
196 | ||
197 | ddata->videomode = *timings; | |
198 | dssdev->panel.timings = *timings; | |
199 | ||
200 | in->ops.dpi->set_timings(in, timings); | |
201 | } | |
202 | ||
203 | static void nec_8048_get_timings(struct omap_dss_device *dssdev, | |
204 | struct omap_video_timings *timings) | |
205 | { | |
206 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
207 | ||
208 | *timings = ddata->videomode; | |
209 | } | |
210 | ||
211 | static int nec_8048_check_timings(struct omap_dss_device *dssdev, | |
212 | struct omap_video_timings *timings) | |
213 | { | |
214 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
215 | struct omap_dss_device *in = ddata->in; | |
216 | ||
217 | return in->ops.dpi->check_timings(in, timings); | |
218 | } | |
219 | ||
220 | static struct omap_dss_driver nec_8048_ops = { | |
221 | .connect = nec_8048_connect, | |
222 | .disconnect = nec_8048_disconnect, | |
223 | ||
224 | .enable = nec_8048_enable, | |
225 | .disable = nec_8048_disable, | |
226 | ||
227 | .set_timings = nec_8048_set_timings, | |
228 | .get_timings = nec_8048_get_timings, | |
229 | .check_timings = nec_8048_check_timings, | |
230 | ||
231 | .get_resolution = omapdss_default_get_resolution, | |
232 | }; | |
233 | ||
b36250d8 TV |
234 | static int nec_8048_probe_of(struct spi_device *spi) |
235 | { | |
236 | struct device_node *node = spi->dev.of_node; | |
237 | struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev); | |
238 | struct omap_dss_device *in; | |
239 | int gpio; | |
240 | ||
241 | gpio = of_get_named_gpio(node, "reset-gpios", 0); | |
242 | if (!gpio_is_valid(gpio)) { | |
243 | dev_err(&spi->dev, "failed to parse enable gpio\n"); | |
244 | return gpio; | |
245 | } | |
246 | ddata->res_gpio = gpio; | |
247 | ||
248 | /* XXX the panel spec doesn't mention any QVGA pin?? */ | |
249 | ddata->qvga_gpio = -ENOENT; | |
250 | ||
251 | in = omapdss_of_find_source_for_first_ep(node); | |
252 | if (IS_ERR(in)) { | |
253 | dev_err(&spi->dev, "failed to find video source\n"); | |
254 | return PTR_ERR(in); | |
255 | } | |
256 | ||
257 | ddata->in = in; | |
258 | ||
259 | return 0; | |
260 | } | |
261 | ||
6077ce8d TV |
262 | static int nec_8048_probe(struct spi_device *spi) |
263 | { | |
264 | struct panel_drv_data *ddata; | |
265 | struct omap_dss_device *dssdev; | |
266 | int r; | |
267 | ||
268 | dev_dbg(&spi->dev, "%s\n", __func__); | |
269 | ||
270 | spi->mode = SPI_MODE_0; | |
271 | spi->bits_per_word = 32; | |
272 | ||
273 | r = spi_setup(spi); | |
274 | if (r < 0) { | |
275 | dev_err(&spi->dev, "spi_setup failed: %d\n", r); | |
276 | return r; | |
277 | } | |
278 | ||
279 | init_nec_8048_wvga_lcd(spi); | |
280 | ||
281 | ddata = devm_kzalloc(&spi->dev, sizeof(*ddata), GFP_KERNEL); | |
282 | if (ddata == NULL) | |
283 | return -ENOMEM; | |
284 | ||
285 | dev_set_drvdata(&spi->dev, ddata); | |
286 | ||
287 | ddata->spi = spi; | |
288 | ||
367aa94c | 289 | if (!spi->dev.of_node) |
6077ce8d | 290 | return -ENODEV; |
367aa94c TV |
291 | |
292 | r = nec_8048_probe_of(spi); | |
293 | if (r) | |
294 | return r; | |
6077ce8d TV |
295 | |
296 | if (gpio_is_valid(ddata->qvga_gpio)) { | |
297 | r = devm_gpio_request_one(&spi->dev, ddata->qvga_gpio, | |
298 | GPIOF_OUT_INIT_HIGH, "lcd QVGA"); | |
299 | if (r) | |
300 | goto err_gpio; | |
301 | } | |
302 | ||
303 | if (gpio_is_valid(ddata->res_gpio)) { | |
304 | r = devm_gpio_request_one(&spi->dev, ddata->res_gpio, | |
305 | GPIOF_OUT_INIT_LOW, "lcd RES"); | |
306 | if (r) | |
307 | goto err_gpio; | |
308 | } | |
309 | ||
310 | ddata->videomode = nec_8048_panel_timings; | |
311 | ||
312 | dssdev = &ddata->dssdev; | |
313 | dssdev->dev = &spi->dev; | |
314 | dssdev->driver = &nec_8048_ops; | |
315 | dssdev->type = OMAP_DISPLAY_TYPE_DPI; | |
316 | dssdev->owner = THIS_MODULE; | |
317 | dssdev->panel.timings = ddata->videomode; | |
318 | ||
319 | r = omapdss_register_display(dssdev); | |
320 | if (r) { | |
321 | dev_err(&spi->dev, "Failed to register panel\n"); | |
322 | goto err_reg; | |
323 | } | |
324 | ||
325 | return 0; | |
326 | ||
327 | err_reg: | |
328 | err_gpio: | |
329 | omap_dss_put_device(ddata->in); | |
330 | return r; | |
331 | } | |
332 | ||
333 | static int nec_8048_remove(struct spi_device *spi) | |
334 | { | |
335 | struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev); | |
336 | struct omap_dss_device *dssdev = &ddata->dssdev; | |
337 | struct omap_dss_device *in = ddata->in; | |
338 | ||
339 | dev_dbg(&ddata->spi->dev, "%s\n", __func__); | |
340 | ||
341 | omapdss_unregister_display(dssdev); | |
342 | ||
343 | nec_8048_disable(dssdev); | |
344 | nec_8048_disconnect(dssdev); | |
345 | ||
346 | omap_dss_put_device(in); | |
347 | ||
348 | return 0; | |
349 | } | |
350 | ||
351 | #ifdef CONFIG_PM_SLEEP | |
352 | static int nec_8048_suspend(struct device *dev) | |
353 | { | |
354 | struct spi_device *spi = to_spi_device(dev); | |
355 | ||
356 | nec_8048_spi_send(spi, 2, 0x01); | |
357 | mdelay(40); | |
358 | ||
359 | return 0; | |
360 | } | |
361 | ||
362 | static int nec_8048_resume(struct device *dev) | |
363 | { | |
364 | struct spi_device *spi = to_spi_device(dev); | |
365 | ||
366 | /* reinitialize the panel */ | |
367 | spi_setup(spi); | |
368 | nec_8048_spi_send(spi, 2, 0x00); | |
369 | init_nec_8048_wvga_lcd(spi); | |
370 | ||
371 | return 0; | |
372 | } | |
373 | static SIMPLE_DEV_PM_OPS(nec_8048_pm_ops, nec_8048_suspend, | |
374 | nec_8048_resume); | |
375 | #define NEC_8048_PM_OPS (&nec_8048_pm_ops) | |
376 | #else | |
377 | #define NEC_8048_PM_OPS NULL | |
378 | #endif | |
379 | ||
b36250d8 TV |
380 | static const struct of_device_id nec_8048_of_match[] = { |
381 | { .compatible = "omapdss,nec,nl8048hl11", }, | |
382 | {}, | |
383 | }; | |
384 | ||
385 | MODULE_DEVICE_TABLE(of, nec_8048_of_match); | |
386 | ||
6077ce8d TV |
387 | static struct spi_driver nec_8048_driver = { |
388 | .driver = { | |
389 | .name = "panel-nec-nl8048hl11", | |
6077ce8d | 390 | .pm = NEC_8048_PM_OPS, |
b36250d8 | 391 | .of_match_table = nec_8048_of_match, |
422ccbd5 | 392 | .suppress_bind_attrs = true, |
6077ce8d TV |
393 | }, |
394 | .probe = nec_8048_probe, | |
395 | .remove = nec_8048_remove, | |
396 | }; | |
397 | ||
398 | module_spi_driver(nec_8048_driver); | |
399 | ||
b36250d8 | 400 | MODULE_ALIAS("spi:nec,nl8048hl11"); |
6077ce8d TV |
401 | MODULE_AUTHOR("Erik Gilling <konkers@android.com>"); |
402 | MODULE_DESCRIPTION("NEC-NL8048HL11 Driver"); | |
403 | MODULE_LICENSE("GPL"); |