[deliverable/linux.git] / drivers / gpu / drm / omapdrm / omap_drv.h

/*
 * drivers/gpu/drm/omapdrm/omap_drv.h
 *
 * Copyright (C) 2011 Texas Instruments
 * Author: Rob Clark <rob@ti.com>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published by
 * the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef __OMAP_DRV_H__
#define __OMAP_DRV_H__

#include <video/omapdss.h>
#include <linux/module.h>
#include <linux/types.h>
#include <drm/drmP.h>
#include <drm/drm_crtc_helper.h>
#include <drm/omap_drm.h>
#include <linux/platform_data/omap_drm.h>


#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
#define VERB(fmt, ...) if (0) DRM_DEBUG(fmt, ##__VA_ARGS__) /* verbose debug */

#define MODULE_NAME     "omapdrm"

/* max # of mapper-id's that can be assigned.. todo, come up with a better
 * (but still inexpensive) way to store/access per-buffer mapper private
 * data..
 */
#define MAX_MAPPERS 2

/* parameters which describe (unrotated) coordinates of scanout within a fb: */
struct omap_drm_window {
	uint32_t rotation;
	int32_t  crtc_x, crtc_y;		/* signed because can be offscreen */
	uint32_t crtc_w, crtc_h;
	uint32_t src_x, src_y;
	uint32_t src_w, src_h;
};

/* Once GO bit is set, we can't make further updates to shadowed registers
 * until the GO bit is cleared.  So various parts in the kms code that need
 * to update shadowed registers queue up a pair of callbacks, pre_apply
 * which is called before setting GO bit, and post_apply that is called
 * after GO bit is cleared.  The crtc manages the queuing, and everyone
 * else goes thru omap_crtc_apply() using these callbacks so that the
 * code which has to deal w/ GO bit state is centralized.
 */
struct omap_drm_apply {
	struct list_head pending_node, queued_node;
	bool queued;
	void (*pre_apply)(struct omap_drm_apply *apply);
	void (*post_apply)(struct omap_drm_apply *apply);
};

/* For transiently registering for different DSS irqs that various parts
 * of the KMS code need during setup/configuration.  We these are not
 * necessarily the same as what drm_vblank_get/put() are requesting, and
 * the hysteresis in drm_vblank_put() is not necessarily desirable for
 * internal housekeeping related irq usage.
 */
struct omap_drm_irq {
	struct list_head node;
	uint32_t irqmask;
	bool registered;
	void (*irq)(struct omap_drm_irq *irq, uint32_t irqstatus);
};

/* For KMS code that needs to wait for a certain # of IRQs:
 */
struct omap_irq_wait;
struct omap_irq_wait * omap_irq_wait_init(struct drm_device *dev,
		uint32_t irqmask, int count);
int omap_irq_wait(struct drm_device *dev, struct omap_irq_wait *wait,
		unsigned long timeout);

struct omap_drm_private {
	uint32_t omaprev;

	unsigned int num_crtcs;
	struct drm_crtc *crtcs[8];

	unsigned int num_planes;
	struct drm_plane *planes[8];

	unsigned int num_encoders;
	struct drm_encoder *encoders[8];

	unsigned int num_connectors;
	struct drm_connector *connectors[8];

	struct drm_fb_helper *fbdev;

	struct workqueue_struct *wq;

	/* list of GEM objects: */
	struct list_head obj_list;

	bool has_dmm;

	/* properties: */
	struct drm_property *rotation_prop;
	struct drm_property *zorder_prop;

	/* irq handling: */
	struct list_head irq_list;    /* list of omap_drm_irq */
	uint32_t vblank_mask;         /* irq bits set for userspace vblank */
	struct omap_drm_irq error_handler;
};

/* this should probably be in drm-core to standardize amongst drivers */
#define DRM_ROTATE_0	0
#define DRM_ROTATE_90	1
#define DRM_ROTATE_180	2
#define DRM_ROTATE_270	3
#define DRM_REFLECT_X	4
#define DRM_REFLECT_Y	5

#ifdef CONFIG_DEBUG_FS
int omap_debugfs_init(struct drm_minor *minor);
void omap_debugfs_cleanup(struct drm_minor *minor);
void omap_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
void omap_gem_describe(struct drm_gem_object *obj, struct seq_file *m);
void omap_gem_describe_objects(struct list_head *list, struct seq_file *m);
#endif

#ifdef CONFIG_PM
int omap_gem_resume(struct device *dev);
#endif

int omap_irq_enable_vblank(struct drm_device *dev, int crtc_id);
void omap_irq_disable_vblank(struct drm_device *dev, int crtc_id);
irqreturn_t omap_irq_handler(DRM_IRQ_ARGS);
void omap_irq_preinstall(struct drm_device *dev);
int omap_irq_postinstall(struct drm_device *dev);
void omap_irq_uninstall(struct drm_device *dev);
void omap_irq_register(struct drm_device *dev, struct omap_drm_irq *irq);
void omap_irq_unregister(struct drm_device *dev, struct omap_drm_irq *irq);
int omap_drm_irq_uninstall(struct drm_device *dev);
int omap_drm_irq_install(struct drm_device *dev);

struct drm_fb_helper *omap_fbdev_init(struct drm_device *dev);
void omap_fbdev_free(struct drm_device *dev);

const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc);
enum omap_channel omap_crtc_channel(struct drm_crtc *crtc);
int omap_crtc_apply(struct drm_crtc *crtc,
		struct omap_drm_apply *apply);
struct drm_crtc *omap_crtc_init(struct drm_device *dev,
		struct drm_plane *plane, enum omap_channel channel, int id);

struct drm_plane *omap_plane_init(struct drm_device *dev,
		int plane_id, bool private_plane);
int omap_plane_dpms(struct drm_plane *plane, int mode);
int omap_plane_mode_set(struct drm_plane *plane,
		struct drm_crtc *crtc, struct drm_framebuffer *fb,
		int crtc_x, int crtc_y,
		unsigned int crtc_w, unsigned int crtc_h,
		uint32_t src_x, uint32_t src_y,
		uint32_t src_w, uint32_t src_h,
		void (*fxn)(void *), void *arg);
void omap_plane_install_properties(struct drm_plane *plane,
		struct drm_mode_object *obj);
int omap_plane_set_property(struct drm_plane *plane,
		struct drm_property *property, uint64_t val);

struct drm_encoder *omap_encoder_init(struct drm_device *dev,
		struct omap_dss_device *dssdev);
int omap_encoder_set_enabled(struct drm_encoder *encoder, bool enabled);
int omap_encoder_update(struct drm_encoder *encoder,
		struct omap_overlay_manager *mgr,
		struct omap_video_timings *timings);

struct drm_connector *omap_connector_init(struct drm_device *dev,
		int connector_type, struct omap_dss_device *dssdev,
		struct drm_encoder *encoder);
struct drm_encoder *omap_connector_attached_encoder(
		struct drm_connector *connector);
void omap_connector_flush(struct drm_connector *connector,
		int x, int y, int w, int h);

void copy_timings_omap_to_drm(struct drm_display_mode *mode,
		struct omap_video_timings *timings);
void copy_timings_drm_to_omap(struct omap_video_timings *timings,
		struct drm_display_mode *mode);

uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats,
		uint32_t max_formats, enum omap_color_mode supported_modes);
struct drm_framebuffer *omap_framebuffer_create(struct drm_device *dev,
		struct drm_file *file, struct drm_mode_fb_cmd2 *mode_cmd);
struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev,
		struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object **bos);
struct drm_gem_object *omap_framebuffer_bo(struct drm_framebuffer *fb, int p);
int omap_framebuffer_replace(struct drm_framebuffer *a,
		struct drm_framebuffer *b, void *arg,
		void (*unpin)(void *arg, struct drm_gem_object *bo));
void omap_framebuffer_update_scanout(struct drm_framebuffer *fb,
		struct omap_drm_window *win, struct omap_overlay_info *info);
struct drm_connector *omap_framebuffer_get_next_connector(
		struct drm_framebuffer *fb, struct drm_connector *from);
void omap_framebuffer_flush(struct drm_framebuffer *fb,
		int x, int y, int w, int h);

void omap_gem_init(struct drm_device *dev);
void omap_gem_deinit(struct drm_device *dev);

struct drm_gem_object *omap_gem_new(struct drm_device *dev,
		union omap_gem_size gsize, uint32_t flags);
int omap_gem_new_handle(struct drm_device *dev, struct drm_file *file,
		union omap_gem_size gsize, uint32_t flags, uint32_t *handle);
void omap_gem_free_object(struct drm_gem_object *obj);
int omap_gem_init_object(struct drm_gem_object *obj);
void *omap_gem_vaddr(struct drm_gem_object *obj);
int omap_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
		uint32_t handle, uint64_t *offset);
int omap_gem_dumb_destroy(struct drm_file *file, struct drm_device *dev,
		uint32_t handle);
int omap_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
		struct drm_mode_create_dumb *args);
int omap_gem_mmap(struct file *filp, struct vm_area_struct *vma);
int omap_gem_mmap_obj(struct drm_gem_object *obj,
		struct vm_area_struct *vma);
int omap_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
int omap_gem_op_start(struct drm_gem_object *obj, enum omap_gem_op op);
int omap_gem_op_finish(struct drm_gem_object *obj, enum omap_gem_op op);
int omap_gem_op_sync(struct drm_gem_object *obj, enum omap_gem_op op);
int omap_gem_op_async(struct drm_gem_object *obj, enum omap_gem_op op,
		void (*fxn)(void *arg), void *arg);
int omap_gem_roll(struct drm_gem_object *obj, uint32_t roll);
void omap_gem_cpu_sync(struct drm_gem_object *obj, int pgoff);
void omap_gem_dma_sync(struct drm_gem_object *obj,
		enum dma_data_direction dir);
int omap_gem_get_paddr(struct drm_gem_object *obj,
		dma_addr_t *paddr, bool remap);
int omap_gem_put_paddr(struct drm_gem_object *obj);
int omap_gem_get_pages(struct drm_gem_object *obj, struct page ***pages,
		bool remap);
int omap_gem_put_pages(struct drm_gem_object *obj);
uint32_t omap_gem_flags(struct drm_gem_object *obj);
int omap_gem_rotated_paddr(struct drm_gem_object *obj, uint32_t orient,
		int x, int y, dma_addr_t *paddr);
uint64_t omap_gem_mmap_offset(struct drm_gem_object *obj);
size_t omap_gem_mmap_size(struct drm_gem_object *obj);
int omap_gem_tiled_size(struct drm_gem_object *obj, uint16_t *w, uint16_t *h);
int omap_gem_tiled_stride(struct drm_gem_object *obj, uint32_t orient);

struct dma_buf *omap_gem_prime_export(struct drm_device *dev,
		struct drm_gem_object *obj, int flags);
struct drm_gem_object *omap_gem_prime_import(struct drm_device *dev,
		struct dma_buf *buffer);

static inline int align_pitch(int pitch, int width, int bpp)
{
	int bytespp = (bpp + 7) / 8;
	/* in case someone tries to feed us a completely bogus stride: */
	pitch = max(pitch, width * bytespp);
	/* PVR needs alignment to 8 pixels.. right now that is the most
	 * restrictive stride requirement..
	 */
	return ALIGN(pitch, 8 * bytespp);
}

/* map crtc to vblank mask */
uint32_t pipe2vbl(struct drm_crtc *crtc);
struct omap_dss_device *omap_encoder_get_dssdev(struct drm_encoder *encoder);

/* should these be made into common util helpers?
 */

static inline int objects_lookup(struct drm_device *dev,
		struct drm_file *filp, uint32_t pixel_format,
		struct drm_gem_object **bos, uint32_t *handles)
{
	int i, n = drm_format_num_planes(pixel_format);

	for (i = 0; i < n; i++) {
		bos[i] = drm_gem_object_lookup(dev, filp, handles[i]);
		if (!bos[i])
			goto fail;

	}

	return 0;

fail:
	while (--i > 0)
		drm_gem_object_unreference_unlocked(bos[i]);

	return -ENOENT;
}

#endif /* __OMAP_DRV_H__ */
Commit	Line	Data
cd5351f4	1	/*
8bb0daff	2	* drivers/gpu/drm/omapdrm/omap_drv.h
cd5351f4 RC	3	*
	4	* Copyright (C) 2011 Texas Instruments
	5	* Author: Rob Clark <rob@ti.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify it
	8	* under the terms of the GNU General Public License version 2 as published by
	9	* the Free Software Foundation.
	10	*
	11	* This program is distributed in the hope that it will be useful, but WITHOUT
	12	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	13	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	14	* more details.
	15	*
	16	* You should have received a copy of the GNU General Public License along with
	17	* this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	#ifndef __OMAP_DRV_H__
	21	#define __OMAP_DRV_H__
	22
	23	#include <video/omapdss.h>
	24	#include <linux/module.h>
	25	#include <linux/types.h>
	26	#include <drm/drmP.h>
ae43d7ca	27	#include <drm/drm_crtc_helper.h>
8bb0daff	28	#include <drm/omap_drm.h>
e2fb5052	29	#include <linux/platform_data/omap_drm.h>
cd5351f4	30
f5f9454c	31
cd5351f4 RC	32	#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
	33	#define VERB(fmt, ...) if (0) DRM_DEBUG(fmt, ##__VA_ARGS__) /* verbose debug */
	34
	35	#define MODULE_NAME "omapdrm"
	36
	37	/* max # of mapper-id's that can be assigned.. todo, come up with a better
	38	* (but still inexpensive) way to store/access per-buffer mapper private
	39	* data..
	40	*/
	41	#define MAX_MAPPERS 2
	42
f5f9454c RC	43	/* parameters which describe (unrotated) coordinates of scanout within a fb: */
	44	struct omap_drm_window {
	45	uint32_t rotation;
	46	int32_t crtc_x, crtc_y; /* signed because can be offscreen */
	47	uint32_t crtc_w, crtc_h;
	48	uint32_t src_x, src_y;
	49	uint32_t src_w, src_h;
	50	};
	51
	52	/* Once GO bit is set, we can't make further updates to shadowed registers
	53	* until the GO bit is cleared. So various parts in the kms code that need
	54	* to update shadowed registers queue up a pair of callbacks, pre_apply
	55	* which is called before setting GO bit, and post_apply that is called
	56	* after GO bit is cleared. The crtc manages the queuing, and everyone
	57	* else goes thru omap_crtc_apply() using these callbacks so that the
	58	* code which has to deal w/ GO bit state is centralized.
	59	*/
	60	struct omap_drm_apply {
	61	struct list_head pending_node, queued_node;
	62	bool queued;
	63	void (pre_apply)(struct omap_drm_apply apply);
	64	void (post_apply)(struct omap_drm_apply apply);
	65	};
	66
	67	/* For transiently registering for different DSS irqs that various parts
	68	* of the KMS code need during setup/configuration. We these are not
	69	* necessarily the same as what drm_vblank_get/put() are requesting, and
	70	* the hysteresis in drm_vblank_put() is not necessarily desirable for
	71	* internal housekeeping related irq usage.
	72	*/
	73	struct omap_drm_irq {
	74	struct list_head node;
	75	uint32_t irqmask;
	76	bool registered;
	77	void (irq)(struct omap_drm_irq irq, uint32_t irqstatus);
	78	};
	79
	80	/* For KMS code that needs to wait for a certain # of IRQs:
	81	*/
	82	struct omap_irq_wait;
	83	struct omap_irq_wait * omap_irq_wait_init(struct drm_device *dev,
	84	uint32_t irqmask, int count);
	85	int omap_irq_wait(struct drm_device dev, struct omap_irq_wait wait,
	86	unsigned long timeout);
	87
cd5351f4	88	struct omap_drm_private {
5e3b0874 RC	89	uint32_t omaprev;
5e3b0874 RC	90
cd5351f4 RC	91	unsigned int num_crtcs;
cd5351f4 RC	92	struct drm_crtc *crtcs[8];
f6b6036e	93
bb5c2d9a RC	94	unsigned int num_planes;
bb5c2d9a RC	95	struct drm_plane *planes[8];
f6b6036e	96
cd5351f4 RC	97	unsigned int num_encoders;
cd5351f4 RC	98	struct drm_encoder *encoders[8];
f6b6036e	99
cd5351f4 RC	100	unsigned int num_connectors;
	101	struct drm_connector *connectors[8];
	102
	103	struct drm_fb_helper *fbdev;
a6a91827	104
5609f7fe RC	105	struct workqueue_struct *wq;
5609f7fe RC	106
f5f9454c	107	/* list of GEM objects: */
f6b6036e RC	108	struct list_head obj_list;
f6b6036e RC	109
a6a91827	110	bool has_dmm;
3c810c61 RC	111
	112	/* properties: */
	113	struct drm_property *rotation_prop;
8451b5ad	114	struct drm_property *zorder_prop;
f5f9454c RC	115
	116	/* irq handling: */
	117	struct list_head irq_list; /* list of omap_drm_irq */
	118	uint32_t vblank_mask; /* irq bits set for userspace vblank */
	119	struct omap_drm_irq error_handler;
3c810c61 RC	120	};
	121
	122	/* this should probably be in drm-core to standardize amongst drivers */
	123	#define DRM_ROTATE_0 0
	124	#define DRM_ROTATE_90 1
	125	#define DRM_ROTATE_180 2
	126	#define DRM_ROTATE_270 3
	127	#define DRM_REFLECT_X 4
	128	#define DRM_REFLECT_Y 5
	129
6169a148 AG	130	#ifdef CONFIG_DEBUG_FS
	131	int omap_debugfs_init(struct drm_minor *minor);
	132	void omap_debugfs_cleanup(struct drm_minor *minor);
f6b6036e RC	133	void omap_framebuffer_describe(struct drm_framebuffer fb, struct seq_file m);
	134	void omap_gem_describe(struct drm_gem_object obj, struct seq_file m);
	135	void omap_gem_describe_objects(struct list_head list, struct seq_file m);
6169a148 AG	136	#endif
6169a148 AG	137
4836d157 AG	138	#ifdef CONFIG_PM
	139	int omap_gem_resume(struct device *dev);
	140	#endif
	141
0d8f371f AT	142	int omap_irq_enable_vblank(struct drm_device *dev, int crtc_id);
0d8f371f AT	143	void omap_irq_disable_vblank(struct drm_device *dev, int crtc_id);
f5f9454c RC	144	irqreturn_t omap_irq_handler(DRM_IRQ_ARGS);
	145	void omap_irq_preinstall(struct drm_device *dev);
	146	int omap_irq_postinstall(struct drm_device *dev);
	147	void omap_irq_uninstall(struct drm_device *dev);
	148	void omap_irq_register(struct drm_device dev, struct omap_drm_irq irq);
	149	void omap_irq_unregister(struct drm_device dev, struct omap_drm_irq irq);
	150	int omap_drm_irq_uninstall(struct drm_device *dev);
	151	int omap_drm_irq_install(struct drm_device *dev);
	152
cd5351f4 RC	153	struct drm_fb_helper omap_fbdev_init(struct drm_device dev);
	154	void omap_fbdev_free(struct drm_device *dev);
	155
f5f9454c RC	156	const struct omap_video_timings omap_crtc_timings(struct drm_crtc crtc);
	157	enum omap_channel omap_crtc_channel(struct drm_crtc *crtc);
	158	int omap_crtc_apply(struct drm_crtc *crtc,
	159	struct omap_drm_apply *apply);
cd5351f4	160	struct drm_crtc omap_crtc_init(struct drm_device dev,
f5f9454c	161	struct drm_plane *plane, enum omap_channel channel, int id);
bb5c2d9a RC	162
bb5c2d9a RC	163	struct drm_plane omap_plane_init(struct drm_device dev,
f5f9454c	164	int plane_id, bool private_plane);
bb5c2d9a	165	int omap_plane_dpms(struct drm_plane *plane, int mode);
2f53700d RC	166	int omap_plane_mode_set(struct drm_plane *plane,
	167	struct drm_crtc crtc, struct drm_framebuffer fb,
	168	int crtc_x, int crtc_y,
	169	unsigned int crtc_w, unsigned int crtc_h,
	170	uint32_t src_x, uint32_t src_y,
f5f9454c	171	uint32_t src_w, uint32_t src_h,
72d0c336	172	void (fxn)(void ), void *arg);
3c810c61 RC	173	void omap_plane_install_properties(struct drm_plane *plane,
	174	struct drm_mode_object *obj);
	175	int omap_plane_set_property(struct drm_plane *plane,
	176	struct drm_property *property, uint64_t val);
cd5351f4 RC	177
cd5351f4 RC	178	struct drm_encoder omap_encoder_init(struct drm_device dev,
f5f9454c RC	179	struct omap_dss_device *dssdev);
	180	int omap_encoder_set_enabled(struct drm_encoder *encoder, bool enabled);
	181	int omap_encoder_update(struct drm_encoder *encoder,
	182	struct omap_overlay_manager *mgr,
	183	struct omap_video_timings *timings);
	184
	185	struct drm_connector omap_connector_init(struct drm_device dev,
	186	int connector_type, struct omap_dss_device *dssdev,
cd5351f4 RC	187	struct drm_encoder *encoder);
	188	struct drm_encoder *omap_connector_attached_encoder(
	189	struct drm_connector *connector);
cd5351f4 RC	190	void omap_connector_flush(struct drm_connector *connector,
	191	int x, int y, int w, int h);
	192
f5f9454c RC	193	void copy_timings_omap_to_drm(struct drm_display_mode *mode,
	194	struct omap_video_timings *timings);
	195	void copy_timings_drm_to_omap(struct omap_video_timings *timings,
	196	struct drm_display_mode *mode);
	197
a890e662 RC	198	uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats,
a890e662 RC	199	uint32_t max_formats, enum omap_color_mode supported_modes);
cd5351f4	200	struct drm_framebuffer omap_framebuffer_create(struct drm_device dev,
ae43d7ca	201	struct drm_file file, struct drm_mode_fb_cmd2 mode_cmd);
cd5351f4	202	struct drm_framebuffer omap_framebuffer_init(struct drm_device dev,
ae43d7ca	203	struct drm_mode_fb_cmd2 mode_cmd, struct drm_gem_object *bos);
9a0774e0	204	struct drm_gem_object omap_framebuffer_bo(struct drm_framebuffer fb, int p);
b33f34d3 RC	205	int omap_framebuffer_replace(struct drm_framebuffer *a,
	206	struct drm_framebuffer b, void arg,
	207	void (unpin)(void arg, struct drm_gem_object *bo));
3c810c61 RC	208	void omap_framebuffer_update_scanout(struct drm_framebuffer *fb,
3c810c61 RC	209	struct omap_drm_window win, struct omap_overlay_info info);
cd5351f4 RC	210	struct drm_connector *omap_framebuffer_get_next_connector(
	211	struct drm_framebuffer fb, struct drm_connector from);
	212	void omap_framebuffer_flush(struct drm_framebuffer *fb,
	213	int x, int y, int w, int h);
	214
f7f9f453 RC	215	void omap_gem_init(struct drm_device *dev);
f7f9f453 RC	216	void omap_gem_deinit(struct drm_device *dev);
cd5351f4 RC	217
	218	struct drm_gem_object omap_gem_new(struct drm_device dev,
	219	union omap_gem_size gsize, uint32_t flags);
	220	int omap_gem_new_handle(struct drm_device dev, struct drm_file file,
	221	union omap_gem_size gsize, uint32_t flags, uint32_t *handle);
	222	void omap_gem_free_object(struct drm_gem_object *obj);
	223	int omap_gem_init_object(struct drm_gem_object *obj);
	224	void omap_gem_vaddr(struct drm_gem_object obj);
	225	int omap_gem_dumb_map_offset(struct drm_file file, struct drm_device dev,
	226	uint32_t handle, uint64_t *offset);
	227	int omap_gem_dumb_destroy(struct drm_file file, struct drm_device dev,
	228	uint32_t handle);
	229	int omap_gem_dumb_create(struct drm_file file, struct drm_device dev,
	230	struct drm_mode_create_dumb *args);
	231	int omap_gem_mmap(struct file filp, struct vm_area_struct vma);
8b6b569e RC	232	int omap_gem_mmap_obj(struct drm_gem_object *obj,
8b6b569e RC	233	struct vm_area_struct *vma);
cd5351f4 RC	234	int omap_gem_fault(struct vm_area_struct vma, struct vm_fault vmf);
	235	int omap_gem_op_start(struct drm_gem_object *obj, enum omap_gem_op op);
	236	int omap_gem_op_finish(struct drm_gem_object *obj, enum omap_gem_op op);
	237	int omap_gem_op_sync(struct drm_gem_object *obj, enum omap_gem_op op);
	238	int omap_gem_op_async(struct drm_gem_object *obj, enum omap_gem_op op,
	239	void (fxn)(void arg), void *arg);
a6a91827	240	int omap_gem_roll(struct drm_gem_object *obj, uint32_t roll);
8b6b569e RC	241	void omap_gem_cpu_sync(struct drm_gem_object *obj, int pgoff);
	242	void omap_gem_dma_sync(struct drm_gem_object *obj,
	243	enum dma_data_direction dir);
cd5351f4 RC	244	int omap_gem_get_paddr(struct drm_gem_object *obj,
	245	dma_addr_t *paddr, bool remap);
	246	int omap_gem_put_paddr(struct drm_gem_object *obj);
6ad11bc3 RC	247	int omap_gem_get_pages(struct drm_gem_object obj, struct page **pages,
	248	bool remap);
	249	int omap_gem_put_pages(struct drm_gem_object *obj);
	250	uint32_t omap_gem_flags(struct drm_gem_object *obj);
3c810c61 RC	251	int omap_gem_rotated_paddr(struct drm_gem_object *obj, uint32_t orient,
3c810c61 RC	252	int x, int y, dma_addr_t *paddr);
cd5351f4	253	uint64_t omap_gem_mmap_offset(struct drm_gem_object *obj);
f7f9f453	254	size_t omap_gem_mmap_size(struct drm_gem_object *obj);
3c810c61 RC	255	int omap_gem_tiled_size(struct drm_gem_object obj, uint16_t w, uint16_t *h);
3c810c61 RC	256	int omap_gem_tiled_stride(struct drm_gem_object *obj, uint32_t orient);
cd5351f4	257
7ced63cf	258	struct dma_buf omap_gem_prime_export(struct drm_device dev,
6ad11bc3	259	struct drm_gem_object *obj, int flags);
7ced63cf	260	struct drm_gem_object omap_gem_prime_import(struct drm_device dev,
3080b838	261	struct dma_buf *buffer);
6ad11bc3	262
cd5351f4 RC	263	static inline int align_pitch(int pitch, int width, int bpp)
	264	{
	265	int bytespp = (bpp + 7) / 8;
	266	/* in case someone tries to feed us a completely bogus stride: */
	267	pitch = max(pitch, width * bytespp);
	268	/* PVR needs alignment to 8 pixels.. right now that is the most
	269	* restrictive stride requirement..
	270	*/
	271	return ALIGN(pitch, 8 * bytespp);
	272	}
	273
f5f9454c	274	/* map crtc to vblank mask */
0d8f371f AT	275	uint32_t pipe2vbl(struct drm_crtc *crtc);
0d8f371f AT	276	struct omap_dss_device omap_encoder_get_dssdev(struct drm_encoder encoder);
f5f9454c	277
ae43d7ca RC	278	/* should these be made into common util helpers?
	279	*/
	280
	281	static inline int objects_lookup(struct drm_device *dev,
	282	struct drm_file *filp, uint32_t pixel_format,
	283	struct drm_gem_object *bos, uint32_t handles)
	284	{
	285	int i, n = drm_format_num_planes(pixel_format);
	286
	287	for (i = 0; i < n; i++) {
	288	bos[i] = drm_gem_object_lookup(dev, filp, handles[i]);
bc1e1581	289	if (!bos[i])
ae43d7ca	290	goto fail;
bc1e1581	291
ae43d7ca RC	292	}
	293
	294	return 0;
	295
	296	fail:
bc1e1581	297	while (--i > 0)
ae43d7ca	298	drm_gem_object_unreference_unlocked(bos[i]);
bc1e1581	299
ae43d7ca RC	300	return -ENOENT;
	301	}
	302
cd5351f4	303	#endif /* __OMAP_DRV_H__ */