Commit | Line | Data |
---|---|---|
cd5351f4 | 1 | /* |
8bb0daff | 2 | * drivers/gpu/drm/omapdrm/omap_fb.c |
cd5351f4 RC |
3 | * |
4 | * Copyright (C) 2011 Texas Instruments | |
5 | * Author: Rob Clark <rob@ti.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of the GNU General Public License version 2 as published by | |
9 | * the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | * more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License along with | |
17 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
2d278f54 LP |
20 | #include <drm/drm_crtc.h> |
21 | #include <drm/drm_crtc_helper.h> | |
cd5351f4 | 22 | |
2d278f54 LP |
23 | #include "omap_dmm_tiler.h" |
24 | #include "omap_drv.h" | |
cd5351f4 | 25 | |
cd5351f4 RC |
26 | /* |
27 | * framebuffer funcs | |
28 | */ | |
29 | ||
ae43d7ca RC |
30 | /* per-format info: */ |
31 | struct format { | |
32 | enum omap_color_mode dss_format; | |
33 | uint32_t pixel_format; | |
34 | struct { | |
35 | int stride_bpp; /* this times width is stride */ | |
36 | int sub_y; /* sub-sample in y dimension */ | |
37 | } planes[4]; | |
38 | bool yuv; | |
39 | }; | |
40 | ||
41 | static const struct format formats[] = { | |
42 | /* 16bpp [A]RGB: */ | |
43 | { OMAP_DSS_COLOR_RGB16, DRM_FORMAT_RGB565, {{2, 1}}, false }, /* RGB16-565 */ | |
44 | { OMAP_DSS_COLOR_RGB12U, DRM_FORMAT_RGBX4444, {{2, 1}}, false }, /* RGB12x-4444 */ | |
45 | { OMAP_DSS_COLOR_RGBX16, DRM_FORMAT_XRGB4444, {{2, 1}}, false }, /* xRGB12-4444 */ | |
46 | { OMAP_DSS_COLOR_RGBA16, DRM_FORMAT_RGBA4444, {{2, 1}}, false }, /* RGBA12-4444 */ | |
47 | { OMAP_DSS_COLOR_ARGB16, DRM_FORMAT_ARGB4444, {{2, 1}}, false }, /* ARGB16-4444 */ | |
48 | { OMAP_DSS_COLOR_XRGB16_1555, DRM_FORMAT_XRGB1555, {{2, 1}}, false }, /* xRGB15-1555 */ | |
49 | { OMAP_DSS_COLOR_ARGB16_1555, DRM_FORMAT_ARGB1555, {{2, 1}}, false }, /* ARGB16-1555 */ | |
50 | /* 24bpp RGB: */ | |
51 | { OMAP_DSS_COLOR_RGB24P, DRM_FORMAT_RGB888, {{3, 1}}, false }, /* RGB24-888 */ | |
52 | /* 32bpp [A]RGB: */ | |
53 | { OMAP_DSS_COLOR_RGBX32, DRM_FORMAT_RGBX8888, {{4, 1}}, false }, /* RGBx24-8888 */ | |
54 | { OMAP_DSS_COLOR_RGB24U, DRM_FORMAT_XRGB8888, {{4, 1}}, false }, /* xRGB24-8888 */ | |
55 | { OMAP_DSS_COLOR_RGBA32, DRM_FORMAT_RGBA8888, {{4, 1}}, false }, /* RGBA32-8888 */ | |
56 | { OMAP_DSS_COLOR_ARGB32, DRM_FORMAT_ARGB8888, {{4, 1}}, false }, /* ARGB32-8888 */ | |
57 | /* YUV: */ | |
58 | { OMAP_DSS_COLOR_NV12, DRM_FORMAT_NV12, {{1, 1}, {1, 2}}, true }, | |
59 | { OMAP_DSS_COLOR_YUV2, DRM_FORMAT_YUYV, {{2, 1}}, true }, | |
60 | { OMAP_DSS_COLOR_UYVY, DRM_FORMAT_UYVY, {{2, 1}}, true }, | |
61 | }; | |
62 | ||
a890e662 RC |
63 | /* convert from overlay's pixel formats bitmask to an array of fourcc's */ |
64 | uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats, | |
65 | uint32_t max_formats, enum omap_color_mode supported_modes) | |
66 | { | |
67 | uint32_t nformats = 0; | |
68 | int i = 0; | |
69 | ||
70 | for (i = 0; i < ARRAY_SIZE(formats) && nformats < max_formats; i++) | |
71 | if (formats[i].dss_format & supported_modes) | |
72 | pixel_formats[nformats++] = formats[i].pixel_format; | |
73 | ||
74 | return nformats; | |
75 | } | |
76 | ||
9a0774e0 RC |
77 | /* per-plane info for the fb: */ |
78 | struct plane { | |
79 | struct drm_gem_object *bo; | |
80 | uint32_t pitch; | |
81 | uint32_t offset; | |
82 | dma_addr_t paddr; | |
83 | }; | |
84 | ||
cd5351f4 RC |
85 | #define to_omap_framebuffer(x) container_of(x, struct omap_framebuffer, base) |
86 | ||
87 | struct omap_framebuffer { | |
88 | struct drm_framebuffer base; | |
f36eb5a8 | 89 | int pin_count; |
ae43d7ca | 90 | const struct format *format; |
9a0774e0 | 91 | struct plane planes[4]; |
f524ab7c TV |
92 | /* lock for pinning (pin_count and planes.paddr) */ |
93 | struct mutex lock; | |
cd5351f4 RC |
94 | }; |
95 | ||
96 | static int omap_framebuffer_create_handle(struct drm_framebuffer *fb, | |
97 | struct drm_file *file_priv, | |
98 | unsigned int *handle) | |
99 | { | |
100 | struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb); | |
9a0774e0 RC |
101 | return drm_gem_handle_create(file_priv, |
102 | omap_fb->planes[0].bo, handle); | |
cd5351f4 RC |
103 | } |
104 | ||
105 | static void omap_framebuffer_destroy(struct drm_framebuffer *fb) | |
106 | { | |
cd5351f4 | 107 | struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb); |
9f18c95a | 108 | int i, n = drm_format_num_planes(fb->pixel_format); |
cd5351f4 RC |
109 | |
110 | DBG("destroy: FB ID: %d (%p)", fb->base.id, fb); | |
111 | ||
112 | drm_framebuffer_cleanup(fb); | |
113 | ||
9a0774e0 RC |
114 | for (i = 0; i < n; i++) { |
115 | struct plane *plane = &omap_fb->planes[i]; | |
116 | if (plane->bo) | |
117 | drm_gem_object_unreference_unlocked(plane->bo); | |
cd5351f4 RC |
118 | } |
119 | ||
120 | kfree(omap_fb); | |
121 | } | |
122 | ||
123 | static int omap_framebuffer_dirty(struct drm_framebuffer *fb, | |
124 | struct drm_file *file_priv, unsigned flags, unsigned color, | |
125 | struct drm_clip_rect *clips, unsigned num_clips) | |
126 | { | |
cd5351f4 RC |
127 | return 0; |
128 | } | |
129 | ||
130 | static const struct drm_framebuffer_funcs omap_framebuffer_funcs = { | |
131 | .create_handle = omap_framebuffer_create_handle, | |
132 | .destroy = omap_framebuffer_destroy, | |
133 | .dirty = omap_framebuffer_dirty, | |
134 | }; | |
135 | ||
3c810c61 RC |
136 | static uint32_t get_linear_addr(struct plane *plane, |
137 | const struct format *format, int n, int x, int y) | |
138 | { | |
139 | uint32_t offset; | |
140 | ||
141 | offset = plane->offset + | |
142 | (x * format->planes[n].stride_bpp) + | |
143 | (y * plane->pitch / format->planes[n].sub_y); | |
144 | ||
145 | return plane->paddr + offset; | |
146 | } | |
147 | ||
9a0774e0 RC |
148 | /* update ovl info for scanout, handles cases of multi-planar fb's, etc. |
149 | */ | |
3c810c61 RC |
150 | void omap_framebuffer_update_scanout(struct drm_framebuffer *fb, |
151 | struct omap_drm_window *win, struct omap_overlay_info *info) | |
9a0774e0 RC |
152 | { |
153 | struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb); | |
154 | const struct format *format = omap_fb->format; | |
155 | struct plane *plane = &omap_fb->planes[0]; | |
3c810c61 RC |
156 | uint32_t x, y, orient = 0; |
157 | ||
158 | info->color_mode = format->dss_format; | |
159 | ||
160 | info->pos_x = win->crtc_x; | |
161 | info->pos_y = win->crtc_y; | |
162 | info->out_width = win->crtc_w; | |
163 | info->out_height = win->crtc_h; | |
164 | info->width = win->src_w; | |
165 | info->height = win->src_h; | |
166 | ||
167 | x = win->src_x; | |
168 | y = win->src_y; | |
169 | ||
170 | if (omap_gem_flags(plane->bo) & OMAP_BO_TILED) { | |
171 | uint32_t w = win->src_w; | |
172 | uint32_t h = win->src_h; | |
173 | ||
14152c8d | 174 | switch (win->rotation & DRM_ROTATE_MASK) { |
3c810c61 RC |
175 | default: |
176 | dev_err(fb->dev->dev, "invalid rotation: %02x", | |
177 | (uint32_t)win->rotation); | |
178 | /* fallthru to default to no rotation */ | |
179 | case 0: | |
180 | case BIT(DRM_ROTATE_0): | |
181 | orient = 0; | |
182 | break; | |
183 | case BIT(DRM_ROTATE_90): | |
184 | orient = MASK_XY_FLIP | MASK_X_INVERT; | |
185 | break; | |
186 | case BIT(DRM_ROTATE_180): | |
187 | orient = MASK_X_INVERT | MASK_Y_INVERT; | |
188 | break; | |
189 | case BIT(DRM_ROTATE_270): | |
190 | orient = MASK_XY_FLIP | MASK_Y_INVERT; | |
191 | break; | |
192 | } | |
9a0774e0 | 193 | |
3c810c61 RC |
194 | if (win->rotation & BIT(DRM_REFLECT_X)) |
195 | orient ^= MASK_X_INVERT; | |
196 | ||
197 | if (win->rotation & BIT(DRM_REFLECT_Y)) | |
198 | orient ^= MASK_Y_INVERT; | |
199 | ||
200 | /* adjust x,y offset for flip/invert: */ | |
201 | if (orient & MASK_XY_FLIP) | |
202 | swap(w, h); | |
203 | if (orient & MASK_Y_INVERT) | |
204 | y += h - 1; | |
205 | if (orient & MASK_X_INVERT) | |
206 | x += w - 1; | |
9a0774e0 | 207 | |
3c810c61 RC |
208 | omap_gem_rotated_paddr(plane->bo, orient, x, y, &info->paddr); |
209 | info->rotation_type = OMAP_DSS_ROT_TILER; | |
210 | info->screen_width = omap_gem_tiled_stride(plane->bo, orient); | |
211 | } else { | |
14152c8d | 212 | switch (win->rotation & DRM_ROTATE_MASK) { |
5ac96345 TV |
213 | case 0: |
214 | case BIT(DRM_ROTATE_0): | |
215 | /* OK */ | |
216 | break; | |
217 | ||
218 | default: | |
219 | dev_warn(fb->dev->dev, | |
220 | "rotation '%d' ignored for non-tiled fb\n", | |
221 | win->rotation); | |
222 | win->rotation = 0; | |
223 | break; | |
224 | } | |
225 | ||
3c810c61 RC |
226 | info->paddr = get_linear_addr(plane, format, 0, x, y); |
227 | info->rotation_type = OMAP_DSS_ROT_DMA; | |
228 | info->screen_width = plane->pitch; | |
229 | } | |
230 | ||
231 | /* convert to pixels: */ | |
232 | info->screen_width /= format->planes[0].stride_bpp; | |
9a0774e0 RC |
233 | |
234 | if (format->dss_format == OMAP_DSS_COLOR_NV12) { | |
235 | plane = &omap_fb->planes[1]; | |
3c810c61 RC |
236 | |
237 | if (info->rotation_type == OMAP_DSS_ROT_TILER) { | |
238 | WARN_ON(!(omap_gem_flags(plane->bo) & OMAP_BO_TILED)); | |
239 | omap_gem_rotated_paddr(plane->bo, orient, | |
240 | x/2, y/2, &info->p_uv_addr); | |
241 | } else { | |
242 | info->p_uv_addr = get_linear_addr(plane, format, 1, x, y); | |
243 | } | |
9a0774e0 RC |
244 | } else { |
245 | info->p_uv_addr = 0; | |
246 | } | |
247 | } | |
248 | ||
5833bd2f RC |
249 | /* pin, prepare for scanout: */ |
250 | int omap_framebuffer_pin(struct drm_framebuffer *fb) | |
b33f34d3 | 251 | { |
5833bd2f RC |
252 | struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb); |
253 | int ret, i, n = drm_format_num_planes(fb->pixel_format); | |
254 | ||
f524ab7c TV |
255 | mutex_lock(&omap_fb->lock); |
256 | ||
f36eb5a8 TV |
257 | if (omap_fb->pin_count > 0) { |
258 | omap_fb->pin_count++; | |
f524ab7c | 259 | mutex_unlock(&omap_fb->lock); |
f36eb5a8 TV |
260 | return 0; |
261 | } | |
262 | ||
5833bd2f RC |
263 | for (i = 0; i < n; i++) { |
264 | struct plane *plane = &omap_fb->planes[i]; | |
265 | ret = omap_gem_get_paddr(plane->bo, &plane->paddr, true); | |
266 | if (ret) | |
267 | goto fail; | |
268 | omap_gem_dma_sync(plane->bo, DMA_TO_DEVICE); | |
269 | } | |
b33f34d3 | 270 | |
f36eb5a8 TV |
271 | omap_fb->pin_count++; |
272 | ||
f524ab7c TV |
273 | mutex_unlock(&omap_fb->lock); |
274 | ||
5833bd2f | 275 | return 0; |
b33f34d3 | 276 | |
5833bd2f RC |
277 | fail: |
278 | for (i--; i >= 0; i--) { | |
279 | struct plane *plane = &omap_fb->planes[i]; | |
280 | omap_gem_put_paddr(plane->bo); | |
281 | plane->paddr = 0; | |
282 | } | |
b33f34d3 | 283 | |
f524ab7c TV |
284 | mutex_unlock(&omap_fb->lock); |
285 | ||
5833bd2f RC |
286 | return ret; |
287 | } | |
b33f34d3 | 288 | |
5833bd2f | 289 | /* unpin, no longer being scanned out: */ |
9c368506 | 290 | void omap_framebuffer_unpin(struct drm_framebuffer *fb) |
5833bd2f RC |
291 | { |
292 | struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb); | |
9c368506 | 293 | int i, n = drm_format_num_planes(fb->pixel_format); |
b33f34d3 | 294 | |
f524ab7c TV |
295 | mutex_lock(&omap_fb->lock); |
296 | ||
f36eb5a8 TV |
297 | omap_fb->pin_count--; |
298 | ||
f524ab7c TV |
299 | if (omap_fb->pin_count > 0) { |
300 | mutex_unlock(&omap_fb->lock); | |
9c368506 | 301 | return; |
f524ab7c | 302 | } |
f36eb5a8 | 303 | |
5833bd2f RC |
304 | for (i = 0; i < n; i++) { |
305 | struct plane *plane = &omap_fb->planes[i]; | |
9c368506 | 306 | omap_gem_put_paddr(plane->bo); |
5833bd2f | 307 | plane->paddr = 0; |
b33f34d3 RC |
308 | } |
309 | ||
f524ab7c | 310 | mutex_unlock(&omap_fb->lock); |
b33f34d3 RC |
311 | } |
312 | ||
9a0774e0 RC |
313 | struct drm_gem_object *omap_framebuffer_bo(struct drm_framebuffer *fb, int p) |
314 | { | |
315 | struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb); | |
9f18c95a | 316 | if (p >= drm_format_num_planes(fb->pixel_format)) |
9a0774e0 RC |
317 | return NULL; |
318 | return omap_fb->planes[p].bo; | |
cd5351f4 RC |
319 | } |
320 | ||
321 | /* iterate thru all the connectors, returning ones that are attached | |
322 | * to the same fb.. | |
323 | */ | |
324 | struct drm_connector *omap_framebuffer_get_next_connector( | |
325 | struct drm_framebuffer *fb, struct drm_connector *from) | |
326 | { | |
327 | struct drm_device *dev = fb->dev; | |
328 | struct list_head *connector_list = &dev->mode_config.connector_list; | |
329 | struct drm_connector *connector = from; | |
330 | ||
ddcd49ed | 331 | if (!from) |
06fb220b LP |
332 | return list_first_entry_or_null(connector_list, typeof(*from), |
333 | head); | |
cd5351f4 RC |
334 | |
335 | list_for_each_entry_from(connector, connector_list, head) { | |
336 | if (connector != from) { | |
337 | struct drm_encoder *encoder = connector->encoder; | |
338 | struct drm_crtc *crtc = encoder ? encoder->crtc : NULL; | |
f4510a27 | 339 | if (crtc && crtc->primary->fb == fb) |
cd5351f4 | 340 | return connector; |
ddcd49ed | 341 | |
cd5351f4 RC |
342 | } |
343 | } | |
344 | ||
345 | return NULL; | |
346 | } | |
cd5351f4 | 347 | |
f6b6036e RC |
348 | #ifdef CONFIG_DEBUG_FS |
349 | void omap_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m) | |
350 | { | |
351 | struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb); | |
352 | int i, n = drm_format_num_planes(fb->pixel_format); | |
353 | ||
354 | seq_printf(m, "fb: %dx%d@%4.4s\n", fb->width, fb->height, | |
355 | (char *)&fb->pixel_format); | |
356 | ||
357 | for (i = 0; i < n; i++) { | |
358 | struct plane *plane = &omap_fb->planes[i]; | |
359 | seq_printf(m, " %d: offset=%d pitch=%d, obj: ", | |
360 | i, plane->offset, plane->pitch); | |
361 | omap_gem_describe(plane->bo, m); | |
362 | } | |
363 | } | |
364 | #endif | |
365 | ||
cd5351f4 | 366 | struct drm_framebuffer *omap_framebuffer_create(struct drm_device *dev, |
1eb83451 | 367 | struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd) |
cd5351f4 | 368 | { |
ae43d7ca | 369 | struct drm_gem_object *bos[4]; |
cd5351f4 | 370 | struct drm_framebuffer *fb; |
ae43d7ca RC |
371 | int ret; |
372 | ||
373 | ret = objects_lookup(dev, file, mode_cmd->pixel_format, | |
374 | bos, mode_cmd->handles); | |
375 | if (ret) | |
376 | return ERR_PTR(ret); | |
377 | ||
378 | fb = omap_framebuffer_init(dev, mode_cmd, bos); | |
379 | if (IS_ERR(fb)) { | |
380 | int i, n = drm_format_num_planes(mode_cmd->pixel_format); | |
381 | for (i = 0; i < n; i++) | |
382 | drm_gem_object_unreference_unlocked(bos[i]); | |
383 | return fb; | |
cd5351f4 RC |
384 | } |
385 | return fb; | |
386 | } | |
387 | ||
388 | struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev, | |
1eb83451 | 389 | const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object **bos) |
cd5351f4 | 390 | { |
925e4940 | 391 | struct omap_framebuffer *omap_fb = NULL; |
cd5351f4 | 392 | struct drm_framebuffer *fb = NULL; |
ae43d7ca | 393 | const struct format *format = NULL; |
9a0774e0 | 394 | int ret, i, n = drm_format_num_planes(mode_cmd->pixel_format); |
cd5351f4 | 395 | |
ae43d7ca | 396 | DBG("create framebuffer: dev=%p, mode_cmd=%p (%dx%d@%4.4s)", |
cd5351f4 | 397 | dev, mode_cmd, mode_cmd->width, mode_cmd->height, |
ae43d7ca RC |
398 | (char *)&mode_cmd->pixel_format); |
399 | ||
400 | for (i = 0; i < ARRAY_SIZE(formats); i++) { | |
401 | if (formats[i].pixel_format == mode_cmd->pixel_format) { | |
402 | format = &formats[i]; | |
403 | break; | |
404 | } | |
405 | } | |
406 | ||
407 | if (!format) { | |
408 | dev_err(dev->dev, "unsupported pixel format: %4.4s\n", | |
409 | (char *)&mode_cmd->pixel_format); | |
410 | ret = -EINVAL; | |
411 | goto fail; | |
412 | } | |
cd5351f4 | 413 | |
cd5351f4 RC |
414 | omap_fb = kzalloc(sizeof(*omap_fb), GFP_KERNEL); |
415 | if (!omap_fb) { | |
ae43d7ca | 416 | ret = -ENOMEM; |
cd5351f4 RC |
417 | goto fail; |
418 | } | |
419 | ||
420 | fb = &omap_fb->base; | |
9a0774e0 | 421 | omap_fb->format = format; |
f524ab7c | 422 | mutex_init(&omap_fb->lock); |
cd5351f4 | 423 | |
9a0774e0 RC |
424 | for (i = 0; i < n; i++) { |
425 | struct plane *plane = &omap_fb->planes[i]; | |
426 | int size, pitch = mode_cmd->pitches[i]; | |
cd5351f4 | 427 | |
9a0774e0 RC |
428 | if (pitch < (mode_cmd->width * format->planes[i].stride_bpp)) { |
429 | dev_err(dev->dev, "provided buffer pitch is too small! %d < %d\n", | |
430 | pitch, mode_cmd->width * format->planes[i].stride_bpp); | |
431 | ret = -EINVAL; | |
432 | goto fail; | |
433 | } | |
cd5351f4 | 434 | |
2dab0bab TV |
435 | if (pitch % format->planes[i].stride_bpp != 0) { |
436 | dev_err(dev->dev, | |
437 | "buffer pitch (%d bytes) is not a multiple of pixel size (%d bytes)\n", | |
438 | pitch, format->planes[i].stride_bpp); | |
439 | ret = -EINVAL; | |
440 | goto fail; | |
441 | } | |
442 | ||
9a0774e0 RC |
443 | size = pitch * mode_cmd->height / format->planes[i].sub_y; |
444 | ||
3c810c61 | 445 | if (size > (omap_gem_mmap_size(bos[i]) - mode_cmd->offsets[i])) { |
9a0774e0 RC |
446 | dev_err(dev->dev, "provided buffer object is too small! %d < %d\n", |
447 | bos[i]->size - mode_cmd->offsets[i], size); | |
448 | ret = -EINVAL; | |
449 | goto fail; | |
450 | } | |
451 | ||
452 | plane->bo = bos[i]; | |
453 | plane->offset = mode_cmd->offsets[i]; | |
9f18c95a RC |
454 | plane->pitch = pitch; |
455 | plane->paddr = 0; | |
cd5351f4 RC |
456 | } |
457 | ||
458 | drm_helper_mode_fill_fb_struct(fb, mode_cmd); | |
459 | ||
c7d73f6a DV |
460 | ret = drm_framebuffer_init(dev, fb, &omap_framebuffer_funcs); |
461 | if (ret) { | |
462 | dev_err(dev->dev, "framebuffer init failed: %d\n", ret); | |
463 | goto fail; | |
464 | } | |
465 | ||
466 | DBG("create: FB ID: %d (%p)", fb->base.id, fb); | |
467 | ||
cd5351f4 RC |
468 | return fb; |
469 | ||
470 | fail: | |
925e4940 | 471 | kfree(omap_fb); |
ddcd49ed | 472 | |
ae43d7ca | 473 | return ERR_PTR(ret); |
cd5351f4 | 474 | } |