[deliverable/linux.git] / drivers / gpu / drm / omapdrm / omap_plane.c

/*
 * drivers/gpu/drm/omapdrm/omap_plane.c
 *
 * Copyright (C) 2011 Texas Instruments
 * Author: Rob Clark <rob.clark@linaro.org>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published by
 * the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/kfifo.h>

#include "omap_drv.h"
#include "omap_dmm_tiler.h"

/* some hackery because omapdss has an 'enum omap_plane' (which would be
 * better named omap_plane_id).. and compiler seems unhappy about having
 * both a 'struct omap_plane' and 'enum omap_plane'
 */
#define omap_plane _omap_plane

/*
 * plane funcs
 */

struct callback {
	void (*fxn)(void *);
	void *arg;
};

#define to_omap_plane(x) container_of(x, struct omap_plane, base)

struct omap_plane {
	struct drm_plane base;
	int id;  /* TODO rename omap_plane -> omap_plane_id in omapdss so I can use the enum */
	const char *name;
	struct omap_overlay_info info;
	struct omap_drm_apply apply;

	/* position/orientation of scanout within the fb: */
	struct omap_drm_window win;
	bool enabled;

	/* last fb that we pinned: */
	struct drm_framebuffer *pinned_fb;

	uint32_t nformats;
	uint32_t formats[32];

	struct omap_drm_irq error_irq;

	/* set of bo's pending unpin until next post_apply() */
	DECLARE_KFIFO_PTR(unpin_fifo, struct drm_gem_object *);

	// XXX maybe get rid of this and handle vblank in crtc too?
	struct callback apply_done_cb;
};

static void unpin(void *arg, struct drm_gem_object *bo)
{
	struct drm_plane *plane = arg;
	struct omap_plane *omap_plane = to_omap_plane(plane);

	if (kfifo_put(&omap_plane->unpin_fifo,
			(const struct drm_gem_object **)&bo)) {
		/* also hold a ref so it isn't free'd while pinned */
		drm_gem_object_reference(bo);
	} else {
		dev_err(plane->dev->dev, "unpin fifo full!\n");
		omap_gem_put_paddr(bo);
	}
}

/* update which fb (if any) is pinned for scanout */
static int update_pin(struct drm_plane *plane, struct drm_framebuffer *fb)
{
	struct omap_plane *omap_plane = to_omap_plane(plane);
	struct drm_framebuffer *pinned_fb = omap_plane->pinned_fb;

	if (pinned_fb != fb) {
		int ret;

		DBG("%p -> %p", pinned_fb, fb);

		if (fb)
			drm_framebuffer_reference(fb);

		ret = omap_framebuffer_replace(pinned_fb, fb, plane, unpin);

		if (pinned_fb)
			drm_framebuffer_unreference(pinned_fb);

		if (ret) {
			dev_err(plane->dev->dev, "could not swap %p -> %p\n",
					omap_plane->pinned_fb, fb);
			if (fb)
				drm_framebuffer_unreference(fb);
			omap_plane->pinned_fb = NULL;
			return ret;
		}

		omap_plane->pinned_fb = fb;
	}

	return 0;
}

static void omap_plane_pre_apply(struct omap_drm_apply *apply)
{
	struct omap_plane *omap_plane =
			container_of(apply, struct omap_plane, apply);
	struct omap_drm_window *win = &omap_plane->win;
	struct drm_plane *plane = &omap_plane->base;
	struct drm_device *dev = plane->dev;
	struct omap_overlay_info *info = &omap_plane->info;
	struct drm_crtc *crtc = plane->crtc;
	enum omap_channel channel;
	bool enabled = omap_plane->enabled && crtc;
	bool ilace, replication;
	int ret;

	DBG("%s, enabled=%d", omap_plane->name, enabled);

	/* if fb has changed, pin new fb: */
	update_pin(plane, enabled ? plane->fb : NULL);

	if (!enabled) {
		dispc_ovl_enable(omap_plane->id, false);
		return;
	}

	channel = omap_crtc_channel(crtc);

	/* update scanout: */
	omap_framebuffer_update_scanout(plane->fb, win, info);

	DBG("%dx%d -> %dx%d (%d)", info->width, info->height,
			info->out_width, info->out_height,
			info->screen_width);
	DBG("%d,%d %08x %08x", info->pos_x, info->pos_y,
			info->paddr, info->p_uv_addr);

	/* TODO: */
	ilace = false;
	replication = false;

	/* and finally, update omapdss: */
	ret = dispc_ovl_setup(omap_plane->id, info,
			replication, omap_crtc_timings(crtc), false);
	if (ret) {
		dev_err(dev->dev, "dispc_ovl_setup failed: %d\n", ret);
		return;
	}

	dispc_ovl_enable(omap_plane->id, true);
	dispc_ovl_set_channel_out(omap_plane->id, channel);
}

static void omap_plane_post_apply(struct omap_drm_apply *apply)
{
	struct omap_plane *omap_plane =
			container_of(apply, struct omap_plane, apply);
	struct drm_plane *plane = &omap_plane->base;
	struct omap_overlay_info *info = &omap_plane->info;
	struct drm_gem_object *bo = NULL;
	struct callback cb;

	cb = omap_plane->apply_done_cb;
	omap_plane->apply_done_cb.fxn = NULL;

	while (kfifo_get(&omap_plane->unpin_fifo, &bo)) {
		omap_gem_put_paddr(bo);
		drm_gem_object_unreference_unlocked(bo);
	}

	if (cb.fxn)
		cb.fxn(cb.arg);

	if (omap_plane->enabled) {
		omap_framebuffer_flush(plane->fb, info->pos_x, info->pos_y,
				info->out_width, info->out_height);
	}
}

static int apply(struct drm_plane *plane)
{
	if (plane->crtc) {
		struct omap_plane *omap_plane = to_omap_plane(plane);
		return omap_crtc_apply(plane->crtc, &omap_plane->apply);
	}
	return 0;
}

int omap_plane_mode_set(struct drm_plane *plane,
		struct drm_crtc *crtc, struct drm_framebuffer *fb,
		int crtc_x, int crtc_y,
		unsigned int crtc_w, unsigned int crtc_h,
		uint32_t src_x, uint32_t src_y,
		uint32_t src_w, uint32_t src_h,
		void (*fxn)(void *), void *arg)
{
	struct omap_plane *omap_plane = to_omap_plane(plane);
	struct omap_drm_window *win = &omap_plane->win;

	win->crtc_x = crtc_x;
	win->crtc_y = crtc_y;
	win->crtc_w = crtc_w;
	win->crtc_h = crtc_h;

	/* src values are in Q16 fixed point, convert to integer: */
	win->src_x = src_x >> 16;
	win->src_y = src_y >> 16;
	win->src_w = src_w >> 16;
	win->src_h = src_h >> 16;

	if (fxn) {
		/* omap_crtc should ensure that a new page flip
		 * isn't permitted while there is one pending:
		 */
		BUG_ON(omap_plane->apply_done_cb.fxn);

		omap_plane->apply_done_cb.fxn = fxn;
		omap_plane->apply_done_cb.arg = arg;
	}

	plane->fb = fb;
	plane->crtc = crtc;

	return apply(plane);
}

static int omap_plane_update(struct drm_plane *plane,
		struct drm_crtc *crtc, struct drm_framebuffer *fb,
		int crtc_x, int crtc_y,
		unsigned int crtc_w, unsigned int crtc_h,
		uint32_t src_x, uint32_t src_y,
		uint32_t src_w, uint32_t src_h)
{
	struct omap_plane *omap_plane = to_omap_plane(plane);
	omap_plane->enabled = true;

	if (plane->fb)
		drm_framebuffer_unreference(plane->fb);

	drm_framebuffer_reference(fb);

	return omap_plane_mode_set(plane, crtc, fb,
			crtc_x, crtc_y, crtc_w, crtc_h,
			src_x, src_y, src_w, src_h,
			NULL, NULL);
}

static int omap_plane_disable(struct drm_plane *plane)
{
	struct omap_plane *omap_plane = to_omap_plane(plane);
	omap_plane->win.rotation = BIT(DRM_ROTATE_0);
	return omap_plane_dpms(plane, DRM_MODE_DPMS_OFF);
}

static void omap_plane_destroy(struct drm_plane *plane)
{
	struct omap_plane *omap_plane = to_omap_plane(plane);

	DBG("%s", omap_plane->name);

	omap_irq_unregister(plane->dev, &omap_plane->error_irq);

	omap_plane_disable(plane);
	drm_plane_cleanup(plane);

	WARN_ON(!kfifo_is_empty(&omap_plane->unpin_fifo));
	kfifo_free(&omap_plane->unpin_fifo);

	kfree(omap_plane);
}

int omap_plane_dpms(struct drm_plane *plane, int mode)
{
	struct omap_plane *omap_plane = to_omap_plane(plane);
	bool enabled = (mode == DRM_MODE_DPMS_ON);
	int ret = 0;

	if (enabled != omap_plane->enabled) {
		omap_plane->enabled = enabled;
		ret = apply(plane);
	}

	return ret;
}

/* helper to install properties which are common to planes and crtcs */
void omap_plane_install_properties(struct drm_plane *plane,
		struct drm_mode_object *obj)
{
	struct drm_device *dev = plane->dev;
	struct omap_drm_private *priv = dev->dev_private;
	struct drm_property *prop;

	if (priv->has_dmm) {
		prop = priv->rotation_prop;
		if (!prop) {
			const struct drm_prop_enum_list props[] = {
					{ DRM_ROTATE_0,   "rotate-0" },
					{ DRM_ROTATE_90,  "rotate-90" },
					{ DRM_ROTATE_180, "rotate-180" },
					{ DRM_ROTATE_270, "rotate-270" },
					{ DRM_REFLECT_X,  "reflect-x" },
					{ DRM_REFLECT_Y,  "reflect-y" },
			};
			prop = drm_property_create_bitmask(dev, 0, "rotation",
					props, ARRAY_SIZE(props));
			if (prop == NULL)
				return;
			priv->rotation_prop = prop;
		}
		drm_object_attach_property(obj, prop, 0);
	}

	prop = priv->zorder_prop;
	if (!prop) {
		prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
		if (prop == NULL)
			return;
		priv->zorder_prop = prop;
	}
	drm_object_attach_property(obj, prop, 0);
}

int omap_plane_set_property(struct drm_plane *plane,
		struct drm_property *property, uint64_t val)
{
	struct omap_plane *omap_plane = to_omap_plane(plane);
	struct omap_drm_private *priv = plane->dev->dev_private;
	int ret = -EINVAL;

	if (property == priv->rotation_prop) {
		DBG("%s: rotation: %02x", omap_plane->name, (uint32_t)val);
		omap_plane->win.rotation = val;
		ret = apply(plane);
	} else if (property == priv->zorder_prop) {
		DBG("%s: zorder: %02x", omap_plane->name, (uint32_t)val);
		omap_plane->info.zorder = val;
		ret = apply(plane);
	}

	return ret;
}

static const struct drm_plane_funcs omap_plane_funcs = {
		.update_plane = omap_plane_update,
		.disable_plane = omap_plane_disable,
		.destroy = omap_plane_destroy,
		.set_property = omap_plane_set_property,
};

static void omap_plane_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
{
	struct omap_plane *omap_plane =
			container_of(irq, struct omap_plane, error_irq);
	DRM_ERROR("%s: errors: %08x\n", omap_plane->name, irqstatus);
}

static const char *plane_names[] = {
		[OMAP_DSS_GFX] = "gfx",
		[OMAP_DSS_VIDEO1] = "vid1",
		[OMAP_DSS_VIDEO2] = "vid2",
		[OMAP_DSS_VIDEO3] = "vid3",
};

static const uint32_t error_irqs[] = {
		[OMAP_DSS_GFX] = DISPC_IRQ_GFX_FIFO_UNDERFLOW,
		[OMAP_DSS_VIDEO1] = DISPC_IRQ_VID1_FIFO_UNDERFLOW,
		[OMAP_DSS_VIDEO2] = DISPC_IRQ_VID2_FIFO_UNDERFLOW,
		[OMAP_DSS_VIDEO3] = DISPC_IRQ_VID3_FIFO_UNDERFLOW,
};

/* initialize plane */
struct drm_plane *omap_plane_init(struct drm_device *dev,
		int id, bool private_plane)
{
	struct omap_drm_private *priv = dev->dev_private;
	struct drm_plane *plane = NULL;
	struct omap_plane *omap_plane;
	struct omap_overlay_info *info;
	int ret;

	DBG("%s: priv=%d", plane_names[id], private_plane);

	omap_plane = kzalloc(sizeof(*omap_plane), GFP_KERNEL);
	if (!omap_plane)
		goto fail;

	ret = kfifo_alloc(&omap_plane->unpin_fifo, 16, GFP_KERNEL);
	if (ret) {
		dev_err(dev->dev, "could not allocate unpin FIFO\n");
		goto fail;
	}

	omap_plane->nformats = omap_framebuffer_get_formats(
			omap_plane->formats, ARRAY_SIZE(omap_plane->formats),
			dss_feat_get_supported_color_modes(id));
	omap_plane->id = id;
	omap_plane->name = plane_names[id];

	plane = &omap_plane->base;

	omap_plane->apply.pre_apply  = omap_plane_pre_apply;
	omap_plane->apply.post_apply = omap_plane_post_apply;

	omap_plane->error_irq.irqmask = error_irqs[id];
	omap_plane->error_irq.irq = omap_plane_error_irq;
	omap_irq_register(dev, &omap_plane->error_irq);

	drm_plane_init(dev, plane, (1 << priv->num_crtcs) - 1, &omap_plane_funcs,
			omap_plane->formats, omap_plane->nformats, private_plane);

	omap_plane_install_properties(plane, &plane->base);

	/* get our starting configuration, set defaults for parameters
	 * we don't currently use, etc:
	 */
	info = &omap_plane->info;
	info->rotation_type = OMAP_DSS_ROT_DMA;
	info->rotation = OMAP_DSS_ROT_0;
	info->global_alpha = 0xff;
	info->mirror = 0;

	/* Set defaults depending on whether we are a CRTC or overlay
	 * layer.
	 * TODO add ioctl to give userspace an API to change this.. this
	 * will come in a subsequent patch.
	 */
	if (private_plane)
		omap_plane->info.zorder = 0;
	else
		omap_plane->info.zorder = id;

	return plane;

fail:
	if (plane)
		omap_plane_destroy(plane);

	return NULL;
}
Commit	Line	Data
bb5c2d9a	1	/*
8bb0daff	2	* drivers/gpu/drm/omapdrm/omap_plane.c
bb5c2d9a RC	3	*
	4	* Copyright (C) 2011 Texas Instruments
	5	* Author: Rob Clark <rob.clark@linaro.org>
	6	*
	7	* This program is free software; you can redistribute it and/or modify it
	8	* under the terms of the GNU General Public License version 2 as published by
	9	* the Free Software Foundation.
	10	*
	11	* This program is distributed in the hope that it will be useful, but WITHOUT
	12	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	13	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	14	* more details.
	15	*
	16	* You should have received a copy of the GNU General Public License along with
	17	* this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
b33f34d3 RC	20	#include <linux/kfifo.h>
b33f34d3 RC	21
bb5c2d9a	22	#include "omap_drv.h"
3c810c61	23	#include "omap_dmm_tiler.h"
bb5c2d9a RC	24
	25	/* some hackery because omapdss has an 'enum omap_plane' (which would be
	26	* better named omap_plane_id).. and compiler seems unhappy about having
	27	* both a 'struct omap_plane' and 'enum omap_plane'
	28	*/
	29	#define omap_plane _omap_plane
	30
	31	/*
	32	* plane funcs
	33	*/
	34
72d0c336 RC	35	struct callback {
	36	void (fxn)(void );
	37	void *arg;
	38	};
	39
bb5c2d9a RC	40	#define to_omap_plane(x) container_of(x, struct omap_plane, base)
	41
	42	struct omap_plane {
	43	struct drm_plane base;
f5f9454c RC	44	int id; /* TODO rename omap_plane -> omap_plane_id in omapdss so I can use the enum */
f5f9454c RC	45	const char *name;
bb5c2d9a	46	struct omap_overlay_info info;
f5f9454c	47	struct omap_drm_apply apply;
bb5c2d9a	48
3c810c61 RC	49	/* position/orientation of scanout within the fb: */
3c810c61 RC	50	struct omap_drm_window win;
f5f9454c	51	bool enabled;
9a0774e0 RC	52
	53	/* last fb that we pinned: */
	54	struct drm_framebuffer *pinned_fb;
bb5c2d9a	55
a890e662 RC	56	uint32_t nformats;
a890e662 RC	57	uint32_t formats[32];
b33f34d3	58
f5f9454c	59	struct omap_drm_irq error_irq;
b33f34d3	60
f5f9454c	61	/* set of bo's pending unpin until next post_apply() */
b33f34d3	62	DECLARE_KFIFO_PTR(unpin_fifo, struct drm_gem_object *);
b33f34d3	63
f5f9454c RC	64	// XXX maybe get rid of this and handle vblank in crtc too?
f5f9454c RC	65	struct callback apply_done_cb;
a890e662	66	};
bb5c2d9a	67
b33f34d3 RC	68	static void unpin(void arg, struct drm_gem_object bo)
	69	{
	70	struct drm_plane *plane = arg;
	71	struct omap_plane *omap_plane = to_omap_plane(plane);
	72
	73	if (kfifo_put(&omap_plane->unpin_fifo,
	74	(const struct drm_gem_object **)&bo)) {
b33f34d3 RC	75	/* also hold a ref so it isn't free'd while pinned */
	76	drm_gem_object_reference(bo);
	77	} else {
	78	dev_err(plane->dev->dev, "unpin fifo full!\n");
	79	omap_gem_put_paddr(bo);
	80	}
	81	}
	82
9a0774e0 RC	83	/* update which fb (if any) is pinned for scanout */
	84	static int update_pin(struct drm_plane plane, struct drm_framebuffer fb)
	85	{
	86	struct omap_plane *omap_plane = to_omap_plane(plane);
b33f34d3 RC	87	struct drm_framebuffer *pinned_fb = omap_plane->pinned_fb;
	88
	89	if (pinned_fb != fb) {
	90	int ret;
	91
	92	DBG("%p -> %p", pinned_fb, fb);
	93
f5f9454c RC	94	if (fb)
	95	drm_framebuffer_reference(fb);
	96
b33f34d3	97	ret = omap_framebuffer_replace(pinned_fb, fb, plane, unpin);
f5f9454c RC	98
	99	if (pinned_fb)
	100	drm_framebuffer_unreference(pinned_fb);
b33f34d3 RC	101
	102	if (ret) {
	103	dev_err(plane->dev->dev, "could not swap %p -> %p\n",
	104	omap_plane->pinned_fb, fb);
f5f9454c RC	105	if (fb)
f5f9454c RC	106	drm_framebuffer_unreference(fb);
b33f34d3 RC	107	omap_plane->pinned_fb = NULL;
	108	return ret;
	109	}
9a0774e0	110
9a0774e0	111	omap_plane->pinned_fb = fb;
9a0774e0 RC	112	}
9a0774e0 RC	113
b33f34d3	114	return 0;
9a0774e0 RC	115	}
9a0774e0 RC	116
f5f9454c	117	static void omap_plane_pre_apply(struct omap_drm_apply *apply)
bb5c2d9a	118	{
f5f9454c RC	119	struct omap_plane *omap_plane =
f5f9454c RC	120	container_of(apply, struct omap_plane, apply);
3c810c61	121	struct omap_drm_window *win = &omap_plane->win;
f5f9454c RC	122	struct drm_plane *plane = &omap_plane->base;
	123	struct drm_device *dev = plane->dev;
	124	struct omap_overlay_info *info = &omap_plane->info;
	125	struct drm_crtc *crtc = plane->crtc;
	126	enum omap_channel channel;
	127	bool enabled = omap_plane->enabled && crtc;
	128	bool ilace, replication;
9a0774e0	129	int ret;
bb5c2d9a	130
f5f9454c RC	131	DBG("%s, enabled=%d", omap_plane->name, enabled);
	132
	133	/* if fb has changed, pin new fb: */
	134	update_pin(plane, enabled ? plane->fb : NULL);
	135
	136	if (!enabled) {
	137	dispc_ovl_enable(omap_plane->id, false);
2f53700d	138	return;
9a0774e0	139	}
bb5c2d9a	140
f5f9454c RC	141	channel = omap_crtc_channel(crtc);
	142
	143	/* update scanout: */
3c810c61	144	omap_framebuffer_update_scanout(plane->fb, win, info);
bb5c2d9a	145
f5f9454c RC	146	DBG("%dx%d -> %dx%d (%d)", info->width, info->height,
f5f9454c RC	147	info->out_width, info->out_height,
9a0774e0	148	info->screen_width);
f5f9454c RC	149	DBG("%d,%d %08x %08x", info->pos_x, info->pos_y,
	150	info->paddr, info->p_uv_addr);
	151
	152	/* TODO: */
	153	ilace = false;
	154	replication = false;
	155
	156	/* and finally, update omapdss: */
	157	ret = dispc_ovl_setup(omap_plane->id, info,
	158	replication, omap_crtc_timings(crtc), false);
	159	if (ret) {
	160	dev_err(dev->dev, "dispc_ovl_setup failed: %d\n", ret);
	161	return;
	162	}
	163
	164	dispc_ovl_enable(omap_plane->id, true);
	165	dispc_ovl_set_channel_out(omap_plane->id, channel);
	166	}
	167
	168	static void omap_plane_post_apply(struct omap_drm_apply *apply)
	169	{
	170	struct omap_plane *omap_plane =
	171	container_of(apply, struct omap_plane, apply);
	172	struct drm_plane *plane = &omap_plane->base;
	173	struct omap_overlay_info *info = &omap_plane->info;
	174	struct drm_gem_object *bo = NULL;
	175	struct callback cb;
	176
	177	cb = omap_plane->apply_done_cb;
	178	omap_plane->apply_done_cb.fxn = NULL;
	179
	180	while (kfifo_get(&omap_plane->unpin_fifo, &bo)) {
	181	omap_gem_put_paddr(bo);
	182	drm_gem_object_unreference_unlocked(bo);
	183	}
	184
	185	if (cb.fxn)
	186	cb.fxn(cb.arg);
	187
	188	if (omap_plane->enabled) {
	189	omap_framebuffer_flush(plane->fb, info->pos_x, info->pos_y,
	190	info->out_width, info->out_height);
	191	}
	192	}
	193
	194	static int apply(struct drm_plane *plane)
	195	{
	196	if (plane->crtc) {
	197	struct omap_plane *omap_plane = to_omap_plane(plane);
	198	return omap_crtc_apply(plane->crtc, &omap_plane->apply);
	199	}
	200	return 0;
bb5c2d9a RC	201	}
bb5c2d9a RC	202
2f53700d	203	int omap_plane_mode_set(struct drm_plane *plane,
bb5c2d9a RC	204	struct drm_crtc crtc, struct drm_framebuffer fb,
	205	int crtc_x, int crtc_y,
	206	unsigned int crtc_w, unsigned int crtc_h,
	207	uint32_t src_x, uint32_t src_y,
f5f9454c RC	208	uint32_t src_w, uint32_t src_h,
f5f9454c RC	209	void (fxn)(void ), void *arg)
bb5c2d9a RC	210	{
bb5c2d9a RC	211	struct omap_plane *omap_plane = to_omap_plane(plane);
3c810c61 RC	212	struct omap_drm_window *win = &omap_plane->win;
	213
	214	win->crtc_x = crtc_x;
	215	win->crtc_y = crtc_y;
	216	win->crtc_w = crtc_w;
	217	win->crtc_h = crtc_h;
bb5c2d9a RC	218
bb5c2d9a RC	219	/* src values are in Q16 fixed point, convert to integer: */
3c810c61 RC	220	win->src_x = src_x >> 16;
	221	win->src_y = src_y >> 16;
	222	win->src_w = src_w >> 16;
	223	win->src_h = src_h >> 16;
bb5c2d9a	224
f5f9454c RC	225	if (fxn) {
	226	/* omap_crtc should ensure that a new page flip
	227	* isn't permitted while there is one pending:
	228	*/
	229	BUG_ON(omap_plane->apply_done_cb.fxn);
	230
	231	omap_plane->apply_done_cb.fxn = fxn;
	232	omap_plane->apply_done_cb.arg = arg;
	233	}
	234
bb5c2d9a RC	235	plane->fb = fb;
	236	plane->crtc = crtc;
	237
f5f9454c	238	return apply(plane);
bb5c2d9a RC	239	}
bb5c2d9a RC	240
2f53700d RC	241	static int omap_plane_update(struct drm_plane *plane,
	242	struct drm_crtc crtc, struct drm_framebuffer fb,
	243	int crtc_x, int crtc_y,
	244	unsigned int crtc_w, unsigned int crtc_h,
	245	uint32_t src_x, uint32_t src_y,
	246	uint32_t src_w, uint32_t src_h)
	247	{
f5f9454c RC	248	struct omap_plane *omap_plane = to_omap_plane(plane);
f5f9454c RC	249	omap_plane->enabled = true;
b03e14fd AT	250
	251	if (plane->fb)
	252	drm_framebuffer_unreference(plane->fb);
	253
	254	drm_framebuffer_reference(fb);
	255
f5f9454c RC	256	return omap_plane_mode_set(plane, crtc, fb,
	257	crtc_x, crtc_y, crtc_w, crtc_h,
	258	src_x, src_y, src_w, src_h,
	259	NULL, NULL);
2f53700d RC	260	}
2f53700d RC	261
bb5c2d9a RC	262	static int omap_plane_disable(struct drm_plane *plane)
bb5c2d9a RC	263	{
3c810c61 RC	264	struct omap_plane *omap_plane = to_omap_plane(plane);
3c810c61 RC	265	omap_plane->win.rotation = BIT(DRM_ROTATE_0);
bb5c2d9a RC	266	return omap_plane_dpms(plane, DRM_MODE_DPMS_OFF);
	267	}
	268
	269	static void omap_plane_destroy(struct drm_plane *plane)
	270	{
	271	struct omap_plane *omap_plane = to_omap_plane(plane);
f5f9454c RC	272
	273	DBG("%s", omap_plane->name);
	274
	275	omap_irq_unregister(plane->dev, &omap_plane->error_irq);
	276
bb5c2d9a RC	277	omap_plane_disable(plane);
bb5c2d9a RC	278	drm_plane_cleanup(plane);
f5f9454c RC	279
f5f9454c RC	280	WARN_ON(!kfifo_is_empty(&omap_plane->unpin_fifo));
b33f34d3	281	kfifo_free(&omap_plane->unpin_fifo);
f5f9454c	282
bb5c2d9a RC	283	kfree(omap_plane);
	284	}
	285
	286	int omap_plane_dpms(struct drm_plane *plane, int mode)
	287	{
	288	struct omap_plane *omap_plane = to_omap_plane(plane);
f5f9454c RC	289	bool enabled = (mode == DRM_MODE_DPMS_ON);
f5f9454c RC	290	int ret = 0;
bb5c2d9a	291
f5f9454c RC	292	if (enabled != omap_plane->enabled) {
	293	omap_plane->enabled = enabled;
	294	ret = apply(plane);
bb5c2d9a RC	295	}
bb5c2d9a RC	296
f5f9454c	297	return ret;
72d0c336 RC	298	}
72d0c336 RC	299
3c810c61 RC	300	/* helper to install properties which are common to planes and crtcs */
	301	void omap_plane_install_properties(struct drm_plane *plane,
	302	struct drm_mode_object *obj)
	303	{
	304	struct drm_device *dev = plane->dev;
	305	struct omap_drm_private *priv = dev->dev_private;
	306	struct drm_property *prop;
	307
c2a6a552 RC	308	if (priv->has_dmm) {
	309	prop = priv->rotation_prop;
	310	if (!prop) {
	311	const struct drm_prop_enum_list props[] = {
	312	{ DRM_ROTATE_0, "rotate-0" },
	313	{ DRM_ROTATE_90, "rotate-90" },
	314	{ DRM_ROTATE_180, "rotate-180" },
	315	{ DRM_ROTATE_270, "rotate-270" },
	316	{ DRM_REFLECT_X, "reflect-x" },
	317	{ DRM_REFLECT_Y, "reflect-y" },
	318	};
	319	prop = drm_property_create_bitmask(dev, 0, "rotation",
	320	props, ARRAY_SIZE(props));
	321	if (prop == NULL)
	322	return;
	323	priv->rotation_prop = prop;
	324	}
	325	drm_object_attach_property(obj, prop, 0);
3c810c61	326	}
8451b5ad	327
c17d37df YT	328	prop = priv->zorder_prop;
c17d37df YT	329	if (!prop) {
8451b5ad AR	330	prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
	331	if (prop == NULL)
	332	return;
	333	priv->zorder_prop = prop;
	334	}
	335	drm_object_attach_property(obj, prop, 0);
3c810c61 RC	336	}
	337
	338	int omap_plane_set_property(struct drm_plane *plane,
	339	struct drm_property *property, uint64_t val)
	340	{
	341	struct omap_plane *omap_plane = to_omap_plane(plane);
	342	struct omap_drm_private *priv = plane->dev->dev_private;
	343	int ret = -EINVAL;
	344
	345	if (property == priv->rotation_prop) {
f5f9454c	346	DBG("%s: rotation: %02x", omap_plane->name, (uint32_t)val);
3c810c61	347	omap_plane->win.rotation = val;
f5f9454c	348	ret = apply(plane);
8451b5ad	349	} else if (property == priv->zorder_prop) {
f5f9454c	350	DBG("%s: zorder: %02x", omap_plane->name, (uint32_t)val);
8451b5ad	351	omap_plane->info.zorder = val;
f5f9454c	352	ret = apply(plane);
3c810c61 RC	353	}
	354
	355	return ret;
	356	}
	357
bb5c2d9a RC	358	static const struct drm_plane_funcs omap_plane_funcs = {
	359	.update_plane = omap_plane_update,
	360	.disable_plane = omap_plane_disable,
	361	.destroy = omap_plane_destroy,
3c810c61	362	.set_property = omap_plane_set_property,
bb5c2d9a RC	363	};
bb5c2d9a RC	364
f5f9454c RC	365	static void omap_plane_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
	366	{
	367	struct omap_plane *omap_plane =
	368	container_of(irq, struct omap_plane, error_irq);
	369	DRM_ERROR("%s: errors: %08x\n", omap_plane->name, irqstatus);
	370	}
	371
	372	static const char *plane_names[] = {
	373	[OMAP_DSS_GFX] = "gfx",
	374	[OMAP_DSS_VIDEO1] = "vid1",
	375	[OMAP_DSS_VIDEO2] = "vid2",
	376	[OMAP_DSS_VIDEO3] = "vid3",
	377	};
	378
	379	static const uint32_t error_irqs[] = {
	380	[OMAP_DSS_GFX] = DISPC_IRQ_GFX_FIFO_UNDERFLOW,
	381	[OMAP_DSS_VIDEO1] = DISPC_IRQ_VID1_FIFO_UNDERFLOW,
	382	[OMAP_DSS_VIDEO2] = DISPC_IRQ_VID2_FIFO_UNDERFLOW,
	383	[OMAP_DSS_VIDEO3] = DISPC_IRQ_VID3_FIFO_UNDERFLOW,
	384	};
	385
bb5c2d9a RC	386	/* initialize plane */
bb5c2d9a RC	387	struct drm_plane omap_plane_init(struct drm_device dev,
f5f9454c	388	int id, bool private_plane)
bb5c2d9a	389	{
f5f9454c	390	struct omap_drm_private *priv = dev->dev_private;
bb5c2d9a RC	391	struct drm_plane *plane = NULL;
bb5c2d9a RC	392	struct omap_plane *omap_plane;
f5f9454c	393	struct omap_overlay_info *info;
b33f34d3	394	int ret;
bb5c2d9a	395
f5f9454c	396	DBG("%s: priv=%d", plane_names[id], private_plane);
b33f34d3	397
bb5c2d9a	398	omap_plane = kzalloc(sizeof(*omap_plane), GFP_KERNEL);
78110bb8	399	if (!omap_plane)
bb5c2d9a	400	goto fail;
bb5c2d9a	401
b33f34d3 RC	402	ret = kfifo_alloc(&omap_plane->unpin_fifo, 16, GFP_KERNEL);
	403	if (ret) {
	404	dev_err(dev->dev, "could not allocate unpin FIFO\n");
	405	goto fail;
	406	}
	407
a890e662 RC	408	omap_plane->nformats = omap_framebuffer_get_formats(
a890e662 RC	409	omap_plane->formats, ARRAY_SIZE(omap_plane->formats),
f5f9454c RC	410	dss_feat_get_supported_color_modes(id));
	411	omap_plane->id = id;
	412	omap_plane->name = plane_names[id];
	413
bb5c2d9a RC	414	plane = &omap_plane->base;
bb5c2d9a RC	415
f5f9454c RC	416	omap_plane->apply.pre_apply = omap_plane_pre_apply;
	417	omap_plane->apply.post_apply = omap_plane_post_apply;
	418
	419	omap_plane->error_irq.irqmask = error_irqs[id];
	420	omap_plane->error_irq.irq = omap_plane_error_irq;
	421	omap_irq_register(dev, &omap_plane->error_irq);
	422
	423	drm_plane_init(dev, plane, (1 << priv->num_crtcs) - 1, &omap_plane_funcs,
	424	omap_plane->formats, omap_plane->nformats, private_plane);
bb5c2d9a	425
3c810c61 RC	426	omap_plane_install_properties(plane, &plane->base);
3c810c61 RC	427
bb5c2d9a RC	428	/* get our starting configuration, set defaults for parameters
	429	* we don't currently use, etc:
	430	*/
f5f9454c RC	431	info = &omap_plane->info;
	432	info->rotation_type = OMAP_DSS_ROT_DMA;
	433	info->rotation = OMAP_DSS_ROT_0;
	434	info->global_alpha = 0xff;
	435	info->mirror = 0;
bb5c2d9a RC	436
	437	/* Set defaults depending on whether we are a CRTC or overlay
	438	* layer.
	439	* TODO add ioctl to give userspace an API to change this.. this
	440	* will come in a subsequent patch.
	441	*/
f5f9454c	442	if (private_plane)
bb5c2d9a RC	443	omap_plane->info.zorder = 0;
bb5c2d9a RC	444	else
f5f9454c	445	omap_plane->info.zorder = id;
bb5c2d9a RC	446
	447	return plane;
	448
	449	fail:
373de7f4	450	if (plane)
bb5c2d9a	451	omap_plane_destroy(plane);
373de7f4	452
bb5c2d9a RC	453	return NULL;
bb5c2d9a RC	454	}