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of: Add vendor prefix for Giantplus Technology Co., Ltd.
[deliverable/linux.git] / drivers / gpu / drm / panel / panel-simple.c
CommitLineData
280921de
TR		 1/*
2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24#include <linux/backlight.h>
cfdf0549 25#include <linux/gpio/consumer.h>
280921de 26#include <linux/module.h>
280921de
TR		 27#include <linux/of_platform.h>
28#include <linux/platform_device.h>
29#include <linux/regulator/consumer.h>
30
31#include <drm/drmP.h>
32#include <drm/drm_crtc.h>
210fcd9d 33#include <drm/drm_mipi_dsi.h>
280921de
TR		 34#include <drm/drm_panel.h>
35
36struct panel_desc {
37 const struct drm_display_mode *modes;
38 unsigned int num_modes;
39
0208d511
SM		 40 unsigned int bpc;
41
280921de
TR		 42 struct {
43 unsigned int width;
44 unsigned int height;
45 } size;
f673c37e
AK		 46
47 /**
48 * @prepare: the time (in milliseconds) that it takes for the panel to
49 * become ready and start receiving video data
50 * @enable: the time (in milliseconds) that it takes for the panel to
51 * display the first valid frame after starting to receive
52 * video data
53 * @disable: the time (in milliseconds) that it takes for the panel to
54 * turn the display off (no content is visible)
55 * @unprepare: the time (in milliseconds) that it takes for the panel
56 * to power itself down completely
57 */
58 struct {
59 unsigned int prepare;
60 unsigned int enable;
61 unsigned int disable;
62 unsigned int unprepare;
63 } delay;
795f7ab3
BB		 64
65 u32 bus_format;
280921de
TR		 66};
67
280921de
TR		 68struct panel_simple {
69 struct drm_panel base;
613a633e 70 bool prepared;
280921de
TR		 71 bool enabled;
72
73 const struct panel_desc *desc;
74
75 struct backlight_device *backlight;
76 struct regulator *supply;
77 struct i2c_adapter *ddc;
78
cfdf0549 79 struct gpio_desc *enable_gpio;
280921de
TR		 80};
81
82static inline struct panel_simple *to_panel_simple(struct drm_panel *panel)
83{
84 return container_of(panel, struct panel_simple, base);
85}
86
87static int panel_simple_get_fixed_modes(struct panel_simple *panel)
88{
89 struct drm_connector *connector = panel->base.connector;
90 struct drm_device *drm = panel->base.drm;
91 struct drm_display_mode *mode;
92 unsigned int i, num = 0;
93
94 if (!panel->desc)
95 return 0;
96
97 for (i = 0; i < panel->desc->num_modes; i++) {
98 const struct drm_display_mode *m = &panel->desc->modes[i];
99
100 mode = drm_mode_duplicate(drm, m);
101 if (!mode) {
102 dev_err(drm->dev, "failed to add mode %ux%u@%u\n",
103 m->hdisplay, m->vdisplay, m->vrefresh);
104 continue;
105 }
106
107 drm_mode_set_name(mode);
108
109 drm_mode_probed_add(connector, mode);
110 num++;
111 }
112
0208d511 113 connector->display_info.bpc = panel->desc->bpc;
280921de
TR		 114 connector->display_info.width_mm = panel->desc->size.width;
115 connector->display_info.height_mm = panel->desc->size.height;
795f7ab3
BB		 116 if (panel->desc->bus_format)
117 drm_display_info_set_bus_formats(&connector->display_info,
118 &panel->desc->bus_format, 1);
280921de
TR		 119
120 return num;
121}
122
123static int panel_simple_disable(struct drm_panel *panel)
124{
125 struct panel_simple *p = to_panel_simple(panel);
126
127 if (!p->enabled)
128 return 0;
129
130 if (p->backlight) {
131 p->backlight->props.power = FB_BLANK_POWERDOWN;
132 backlight_update_status(p->backlight);
133 }
134
f673c37e
AK		 135 if (p->desc->delay.disable)
136 msleep(p->desc->delay.disable);
137
280921de
TR		 138 p->enabled = false;
139
140 return 0;
141}
142
c0e1d170
AK		 143static int panel_simple_unprepare(struct drm_panel *panel)
144{
613a633e
AK		 145 struct panel_simple *p = to_panel_simple(panel);
146
147 if (!p->prepared)
148 return 0;
149
150 if (p->enable_gpio)
151 gpiod_set_value_cansleep(p->enable_gpio, 0);
152
153 regulator_disable(p->supply);
154
f673c37e
AK		 155 if (p->desc->delay.unprepare)
156 msleep(p->desc->delay.unprepare);
157
613a633e 158 p->prepared = false;
c0e1d170 159
c0e1d170
AK		 160 return 0;
161}
162
613a633e 163static int panel_simple_prepare(struct drm_panel *panel)
280921de
TR		 164{
165 struct panel_simple *p = to_panel_simple(panel);
166 int err;
167
613a633e 168 if (p->prepared)
280921de
TR		 169 return 0;
170
171 err = regulator_enable(p->supply);
172 if (err < 0) {
173 dev_err(panel->dev, "failed to enable supply: %d\n", err);
174 return err;
175 }
176
cfdf0549 177 if (p->enable_gpio)
15c1a919 178 gpiod_set_value_cansleep(p->enable_gpio, 1);
280921de 179
f673c37e
AK		 180 if (p->desc->delay.prepare)
181 msleep(p->desc->delay.prepare);
182
613a633e
AK		 183 p->prepared = true;
184
185 return 0;
186}
187
188static int panel_simple_enable(struct drm_panel *panel)
189{
190 struct panel_simple *p = to_panel_simple(panel);
191
192 if (p->enabled)
193 return 0;
194
f673c37e
AK		 195 if (p->desc->delay.enable)
196 msleep(p->desc->delay.enable);
197
280921de
TR		 198 if (p->backlight) {
199 p->backlight->props.power = FB_BLANK_UNBLANK;
200 backlight_update_status(p->backlight);
201 }
202
203 p->enabled = true;
204
205 return 0;
206}
207
208static int panel_simple_get_modes(struct drm_panel *panel)
209{
210 struct panel_simple *p = to_panel_simple(panel);
211 int num = 0;
212
213 /* probe EDID if a DDC bus is available */
214 if (p->ddc) {
215 struct edid *edid = drm_get_edid(panel->connector, p->ddc);
70bf6878 216 drm_mode_connector_update_edid_property(panel->connector, edid);
280921de
TR		 217 if (edid) {
218 num += drm_add_edid_modes(panel->connector, edid);
219 kfree(edid);
220 }
221 }
222
223 /* add hard-coded panel modes */
224 num += panel_simple_get_fixed_modes(p);
225
226 return num;
227}
228
229static const struct drm_panel_funcs panel_simple_funcs = {
230 .disable = panel_simple_disable,
c0e1d170
AK		 231 .unprepare = panel_simple_unprepare,
232 .prepare = panel_simple_prepare,
280921de
TR		 233 .enable = panel_simple_enable,
234 .get_modes = panel_simple_get_modes,
235};
236
237static int panel_simple_probe(struct device *dev, const struct panel_desc *desc)
238{
239 struct device_node *backlight, *ddc;
240 struct panel_simple *panel;
280921de
TR		 241 int err;
242
243 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
244 if (!panel)
245 return -ENOMEM;
246
247 panel->enabled = false;
613a633e 248 panel->prepared = false;
280921de
TR		 249 panel->desc = desc;
250
251 panel->supply = devm_regulator_get(dev, "power");
252 if (IS_ERR(panel->supply))
253 return PTR_ERR(panel->supply);
254
a61400d8
AC		 255 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable",
256 GPIOD_OUT_LOW);
cfdf0549
AC		 257 if (IS_ERR(panel->enable_gpio)) {
258 err = PTR_ERR(panel->enable_gpio);
9746c619
AC		 259 dev_err(dev, "failed to request GPIO: %d\n", err);
260 return err;
261 }
280921de 262
280921de
TR		 263 backlight = of_parse_phandle(dev->of_node, "backlight", 0);
264 if (backlight) {
265 panel->backlight = of_find_backlight_by_node(backlight);
266 of_node_put(backlight);
267
cfdf0549
AC		 268 if (!panel->backlight)
269 return -EPROBE_DEFER;
280921de
TR		 270 }
271
272 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0);
273 if (ddc) {
274 panel->ddc = of_find_i2c_adapter_by_node(ddc);
275 of_node_put(ddc);
276
277 if (!panel->ddc) {
278 err = -EPROBE_DEFER;
279 goto free_backlight;
280 }
281 }
282
283 drm_panel_init(&panel->base);
284 panel->base.dev = dev;
285 panel->base.funcs = &panel_simple_funcs;
286
287 err = drm_panel_add(&panel->base);
288 if (err < 0)
289 goto free_ddc;
290
291 dev_set_drvdata(dev, panel);
292
293 return 0;
294
295free_ddc:
296 if (panel->ddc)
297 put_device(&panel->ddc->dev);
298free_backlight:
299 if (panel->backlight)
300 put_device(&panel->backlight->dev);
280921de
TR		 301
302 return err;
303}
304
305static int panel_simple_remove(struct device *dev)
306{
307 struct panel_simple *panel = dev_get_drvdata(dev);
308
309 drm_panel_detach(&panel->base);
310 drm_panel_remove(&panel->base);
311
312 panel_simple_disable(&panel->base);
313
314 if (panel->ddc)
315 put_device(&panel->ddc->dev);
316
317 if (panel->backlight)
318 put_device(&panel->backlight->dev);
319
280921de
TR		 320 return 0;
321}
322
d02fd93e
TR		 323static void panel_simple_shutdown(struct device *dev)
324{
325 struct panel_simple *panel = dev_get_drvdata(dev);
326
327 panel_simple_disable(&panel->base);
328}
329
280921de
TR		 330static const struct drm_display_mode auo_b101aw03_mode = {
331 .clock = 51450,
332 .hdisplay = 1024,
333 .hsync_start = 1024 + 156,
334 .hsync_end = 1024 + 156 + 8,
335 .htotal = 1024 + 156 + 8 + 156,
336 .vdisplay = 600,
337 .vsync_start = 600 + 16,
338 .vsync_end = 600 + 16 + 6,
339 .vtotal = 600 + 16 + 6 + 16,
340 .vrefresh = 60,
341};
342
343static const struct panel_desc auo_b101aw03 = {
344 .modes = &auo_b101aw03_mode,
345 .num_modes = 1,
0208d511 346 .bpc = 6,
280921de
TR		 347 .size = {
348 .width = 223,
349 .height = 125,
350 },
351};
352
dac746e0
RC		 353static const struct drm_display_mode auo_b101xtn01_mode = {
354 .clock = 72000,
355 .hdisplay = 1366,
356 .hsync_start = 1366 + 20,
357 .hsync_end = 1366 + 20 + 70,
358 .htotal = 1366 + 20 + 70,
359 .vdisplay = 768,
360 .vsync_start = 768 + 14,
361 .vsync_end = 768 + 14 + 42,
362 .vtotal = 768 + 14 + 42,
363 .vrefresh = 60,
364 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
365};
366
367static const struct panel_desc auo_b101xtn01 = {
368 .modes = &auo_b101xtn01_mode,
369 .num_modes = 1,
370 .bpc = 6,
371 .size = {
372 .width = 223,
373 .height = 125,
374 },
375};
376
e35e305e
AK		 377static const struct drm_display_mode auo_b116xw03_mode = {
378 .clock = 70589,
379 .hdisplay = 1366,
380 .hsync_start = 1366 + 40,
381 .hsync_end = 1366 + 40 + 40,
382 .htotal = 1366 + 40 + 40 + 32,
383 .vdisplay = 768,
384 .vsync_start = 768 + 10,
385 .vsync_end = 768 + 10 + 12,
386 .vtotal = 768 + 10 + 12 + 6,
387 .vrefresh = 60,
388};
389
390static const struct panel_desc auo_b116xw03 = {
391 .modes = &auo_b116xw03_mode,
392 .num_modes = 1,
393 .bpc = 6,
394 .size = {
395 .width = 256,
396 .height = 144,
397 },
398};
399
a333f7ad
SM		 400static const struct drm_display_mode auo_b133xtn01_mode = {
401 .clock = 69500,
402 .hdisplay = 1366,
403 .hsync_start = 1366 + 48,
404 .hsync_end = 1366 + 48 + 32,
405 .htotal = 1366 + 48 + 32 + 20,
406 .vdisplay = 768,
407 .vsync_start = 768 + 3,
408 .vsync_end = 768 + 3 + 6,
409 .vtotal = 768 + 3 + 6 + 13,
410 .vrefresh = 60,
411};
412
413static const struct panel_desc auo_b133xtn01 = {
414 .modes = &auo_b133xtn01_mode,
415 .num_modes = 1,
0208d511 416 .bpc = 6,
a333f7ad
SM		 417 .size = {
418 .width = 293,
419 .height = 165,
420 },
421};
422
3e51d609
AK		 423static const struct drm_display_mode auo_b133htn01_mode = {
424 .clock = 150660,
425 .hdisplay = 1920,
426 .hsync_start = 1920 + 172,
427 .hsync_end = 1920 + 172 + 80,
428 .htotal = 1920 + 172 + 80 + 60,
429 .vdisplay = 1080,
430 .vsync_start = 1080 + 25,
431 .vsync_end = 1080 + 25 + 10,
432 .vtotal = 1080 + 25 + 10 + 10,
433 .vrefresh = 60,
434};
435
436static const struct panel_desc auo_b133htn01 = {
437 .modes = &auo_b133htn01_mode,
438 .num_modes = 1,
d7a839cd 439 .bpc = 6,
3e51d609
AK		 440 .size = {
441 .width = 293,
442 .height = 165,
443 },
444 .delay = {
445 .prepare = 105,
446 .enable = 20,
447 .unprepare = 50,
448 },
449};
450
4c930757
SW		 451static const struct drm_display_mode chunghwa_claa101wa01a_mode = {
452 .clock = 72070,
453 .hdisplay = 1366,
454 .hsync_start = 1366 + 58,
455 .hsync_end = 1366 + 58 + 58,
456 .htotal = 1366 + 58 + 58 + 58,
457 .vdisplay = 768,
458 .vsync_start = 768 + 4,
459 .vsync_end = 768 + 4 + 4,
460 .vtotal = 768 + 4 + 4 + 4,
461 .vrefresh = 60,
462};
463
464static const struct panel_desc chunghwa_claa101wa01a = {
465 .modes = &chunghwa_claa101wa01a_mode,
466 .num_modes = 1,
0208d511 467 .bpc = 6,
4c930757
SW		 468 .size = {
469 .width = 220,
470 .height = 120,
471 },
472};
473
280921de
TR		 474static const struct drm_display_mode chunghwa_claa101wb01_mode = {
475 .clock = 69300,
476 .hdisplay = 1366,
477 .hsync_start = 1366 + 48,
478 .hsync_end = 1366 + 48 + 32,
479 .htotal = 1366 + 48 + 32 + 20,
480 .vdisplay = 768,
481 .vsync_start = 768 + 16,
482 .vsync_end = 768 + 16 + 8,
483 .vtotal = 768 + 16 + 8 + 16,
484 .vrefresh = 60,
485};
486
487static const struct panel_desc chunghwa_claa101wb01 = {
488 .modes = &chunghwa_claa101wb01_mode,
489 .num_modes = 1,
0208d511 490 .bpc = 6,
280921de
TR		 491 .size = {
492 .width = 223,
493 .height = 125,
494 },
495};
496
26ab0065
SA		 497static const struct drm_display_mode edt_et057090dhu_mode = {
498 .clock = 25175,
499 .hdisplay = 640,
500 .hsync_start = 640 + 16,
501 .hsync_end = 640 + 16 + 30,
502 .htotal = 640 + 16 + 30 + 114,
503 .vdisplay = 480,
504 .vsync_start = 480 + 10,
505 .vsync_end = 480 + 10 + 3,
506 .vtotal = 480 + 10 + 3 + 32,
507 .vrefresh = 60,
508 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
509};
510
511static const struct panel_desc edt_et057090dhu = {
512 .modes = &edt_et057090dhu_mode,
513 .num_modes = 1,
0208d511 514 .bpc = 6,
26ab0065
SA		 515 .size = {
516 .width = 115,
517 .height = 86,
518 },
519};
520
fff5de45
PZ		 521static const struct drm_display_mode edt_etm0700g0dh6_mode = {
522 .clock = 33260,
523 .hdisplay = 800,
524 .hsync_start = 800 + 40,
525 .hsync_end = 800 + 40 + 128,
526 .htotal = 800 + 40 + 128 + 88,
527 .vdisplay = 480,
528 .vsync_start = 480 + 10,
529 .vsync_end = 480 + 10 + 2,
530 .vtotal = 480 + 10 + 2 + 33,
531 .vrefresh = 60,
532 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
533};
534
535static const struct panel_desc edt_etm0700g0dh6 = {
536 .modes = &edt_etm0700g0dh6_mode,
537 .num_modes = 1,
0208d511 538 .bpc = 6,
fff5de45
PZ		 539 .size = {
540 .width = 152,
541 .height = 91,
542 },
543};
544
102932b0
BB		 545static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = {
546 .clock = 32260,
547 .hdisplay = 800,
548 .hsync_start = 800 + 168,
549 .hsync_end = 800 + 168 + 64,
550 .htotal = 800 + 168 + 64 + 88,
551 .vdisplay = 480,
552 .vsync_start = 480 + 37,
553 .vsync_end = 480 + 37 + 2,
554 .vtotal = 480 + 37 + 2 + 8,
555 .vrefresh = 60,
556};
557
558static const struct panel_desc foxlink_fl500wvr00_a0t = {
559 .modes = &foxlink_fl500wvr00_a0t_mode,
560 .num_modes = 1,
d7a839cd 561 .bpc = 8,
102932b0
BB		 562 .size = {
563 .width = 108,
564 .height = 65,
565 },
bb276cb3 566 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
102932b0
BB		 567};
568
a853205e
PZ		 569static const struct drm_display_mode hannstar_hsd070pww1_mode = {
570 .clock = 71100,
571 .hdisplay = 1280,
572 .hsync_start = 1280 + 1,
573 .hsync_end = 1280 + 1 + 158,
574 .htotal = 1280 + 1 + 158 + 1,
575 .vdisplay = 800,
576 .vsync_start = 800 + 1,
577 .vsync_end = 800 + 1 + 21,
578 .vtotal = 800 + 1 + 21 + 1,
579 .vrefresh = 60,
580};
581
582static const struct panel_desc hannstar_hsd070pww1 = {
583 .modes = &hannstar_hsd070pww1_mode,
584 .num_modes = 1,
585 .bpc = 6,
586 .size = {
587 .width = 151,
588 .height = 94,
589 },
590};
591
61ac0bf8
LS		 592static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = {
593 .clock = 33333,
594 .hdisplay = 800,
595 .hsync_start = 800 + 85,
596 .hsync_end = 800 + 85 + 86,
597 .htotal = 800 + 85 + 86 + 85,
598 .vdisplay = 480,
599 .vsync_start = 480 + 16,
600 .vsync_end = 480 + 16 + 13,
601 .vtotal = 480 + 16 + 13 + 16,
602 .vrefresh = 60,
603};
604
605static const struct panel_desc hitachi_tx23d38vm0caa = {
606 .modes = &hitachi_tx23d38vm0caa_mode,
607 .num_modes = 1,
608 .bpc = 6,
609 .size = {
610 .width = 195,
611 .height = 117,
612 },
613};
614
d731f661 615static const struct drm_display_mode innolux_g121i1_l01_mode = {
0a2288c0 616 .clock = 71000,
d731f661
LS		 617 .hdisplay = 1280,
618 .hsync_start = 1280 + 64,
619 .hsync_end = 1280 + 64 + 32,
620 .htotal = 1280 + 64 + 32 + 64,
621 .vdisplay = 800,
622 .vsync_start = 800 + 9,
623 .vsync_end = 800 + 9 + 6,
624 .vtotal = 800 + 9 + 6 + 9,
625 .vrefresh = 60,
626};
627
628static const struct panel_desc innolux_g121i1_l01 = {
629 .modes = &innolux_g121i1_l01_mode,
630 .num_modes = 1,
631 .bpc = 6,
632 .size = {
633 .width = 261,
634 .height = 163,
635 },
636};
637
0a2288c0 638static const struct drm_display_mode innolux_n116bge_mode = {
7fe8c777 639 .clock = 76420,
0a2288c0 640 .hdisplay = 1366,
7fe8c777
DK		 641 .hsync_start = 1366 + 136,
642 .hsync_end = 1366 + 136 + 30,
643 .htotal = 1366 + 136 + 30 + 60,
0a2288c0
TR		 644 .vdisplay = 768,
645 .vsync_start = 768 + 8,
7fe8c777
DK		 646 .vsync_end = 768 + 8 + 12,
647 .vtotal = 768 + 8 + 12 + 12,
0a2288c0
TR		 648 .vrefresh = 60,
649 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
650};
651
652static const struct panel_desc innolux_n116bge = {
653 .modes = &innolux_n116bge_mode,
654 .num_modes = 1,
655 .bpc = 6,
656 .size = {
657 .width = 256,
658 .height = 144,
659 },
660};
661
ea44739d
AB		 662static const struct drm_display_mode innolux_n156bge_l21_mode = {
663 .clock = 69300,
664 .hdisplay = 1366,
665 .hsync_start = 1366 + 16,
666 .hsync_end = 1366 + 16 + 34,
667 .htotal = 1366 + 16 + 34 + 50,
668 .vdisplay = 768,
669 .vsync_start = 768 + 2,
670 .vsync_end = 768 + 2 + 6,
671 .vtotal = 768 + 2 + 6 + 12,
672 .vrefresh = 60,
673};
674
675static const struct panel_desc innolux_n156bge_l21 = {
676 .modes = &innolux_n156bge_l21_mode,
677 .num_modes = 1,
0208d511 678 .bpc = 6,
ea44739d
AB		 679 .size = {
680 .width = 344,
681 .height = 193,
682 },
683};
684
ec7c5653
TR		 685static const struct drm_display_mode lg_lp129qe_mode = {
686 .clock = 285250,
687 .hdisplay = 2560,
688 .hsync_start = 2560 + 48,
689 .hsync_end = 2560 + 48 + 32,
690 .htotal = 2560 + 48 + 32 + 80,
691 .vdisplay = 1700,
692 .vsync_start = 1700 + 3,
693 .vsync_end = 1700 + 3 + 10,
694 .vtotal = 1700 + 3 + 10 + 36,
695 .vrefresh = 60,
696};
697
698static const struct panel_desc lg_lp129qe = {
699 .modes = &lg_lp129qe_mode,
700 .num_modes = 1,
0208d511 701 .bpc = 8,
ec7c5653
TR		 702 .size = {
703 .width = 272,
704 .height = 181,
705 },
706};
707
6d54e3d2
MD		 708static const struct drm_display_mode samsung_ltn101nt05_mode = {
709 .clock = 54030,
710 .hdisplay = 1024,
711 .hsync_start = 1024 + 24,
712 .hsync_end = 1024 + 24 + 136,
713 .htotal = 1024 + 24 + 136 + 160,
714 .vdisplay = 600,
715 .vsync_start = 600 + 3,
716 .vsync_end = 600 + 3 + 6,
717 .vtotal = 600 + 3 + 6 + 61,
718 .vrefresh = 60,
719};
720
721static const struct panel_desc samsung_ltn101nt05 = {
722 .modes = &samsung_ltn101nt05_mode,
723 .num_modes = 1,
0208d511 724 .bpc = 6,
6d54e3d2
MD		 725 .size = {
726 .width = 1024,
727 .height = 600,
728 },
729};
730
280921de
TR		 731static const struct of_device_id platform_of_match[] = {
732 {
733 .compatible = "auo,b101aw03",
734 .data = &auo_b101aw03,
dac746e0
RC		 735 }, {
736 .compatible = "auo,b101xtn01",
737 .data = &auo_b101xtn01,
e35e305e
AK		 738 }, {
739 .compatible = "auo,b116xw03",
740 .data = &auo_b116xw03,
3e51d609
AK		 741 }, {
742 .compatible = "auo,b133htn01",
743 .data = &auo_b133htn01,
a333f7ad
SM		 744 }, {
745 .compatible = "auo,b133xtn01",
746 .data = &auo_b133xtn01,
4c930757
SW		 747 }, {
748 .compatible = "chunghwa,claa101wa01a",
749 .data = &chunghwa_claa101wa01a
280921de
TR		 750 }, {
751 .compatible = "chunghwa,claa101wb01",
752 .data = &chunghwa_claa101wb01
26ab0065
SA		 753 }, {
754 .compatible = "edt,et057090dhu",
755 .data = &edt_et057090dhu,
fff5de45
PZ		 756 }, {
757 .compatible = "edt,et070080dh6",
758 .data = &edt_etm0700g0dh6,
759 }, {
760 .compatible = "edt,etm0700g0dh6",
761 .data = &edt_etm0700g0dh6,
102932b0
BB		 762 }, {
763 .compatible = "foxlink,fl500wvr00-a0t",
764 .data = &foxlink_fl500wvr00_a0t,
a853205e
PZ		 765 }, {
766 .compatible = "hannstar,hsd070pww1",
767 .data = &hannstar_hsd070pww1,
61ac0bf8
LS		 768 }, {
769 .compatible = "hit,tx23d38vm0caa",
770 .data = &hitachi_tx23d38vm0caa
d731f661
LS		 771 }, {
772 .compatible ="innolux,g121i1-l01",
773 .data = &innolux_g121i1_l01
0a2288c0
TR		 774 }, {
775 .compatible = "innolux,n116bge",
776 .data = &innolux_n116bge,
ea44739d
AB		 777 }, {
778 .compatible = "innolux,n156bge-l21",
779 .data = &innolux_n156bge_l21,
ec7c5653
TR		 780 }, {
781 .compatible = "lg,lp129qe",
782 .data = &lg_lp129qe,
6d54e3d2
MD		 783 }, {
784 .compatible = "samsung,ltn101nt05",
785 .data = &samsung_ltn101nt05,
280921de
TR		 786 }, {
787 /* sentinel */
788 }
789};
790MODULE_DEVICE_TABLE(of, platform_of_match);
791
792static int panel_simple_platform_probe(struct platform_device *pdev)
793{
794 const struct of_device_id *id;
795
796 id = of_match_node(platform_of_match, pdev->dev.of_node);
797 if (!id)
798 return -ENODEV;
799
800 return panel_simple_probe(&pdev->dev, id->data);
801}
802
803static int panel_simple_platform_remove(struct platform_device *pdev)
804{
805 return panel_simple_remove(&pdev->dev);
806}
807
d02fd93e
TR		 808static void panel_simple_platform_shutdown(struct platform_device *pdev)
809{
810 panel_simple_shutdown(&pdev->dev);
811}
812
280921de
TR		 813static struct platform_driver panel_simple_platform_driver = {
814 .driver = {
815 .name = "panel-simple",
280921de
TR		 816 .of_match_table = platform_of_match,
817 },
818 .probe = panel_simple_platform_probe,
819 .remove = panel_simple_platform_remove,
d02fd93e 820 .shutdown = panel_simple_platform_shutdown,
280921de
TR		 821};
822
210fcd9d
TR		 823struct panel_desc_dsi {
824 struct panel_desc desc;
825
462658b8 826 unsigned long flags;
210fcd9d
TR		 827 enum mipi_dsi_pixel_format format;
828 unsigned int lanes;
829};
830
712ac1ba
AC		 831static const struct drm_display_mode lg_ld070wx3_sl01_mode = {
832 .clock = 71000,
833 .hdisplay = 800,
834 .hsync_start = 800 + 32,
835 .hsync_end = 800 + 32 + 1,
836 .htotal = 800 + 32 + 1 + 57,
837 .vdisplay = 1280,
838 .vsync_start = 1280 + 28,
839 .vsync_end = 1280 + 28 + 1,
840 .vtotal = 1280 + 28 + 1 + 14,
841 .vrefresh = 60,
842};
843
844static const struct panel_desc_dsi lg_ld070wx3_sl01 = {
845 .desc = {
846 .modes = &lg_ld070wx3_sl01_mode,
847 .num_modes = 1,
d7a839cd 848 .bpc = 8,
712ac1ba
AC		 849 .size = {
850 .width = 94,
851 .height = 151,
852 },
853 },
5e4cc278 854 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS,
712ac1ba
AC		 855 .format = MIPI_DSI_FMT_RGB888,
856 .lanes = 4,
857};
858
499ce85a
AC		 859static const struct drm_display_mode lg_lh500wx1_sd03_mode = {
860 .clock = 67000,
861 .hdisplay = 720,
862 .hsync_start = 720 + 12,
863 .hsync_end = 720 + 12 + 4,
864 .htotal = 720 + 12 + 4 + 112,
865 .vdisplay = 1280,
866 .vsync_start = 1280 + 8,
867 .vsync_end = 1280 + 8 + 4,
868 .vtotal = 1280 + 8 + 4 + 12,
869 .vrefresh = 60,
870};
871
872static const struct panel_desc_dsi lg_lh500wx1_sd03 = {
873 .desc = {
874 .modes = &lg_lh500wx1_sd03_mode,
875 .num_modes = 1,
d7a839cd 876 .bpc = 8,
499ce85a
AC		 877 .size = {
878 .width = 62,
879 .height = 110,
880 },
881 },
882 .flags = MIPI_DSI_MODE_VIDEO,
883 .format = MIPI_DSI_FMT_RGB888,
884 .lanes = 4,
885};
886
280921de
TR		 887static const struct drm_display_mode panasonic_vvx10f004b00_mode = {
888 .clock = 157200,
889 .hdisplay = 1920,
890 .hsync_start = 1920 + 154,
891 .hsync_end = 1920 + 154 + 16,
892 .htotal = 1920 + 154 + 16 + 32,
893 .vdisplay = 1200,
894 .vsync_start = 1200 + 17,
895 .vsync_end = 1200 + 17 + 2,
896 .vtotal = 1200 + 17 + 2 + 16,
897 .vrefresh = 60,
898};
899
210fcd9d
TR		 900static const struct panel_desc_dsi panasonic_vvx10f004b00 = {
901 .desc = {
902 .modes = &panasonic_vvx10f004b00_mode,
903 .num_modes = 1,
d7a839cd 904 .bpc = 8,
210fcd9d
TR		 905 .size = {
906 .width = 217,
907 .height = 136,
908 },
280921de 909 },
5e4cc278
AC		 910 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
911 MIPI_DSI_CLOCK_NON_CONTINUOUS,
210fcd9d
TR		 912 .format = MIPI_DSI_FMT_RGB888,
913 .lanes = 4,
914};
915
916static const struct of_device_id dsi_of_match[] = {
917 {
712ac1ba
AC		 918 .compatible = "lg,ld070wx3-sl01",
919 .data = &lg_ld070wx3_sl01
920 }, {
499ce85a
AC		 921 .compatible = "lg,lh500wx1-sd03",
922 .data = &lg_lh500wx1_sd03
923 }, {
210fcd9d
TR		 924 .compatible = "panasonic,vvx10f004b00",
925 .data = &panasonic_vvx10f004b00
926 }, {
927 /* sentinel */
928 }
929};
930MODULE_DEVICE_TABLE(of, dsi_of_match);
931
932static int panel_simple_dsi_probe(struct mipi_dsi_device *dsi)
933{
934 const struct panel_desc_dsi *desc;
935 const struct of_device_id *id;
936 int err;
937
938 id = of_match_node(dsi_of_match, dsi->dev.of_node);
939 if (!id)
940 return -ENODEV;
941
942 desc = id->data;
943
944 err = panel_simple_probe(&dsi->dev, &desc->desc);
945 if (err < 0)
946 return err;
947
462658b8 948 dsi->mode_flags = desc->flags;
210fcd9d
TR		 949 dsi->format = desc->format;
950 dsi->lanes = desc->lanes;
951
952 return mipi_dsi_attach(dsi);
953}
954
955static int panel_simple_dsi_remove(struct mipi_dsi_device *dsi)
956{
957 int err;
958
959 err = mipi_dsi_detach(dsi);
960 if (err < 0)
961 dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err);
962
963 return panel_simple_remove(&dsi->dev);
964}
965
d02fd93e
TR		 966static void panel_simple_dsi_shutdown(struct mipi_dsi_device *dsi)
967{
968 panel_simple_shutdown(&dsi->dev);
969}
970
210fcd9d
TR		 971static struct mipi_dsi_driver panel_simple_dsi_driver = {
972 .driver = {
973 .name = "panel-simple-dsi",
210fcd9d
TR		 974 .of_match_table = dsi_of_match,
975 },
976 .probe = panel_simple_dsi_probe,
977 .remove = panel_simple_dsi_remove,
d02fd93e 978 .shutdown = panel_simple_dsi_shutdown,
280921de
TR		 979};
980
981static int __init panel_simple_init(void)
982{
210fcd9d
TR		 983 int err;
984
985 err = platform_driver_register(&panel_simple_platform_driver);
986 if (err < 0)
987 return err;
988
989 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI)) {
990 err = mipi_dsi_driver_register(&panel_simple_dsi_driver);
991 if (err < 0)
992 return err;
993 }
994
995 return 0;
280921de
TR		 996}
997module_init(panel_simple_init);
998
999static void __exit panel_simple_exit(void)
1000{
210fcd9d
TR		 1001 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI))
1002 mipi_dsi_driver_unregister(&panel_simple_dsi_driver);
1003
280921de
TR		 1004 platform_driver_unregister(&panel_simple_platform_driver);
1005}
1006module_exit(panel_simple_exit);
1007
1008MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
1009MODULE_DESCRIPTION("DRM Driver for Simple Panels");
1010MODULE_LICENSE("GPL and additional rights");
Linux kernel - Deliverables
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