[deliverable/linux.git] / drivers / gpu / drm / qxl / qxl_kms.c

/*
 * Copyright 2013 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Dave Airlie
 *          Alon Levy
 */

#include "qxl_drv.h"
#include "qxl_object.h"

#include <drm/drm_crtc_helper.h>
#include <linux/io-mapping.h>

int qxl_log_level;

static void qxl_dump_mode(struct qxl_device *qdev, void *p)
{
	struct qxl_mode *m = p;
	DRM_DEBUG_KMS("%d: %dx%d %d bits, stride %d, %dmm x %dmm, orientation %d\n",
		      m->id, m->x_res, m->y_res, m->bits, m->stride, m->x_mili,
		      m->y_mili, m->orientation);
}

static bool qxl_check_device(struct qxl_device *qdev)
{
	struct qxl_rom *rom = qdev->rom;
	int mode_offset;
	int i;

	if (rom->magic != 0x4f525851) {
		DRM_ERROR("bad rom signature %x\n", rom->magic);
		return false;
	}

	DRM_INFO("Device Version %d.%d\n", rom->id, rom->update_id);
	DRM_INFO("Compression level %d log level %d\n", rom->compression_level,
		 rom->log_level);
	DRM_INFO("Currently using mode #%d, list at 0x%x\n",
		 rom->mode, rom->modes_offset);
	DRM_INFO("%d io pages at offset 0x%x\n",
		 rom->num_io_pages, rom->pages_offset);
	DRM_INFO("%d byte draw area at offset 0x%x\n",
		 rom->surface0_area_size, rom->draw_area_offset);

	qdev->vram_size = rom->surface0_area_size;
	DRM_INFO("RAM header offset: 0x%x\n", rom->ram_header_offset);

	mode_offset = rom->modes_offset / 4;
	qdev->mode_info.num_modes = ((u32 *)rom)[mode_offset];
	DRM_INFO("rom modes offset 0x%x for %d modes\n", rom->modes_offset,
		 qdev->mode_info.num_modes);
	qdev->mode_info.modes = (void *)((uint32_t *)rom + mode_offset + 1);
	for (i = 0; i < qdev->mode_info.num_modes; i++)
		qxl_dump_mode(qdev, qdev->mode_info.modes + i);
	return true;
}

static void setup_hw_slot(struct qxl_device *qdev, int slot_index,
			  struct qxl_memslot *slot)
{
	qdev->ram_header->mem_slot.mem_start = slot->start_phys_addr;
	qdev->ram_header->mem_slot.mem_end = slot->end_phys_addr;
	qxl_io_memslot_add(qdev, slot_index);
}

static uint8_t setup_slot(struct qxl_device *qdev, uint8_t slot_index_offset,
	unsigned long start_phys_addr, unsigned long end_phys_addr)
{
	uint64_t high_bits;
	struct qxl_memslot *slot;
	uint8_t slot_index;

	slot_index = qdev->rom->slots_start + slot_index_offset;
	slot = &qdev->mem_slots[slot_index];
	slot->start_phys_addr = start_phys_addr;
	slot->end_phys_addr = end_phys_addr;

	setup_hw_slot(qdev, slot_index, slot);

	slot->generation = qdev->rom->slot_generation;
	high_bits = slot_index << qdev->slot_gen_bits;
	high_bits |= slot->generation;
	high_bits <<= (64 - (qdev->slot_gen_bits + qdev->slot_id_bits));
	slot->high_bits = high_bits;
	return slot_index;
}

void qxl_reinit_memslots(struct qxl_device *qdev)
{
	setup_hw_slot(qdev, qdev->main_mem_slot, &qdev->mem_slots[qdev->main_mem_slot]);
	setup_hw_slot(qdev, qdev->surfaces_mem_slot, &qdev->mem_slots[qdev->surfaces_mem_slot]);
}

static void qxl_gc_work(struct work_struct *work)
{
	struct qxl_device *qdev = container_of(work, struct qxl_device, gc_work);
	qxl_garbage_collect(qdev);
}

static int qxl_device_init(struct qxl_device *qdev,
		    struct drm_device *ddev,
		    struct pci_dev *pdev,
		    unsigned long flags)
{
	int r, sb;

	qdev->dev = &pdev->dev;
	qdev->ddev = ddev;
	qdev->pdev = pdev;
	qdev->flags = flags;

	mutex_init(&qdev->gem.mutex);
	mutex_init(&qdev->update_area_mutex);
	mutex_init(&qdev->release_mutex);
	mutex_init(&qdev->surf_evict_mutex);
	INIT_LIST_HEAD(&qdev->gem.objects);

	qdev->rom_base = pci_resource_start(pdev, 2);
	qdev->rom_size = pci_resource_len(pdev, 2);
	qdev->vram_base = pci_resource_start(pdev, 0);
	qdev->io_base = pci_resource_start(pdev, 3);

	qdev->vram_mapping = io_mapping_create_wc(qdev->vram_base, pci_resource_len(pdev, 0));

	if (pci_resource_len(pdev, 4) > 0) {
		/* 64bit surface bar present */
		sb = 4;
		qdev->surfaceram_base = pci_resource_start(pdev, sb);
		qdev->surfaceram_size = pci_resource_len(pdev, sb);
		qdev->surface_mapping =
			io_mapping_create_wc(qdev->surfaceram_base,
					     qdev->surfaceram_size);
	}
	if (qdev->surface_mapping == NULL) {
		/* 64bit surface bar not present (or mapping failed) */
		sb = 1;
		qdev->surfaceram_base = pci_resource_start(pdev, sb);
		qdev->surfaceram_size = pci_resource_len(pdev, sb);
		qdev->surface_mapping =
			io_mapping_create_wc(qdev->surfaceram_base,
					     qdev->surfaceram_size);
	}

	DRM_DEBUG_KMS("qxl: vram %llx-%llx(%dM %dk), surface %llx-%llx(%dM %dk, %s)\n",
		 (unsigned long long)qdev->vram_base,
		 (unsigned long long)pci_resource_end(pdev, 0),
		 (int)pci_resource_len(pdev, 0) / 1024 / 1024,
		 (int)pci_resource_len(pdev, 0) / 1024,
		 (unsigned long long)qdev->surfaceram_base,
		 (unsigned long long)pci_resource_end(pdev, sb),
		 (int)qdev->surfaceram_size / 1024 / 1024,
		 (int)qdev->surfaceram_size / 1024,
		 (sb == 4) ? "64bit" : "32bit");

	qdev->rom = ioremap(qdev->rom_base, qdev->rom_size);
	if (!qdev->rom) {
		pr_err("Unable to ioremap ROM\n");
		return -ENOMEM;
	}

	qxl_check_device(qdev);

	r = qxl_bo_init(qdev);
	if (r) {
		DRM_ERROR("bo init failed %d\n", r);
		return r;
	}

	qdev->ram_header = ioremap(qdev->vram_base +
				   qdev->rom->ram_header_offset,
				   sizeof(*qdev->ram_header));

	qdev->command_ring = qxl_ring_create(&(qdev->ram_header->cmd_ring_hdr),
					     sizeof(struct qxl_command),
					     QXL_COMMAND_RING_SIZE,
					     qdev->io_base + QXL_IO_NOTIFY_CMD,
					     false,
					     &qdev->display_event);

	qdev->cursor_ring = qxl_ring_create(
				&(qdev->ram_header->cursor_ring_hdr),
				sizeof(struct qxl_command),
				QXL_CURSOR_RING_SIZE,
				qdev->io_base + QXL_IO_NOTIFY_CMD,
				false,
				&qdev->cursor_event);

	qdev->release_ring = qxl_ring_create(
				&(qdev->ram_header->release_ring_hdr),
				sizeof(uint64_t),
				QXL_RELEASE_RING_SIZE, 0, true,
				NULL);

	/* TODO - slot initialization should happen on reset. where is our
	 * reset handler? */
	qdev->n_mem_slots = qdev->rom->slots_end;
	qdev->slot_gen_bits = qdev->rom->slot_gen_bits;
	qdev->slot_id_bits = qdev->rom->slot_id_bits;
	qdev->va_slot_mask =
		(~(uint64_t)0) >> (qdev->slot_id_bits + qdev->slot_gen_bits);

	qdev->mem_slots =
		kmalloc(qdev->n_mem_slots * sizeof(struct qxl_memslot),
			GFP_KERNEL);

	idr_init(&qdev->release_idr);
	spin_lock_init(&qdev->release_idr_lock);
	spin_lock_init(&qdev->release_lock);

	idr_init(&qdev->surf_id_idr);
	spin_lock_init(&qdev->surf_id_idr_lock);

	mutex_init(&qdev->async_io_mutex);

	/* reset the device into a known state - no memslots, no primary
	 * created, no surfaces. */
	qxl_io_reset(qdev);

	/* must initialize irq before first async io - slot creation */
	r = qxl_irq_init(qdev);
	if (r)
		return r;

	/*
	 * Note that virtual is surface0. We rely on the single ioremap done
	 * before.
	 */
	qdev->main_mem_slot = setup_slot(qdev, 0,
		(unsigned long)qdev->vram_base,
		(unsigned long)qdev->vram_base + qdev->rom->ram_header_offset);
	qdev->surfaces_mem_slot = setup_slot(qdev, 1,
		(unsigned long)qdev->surfaceram_base,
		(unsigned long)qdev->surfaceram_base + qdev->surfaceram_size);
	DRM_INFO("main mem slot %d [%lx,%x]\n",
		 qdev->main_mem_slot,
		 (unsigned long)qdev->vram_base, qdev->rom->ram_header_offset);
	DRM_INFO("surface mem slot %d [%lx,%lx]\n",
		 qdev->surfaces_mem_slot,
		 (unsigned long)qdev->surfaceram_base,
		 (unsigned long)qdev->surfaceram_size);


	INIT_WORK(&qdev->gc_work, qxl_gc_work);

	return 0;
}

static void qxl_device_fini(struct qxl_device *qdev)
{
	if (qdev->current_release_bo[0])
		qxl_bo_unref(&qdev->current_release_bo[0]);
	if (qdev->current_release_bo[1])
		qxl_bo_unref(&qdev->current_release_bo[1]);
	flush_work(&qdev->gc_work);
	qxl_ring_free(qdev->command_ring);
	qxl_ring_free(qdev->cursor_ring);
	qxl_ring_free(qdev->release_ring);
	qxl_bo_fini(qdev);
	io_mapping_free(qdev->surface_mapping);
	io_mapping_free(qdev->vram_mapping);
	iounmap(qdev->ram_header);
	iounmap(qdev->rom);
	qdev->rom = NULL;
	qdev->mode_info.modes = NULL;
	qdev->mode_info.num_modes = 0;
	qxl_debugfs_remove_files(qdev);
}

int qxl_driver_unload(struct drm_device *dev)
{
	struct qxl_device *qdev = dev->dev_private;

	if (qdev == NULL)
		return 0;

	drm_vblank_cleanup(dev);

	qxl_modeset_fini(qdev);
	qxl_device_fini(qdev);

	kfree(qdev);
	dev->dev_private = NULL;
	return 0;
}

int qxl_driver_load(struct drm_device *dev, unsigned long flags)
{
	struct qxl_device *qdev;
	int r;

	qdev = kzalloc(sizeof(struct qxl_device), GFP_KERNEL);
	if (qdev == NULL)
		return -ENOMEM;

	dev->dev_private = qdev;

	r = qxl_device_init(qdev, dev, dev->pdev, flags);
	if (r)
		goto out;

	r = drm_vblank_init(dev, 1);
	if (r)
		goto unload;

	r = qxl_modeset_init(qdev);
	if (r)
		goto unload;

	drm_kms_helper_poll_init(qdev->ddev);

	return 0;
unload:
	qxl_driver_unload(dev);

out:
	kfree(qdev);
	return r;
}
Commit	Line	Data
f64122c1 DA	1	/*
	2	* Copyright 2013 Red Hat Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: Dave Airlie
	23	* Alon Levy
	24	*/
	25
	26	#include "qxl_drv.h"
	27	#include "qxl_object.h"
	28
5ff91e44	29	#include <drm/drm_crtc_helper.h>
f64122c1 DA	30	#include <linux/io-mapping.h>
	31
	32	int qxl_log_level;
	33
	34	static void qxl_dump_mode(struct qxl_device qdev, void p)
	35	{
	36	struct qxl_mode *m = p;
	37	DRM_DEBUG_KMS("%d: %dx%d %d bits, stride %d, %dmm x %dmm, orientation %d\n",
	38	m->id, m->x_res, m->y_res, m->bits, m->stride, m->x_mili,
	39	m->y_mili, m->orientation);
	40	}
	41
	42	static bool qxl_check_device(struct qxl_device *qdev)
	43	{
	44	struct qxl_rom *rom = qdev->rom;
	45	int mode_offset;
	46	int i;
	47
	48	if (rom->magic != 0x4f525851) {
	49	DRM_ERROR("bad rom signature %x\n", rom->magic);
	50	return false;
	51	}
	52
	53	DRM_INFO("Device Version %d.%d\n", rom->id, rom->update_id);
	54	DRM_INFO("Compression level %d log level %d\n", rom->compression_level,
	55	rom->log_level);
	56	DRM_INFO("Currently using mode #%d, list at 0x%x\n",
	57	rom->mode, rom->modes_offset);
	58	DRM_INFO("%d io pages at offset 0x%x\n",
	59	rom->num_io_pages, rom->pages_offset);
	60	DRM_INFO("%d byte draw area at offset 0x%x\n",
	61	rom->surface0_area_size, rom->draw_area_offset);
	62
	63	qdev->vram_size = rom->surface0_area_size;
	64	DRM_INFO("RAM header offset: 0x%x\n", rom->ram_header_offset);
	65
	66	mode_offset = rom->modes_offset / 4;
	67	qdev->mode_info.num_modes = ((u32 *)rom)[mode_offset];
	68	DRM_INFO("rom modes offset 0x%x for %d modes\n", rom->modes_offset,
	69	qdev->mode_info.num_modes);
	70	qdev->mode_info.modes = (void )((uint32_t )rom + mode_offset + 1);
	71	for (i = 0; i < qdev->mode_info.num_modes; i++)
	72	qxl_dump_mode(qdev, qdev->mode_info.modes + i);
	73	return true;
	74	}
	75
c9fdda2a DA	76	static void setup_hw_slot(struct qxl_device *qdev, int slot_index,
	77	struct qxl_memslot *slot)
	78	{
	79	qdev->ram_header->mem_slot.mem_start = slot->start_phys_addr;
	80	qdev->ram_header->mem_slot.mem_end = slot->end_phys_addr;
	81	qxl_io_memslot_add(qdev, slot_index);
	82	}
	83
f64122c1 DA	84	static uint8_t setup_slot(struct qxl_device *qdev, uint8_t slot_index_offset,
	85	unsigned long start_phys_addr, unsigned long end_phys_addr)
	86	{
	87	uint64_t high_bits;
	88	struct qxl_memslot *slot;
	89	uint8_t slot_index;
f64122c1 DA	90
	91	slot_index = qdev->rom->slots_start + slot_index_offset;
	92	slot = &qdev->mem_slots[slot_index];
	93	slot->start_phys_addr = start_phys_addr;
	94	slot->end_phys_addr = end_phys_addr;
c9fdda2a DA	95
	96	setup_hw_slot(qdev, slot_index, slot);
	97
f64122c1 DA	98	slot->generation = qdev->rom->slot_generation;
	99	high_bits = slot_index << qdev->slot_gen_bits;
	100	high_bits \|= slot->generation;
	101	high_bits <<= (64 - (qdev->slot_gen_bits + qdev->slot_id_bits));
	102	slot->high_bits = high_bits;
	103	return slot_index;
	104	}
	105
c9fdda2a DA	106	void qxl_reinit_memslots(struct qxl_device *qdev)
	107	{
	108	setup_hw_slot(qdev, qdev->main_mem_slot, &qdev->mem_slots[qdev->main_mem_slot]);
	109	setup_hw_slot(qdev, qdev->surfaces_mem_slot, &qdev->mem_slots[qdev->surfaces_mem_slot]);
	110	}
	111
f64122c1 DA	112	static void qxl_gc_work(struct work_struct *work)
	113	{
	114	struct qxl_device *qdev = container_of(work, struct qxl_device, gc_work);
	115	qxl_garbage_collect(qdev);
	116	}
	117
0662e4c2	118	static int qxl_device_init(struct qxl_device *qdev,
f64122c1 DA	119	struct drm_device *ddev,
	120	struct pci_dev *pdev,
	121	unsigned long flags)
	122	{
35541782	123	int r, sb;
f64122c1 DA	124
	125	qdev->dev = &pdev->dev;
	126	qdev->ddev = ddev;
	127	qdev->pdev = pdev;
	128	qdev->flags = flags;
	129
	130	mutex_init(&qdev->gem.mutex);
	131	mutex_init(&qdev->update_area_mutex);
	132	mutex_init(&qdev->release_mutex);
	133	mutex_init(&qdev->surf_evict_mutex);
	134	INIT_LIST_HEAD(&qdev->gem.objects);
	135
	136	qdev->rom_base = pci_resource_start(pdev, 2);
	137	qdev->rom_size = pci_resource_len(pdev, 2);
	138	qdev->vram_base = pci_resource_start(pdev, 0);
f64122c1 DA	139	qdev->io_base = pci_resource_start(pdev, 3);
	140
	141	qdev->vram_mapping = io_mapping_create_wc(qdev->vram_base, pci_resource_len(pdev, 0));
35541782 GH	142
	143	if (pci_resource_len(pdev, 4) > 0) {
	144	/* 64bit surface bar present */
	145	sb = 4;
	146	qdev->surfaceram_base = pci_resource_start(pdev, sb);
	147	qdev->surfaceram_size = pci_resource_len(pdev, sb);
	148	qdev->surface_mapping =
	149	io_mapping_create_wc(qdev->surfaceram_base,
	150	qdev->surfaceram_size);
	151	}
	152	if (qdev->surface_mapping == NULL) {
	153	/* 64bit surface bar not present (or mapping failed) */
	154	sb = 1;
	155	qdev->surfaceram_base = pci_resource_start(pdev, sb);
	156	qdev->surfaceram_size = pci_resource_len(pdev, sb);
	157	qdev->surface_mapping =
	158	io_mapping_create_wc(qdev->surfaceram_base,
	159	qdev->surfaceram_size);
	160	}
	161
	162	DRM_DEBUG_KMS("qxl: vram %llx-%llx(%dM %dk), surface %llx-%llx(%dM %dk, %s)\n",
970fa986 DA	163	(unsigned long long)qdev->vram_base,
970fa986 DA	164	(unsigned long long)pci_resource_end(pdev, 0),
f64122c1 DA	165	(int)pci_resource_len(pdev, 0) / 1024 / 1024,
f64122c1 DA	166	(int)pci_resource_len(pdev, 0) / 1024,
970fa986	167	(unsigned long long)qdev->surfaceram_base,
35541782	168	(unsigned long long)pci_resource_end(pdev, sb),
f64122c1	169	(int)qdev->surfaceram_size / 1024 / 1024,
35541782 GH	170	(int)qdev->surfaceram_size / 1024,
35541782 GH	171	(sb == 4) ? "64bit" : "32bit");
f64122c1 DA	172
	173	qdev->rom = ioremap(qdev->rom_base, qdev->rom_size);
	174	if (!qdev->rom) {
	175	pr_err("Unable to ioremap ROM\n");
	176	return -ENOMEM;
	177	}
	178
	179	qxl_check_device(qdev);
	180
	181	r = qxl_bo_init(qdev);
	182	if (r) {
	183	DRM_ERROR("bo init failed %d\n", r);
	184	return r;
	185	}
	186
	187	qdev->ram_header = ioremap(qdev->vram_base +
	188	qdev->rom->ram_header_offset,
	189	sizeof(*qdev->ram_header));
	190
	191	qdev->command_ring = qxl_ring_create(&(qdev->ram_header->cmd_ring_hdr),
	192	sizeof(struct qxl_command),
	193	QXL_COMMAND_RING_SIZE,
	194	qdev->io_base + QXL_IO_NOTIFY_CMD,
	195	false,
	196	&qdev->display_event);
	197
	198	qdev->cursor_ring = qxl_ring_create(
	199	&(qdev->ram_header->cursor_ring_hdr),
	200	sizeof(struct qxl_command),
	201	QXL_CURSOR_RING_SIZE,
	202	qdev->io_base + QXL_IO_NOTIFY_CMD,
	203	false,
	204	&qdev->cursor_event);
	205
	206	qdev->release_ring = qxl_ring_create(
	207	&(qdev->ram_header->release_ring_hdr),
	208	sizeof(uint64_t),
	209	QXL_RELEASE_RING_SIZE, 0, true,
	210	NULL);
	211
	212	/* TODO - slot initialization should happen on reset. where is our
	213	* reset handler? */
	214	qdev->n_mem_slots = qdev->rom->slots_end;
	215	qdev->slot_gen_bits = qdev->rom->slot_gen_bits;
	216	qdev->slot_id_bits = qdev->rom->slot_id_bits;
	217	qdev->va_slot_mask =
	218	(~(uint64_t)0) >> (qdev->slot_id_bits + qdev->slot_gen_bits);
	219
	220	qdev->mem_slots =
	221	kmalloc(qdev->n_mem_slots * sizeof(struct qxl_memslot),
	222	GFP_KERNEL);
	223
	224	idr_init(&qdev->release_idr);
	225	spin_lock_init(&qdev->release_idr_lock);
2f453ed4	226	spin_lock_init(&qdev->release_lock);
f64122c1 DA	227
	228	idr_init(&qdev->surf_id_idr);
	229	spin_lock_init(&qdev->surf_id_idr_lock);
	230
	231	mutex_init(&qdev->async_io_mutex);
	232
	233	/* reset the device into a known state - no memslots, no primary
	234	* created, no surfaces. */
	235	qxl_io_reset(qdev);
	236
	237	/* must initialize irq before first async io - slot creation */
	238	r = qxl_irq_init(qdev);
	239	if (r)
	240	return r;
	241
	242	/*
	243	* Note that virtual is surface0. We rely on the single ioremap done
	244	* before.
	245	*/
	246	qdev->main_mem_slot = setup_slot(qdev, 0,
	247	(unsigned long)qdev->vram_base,
	248	(unsigned long)qdev->vram_base + qdev->rom->ram_header_offset);
	249	qdev->surfaces_mem_slot = setup_slot(qdev, 1,
	250	(unsigned long)qdev->surfaceram_base,
	251	(unsigned long)qdev->surfaceram_base + qdev->surfaceram_size);
d9bbf189 GH	252	DRM_INFO("main mem slot %d [%lx,%x]\n",
	253	qdev->main_mem_slot,
	254	(unsigned long)qdev->vram_base, qdev->rom->ram_header_offset);
	255	DRM_INFO("surface mem slot %d [%lx,%lx]\n",
	256	qdev->surfaces_mem_slot,
	257	(unsigned long)qdev->surfaceram_base,
	258	(unsigned long)qdev->surfaceram_size);
f64122c1 DA	259
f64122c1 DA	260
f64122c1 DA	261	INIT_WORK(&qdev->gc_work, qxl_gc_work);
f64122c1 DA	262
f64122c1 DA	263	return 0;
	264	}
	265
6d01f1f5	266	static void qxl_device_fini(struct qxl_device *qdev)
f64122c1 DA	267	{
	268	if (qdev->current_release_bo[0])
	269	qxl_bo_unref(&qdev->current_release_bo[0]);
	270	if (qdev->current_release_bo[1])
	271	qxl_bo_unref(&qdev->current_release_bo[1]);
7b2d16f5	272	flush_work(&qdev->gc_work);
f64122c1 DA	273	qxl_ring_free(qdev->command_ring);
	274	qxl_ring_free(qdev->cursor_ring);
	275	qxl_ring_free(qdev->release_ring);
	276	qxl_bo_fini(qdev);
	277	io_mapping_free(qdev->surface_mapping);
	278	io_mapping_free(qdev->vram_mapping);
	279	iounmap(qdev->ram_header);
	280	iounmap(qdev->rom);
	281	qdev->rom = NULL;
	282	qdev->mode_info.modes = NULL;
	283	qdev->mode_info.num_modes = 0;
	284	qxl_debugfs_remove_files(qdev);
	285	}
	286
	287	int qxl_driver_unload(struct drm_device *dev)
	288	{
	289	struct qxl_device *qdev = dev->dev_private;
	290
	291	if (qdev == NULL)
	292	return 0;
058e9f5c AP	293
	294	drm_vblank_cleanup(dev);
	295
f64122c1 DA	296	qxl_modeset_fini(qdev);
	297	qxl_device_fini(qdev);
	298
	299	kfree(qdev);
	300	dev->dev_private = NULL;
	301	return 0;
	302	}
	303
	304	int qxl_driver_load(struct drm_device *dev, unsigned long flags)
	305	{
	306	struct qxl_device *qdev;
	307	int r;
	308
f64122c1 DA	309	qdev = kzalloc(sizeof(struct qxl_device), GFP_KERNEL);
	310	if (qdev == NULL)
	311	return -ENOMEM;
	312
	313	dev->dev_private = qdev;
	314
	315	r = qxl_device_init(qdev, dev, dev->pdev, flags);
	316	if (r)
	317	goto out;
	318
058e9f5c AP	319	r = drm_vblank_init(dev, 1);
	320	if (r)
	321	goto unload;
	322
f64122c1	323	r = qxl_modeset_init(qdev);
058e9f5c AP	324	if (r)
058e9f5c AP	325	goto unload;
f64122c1	326
5ff91e44 DA	327	drm_kms_helper_poll_init(qdev->ddev);
5ff91e44 DA	328
f64122c1	329	return 0;
058e9f5c AP	330	unload:
	331	qxl_driver_unload(dev);
	332
f64122c1 DA	333	out:
	334	kfree(qdev);
	335	return r;
	336	}
	337
	338