[deliverable/linux.git] / drivers / gpu / drm / qxl / qxl_release.c

/*
 * Copyright 2011 Red Hat, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * on the rights to use, copy, modify, merge, publish, distribute, sub
 * license, and/or sell copies of the Software, and to permit persons to whom
 * the Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
#include "qxl_drv.h"
#include "qxl_object.h"
#include <trace/events/fence.h>

/*
 * drawable cmd cache - allocate a bunch of VRAM pages, suballocate
 * into 256 byte chunks for now - gives 16 cmds per page.
 *
 * use an ida to index into the chunks?
 */
/* manage releaseables */
/* stack them 16 high for now -drawable object is 191 */
#define RELEASE_SIZE 256
#define RELEASES_PER_BO (4096 / RELEASE_SIZE)
/* put an alloc/dealloc surface cmd into one bo and round up to 128 */
#define SURFACE_RELEASE_SIZE 128
#define SURFACE_RELEASES_PER_BO (4096 / SURFACE_RELEASE_SIZE)

static const int release_size_per_bo[] = { RELEASE_SIZE, SURFACE_RELEASE_SIZE, RELEASE_SIZE };
static const int releases_per_bo[] = { RELEASES_PER_BO, SURFACE_RELEASES_PER_BO, RELEASES_PER_BO };

static const char *qxl_get_driver_name(struct fence *fence)
{
	return "qxl";
}

static const char *qxl_get_timeline_name(struct fence *fence)
{
	return "release";
}

static bool qxl_nop_signaling(struct fence *fence)
{
	/* fences are always automatically signaled, so just pretend we did this.. */
	return true;
}

static long qxl_fence_wait(struct fence *fence, bool intr, signed long timeout)
{
	struct qxl_device *qdev;
	struct qxl_release *release;
	int count = 0, sc = 0;
	bool have_drawable_releases;
	unsigned long cur, end = jiffies + timeout;

	qdev = container_of(fence->lock, struct qxl_device, release_lock);
	release = container_of(fence, struct qxl_release, base);
	have_drawable_releases = release->type == QXL_RELEASE_DRAWABLE;

retry:
	sc++;

	if (fence_is_signaled(fence))
		goto signaled;

	qxl_io_notify_oom(qdev);

	for (count = 0; count < 11; count++) {
		if (!qxl_queue_garbage_collect(qdev, true))
			break;

		if (fence_is_signaled(fence))
			goto signaled;
	}

	if (fence_is_signaled(fence))
		goto signaled;

	if (have_drawable_releases || sc < 4) {
		if (sc > 2)
			/* back off */
			usleep_range(500, 1000);

		if (time_after(jiffies, end))
			return 0;

		if (have_drawable_releases && sc > 300) {
			FENCE_WARN(fence, "failed to wait on release %d "
					  "after spincount %d\n",
					  fence->context & ~0xf0000000, sc);
			goto signaled;
		}
		goto retry;
	}
	/*
	 * yeah, original sync_obj_wait gave up after 3 spins when
	 * have_drawable_releases is not set.
	 */

signaled:
	cur = jiffies;
	if (time_after(cur, end))
		return 0;
	return end - cur;
}

static const struct fence_ops qxl_fence_ops = {
	.get_driver_name = qxl_get_driver_name,
	.get_timeline_name = qxl_get_timeline_name,
	.enable_signaling = qxl_nop_signaling,
	.wait = qxl_fence_wait,
};

static uint64_t
qxl_release_alloc(struct qxl_device *qdev, int type,
		  struct qxl_release **ret)
{
	struct qxl_release *release;
	int handle;
	size_t size = sizeof(*release);

	release = kmalloc(size, GFP_KERNEL);
	if (!release) {
		DRM_ERROR("Out of memory\n");
		return 0;
	}
	release->base.ops = NULL;
	release->type = type;
	release->release_offset = 0;
	release->surface_release_id = 0;
	INIT_LIST_HEAD(&release->bos);

	idr_preload(GFP_KERNEL);
	spin_lock(&qdev->release_idr_lock);
	handle = idr_alloc(&qdev->release_idr, release, 1, 0, GFP_NOWAIT);
	release->base.seqno = ++qdev->release_seqno;
	spin_unlock(&qdev->release_idr_lock);
	idr_preload_end();
	if (handle < 0) {
		kfree(release);
		*ret = NULL;
		return handle;
	}
	*ret = release;
	QXL_INFO(qdev, "allocated release %lld\n", handle);
	release->id = handle;
	return handle;
}

static void
qxl_release_free_list(struct qxl_release *release)
{
	while (!list_empty(&release->bos)) {
		struct qxl_bo_list *entry;
		struct qxl_bo *bo;

		entry = container_of(release->bos.next,
				     struct qxl_bo_list, tv.head);
		bo = to_qxl_bo(entry->tv.bo);
		qxl_bo_unref(&bo);
		list_del(&entry->tv.head);
		kfree(entry);
	}
}

void
qxl_release_free(struct qxl_device *qdev,
		 struct qxl_release *release)
{
	QXL_INFO(qdev, "release %d, type %d\n", release->id,
		 release->type);

	if (release->surface_release_id)
		qxl_surface_id_dealloc(qdev, release->surface_release_id);

	spin_lock(&qdev->release_idr_lock);
	idr_remove(&qdev->release_idr, release->id);
	spin_unlock(&qdev->release_idr_lock);

	if (release->base.ops) {
		WARN_ON(list_empty(&release->bos));
		qxl_release_free_list(release);

		fence_signal(&release->base);
		fence_put(&release->base);
	} else {
		qxl_release_free_list(release);
		kfree(release);
	}
}

static int qxl_release_bo_alloc(struct qxl_device *qdev,
				struct qxl_bo **bo)
{
	int ret;
	/* pin releases bo's they are too messy to evict */
	ret = qxl_bo_create(qdev, PAGE_SIZE, false, true,
			    QXL_GEM_DOMAIN_VRAM, NULL,
			    bo);
	return ret;
}

int qxl_release_list_add(struct qxl_release *release, struct qxl_bo *bo)
{
	struct qxl_bo_list *entry;

	list_for_each_entry(entry, &release->bos, tv.head) {
		if (entry->tv.bo == &bo->tbo)
			return 0;
	}

	entry = kmalloc(sizeof(struct qxl_bo_list), GFP_KERNEL);
	if (!entry)
		return -ENOMEM;

	qxl_bo_ref(bo);
	entry->tv.bo = &bo->tbo;
	entry->tv.shared = false;
	list_add_tail(&entry->tv.head, &release->bos);
	return 0;
}

static int qxl_release_validate_bo(struct qxl_bo *bo)
{
	int ret;

	if (!bo->pin_count) {
		qxl_ttm_placement_from_domain(bo, bo->type, false);
		ret = ttm_bo_validate(&bo->tbo, &bo->placement,
				      true, false);
		if (ret)
			return ret;
	}

	ret = reservation_object_reserve_shared(bo->tbo.resv);
	if (ret)
		return ret;

	/* allocate a surface for reserved + validated buffers */
	ret = qxl_bo_check_id(bo->gem_base.dev->dev_private, bo);
	if (ret)
		return ret;
	return 0;
}

int qxl_release_reserve_list(struct qxl_release *release, bool no_intr)
{
	int ret;
	struct qxl_bo_list *entry;

	/* if only one object on the release its the release itself
	   since these objects are pinned no need to reserve */
	if (list_is_singular(&release->bos))
		return 0;

	ret = ttm_eu_reserve_buffers(&release->ticket, &release->bos, !no_intr);
	if (ret)
		return ret;

	list_for_each_entry(entry, &release->bos, tv.head) {
		struct qxl_bo *bo = to_qxl_bo(entry->tv.bo);

		ret = qxl_release_validate_bo(bo);
		if (ret) {
			ttm_eu_backoff_reservation(&release->ticket, &release->bos);
			return ret;
		}
	}
	return 0;
}

void qxl_release_backoff_reserve_list(struct qxl_release *release)
{
	/* if only one object on the release its the release itself
	   since these objects are pinned no need to reserve */
	if (list_is_singular(&release->bos))
		return;

	ttm_eu_backoff_reservation(&release->ticket, &release->bos);
}


int qxl_alloc_surface_release_reserved(struct qxl_device *qdev,
				       enum qxl_surface_cmd_type surface_cmd_type,
				       struct qxl_release *create_rel,
				       struct qxl_release **release)
{
	if (surface_cmd_type == QXL_SURFACE_CMD_DESTROY && create_rel) {
		int idr_ret;
		struct qxl_bo_list *entry = list_first_entry(&create_rel->bos, struct qxl_bo_list, tv.head);
		struct qxl_bo *bo;
		union qxl_release_info *info;

		/* stash the release after the create command */
		idr_ret = qxl_release_alloc(qdev, QXL_RELEASE_SURFACE_CMD, release);
		if (idr_ret < 0)
			return idr_ret;
		bo = qxl_bo_ref(to_qxl_bo(entry->tv.bo));

		(*release)->release_offset = create_rel->release_offset + 64;

		qxl_release_list_add(*release, bo);

		info = qxl_release_map(qdev, *release);
		info->id = idr_ret;
		qxl_release_unmap(qdev, *release, info);

		qxl_bo_unref(&bo);
		return 0;
	}

	return qxl_alloc_release_reserved(qdev, sizeof(struct qxl_surface_cmd),
					 QXL_RELEASE_SURFACE_CMD, release, NULL);
}

int qxl_alloc_release_reserved(struct qxl_device *qdev, unsigned long size,
				       int type, struct qxl_release **release,
				       struct qxl_bo **rbo)
{
	struct qxl_bo *bo;
	int idr_ret;
	int ret = 0;
	union qxl_release_info *info;
	int cur_idx;

	if (type == QXL_RELEASE_DRAWABLE)
		cur_idx = 0;
	else if (type == QXL_RELEASE_SURFACE_CMD)
		cur_idx = 1;
	else if (type == QXL_RELEASE_CURSOR_CMD)
		cur_idx = 2;
	else {
		DRM_ERROR("got illegal type: %d\n", type);
		return -EINVAL;
	}

	idr_ret = qxl_release_alloc(qdev, type, release);
	if (idr_ret < 0) {
		if (rbo)
			*rbo = NULL;
		return idr_ret;
	}

	mutex_lock(&qdev->release_mutex);
	if (qdev->current_release_bo_offset[cur_idx] + 1 >= releases_per_bo[cur_idx]) {
		qxl_bo_unref(&qdev->current_release_bo[cur_idx]);
		qdev->current_release_bo_offset[cur_idx] = 0;
		qdev->current_release_bo[cur_idx] = NULL;
	}
	if (!qdev->current_release_bo[cur_idx]) {
		ret = qxl_release_bo_alloc(qdev, &qdev->current_release_bo[cur_idx]);
		if (ret) {
			mutex_unlock(&qdev->release_mutex);
			return ret;
		}
	}

	bo = qxl_bo_ref(qdev->current_release_bo[cur_idx]);

	(*release)->release_offset = qdev->current_release_bo_offset[cur_idx] * release_size_per_bo[cur_idx];
	qdev->current_release_bo_offset[cur_idx]++;

	if (rbo)
		*rbo = bo;

	mutex_unlock(&qdev->release_mutex);

	qxl_release_list_add(*release, bo);

	info = qxl_release_map(qdev, *release);
	info->id = idr_ret;
	qxl_release_unmap(qdev, *release, info);

	qxl_bo_unref(&bo);
	return ret;
}

struct qxl_release *qxl_release_from_id_locked(struct qxl_device *qdev,
						   uint64_t id)
{
	struct qxl_release *release;

	spin_lock(&qdev->release_idr_lock);
	release = idr_find(&qdev->release_idr, id);
	spin_unlock(&qdev->release_idr_lock);
	if (!release) {
		DRM_ERROR("failed to find id in release_idr\n");
		return NULL;
	}

	return release;
}

union qxl_release_info *qxl_release_map(struct qxl_device *qdev,
					struct qxl_release *release)
{
	void *ptr;
	union qxl_release_info *info;
	struct qxl_bo_list *entry = list_first_entry(&release->bos, struct qxl_bo_list, tv.head);
	struct qxl_bo *bo = to_qxl_bo(entry->tv.bo);

	ptr = qxl_bo_kmap_atomic_page(qdev, bo, release->release_offset & PAGE_SIZE);
	if (!ptr)
		return NULL;
	info = ptr + (release->release_offset & ~PAGE_SIZE);
	return info;
}

void qxl_release_unmap(struct qxl_device *qdev,
		       struct qxl_release *release,
		       union qxl_release_info *info)
{
	struct qxl_bo_list *entry = list_first_entry(&release->bos, struct qxl_bo_list, tv.head);
	struct qxl_bo *bo = to_qxl_bo(entry->tv.bo);
	void *ptr;

	ptr = ((void *)info) - (release->release_offset & ~PAGE_SIZE);
	qxl_bo_kunmap_atomic_page(qdev, bo, ptr);
}

void qxl_release_fence_buffer_objects(struct qxl_release *release)
{
	struct ttm_buffer_object *bo;
	struct ttm_bo_global *glob;
	struct ttm_bo_device *bdev;
	struct ttm_bo_driver *driver;
	struct qxl_bo *qbo;
	struct ttm_validate_buffer *entry;
	struct qxl_device *qdev;

	/* if only one object on the release its the release itself
	   since these objects are pinned no need to reserve */
	if (list_is_singular(&release->bos) || list_empty(&release->bos))
		return;

	bo = list_first_entry(&release->bos, struct ttm_validate_buffer, head)->bo;
	bdev = bo->bdev;
	qdev = container_of(bdev, struct qxl_device, mman.bdev);

	/*
	 * Since we never really allocated a context and we don't want to conflict,
	 * set the highest bits. This will break if we really allow exporting of dma-bufs.
	 */
	fence_init(&release->base, &qxl_fence_ops, &qdev->release_lock,
		   release->id | 0xf0000000, release->base.seqno);
	trace_fence_emit(&release->base);

	driver = bdev->driver;
	glob = bo->glob;

	spin_lock(&glob->lru_lock);

	list_for_each_entry(entry, &release->bos, head) {
		bo = entry->bo;
		qbo = to_qxl_bo(bo);

		reservation_object_add_shared_fence(bo->resv, &release->base);
		ttm_bo_add_to_lru(bo);
		__ttm_bo_unreserve(bo);
	}
	spin_unlock(&glob->lru_lock);
	ww_acquire_fini(&release->ticket);
}
Commit	Line	Data
f64122c1 DA	1	/*
	2	* Copyright 2011 Red Hat, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* on the rights to use, copy, modify, merge, publish, distribute, sub
	8	* license, and/or sell copies of the Software, and to permit persons to whom
	9	* the Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice (including the next
	12	* paragraph) shall be included in all copies or substantial portions of the
	13	* Software.
	14	*
	15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	17	* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
	18	* THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
	19	* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	20	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
	21	*/
	22	#include "qxl_drv.h"
	23	#include "qxl_object.h"
2f453ed4	24	#include <trace/events/fence.h>
f64122c1 DA	25
	26	/*
	27	* drawable cmd cache - allocate a bunch of VRAM pages, suballocate
	28	* into 256 byte chunks for now - gives 16 cmds per page.
	29	*
	30	* use an ida to index into the chunks?
	31	*/
	32	/* manage releaseables */
	33	/* stack them 16 high for now -drawable object is 191 */
	34	#define RELEASE_SIZE 256
	35	#define RELEASES_PER_BO (4096 / RELEASE_SIZE)
	36	/* put an alloc/dealloc surface cmd into one bo and round up to 128 */
	37	#define SURFACE_RELEASE_SIZE 128
	38	#define SURFACE_RELEASES_PER_BO (4096 / SURFACE_RELEASE_SIZE)
	39
	40	static const int release_size_per_bo[] = { RELEASE_SIZE, SURFACE_RELEASE_SIZE, RELEASE_SIZE };
	41	static const int releases_per_bo[] = { RELEASES_PER_BO, SURFACE_RELEASES_PER_BO, RELEASES_PER_BO };
8002db63	42
2f453ed4 ML	43	static const char qxl_get_driver_name(struct fence fence)
	44	{
	45	return "qxl";
	46	}
	47
	48	static const char qxl_get_timeline_name(struct fence fence)
	49	{
	50	return "release";
	51	}
	52
	53	static bool qxl_nop_signaling(struct fence *fence)
	54	{
	55	/* fences are always automatically signaled, so just pretend we did this.. */
	56	return true;
	57	}
	58
	59	static long qxl_fence_wait(struct fence *fence, bool intr, signed long timeout)
	60	{
	61	struct qxl_device *qdev;
	62	struct qxl_release *release;
	63	int count = 0, sc = 0;
	64	bool have_drawable_releases;
	65	unsigned long cur, end = jiffies + timeout;
	66
	67	qdev = container_of(fence->lock, struct qxl_device, release_lock);
	68	release = container_of(fence, struct qxl_release, base);
	69	have_drawable_releases = release->type == QXL_RELEASE_DRAWABLE;
	70
	71	retry:
	72	sc++;
	73
d7e4d671	74	if (fence_is_signaled(fence))
2f453ed4 ML	75	goto signaled;
	76
	77	qxl_io_notify_oom(qdev);
	78
	79	for (count = 0; count < 11; count++) {
	80	if (!qxl_queue_garbage_collect(qdev, true))
	81	break;
	82
d7e4d671	83	if (fence_is_signaled(fence))
2f453ed4 ML	84	goto signaled;
	85	}
	86
d7e4d671	87	if (fence_is_signaled(fence))
2f453ed4 ML	88	goto signaled;
	89
	90	if (have_drawable_releases \|\| sc < 4) {
	91	if (sc > 2)
	92	/* back off */
	93	usleep_range(500, 1000);
	94
	95	if (time_after(jiffies, end))
	96	return 0;
	97
	98	if (have_drawable_releases && sc > 300) {
	99	FENCE_WARN(fence, "failed to wait on release %d "
	100	"after spincount %d\n",
	101	fence->context & ~0xf0000000, sc);
	102	goto signaled;
	103	}
	104	goto retry;
	105	}
	106	/*
	107	* yeah, original sync_obj_wait gave up after 3 spins when
	108	* have_drawable_releases is not set.
	109	*/
	110
	111	signaled:
	112	cur = jiffies;
	113	if (time_after(cur, end))
	114	return 0;
	115	return end - cur;
	116	}
	117
	118	static const struct fence_ops qxl_fence_ops = {
	119	.get_driver_name = qxl_get_driver_name,
	120	.get_timeline_name = qxl_get_timeline_name,
	121	.enable_signaling = qxl_nop_signaling,
	122	.wait = qxl_fence_wait,
	123	};
	124
8002db63	125	static uint64_t
f64122c1 DA	126	qxl_release_alloc(struct qxl_device *qdev, int type,
	127	struct qxl_release **ret)
	128	{
	129	struct qxl_release *release;
307b9c02	130	int handle;
f64122c1	131	size_t size = sizeof(*release);
f64122c1 DA	132
	133	release = kmalloc(size, GFP_KERNEL);
	134	if (!release) {
	135	DRM_ERROR("Out of memory\n");
	136	return 0;
	137	}
2f453ed4	138	release->base.ops = NULL;
f64122c1	139	release->type = type;
f64122c1 DA	140	release->release_offset = 0;
f64122c1 DA	141	release->surface_release_id = 0;
8002db63	142	INIT_LIST_HEAD(&release->bos);
307b9c02 DA	143
307b9c02 DA	144	idr_preload(GFP_KERNEL);
f64122c1	145	spin_lock(&qdev->release_idr_lock);
2f453ed4 ML	146	handle = idr_alloc(&qdev->release_idr, release, 1, 0, GFP_NOWAIT);
2f453ed4 ML	147	release->base.seqno = ++qdev->release_seqno;
f64122c1	148	spin_unlock(&qdev->release_idr_lock);
307b9c02	149	idr_preload_end();
2f453ed4 ML	150	if (handle < 0) {
	151	kfree(release);
	152	*ret = NULL;
	153	return handle;
	154	}
307b9c02	155	*ret = release;
f64122c1 DA	156	QXL_INFO(qdev, "allocated release %lld\n", handle);
f64122c1 DA	157	release->id = handle;
f64122c1 DA	158	return handle;
	159	}
	160
2f453ed4 ML	161	static void
	162	qxl_release_free_list(struct qxl_release *release)
	163	{
	164	while (!list_empty(&release->bos)) {
b75402c9 ML	165	struct qxl_bo_list *entry;
b75402c9 ML	166	struct qxl_bo *bo;
2f453ed4 ML	167
2f453ed4 ML	168	entry = container_of(release->bos.next,
b75402c9 ML	169	struct qxl_bo_list, tv.head);
	170	bo = to_qxl_bo(entry->tv.bo);
	171	qxl_bo_unref(&bo);
	172	list_del(&entry->tv.head);
2f453ed4 ML	173	kfree(entry);
	174	}
	175	}
	176
f64122c1 DA	177	void
	178	qxl_release_free(struct qxl_device *qdev,
	179	struct qxl_release *release)
	180	{
8002db63 DA	181	QXL_INFO(qdev, "release %d, type %d\n", release->id,
8002db63 DA	182	release->type);
f64122c1 DA	183
	184	if (release->surface_release_id)
	185	qxl_surface_id_dealloc(qdev, release->surface_release_id);
	186
f64122c1 DA	187	spin_lock(&qdev->release_idr_lock);
	188	idr_remove(&qdev->release_idr, release->id);
	189	spin_unlock(&qdev->release_idr_lock);
2f453ed4 ML	190
	191	if (release->base.ops) {
	192	WARN_ON(list_empty(&release->bos));
	193	qxl_release_free_list(release);
	194
	195	fence_signal(&release->base);
	196	fence_put(&release->base);
	197	} else {
	198	qxl_release_free_list(release);
	199	kfree(release);
	200	}
f64122c1 DA	201	}
f64122c1 DA	202
6d01f1f5 DA	203	static int qxl_release_bo_alloc(struct qxl_device *qdev,
6d01f1f5 DA	204	struct qxl_bo **bo)
f64122c1 DA	205	{
f64122c1 DA	206	int ret;
4f49ec92 DA	207	/* pin releases bo's they are too messy to evict */
	208	ret = qxl_bo_create(qdev, PAGE_SIZE, false, true,
	209	QXL_GEM_DOMAIN_VRAM, NULL,
f64122c1 DA	210	bo);
	211	return ret;
	212	}
	213
8002db63 DA	214	int qxl_release_list_add(struct qxl_release release, struct qxl_bo bo)
	215	{
	216	struct qxl_bo_list *entry;
	217
	218	list_for_each_entry(entry, &release->bos, tv.head) {
	219	if (entry->tv.bo == &bo->tbo)
	220	return 0;
	221	}
	222
	223	entry = kmalloc(sizeof(struct qxl_bo_list), GFP_KERNEL);
	224	if (!entry)
	225	return -ENOMEM;
	226
	227	qxl_bo_ref(bo);
	228	entry->tv.bo = &bo->tbo;
ae9c0af2	229	entry->tv.shared = false;
8002db63 DA	230	list_add_tail(&entry->tv.head, &release->bos);
	231	return 0;
	232	}
	233
	234	static int qxl_release_validate_bo(struct qxl_bo *bo)
f64122c1 DA	235	{
f64122c1 DA	236	int ret;
8002db63 DA	237
	238	if (!bo->pin_count) {
	239	qxl_ttm_placement_from_domain(bo, bo->type, false);
	240	ret = ttm_bo_validate(&bo->tbo, &bo->placement,
	241	true, false);
f64122c1 DA	242	if (ret)
	243	return ret;
	244	}
8002db63	245
2f453ed4 ML	246	ret = reservation_object_reserve_shared(bo->tbo.resv);
	247	if (ret)
	248	return ret;
	249
8002db63 DA	250	/* allocate a surface for reserved + validated buffers */
	251	ret = qxl_bo_check_id(bo->gem_base.dev->dev_private, bo);
	252	if (ret)
	253	return ret;
f64122c1 DA	254	return 0;
	255	}
	256
8002db63	257	int qxl_release_reserve_list(struct qxl_release *release, bool no_intr)
f64122c1	258	{
8002db63 DA	259	int ret;
	260	struct qxl_bo_list *entry;
	261
	262	/* if only one object on the release its the release itself
	263	since these objects are pinned no need to reserve */
	264	if (list_is_singular(&release->bos))
	265	return 0;
	266
58b4d720	267	ret = ttm_eu_reserve_buffers(&release->ticket, &release->bos, !no_intr);
8002db63 DA	268	if (ret)
	269	return ret;
	270
	271	list_for_each_entry(entry, &release->bos, tv.head) {
	272	struct qxl_bo *bo = to_qxl_bo(entry->tv.bo);
	273
	274	ret = qxl_release_validate_bo(bo);
	275	if (ret) {
	276	ttm_eu_backoff_reservation(&release->ticket, &release->bos);
	277	return ret;
	278	}
	279	}
f64122c1 DA	280	return 0;
	281	}
	282
8002db63	283	void qxl_release_backoff_reserve_list(struct qxl_release *release)
f64122c1	284	{
8002db63 DA	285	/* if only one object on the release its the release itself
	286	since these objects are pinned no need to reserve */
	287	if (list_is_singular(&release->bos))
	288	return;
	289
	290	ttm_eu_backoff_reservation(&release->ticket, &release->bos);
f64122c1 DA	291	}
f64122c1 DA	292
8002db63	293
f64122c1 DA	294	int qxl_alloc_surface_release_reserved(struct qxl_device *qdev,
	295	enum qxl_surface_cmd_type surface_cmd_type,
	296	struct qxl_release *create_rel,
	297	struct qxl_release **release)
	298	{
f64122c1 DA	299	if (surface_cmd_type == QXL_SURFACE_CMD_DESTROY && create_rel) {
f64122c1 DA	300	int idr_ret;
8002db63	301	struct qxl_bo_list *entry = list_first_entry(&create_rel->bos, struct qxl_bo_list, tv.head);
f64122c1 DA	302	struct qxl_bo *bo;
	303	union qxl_release_info *info;
	304
	305	/* stash the release after the create command */
	306	idr_ret = qxl_release_alloc(qdev, QXL_RELEASE_SURFACE_CMD, release);
2f453ed4 ML	307	if (idr_ret < 0)
2f453ed4 ML	308	return idr_ret;
8002db63	309	bo = qxl_bo_ref(to_qxl_bo(entry->tv.bo));
f64122c1 DA	310
	311	(*release)->release_offset = create_rel->release_offset + 64;
	312
8002db63	313	qxl_release_list_add(*release, bo);
f64122c1	314
f64122c1 DA	315	info = qxl_release_map(qdev, *release);
	316	info->id = idr_ret;
	317	qxl_release_unmap(qdev, *release, info);
	318
f64122c1	319	qxl_bo_unref(&bo);
8002db63	320	return 0;
f64122c1 DA	321	}
	322
	323	return qxl_alloc_release_reserved(qdev, sizeof(struct qxl_surface_cmd),
	324	QXL_RELEASE_SURFACE_CMD, release, NULL);
	325	}
	326
	327	int qxl_alloc_release_reserved(struct qxl_device *qdev, unsigned long size,
	328	int type, struct qxl_release **release,
	329	struct qxl_bo **rbo)
	330	{
	331	struct qxl_bo *bo;
	332	int idr_ret;
8002db63	333	int ret = 0;
f64122c1 DA	334	union qxl_release_info *info;
	335	int cur_idx;
	336
	337	if (type == QXL_RELEASE_DRAWABLE)
	338	cur_idx = 0;
	339	else if (type == QXL_RELEASE_SURFACE_CMD)
	340	cur_idx = 1;
	341	else if (type == QXL_RELEASE_CURSOR_CMD)
	342	cur_idx = 2;
	343	else {
	344	DRM_ERROR("got illegal type: %d\n", type);
	345	return -EINVAL;
	346	}
	347
	348	idr_ret = qxl_release_alloc(qdev, type, release);
2f453ed4 ML	349	if (idr_ret < 0) {
	350	if (rbo)
	351	*rbo = NULL;
	352	return idr_ret;
	353	}
f64122c1 DA	354
	355	mutex_lock(&qdev->release_mutex);
	356	if (qdev->current_release_bo_offset[cur_idx] + 1 >= releases_per_bo[cur_idx]) {
	357	qxl_bo_unref(&qdev->current_release_bo[cur_idx]);
	358	qdev->current_release_bo_offset[cur_idx] = 0;
	359	qdev->current_release_bo[cur_idx] = NULL;
	360	}
	361	if (!qdev->current_release_bo[cur_idx]) {
	362	ret = qxl_release_bo_alloc(qdev, &qdev->current_release_bo[cur_idx]);
	363	if (ret) {
	364	mutex_unlock(&qdev->release_mutex);
	365	return ret;
	366	}
f64122c1 DA	367	}
	368
	369	bo = qxl_bo_ref(qdev->current_release_bo[cur_idx]);
	370
	371	(release)->release_offset = qdev->current_release_bo_offset[cur_idx] release_size_per_bo[cur_idx];
	372	qdev->current_release_bo_offset[cur_idx]++;
	373
	374	if (rbo)
	375	*rbo = bo;
	376
f64122c1	377	mutex_unlock(&qdev->release_mutex);
8002db63 DA	378
8002db63 DA	379	qxl_release_list_add(*release, bo);
f64122c1 DA	380
	381	info = qxl_release_map(qdev, *release);
	382	info->id = idr_ret;
	383	qxl_release_unmap(qdev, *release, info);
	384
f64122c1 DA	385	qxl_bo_unref(&bo);
	386	return ret;
	387	}
	388
f64122c1 DA	389	struct qxl_release qxl_release_from_id_locked(struct qxl_device qdev,
	390	uint64_t id)
	391	{
	392	struct qxl_release *release;
	393
	394	spin_lock(&qdev->release_idr_lock);
	395	release = idr_find(&qdev->release_idr, id);
	396	spin_unlock(&qdev->release_idr_lock);
	397	if (!release) {
	398	DRM_ERROR("failed to find id in release_idr\n");
	399	return NULL;
	400	}
8002db63	401
f64122c1 DA	402	return release;
	403	}
	404
	405	union qxl_release_info qxl_release_map(struct qxl_device qdev,
	406	struct qxl_release *release)
	407	{
	408	void *ptr;
	409	union qxl_release_info *info;
8002db63 DA	410	struct qxl_bo_list *entry = list_first_entry(&release->bos, struct qxl_bo_list, tv.head);
8002db63 DA	411	struct qxl_bo *bo = to_qxl_bo(entry->tv.bo);
f64122c1 DA	412
f64122c1 DA	413	ptr = qxl_bo_kmap_atomic_page(qdev, bo, release->release_offset & PAGE_SIZE);
8002db63 DA	414	if (!ptr)
8002db63 DA	415	return NULL;
f64122c1 DA	416	info = ptr + (release->release_offset & ~PAGE_SIZE);
	417	return info;
	418	}
	419
	420	void qxl_release_unmap(struct qxl_device *qdev,
	421	struct qxl_release *release,
	422	union qxl_release_info *info)
	423	{
8002db63 DA	424	struct qxl_bo_list *entry = list_first_entry(&release->bos, struct qxl_bo_list, tv.head);
8002db63 DA	425	struct qxl_bo *bo = to_qxl_bo(entry->tv.bo);
f64122c1 DA	426	void *ptr;
	427
	428	ptr = ((void *)info) - (release->release_offset & ~PAGE_SIZE);
	429	qxl_bo_kunmap_atomic_page(qdev, bo, ptr);
	430	}
8002db63 DA	431
	432	void qxl_release_fence_buffer_objects(struct qxl_release *release)
	433	{
8002db63 DA	434	struct ttm_buffer_object *bo;
	435	struct ttm_bo_global *glob;
	436	struct ttm_bo_device *bdev;
	437	struct ttm_bo_driver *driver;
	438	struct qxl_bo *qbo;
2f453ed4 ML	439	struct ttm_validate_buffer *entry;
2f453ed4 ML	440	struct qxl_device *qdev;
8002db63 DA	441
	442	/* if only one object on the release its the release itself
	443	since these objects are pinned no need to reserve */
58b21c22	444	if (list_is_singular(&release->bos) \|\| list_empty(&release->bos))
8002db63 DA	445	return;
	446
	447	bo = list_first_entry(&release->bos, struct ttm_validate_buffer, head)->bo;
	448	bdev = bo->bdev;
2f453ed4 ML	449	qdev = container_of(bdev, struct qxl_device, mman.bdev);
	450
	451	/*
	452	* Since we never really allocated a context and we don't want to conflict,
	453	* set the highest bits. This will break if we really allow exporting of dma-bufs.
	454	*/
	455	fence_init(&release->base, &qxl_fence_ops, &qdev->release_lock,
	456	release->id \| 0xf0000000, release->base.seqno);
	457	trace_fence_emit(&release->base);
	458
8002db63 DA	459	driver = bdev->driver;
	460	glob = bo->glob;
	461
	462	spin_lock(&glob->lru_lock);
8002db63 DA	463
	464	list_for_each_entry(entry, &release->bos, head) {
	465	bo = entry->bo;
	466	qbo = to_qxl_bo(bo);
	467
2f453ed4	468	reservation_object_add_shared_fence(bo->resv, &release->base);
8002db63	469	ttm_bo_add_to_lru(bo);
c7523083	470	__ttm_bo_unreserve(bo);
8002db63	471	}
8002db63 DA	472	spin_unlock(&glob->lru_lock);
	473	ww_acquire_fini(&release->ticket);
	474	}
	475