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66229b20 AD |
1 | /* |
2 | * Copyright 2011 Advanced Micro Devices, Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | */ | |
23 | #ifndef PP_SMC_H | |
24 | #define PP_SMC_H | |
25 | ||
26 | #pragma pack(push, 1) | |
27 | ||
28 | #define PPSMC_SWSTATE_FLAG_DC 0x01 | |
29 | ||
30 | #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00 | |
31 | #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01 | |
32 | #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff | |
33 | ||
34 | #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01 | |
35 | #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02 | |
36 | #define PPSMC_SYSTEMFLAG_GDDR5 0x04 | |
37 | #define PPSMC_SYSTEMFLAG_DISABLE_BABYSTEP 0x08 | |
38 | #define PPSMC_SYSTEMFLAG_REGULATOR_HOT 0x10 | |
39 | ||
40 | #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_MASK 0x07 | |
41 | #define PPSMC_EXTRAFLAGS_AC2DC_DONT_WAIT_FOR_VBLANK 0x08 | |
42 | #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTODPMLOWSTATE 0x00 | |
43 | #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTOINITIALSTATE 0x01 | |
44 | ||
45 | #define PPSMC_DISPLAY_WATERMARK_LOW 0 | |
46 | #define PPSMC_DISPLAY_WATERMARK_HIGH 1 | |
47 | ||
48 | #define PPSMC_STATEFLAG_AUTO_PULSE_SKIP 0x01 | |
49 | ||
50 | #define PPSMC_Result_OK ((uint8_t)0x01) | |
51 | #define PPSMC_Result_Failed ((uint8_t)0xFF) | |
52 | ||
53 | typedef uint8_t PPSMC_Result; | |
54 | ||
55 | #define PPSMC_MSG_Halt ((uint8_t)0x10) | |
56 | #define PPSMC_MSG_Resume ((uint8_t)0x11) | |
57 | #define PPSMC_MSG_ZeroLevelsDisabled ((uint8_t)0x13) | |
58 | #define PPSMC_MSG_OneLevelsDisabled ((uint8_t)0x14) | |
59 | #define PPSMC_MSG_TwoLevelsDisabled ((uint8_t)0x15) | |
60 | #define PPSMC_MSG_EnableThermalInterrupt ((uint8_t)0x16) | |
61 | #define PPSMC_MSG_SwitchToSwState ((uint8_t)0x20) | |
62 | #define PPSMC_MSG_SwitchToInitialState ((uint8_t)0x40) | |
63 | #define PPSMC_MSG_NoForcedLevel ((uint8_t)0x41) | |
64 | #define PPSMC_MSG_SwitchToMinimumPower ((uint8_t)0x51) | |
65 | #define PPSMC_MSG_ResumeFromMinimumPower ((uint8_t)0x52) | |
66 | #define PPSMC_MSG_NoDisplay ((uint8_t)0x5D) | |
67 | #define PPSMC_MSG_HasDisplay ((uint8_t)0x5E) | |
68 | #define PPSMC_MSG_EnableULV ((uint8_t)0x62) | |
69 | #define PPSMC_MSG_DisableULV ((uint8_t)0x63) | |
70 | #define PPSMC_MSG_EnterULV ((uint8_t)0x64) | |
71 | #define PPSMC_MSG_ExitULV ((uint8_t)0x65) | |
72 | #define PPSMC_MSG_ResetToDefaults ((uint8_t)0x84) | |
73 | ||
d70229f7 AD |
74 | /* TN */ |
75 | #define PPSMC_MSG_DPM_Config ((uint32_t) 0x102) | |
76 | #define PPSMC_MSG_DPM_ForceState ((uint32_t) 0x104) | |
77 | #define PPSMC_MSG_PG_SIMD_Config ((uint32_t) 0x108) | |
78 | #define PPSMC_MSG_DCE_RemoveVoltageAdjustment ((uint32_t) 0x11d) | |
79 | #define PPSMC_MSG_DCE_AllowVoltageAdjustment ((uint32_t) 0x11e) | |
0c4aaeae | 80 | #define PPSMC_MSG_UVD_DPM_Config ((uint32_t) 0x124) |
d70229f7 AD |
81 | |
82 | ||
83 | typedef uint16_t PPSMC_Msg; | |
66229b20 AD |
84 | |
85 | #pragma pack(pop) | |
86 | ||
87 | #endif |