[deliverable/linux.git] / drivers / gpu / drm / radeon / r600_audio.c

/*
 * Copyright 2008 Advanced Micro Devices, Inc.
 * Copyright 2008 Red Hat Inc.
 * Copyright 2009 Christian König.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Christian König
 */
#include "drmP.h"
#include "radeon.h"
#include "radeon_reg.h"
#include "atom.h"

#define AUDIO_TIMER_INTERVALL 100 /* 1/10 sekund should be enough */

/*
 * check if the chipset is supported
 */
static int r600_audio_chipset_supported(struct radeon_device *rdev)
{
	return (rdev->family >= CHIP_R600 && rdev->family < CHIP_CEDAR)
		|| rdev->family == CHIP_RS600
		|| rdev->family == CHIP_RS690
		|| rdev->family == CHIP_RS740;
}

/*
 * current number of channels
 */
int r600_audio_channels(struct radeon_device *rdev)
{
	return (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0x7) + 1;
}

/*
 * current bits per sample
 */
int r600_audio_bits_per_sample(struct radeon_device *rdev)
{
	uint32_t value = (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0xF0) >> 4;
	switch (value) {
	case 0x0: return  8;
	case 0x1: return 16;
	case 0x2: return 20;
	case 0x3: return 24;
	case 0x4: return 32;
	}

	dev_err(rdev->dev, "Unknown bits per sample 0x%x using 16 instead\n",
		(int)value);

	return 16;
}

/*
 * current sampling rate in HZ
 */
int r600_audio_rate(struct radeon_device *rdev)
{
	uint32_t value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL);
	uint32_t result;

	if (value & 0x4000)
		result = 44100;
	else
		result = 48000;

	result *= ((value >> 11) & 0x7) + 1;
	result /= ((value >> 8) & 0x7) + 1;

	return result;
}

/*
 * iec 60958 status bits
 */
uint8_t r600_audio_status_bits(struct radeon_device *rdev)
{
	return RREG32(R600_AUDIO_STATUS_BITS) & 0xff;
}

/*
 * iec 60958 category code
 */
uint8_t r600_audio_category_code(struct radeon_device *rdev)
{
	return (RREG32(R600_AUDIO_STATUS_BITS) >> 8) & 0xff;
}

/*
 * schedule next audio update event
 */
void r600_audio_schedule_polling(struct radeon_device *rdev)
{
	mod_timer(&rdev->audio_timer,
		jiffies + msecs_to_jiffies(AUDIO_TIMER_INTERVALL));
}

/*
 * update all hdmi interfaces with current audio parameters
 */
static void r600_audio_update_hdmi(unsigned long param)
{
	struct radeon_device *rdev = (struct radeon_device *)param;
	struct drm_device *dev = rdev->ddev;

	int channels = r600_audio_channels(rdev);
	int rate = r600_audio_rate(rdev);
	int bps = r600_audio_bits_per_sample(rdev);
	uint8_t status_bits = r600_audio_status_bits(rdev);
	uint8_t category_code = r600_audio_category_code(rdev);

	struct drm_encoder *encoder;
	int changes = 0, still_going = 0;

	changes |= channels != rdev->audio_channels;
	changes |= rate != rdev->audio_rate;
	changes |= bps != rdev->audio_bits_per_sample;
	changes |= status_bits != rdev->audio_status_bits;
	changes |= category_code != rdev->audio_category_code;

	if (changes) {
		rdev->audio_channels = channels;
		rdev->audio_rate = rate;
		rdev->audio_bits_per_sample = bps;
		rdev->audio_status_bits = status_bits;
		rdev->audio_category_code = category_code;
	}

	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
		struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
		still_going |= radeon_encoder->audio_polling_active;
		if (changes || r600_hdmi_buffer_status_changed(encoder))
			r600_hdmi_update_audio_settings(encoder);
	}

	if (still_going)
		r600_audio_schedule_polling(rdev);
}

/*
 * turn on/off audio engine
 */
static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable)
{
	DRM_INFO("%s audio support\n", enable ? "Enabling" : "Disabling");
	WREG32_P(R600_AUDIO_ENABLE, enable ? 0x81000000 : 0x0, ~0x81000000);
	rdev->audio_enabled = enable;
}

/*
 * initialize the audio vars and register the update timer
 */
int r600_audio_init(struct radeon_device *rdev)
{
	if (!radeon_audio || !r600_audio_chipset_supported(rdev))
		return 0;

	r600_audio_engine_enable(rdev, true);

	rdev->audio_channels = -1;
	rdev->audio_rate = -1;
	rdev->audio_bits_per_sample = -1;
	rdev->audio_status_bits = 0;
	rdev->audio_category_code = 0;

	setup_timer(
		&rdev->audio_timer,
		r600_audio_update_hdmi,
		(unsigned long)rdev);

	return 0;
}

/*
 * enable the polling timer, to check for status changes
 */
void r600_audio_enable_polling(struct drm_encoder *encoder)
{
	struct drm_device *dev = encoder->dev;
	struct radeon_device *rdev = dev->dev_private;
	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);

	DRM_DEBUG("r600_audio_enable_polling: %d\n",
		radeon_encoder->audio_polling_active);
	if (radeon_encoder->audio_polling_active)
		return;

	radeon_encoder->audio_polling_active = 1;
	if (rdev->audio_enabled)
		mod_timer(&rdev->audio_timer, jiffies + 1);
}

/*
 * disable the polling timer, so we get no more status updates
 */
void r600_audio_disable_polling(struct drm_encoder *encoder)
{
	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	DRM_DEBUG("r600_audio_disable_polling: %d\n",
		radeon_encoder->audio_polling_active);
	radeon_encoder->audio_polling_active = 0;
}

/*
 * atach the audio codec to the clock source of the encoder
 */
void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
{
	struct drm_device *dev = encoder->dev;
	struct radeon_device *rdev = dev->dev_private;
	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
	int base_rate = 48000;

	switch (radeon_encoder->encoder_id) {
	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
		WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
		break;
	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
		WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
		break;
	default:
		dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
			  radeon_encoder->encoder_id);
		return;
	}

	switch (dig->dig_encoder) {
	case 0:
		WREG32(R600_AUDIO_PLL1_MUL, base_rate * 50);
		WREG32(R600_AUDIO_PLL1_DIV, clock * 100);
		WREG32(R600_AUDIO_CLK_SRCSEL, 0);
		break;

	case 1:
		WREG32(R600_AUDIO_PLL2_MUL, base_rate * 50);
		WREG32(R600_AUDIO_PLL2_DIV, clock * 100);
		WREG32(R600_AUDIO_CLK_SRCSEL, 1);
		break;
	default:
		dev_err(rdev->dev, "Unsupported DIG on encoder 0x%02X\n",
			  radeon_encoder->encoder_id);
		return;
	}
}

/*
 * release the audio timer
 * TODO: How to do this correctly on SMP systems?
 */
void r600_audio_fini(struct radeon_device *rdev)
{
	if (!rdev->audio_enabled)
		return;

	del_timer(&rdev->audio_timer);

	r600_audio_engine_enable(rdev, false);
}
Commit	Line	Data
dafc3bd5 CK	1	/*
	2	* Copyright 2008 Advanced Micro Devices, Inc.
	3	* Copyright 2008 Red Hat Inc.
	4	* Copyright 2009 Christian König.
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a
	7	* copy of this software and associated documentation files (the "Software"),
	8	* to deal in the Software without restriction, including without limitation
	9	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	10	* and/or sell copies of the Software, and to permit persons to whom the
	11	* Software is furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	20	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	21	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	22	* OTHER DEALINGS IN THE SOFTWARE.
	23	*
	24	* Authors: Christian König
	25	*/
	26	#include "drmP.h"
	27	#include "radeon.h"
	28	#include "radeon_reg.h"
	29	#include "atom.h"
	30
	31	#define AUDIO_TIMER_INTERVALL 100 /* 1/10 sekund should be enough */
	32
	33	/*
	34	* check if the chipset is supported
	35	*/
	36	static int r600_audio_chipset_supported(struct radeon_device *rdev)
	37	{
16823d16	38	return (rdev->family >= CHIP_R600 && rdev->family < CHIP_CEDAR)
dafc3bd5 CK	39	\|\| rdev->family == CHIP_RS600
	40	\|\| rdev->family == CHIP_RS690
	41	\|\| rdev->family == CHIP_RS740;
	42	}
	43
	44	/*
	45	* current number of channels
	46	*/
58bd0863	47	int r600_audio_channels(struct radeon_device *rdev)
dafc3bd5 CK	48	{
	49	return (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0x7) + 1;
	50	}
	51
	52	/*
	53	* current bits per sample
	54	*/
58bd0863	55	int r600_audio_bits_per_sample(struct radeon_device *rdev)
dafc3bd5 CK	56	{
	57	uint32_t value = (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0xF0) >> 4;
	58	switch (value) {
	59	case 0x0: return 8;
	60	case 0x1: return 16;
	61	case 0x2: return 20;
	62	case 0x3: return 24;
	63	case 0x4: return 32;
	64	}
	65
219de62a RM	66	dev_err(rdev->dev, "Unknown bits per sample 0x%x using 16 instead\n",
219de62a RM	67	(int)value);
dafc3bd5 CK	68
	69	return 16;
	70	}
	71
	72	/*
	73	* current sampling rate in HZ
	74	*/
58bd0863	75	int r600_audio_rate(struct radeon_device *rdev)
dafc3bd5 CK	76	{
	77	uint32_t value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL);
	78	uint32_t result;
	79
	80	if (value & 0x4000)
	81	result = 44100;
	82	else
	83	result = 48000;
	84
	85	result *= ((value >> 11) & 0x7) + 1;
	86	result /= ((value >> 8) & 0x7) + 1;
	87
	88	return result;
	89	}
	90
	91	/*
	92	* iec 60958 status bits
	93	*/
58bd0863	94	uint8_t r600_audio_status_bits(struct radeon_device *rdev)
dafc3bd5 CK	95	{
	96	return RREG32(R600_AUDIO_STATUS_BITS) & 0xff;
	97	}
	98
	99	/*
	100	* iec 60958 category code
	101	*/
58bd0863	102	uint8_t r600_audio_category_code(struct radeon_device *rdev)
dafc3bd5 CK	103	{
	104	return (RREG32(R600_AUDIO_STATUS_BITS) >> 8) & 0xff;
	105	}
	106
f2594933 CK	107	/*
	108	* schedule next audio update event
	109	*/
	110	void r600_audio_schedule_polling(struct radeon_device *rdev)
	111	{
	112	mod_timer(&rdev->audio_timer,
	113	jiffies + msecs_to_jiffies(AUDIO_TIMER_INTERVALL));
	114	}
	115
dafc3bd5 CK	116	/*
	117	* update all hdmi interfaces with current audio parameters
	118	*/
	119	static void r600_audio_update_hdmi(unsigned long param)
	120	{
	121	struct radeon_device rdev = (struct radeon_device )param;
	122	struct drm_device *dev = rdev->ddev;
	123
	124	int channels = r600_audio_channels(rdev);
	125	int rate = r600_audio_rate(rdev);
	126	int bps = r600_audio_bits_per_sample(rdev);
	127	uint8_t status_bits = r600_audio_status_bits(rdev);
	128	uint8_t category_code = r600_audio_category_code(rdev);
	129
	130	struct drm_encoder *encoder;
58bd0863	131	int changes = 0, still_going = 0;
dafc3bd5 CK	132
	133	changes \|= channels != rdev->audio_channels;
	134	changes \|= rate != rdev->audio_rate;
	135	changes \|= bps != rdev->audio_bits_per_sample;
	136	changes \|= status_bits != rdev->audio_status_bits;
	137	changes \|= category_code != rdev->audio_category_code;
	138
	139	if (changes) {
	140	rdev->audio_channels = channels;
	141	rdev->audio_rate = rate;
	142	rdev->audio_bits_per_sample = bps;
	143	rdev->audio_status_bits = status_bits;
	144	rdev->audio_category_code = category_code;
	145	}
	146
	147	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
58bd0863	148	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
f2594933 CK	149	still_going \|= radeon_encoder->audio_polling_active;
	150	if (changes \|\| r600_hdmi_buffer_status_changed(encoder))
	151	r600_hdmi_update_audio_settings(encoder);
dafc3bd5 CK	152	}
dafc3bd5 CK	153
219de62a RM	154	if (still_going)
219de62a RM	155	r600_audio_schedule_polling(rdev);
dafc3bd5 CK	156	}
dafc3bd5 CK	157
5230aea6 RM	158	/*
	159	* turn on/off audio engine
	160	*/
	161	static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable)
	162	{
219de62a	163	DRM_INFO("%s audio support\n", enable ? "Enabling" : "Disabling");
5230aea6	164	WREG32_P(R600_AUDIO_ENABLE, enable ? 0x81000000 : 0x0, ~0x81000000);
7eea7e9e	165	rdev->audio_enabled = enable;
5230aea6 RM	166	}
5230aea6 RM	167
dafc3bd5 CK	168	/*
	169	* initialize the audio vars and register the update timer
	170	*/
	171	int r600_audio_init(struct radeon_device *rdev)
	172	{
c8792d5e	173	if (!radeon_audio \|\| !r600_audio_chipset_supported(rdev))
dafc3bd5 CK	174	return 0;
dafc3bd5 CK	175
c8792d5e	176	r600_audio_engine_enable(rdev, true);
dafc3bd5 CK	177
	178	rdev->audio_channels = -1;
	179	rdev->audio_rate = -1;
	180	rdev->audio_bits_per_sample = -1;
	181	rdev->audio_status_bits = 0;
	182	rdev->audio_category_code = 0;
	183
	184	setup_timer(
	185	&rdev->audio_timer,
	186	r600_audio_update_hdmi,
	187	(unsigned long)rdev);
	188
58bd0863 CK	189	return 0;
	190	}
	191
	192	/*
	193	* enable the polling timer, to check for status changes
	194	*/
	195	void r600_audio_enable_polling(struct drm_encoder *encoder)
	196	{
	197	struct drm_device *dev = encoder->dev;
	198	struct radeon_device *rdev = dev->dev_private;
	199	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	200
219de62a RM	201	DRM_DEBUG("r600_audio_enable_polling: %d\n",
219de62a RM	202	radeon_encoder->audio_polling_active);
58bd0863 CK	203	if (radeon_encoder->audio_polling_active)
	204	return;
	205
	206	radeon_encoder->audio_polling_active = 1;
7eea7e9e RM	207	if (rdev->audio_enabled)
7eea7e9e RM	208	mod_timer(&rdev->audio_timer, jiffies + 1);
58bd0863	209	}
dafc3bd5	210
58bd0863 CK	211	/*
	212	* disable the polling timer, so we get no more status updates
	213	*/
	214	void r600_audio_disable_polling(struct drm_encoder *encoder)
	215	{
	216	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
219de62a RM	217	DRM_DEBUG("r600_audio_disable_polling: %d\n",
219de62a RM	218	radeon_encoder->audio_polling_active);
58bd0863	219	radeon_encoder->audio_polling_active = 0;
dafc3bd5 CK	220	}
dafc3bd5 CK	221
dafc3bd5 CK	222	/*
	223	* atach the audio codec to the clock source of the encoder
	224	*/
	225	void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
	226	{
	227	struct drm_device *dev = encoder->dev;
	228	struct radeon_device *rdev = dev->dev_private;
	229	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
2cd6218c	230	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
dafc3bd5 CK	231	int base_rate = 48000;
	232
	233	switch (radeon_encoder->encoder_id) {
	234	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
	235	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
	236	WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
	237	break;
dafc3bd5 CK	238	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
	239	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
	240	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
	241	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
	242	WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
	243	break;
dafc3bd5	244	default:
219de62a	245	dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
dafc3bd5 CK	246	radeon_encoder->encoder_id);
	247	return;
	248	}
	249
2cd6218c	250	switch (dig->dig_encoder) {
dafc3bd5	251	case 0:
3fe373d9 RM	252	WREG32(R600_AUDIO_PLL1_MUL, base_rate * 50);
3fe373d9 RM	253	WREG32(R600_AUDIO_PLL1_DIV, clock * 100);
dafc3bd5 CK	254	WREG32(R600_AUDIO_CLK_SRCSEL, 0);
	255	break;
	256
	257	case 1:
3fe373d9 RM	258	WREG32(R600_AUDIO_PLL2_MUL, base_rate * 50);
3fe373d9 RM	259	WREG32(R600_AUDIO_PLL2_DIV, clock * 100);
dafc3bd5 CK	260	WREG32(R600_AUDIO_CLK_SRCSEL, 1);
dafc3bd5 CK	261	break;
2cd6218c RM	262	default:
	263	dev_err(rdev->dev, "Unsupported DIG on encoder 0x%02X\n",
	264	radeon_encoder->encoder_id);
	265	return;
dafc3bd5 CK	266	}
	267	}
	268
	269	/*
	270	* release the audio timer
	271	* TODO: How to do this correctly on SMP systems?
	272	*/
	273	void r600_audio_fini(struct radeon_device *rdev)
	274	{
7eea7e9e	275	if (!rdev->audio_enabled)
dafc3bd5 CK	276	return;
dafc3bd5 CK	277
dafc3bd5	278	del_timer(&rdev->audio_timer);
5230aea6 RM	279
5230aea6 RM	280	r600_audio_engine_enable(rdev, false);
dafc3bd5	281	}