[deliverable/linux.git] / drivers / gpu / drm / radeon / r600_audio.c

/*
 * Copyright 2008 Advanced Micro Devices, Inc.
 * Copyright 2008 Red Hat Inc.
 * Copyright 2009 Christian König.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Christian König
 */
#include "drmP.h"
#include "radeon.h"
#include "radeon_reg.h"
#include "atom.h"

#define AUDIO_TIMER_INTERVALL 100 /* 1/10 sekund should be enough */

/*
 * check if the chipset is supported
 */
static int r600_audio_chipset_supported(struct radeon_device *rdev)
{
	return (rdev->family >= CHIP_R600 && rdev->family < CHIP_RV710)
		|| rdev->family == CHIP_RS600
		|| rdev->family == CHIP_RS690
		|| rdev->family == CHIP_RS740;
}

/*
 * current number of channels
 */
static int r600_audio_channels(struct radeon_device *rdev)
{
	return (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0x7) + 1;
}

/*
 * current bits per sample
 */
static int r600_audio_bits_per_sample(struct radeon_device *rdev)
{
	uint32_t value = (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0xF0) >> 4;
	switch (value) {
	case 0x0: return  8;
	case 0x1: return 16;
	case 0x2: return 20;
	case 0x3: return 24;
	case 0x4: return 32;
	}

	DRM_ERROR("Unknown bits per sample 0x%x using 16 instead.\n", (int)value);

	return 16;
}

/*
 * current sampling rate in HZ
 */
static int r600_audio_rate(struct radeon_device *rdev)
{
	uint32_t value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL);
	uint32_t result;

	if (value & 0x4000)
		result = 44100;
	else
		result = 48000;

	result *= ((value >> 11) & 0x7) + 1;
	result /= ((value >> 8) & 0x7) + 1;

	return result;
}

/*
 * iec 60958 status bits
 */
static uint8_t r600_audio_status_bits(struct radeon_device *rdev)
{
	return RREG32(R600_AUDIO_STATUS_BITS) & 0xff;
}

/*
 * iec 60958 category code
 */
static uint8_t r600_audio_category_code(struct radeon_device *rdev)
{
	return (RREG32(R600_AUDIO_STATUS_BITS) >> 8) & 0xff;
}

/*
 * update all hdmi interfaces with current audio parameters
 */
static void r600_audio_update_hdmi(unsigned long param)
{
	struct radeon_device *rdev = (struct radeon_device *)param;
	struct drm_device *dev = rdev->ddev;

	int channels = r600_audio_channels(rdev);
	int rate = r600_audio_rate(rdev);
	int bps = r600_audio_bits_per_sample(rdev);
	uint8_t status_bits = r600_audio_status_bits(rdev);
	uint8_t category_code = r600_audio_category_code(rdev);

	struct drm_encoder *encoder;
	int changes = 0;

	changes |= channels != rdev->audio_channels;
	changes |= rate != rdev->audio_rate;
	changes |= bps != rdev->audio_bits_per_sample;
	changes |= status_bits != rdev->audio_status_bits;
	changes |= category_code != rdev->audio_category_code;

	if (changes) {
		rdev->audio_channels = channels;
		rdev->audio_rate = rate;
		rdev->audio_bits_per_sample = bps;
		rdev->audio_status_bits = status_bits;
		rdev->audio_category_code = category_code;
	}

	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
		if (changes || r600_hdmi_buffer_status_changed(encoder))
			r600_hdmi_update_audio_settings(
				encoder, channels,
				rate, bps, status_bits,
				category_code);
	}

	mod_timer(&rdev->audio_timer,
		jiffies + msecs_to_jiffies(AUDIO_TIMER_INTERVALL));
}

/*
 * turn on/off audio engine
 */
static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable)
{
	DRM_INFO("%s audio support", enable ? "Enabling" : "Disabling");
	WREG32_P(R600_AUDIO_ENABLE, enable ? 0x81000000 : 0x0, ~0x81000000);
}

/*
 * initialize the audio vars and register the update timer
 */
int r600_audio_init(struct radeon_device *rdev)
{
	if (!r600_audio_chipset_supported(rdev))
		return 0;

	r600_audio_engine_enable(rdev, radeon_audio);

	rdev->audio_channels = -1;
	rdev->audio_rate = -1;
	rdev->audio_bits_per_sample = -1;
	rdev->audio_status_bits = 0;
	rdev->audio_category_code = 0;

	setup_timer(
		&rdev->audio_timer,
		r600_audio_update_hdmi,
		(unsigned long)rdev);

	mod_timer(&rdev->audio_timer, jiffies + 1);

	return 0;
}

/*
 * determin how the encoders and audio interface is wired together
 */
int r600_audio_tmds_index(struct drm_encoder *encoder)
{
	struct drm_device *dev = encoder->dev;
	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	struct drm_encoder *other;

	switch (radeon_encoder->encoder_id) {
	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
		return 0;

	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
		/* special case check if an TMDS1 is present */
		list_for_each_entry(other, &dev->mode_config.encoder_list, head) {
			if (to_radeon_encoder(other)->encoder_id ==
				ENCODER_OBJECT_ID_INTERNAL_TMDS1)
				return 1;
		}
		return 0;

	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
		return 1;

	default:
		DRM_ERROR("Unsupported encoder type 0x%02X\n",
			  radeon_encoder->encoder_id);
		return -1;
	}
}

/*
 * atach the audio codec to the clock source of the encoder
 */
void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
{
	struct drm_device *dev = encoder->dev;
	struct radeon_device *rdev = dev->dev_private;
	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	int base_rate = 48000;

	switch (radeon_encoder->encoder_id) {
	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
		WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
		break;

	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
		WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
		break;

	default:
		DRM_ERROR("Unsupported encoder type 0x%02X\n",
			  radeon_encoder->encoder_id);
		return;
	}

	switch (r600_audio_tmds_index(encoder)) {
	case 0:
		WREG32(R600_AUDIO_PLL1_MUL, base_rate*50);
		WREG32(R600_AUDIO_PLL1_DIV, clock*100);
		WREG32(R600_AUDIO_CLK_SRCSEL, 0);
		break;

	case 1:
		WREG32(R600_AUDIO_PLL2_MUL, base_rate*50);
		WREG32(R600_AUDIO_PLL2_DIV, clock*100);
		WREG32(R600_AUDIO_CLK_SRCSEL, 1);
		break;
	}
}

/*
 * release the audio timer
 * TODO: How to do this correctly on SMP systems?
 */
void r600_audio_fini(struct radeon_device *rdev)
{
	if (!r600_audio_chipset_supported(rdev))
		return;

	del_timer(&rdev->audio_timer);
	WREG32_P(R600_AUDIO_ENABLE, 0x0, ~0x81000000);

	r600_audio_engine_enable(rdev, false);
}
Commit	Line	Data
dafc3bd5 CK	1	/*
	2	* Copyright 2008 Advanced Micro Devices, Inc.
	3	* Copyright 2008 Red Hat Inc.
	4	* Copyright 2009 Christian König.
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a
	7	* copy of this software and associated documentation files (the "Software"),
	8	* to deal in the Software without restriction, including without limitation
	9	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	10	* and/or sell copies of the Software, and to permit persons to whom the
	11	* Software is furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	20	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	21	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	22	* OTHER DEALINGS IN THE SOFTWARE.
	23	*
	24	* Authors: Christian König
	25	*/
	26	#include "drmP.h"
	27	#include "radeon.h"
	28	#include "radeon_reg.h"
	29	#include "atom.h"
	30
	31	#define AUDIO_TIMER_INTERVALL 100 /* 1/10 sekund should be enough */
	32
	33	/*
	34	* check if the chipset is supported
	35	*/
	36	static int r600_audio_chipset_supported(struct radeon_device *rdev)
	37	{
23fff28a	38	return (rdev->family >= CHIP_R600 && rdev->family < CHIP_RV710)
dafc3bd5 CK	39	\|\| rdev->family == CHIP_RS600
	40	\|\| rdev->family == CHIP_RS690
	41	\|\| rdev->family == CHIP_RS740;
	42	}
	43
	44	/*
	45	* current number of channels
	46	*/
	47	static int r600_audio_channels(struct radeon_device *rdev)
	48	{
	49	return (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0x7) + 1;
	50	}
	51
	52	/*
	53	* current bits per sample
	54	*/
	55	static int r600_audio_bits_per_sample(struct radeon_device *rdev)
	56	{
	57	uint32_t value = (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0xF0) >> 4;
	58	switch (value) {
	59	case 0x0: return 8;
	60	case 0x1: return 16;
	61	case 0x2: return 20;
	62	case 0x3: return 24;
	63	case 0x4: return 32;
	64	}
	65
	66	DRM_ERROR("Unknown bits per sample 0x%x using 16 instead.\n", (int)value);
	67
	68	return 16;
	69	}
	70
	71	/*
	72	* current sampling rate in HZ
	73	*/
	74	static int r600_audio_rate(struct radeon_device *rdev)
	75	{
	76	uint32_t value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL);
	77	uint32_t result;
	78
	79	if (value & 0x4000)
	80	result = 44100;
	81	else
	82	result = 48000;
	83
	84	result *= ((value >> 11) & 0x7) + 1;
	85	result /= ((value >> 8) & 0x7) + 1;
	86
	87	return result;
	88	}
	89
	90	/*
	91	* iec 60958 status bits
	92	*/
	93	static uint8_t r600_audio_status_bits(struct radeon_device *rdev)
	94	{
	95	return RREG32(R600_AUDIO_STATUS_BITS) & 0xff;
	96	}
	97
	98	/*
	99	* iec 60958 category code
	100	*/
	101	static uint8_t r600_audio_category_code(struct radeon_device *rdev)
	102	{
103	return (RREG32(R600_AUDIO_STATUS_BITS) >> 8) & 0xff;
104	}
105
106	/*
107	* update all hdmi interfaces with current audio parameters
108	*/
109	static void r600_audio_update_hdmi(unsigned long param)
110	{
111	struct radeon_device rdev = (struct radeon_device )param;
112	struct drm_device *dev = rdev->ddev;
113
114	int channels = r600_audio_channels(rdev);
115	int rate = r600_audio_rate(rdev);
116	int bps = r600_audio_bits_per_sample(rdev);
117	uint8_t status_bits = r600_audio_status_bits(rdev);
118	uint8_t category_code = r600_audio_category_code(rdev);
119
120	struct drm_encoder *encoder;
121	int changes = 0;
122
123	changes \|= channels != rdev->audio_channels;
124	changes \|= rate != rdev->audio_rate;
125	changes \|= bps != rdev->audio_bits_per_sample;
126	changes \|= status_bits != rdev->audio_status_bits;
127	changes \|= category_code != rdev->audio_category_code;
128
129	if (changes) {
130	rdev->audio_channels = channels;
131	rdev->audio_rate = rate;
132	rdev->audio_bits_per_sample = bps;
133	rdev->audio_status_bits = status_bits;
134	rdev->audio_category_code = category_code;
135	}
136
137	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
138	if (changes \|\| r600_hdmi_buffer_status_changed(encoder))
139	r600_hdmi_update_audio_settings(
140	encoder, channels,
141	rate, bps, status_bits,
142	category_code);
143	}
144
145	mod_timer(&rdev->audio_timer,
146	jiffies + msecs_to_jiffies(AUDIO_TIMER_INTERVALL));
147	}
148
5230aea6 RM	149	/*
	150	* turn on/off audio engine
	151	*/
	152	static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable)
	153	{
	154	DRM_INFO("%s audio support", enable ? "Enabling" : "Disabling");
	155	WREG32_P(R600_AUDIO_ENABLE, enable ? 0x81000000 : 0x0, ~0x81000000);
	156	}
	157
dafc3bd5 CK	158	/*
	159	* initialize the audio vars and register the update timer
	160	*/
	161	int r600_audio_init(struct radeon_device *rdev)
	162	{
	163	if (!r600_audio_chipset_supported(rdev))
	164	return 0;
	165
5230aea6	166	r600_audio_engine_enable(rdev, radeon_audio);
dafc3bd5 CK	167
	168	rdev->audio_channels = -1;
	169	rdev->audio_rate = -1;
	170	rdev->audio_bits_per_sample = -1;
	171	rdev->audio_status_bits = 0;
	172	rdev->audio_category_code = 0;
	173
	174	setup_timer(
	175	&rdev->audio_timer,
	176	r600_audio_update_hdmi,
	177	(unsigned long)rdev);
	178
	179	mod_timer(&rdev->audio_timer, jiffies + 1);
	180
	181	return 0;
	182	}
	183
	184	/*
	185	* determin how the encoders and audio interface is wired together
	186	*/
	187	int r600_audio_tmds_index(struct drm_encoder *encoder)
	188	{
	189	struct drm_device *dev = encoder->dev;
	190	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	191	struct drm_encoder *other;
	192
	193	switch (radeon_encoder->encoder_id) {
	194	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
	195	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
	196	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
	197	return 0;
	198
	199	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
	200	/* special case check if an TMDS1 is present */
	201	list_for_each_entry(other, &dev->mode_config.encoder_list, head) {
	202	if (to_radeon_encoder(other)->encoder_id ==
	203	ENCODER_OBJECT_ID_INTERNAL_TMDS1)
	204	return 1;
	205	}
	206	return 0;
	207
	208	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
	209	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
	210	return 1;
	211
	212	default:
	213	DRM_ERROR("Unsupported encoder type 0x%02X\n",
	214	radeon_encoder->encoder_id);
	215	return -1;
	216	}
	217	}
	218
	219	/*
	220	* atach the audio codec to the clock source of the encoder
	221	*/
	222	void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
	223	{
	224	struct drm_device *dev = encoder->dev;
	225	struct radeon_device *rdev = dev->dev_private;
	226	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	227	int base_rate = 48000;
	228
	229	switch (radeon_encoder->encoder_id) {
	230	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
231	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
232	WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
233	break;
234
235	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
236	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
237	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
238	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
239	WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
240	break;
241
242	default:
243	DRM_ERROR("Unsupported encoder type 0x%02X\n",
244	radeon_encoder->encoder_id);
245	return;
246	}
247
248	switch (r600_audio_tmds_index(encoder)) {
249	case 0:
250	WREG32(R600_AUDIO_PLL1_MUL, base_rate*50);
251	WREG32(R600_AUDIO_PLL1_DIV, clock*100);
252	WREG32(R600_AUDIO_CLK_SRCSEL, 0);
253	break;
254
255	case 1:
256	WREG32(R600_AUDIO_PLL2_MUL, base_rate*50);
257	WREG32(R600_AUDIO_PLL2_DIV, clock*100);
258	WREG32(R600_AUDIO_CLK_SRCSEL, 1);
259	break;
260	}
261	}
262
263	/*
264	* release the audio timer
265	* TODO: How to do this correctly on SMP systems?
266	*/
267	void r600_audio_fini(struct radeon_device *rdev)
268	{
269	if (!r600_audio_chipset_supported(rdev))
270	return;
271
dafc3bd5	272	del_timer(&rdev->audio_timer);
38fd2c6f	273	WREG32_P(R600_AUDIO_ENABLE, 0x0, ~0x81000000);
5230aea6 RM	274
5230aea6 RM	275	r600_audio_engine_enable(rdev, false);
dafc3bd5	276	}