[deliverable/linux.git] / drivers / gpu / drm / radeon / r600_audio.c

/*
 * Copyright 2008 Advanced Micro Devices, Inc.
 * Copyright 2008 Red Hat Inc.
 * Copyright 2009 Christian König.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Christian König
 */
#include "drmP.h"
#include "radeon.h"
#include "radeon_reg.h"
#include "radeon_asic.h"
#include "atom.h"

/*
 * check if enc_priv stores radeon_encoder_atom_dig
 */
static bool radeon_dig_encoder(struct drm_encoder *encoder)
{
	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	switch (radeon_encoder->encoder_id) {
	case ENCODER_OBJECT_ID_INTERNAL_LVDS:
	case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
	case ENCODER_OBJECT_ID_INTERNAL_DVO1:
	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
	case ENCODER_OBJECT_ID_INTERNAL_DDI:
	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
		return true;
	}
	return false;
}

/*
 * check if the chipset is supported
 */
static int r600_audio_chipset_supported(struct radeon_device *rdev)
{
	return (rdev->family >= CHIP_R600 && !ASIC_IS_DCE5(rdev))
		|| rdev->family == CHIP_RS600
		|| rdev->family == CHIP_RS690
		|| rdev->family == CHIP_RS740;
}

/*
 * current number of channels
 */
int r600_audio_channels(struct radeon_device *rdev)
{
	return (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0x7) + 1;
}

/*
 * current bits per sample
 */
int r600_audio_bits_per_sample(struct radeon_device *rdev)
{
	uint32_t value = (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0xF0) >> 4;
	switch (value) {
	case 0x0: return  8;
	case 0x1: return 16;
	case 0x2: return 20;
	case 0x3: return 24;
	case 0x4: return 32;
	}

	dev_err(rdev->dev, "Unknown bits per sample 0x%x using 16 instead\n",
		(int)value);

	return 16;
}

/*
 * current sampling rate in HZ
 */
int r600_audio_rate(struct radeon_device *rdev)
{
	uint32_t value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL);
	uint32_t result;

	if (value & 0x4000)
		result = 44100;
	else
		result = 48000;

	result *= ((value >> 11) & 0x7) + 1;
	result /= ((value >> 8) & 0x7) + 1;

	return result;
}

/*
 * iec 60958 status bits
 */
uint8_t r600_audio_status_bits(struct radeon_device *rdev)
{
	return RREG32(R600_AUDIO_STATUS_BITS) & 0xff;
}

/*
 * iec 60958 category code
 */
uint8_t r600_audio_category_code(struct radeon_device *rdev)
{
	return (RREG32(R600_AUDIO_STATUS_BITS) >> 8) & 0xff;
}

/*
 * update all hdmi interfaces with current audio parameters
 */
void r600_audio_update_hdmi(struct work_struct *work)
{
	struct radeon_device *rdev = container_of(work, struct radeon_device,
						  audio_work);
	struct drm_device *dev = rdev->ddev;

	int channels = r600_audio_channels(rdev);
	int rate = r600_audio_rate(rdev);
	int bps = r600_audio_bits_per_sample(rdev);
	uint8_t status_bits = r600_audio_status_bits(rdev);
	uint8_t category_code = r600_audio_category_code(rdev);
	struct drm_encoder *encoder;
	int changes = 0;

	changes |= channels != rdev->audio.channels;
	changes |= rate != rdev->audio.rate;
	changes |= bps != rdev->audio.bits_per_sample;
	changes |= status_bits != rdev->audio.status_bits;
	changes |= category_code != rdev->audio.category_code;

	if (changes) {
		rdev->audio.channels = channels;
		rdev->audio.rate = rate;
		rdev->audio.bits_per_sample = bps;
		rdev->audio.status_bits = status_bits;
		rdev->audio.category_code = category_code;
	}

	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
		if (!radeon_dig_encoder(encoder))
			continue;
		if (changes || r600_hdmi_buffer_status_changed(encoder))
			r600_hdmi_update_audio_settings(encoder);
	}
}

/*
 * turn on/off audio engine
 */
static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable)
{
	u32 value = 0;
	DRM_INFO("%s audio support\n", enable ? "Enabling" : "Disabling");
	if (ASIC_IS_DCE4(rdev)) {
		if (enable) {
			value |= 0x81000000; /* Required to enable audio */
			value |= 0x0e1000f0; /* fglrx sets that too */
		}
		WREG32(EVERGREEN_AUDIO_ENABLE, value);
	} else {
		WREG32_P(R600_AUDIO_ENABLE,
			 enable ? 0x81000000 : 0x0, ~0x81000000);
	}
	rdev->audio.enabled = enable;
}

/*
 * initialize the audio vars
 */
int r600_audio_init(struct radeon_device *rdev)
{
	if (!radeon_audio || !r600_audio_chipset_supported(rdev))
		return 0;

	r600_audio_engine_enable(rdev, true);

	rdev->audio.channels = -1;
	rdev->audio.rate = -1;
	rdev->audio.bits_per_sample = -1;
	rdev->audio.status_bits = 0;
	rdev->audio.category_code = 0;

	return 0;
}

/*
 * atach the audio codec to the clock source of the encoder
 */
void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
{
	struct drm_device *dev = encoder->dev;
	struct radeon_device *rdev = dev->dev_private;
	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
	int base_rate = 48000;

	switch (radeon_encoder->encoder_id) {
	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
		WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
		break;
	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
		WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
		break;
	default:
		dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
			  radeon_encoder->encoder_id);
		return;
	}

	if (ASIC_IS_DCE4(rdev)) {
		/* TODO: other PLLs? */
		WREG32(EVERGREEN_AUDIO_PLL1_MUL, base_rate * 10);
		WREG32(EVERGREEN_AUDIO_PLL1_DIV, clock * 10);
		WREG32(EVERGREEN_AUDIO_PLL1_UNK, 0x00000071);

		/* Some magic trigger or src sel? */
		WREG32_P(0x5ac, 0x01, ~0x77);
	} else {
		switch (dig->dig_encoder) {
		case 0:
			WREG32(R600_AUDIO_PLL1_MUL, base_rate * 50);
			WREG32(R600_AUDIO_PLL1_DIV, clock * 100);
			WREG32(R600_AUDIO_CLK_SRCSEL, 0);
			break;

		case 1:
			WREG32(R600_AUDIO_PLL2_MUL, base_rate * 50);
			WREG32(R600_AUDIO_PLL2_DIV, clock * 100);
			WREG32(R600_AUDIO_CLK_SRCSEL, 1);
			break;
		default:
			dev_err(rdev->dev,
				"Unsupported DIG on encoder 0x%02X\n",
				radeon_encoder->encoder_id);
			return;
		}
	}
}

/*
 * release the audio timer
 * TODO: How to do this correctly on SMP systems?
 */
void r600_audio_fini(struct radeon_device *rdev)
{
	if (!rdev->audio.enabled)
		return;

	r600_audio_engine_enable(rdev, false);
}
Commit	Line	Data
dafc3bd5 CK	1	/*
	2	* Copyright 2008 Advanced Micro Devices, Inc.
	3	* Copyright 2008 Red Hat Inc.
	4	* Copyright 2009 Christian König.
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a
	7	* copy of this software and associated documentation files (the "Software"),
	8	* to deal in the Software without restriction, including without limitation
	9	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	10	* and/or sell copies of the Software, and to permit persons to whom the
	11	* Software is furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	20	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	21	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	22	* OTHER DEALINGS IN THE SOFTWARE.
	23	*
	24	* Authors: Christian König
	25	*/
	26	#include "drmP.h"
	27	#include "radeon.h"
	28	#include "radeon_reg.h"
3574dda4	29	#include "radeon_asic.h"
dafc3bd5 CK	30	#include "atom.h"
dafc3bd5 CK	31
cfcbd6d3 RM	32	/*
	33	* check if enc_priv stores radeon_encoder_atom_dig
	34	*/
	35	static bool radeon_dig_encoder(struct drm_encoder *encoder)
	36	{
	37	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	38	switch (radeon_encoder->encoder_id) {
	39	case ENCODER_OBJECT_ID_INTERNAL_LVDS:
	40	case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
	41	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
	42	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
	43	case ENCODER_OBJECT_ID_INTERNAL_DVO1:
	44	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
	45	case ENCODER_OBJECT_ID_INTERNAL_DDI:
	46	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
	47	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
	48	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
	49	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
	50	return true;
	51	}
	52	return false;
	53	}
	54
dafc3bd5 CK	55	/*
	56	* check if the chipset is supported
	57	*/
	58	static int r600_audio_chipset_supported(struct radeon_device *rdev)
	59	{
69d2ae57	60	return (rdev->family >= CHIP_R600 && !ASIC_IS_DCE5(rdev))
dafc3bd5 CK	61	\|\| rdev->family == CHIP_RS600
	62	\|\| rdev->family == CHIP_RS690
	63	\|\| rdev->family == CHIP_RS740;
	64	}
	65
	66	/*
	67	* current number of channels
	68	*/
58bd0863	69	int r600_audio_channels(struct radeon_device *rdev)
dafc3bd5 CK	70	{
	71	return (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0x7) + 1;
	72	}
	73
	74	/*
	75	* current bits per sample
	76	*/
58bd0863	77	int r600_audio_bits_per_sample(struct radeon_device *rdev)
dafc3bd5 CK	78	{
	79	uint32_t value = (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0xF0) >> 4;
	80	switch (value) {
	81	case 0x0: return 8;
	82	case 0x1: return 16;
	83	case 0x2: return 20;
	84	case 0x3: return 24;
	85	case 0x4: return 32;
	86	}
	87
219de62a RM	88	dev_err(rdev->dev, "Unknown bits per sample 0x%x using 16 instead\n",
219de62a RM	89	(int)value);
dafc3bd5 CK	90
	91	return 16;
	92	}
	93
	94	/*
	95	* current sampling rate in HZ
	96	*/
58bd0863	97	int r600_audio_rate(struct radeon_device *rdev)
dafc3bd5 CK	98	{
	99	uint32_t value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL);
	100	uint32_t result;
	101
	102	if (value & 0x4000)
	103	result = 44100;
	104	else
	105	result = 48000;
	106
	107	result *= ((value >> 11) & 0x7) + 1;
	108	result /= ((value >> 8) & 0x7) + 1;
	109
	110	return result;
	111	}
	112
	113	/*
	114	* iec 60958 status bits
	115	*/
58bd0863	116	uint8_t r600_audio_status_bits(struct radeon_device *rdev)
dafc3bd5 CK	117	{
	118	return RREG32(R600_AUDIO_STATUS_BITS) & 0xff;
	119	}
	120
	121	/*
	122	* iec 60958 category code
	123	*/
58bd0863	124	uint8_t r600_audio_category_code(struct radeon_device *rdev)
dafc3bd5 CK	125	{
	126	return (RREG32(R600_AUDIO_STATUS_BITS) >> 8) & 0xff;
	127	}
	128
	129	/*
	130	* update all hdmi interfaces with current audio parameters
	131	*/
f122c610	132	void r600_audio_update_hdmi(struct work_struct *work)
dafc3bd5	133	{
f122c610 AD	134	struct radeon_device *rdev = container_of(work, struct radeon_device,
f122c610 AD	135	audio_work);
dafc3bd5 CK	136	struct drm_device *dev = rdev->ddev;
	137
	138	int channels = r600_audio_channels(rdev);
	139	int rate = r600_audio_rate(rdev);
	140	int bps = r600_audio_bits_per_sample(rdev);
	141	uint8_t status_bits = r600_audio_status_bits(rdev);
	142	uint8_t category_code = r600_audio_category_code(rdev);
dafc3bd5	143	struct drm_encoder *encoder;
f122c610	144	int changes = 0;
dafc3bd5	145
a92553ab RM	146	changes \|= channels != rdev->audio.channels;
	147	changes \|= rate != rdev->audio.rate;
	148	changes \|= bps != rdev->audio.bits_per_sample;
	149	changes \|= status_bits != rdev->audio.status_bits;
	150	changes \|= category_code != rdev->audio.category_code;
dafc3bd5 CK	151
dafc3bd5 CK	152	if (changes) {
a92553ab RM	153	rdev->audio.channels = channels;
	154	rdev->audio.rate = rate;
	155	rdev->audio.bits_per_sample = bps;
	156	rdev->audio.status_bits = status_bits;
	157	rdev->audio.category_code = category_code;
dafc3bd5 CK	158	}
	159
	160	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
cfcbd6d3 RM	161	if (!radeon_dig_encoder(encoder))
cfcbd6d3 RM	162	continue;
f2594933 CK	163	if (changes \|\| r600_hdmi_buffer_status_changed(encoder))
f2594933 CK	164	r600_hdmi_update_audio_settings(encoder);
dafc3bd5	165	}
dafc3bd5 CK	166	}
dafc3bd5 CK	167
5230aea6 RM	168	/*
	169	* turn on/off audio engine
	170	*/
	171	static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable)
	172	{
69d2ae57	173	u32 value = 0;
219de62a	174	DRM_INFO("%s audio support\n", enable ? "Enabling" : "Disabling");
69d2ae57 RM	175	if (ASIC_IS_DCE4(rdev)) {
	176	if (enable) {
	177	value \|= 0x81000000; /* Required to enable audio */
	178	value \|= 0x0e1000f0; /* fglrx sets that too */
	179	}
	180	WREG32(EVERGREEN_AUDIO_ENABLE, value);
	181	} else {
	182	WREG32_P(R600_AUDIO_ENABLE,
	183	enable ? 0x81000000 : 0x0, ~0x81000000);
	184	}
a92553ab	185	rdev->audio.enabled = enable;
5230aea6 RM	186	}
5230aea6 RM	187
dafc3bd5	188	/*
f122c610	189	* initialize the audio vars
dafc3bd5 CK	190	*/
	191	int r600_audio_init(struct radeon_device *rdev)
	192	{
c8792d5e	193	if (!radeon_audio \|\| !r600_audio_chipset_supported(rdev))
dafc3bd5 CK	194	return 0;
dafc3bd5 CK	195
c8792d5e	196	r600_audio_engine_enable(rdev, true);
dafc3bd5	197
a92553ab RM	198	rdev->audio.channels = -1;
	199	rdev->audio.rate = -1;
	200	rdev->audio.bits_per_sample = -1;
	201	rdev->audio.status_bits = 0;
	202	rdev->audio.category_code = 0;
dafc3bd5	203
58bd0863 CK	204	return 0;
	205	}
	206
dafc3bd5 CK	207	/*
	208	* atach the audio codec to the clock source of the encoder
	209	*/
	210	void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
	211	{
	212	struct drm_device *dev = encoder->dev;
	213	struct radeon_device *rdev = dev->dev_private;
	214	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
2cd6218c	215	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
dafc3bd5 CK	216	int base_rate = 48000;
	217
	218	switch (radeon_encoder->encoder_id) {
	219	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
	220	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
	221	WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
	222	break;
dafc3bd5 CK	223	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
	224	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
	225	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
	226	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
	227	WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
	228	break;
dafc3bd5	229	default:
219de62a	230	dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
dafc3bd5 CK	231	radeon_encoder->encoder_id);
	232	return;
	233	}
	234
ebcb796f	235	if (ASIC_IS_DCE4(rdev)) {
69d2ae57 RM	236	/* TODO: other PLLs? */
	237	WREG32(EVERGREEN_AUDIO_PLL1_MUL, base_rate * 10);
	238	WREG32(EVERGREEN_AUDIO_PLL1_DIV, clock * 10);
	239	WREG32(EVERGREEN_AUDIO_PLL1_UNK, 0x00000071);
	240
	241	/* Some magic trigger or src sel? */
	242	WREG32_P(0x5ac, 0x01, ~0x77);
ebcb796f RM	243	} else {
	244	switch (dig->dig_encoder) {
	245	case 0:
	246	WREG32(R600_AUDIO_PLL1_MUL, base_rate * 50);
	247	WREG32(R600_AUDIO_PLL1_DIV, clock * 100);
	248	WREG32(R600_AUDIO_CLK_SRCSEL, 0);
	249	break;
	250
	251	case 1:
	252	WREG32(R600_AUDIO_PLL2_MUL, base_rate * 50);
	253	WREG32(R600_AUDIO_PLL2_DIV, clock * 100);
	254	WREG32(R600_AUDIO_CLK_SRCSEL, 1);
	255	break;
	256	default:
	257	dev_err(rdev->dev,
	258	"Unsupported DIG on encoder 0x%02X\n",
	259	radeon_encoder->encoder_id);
	260	return;
	261	}
dafc3bd5 CK	262	}
	263	}
	264
	265	/*
	266	* release the audio timer
	267	* TODO: How to do this correctly on SMP systems?
	268	*/
	269	void r600_audio_fini(struct radeon_device *rdev)
	270	{
a92553ab	271	if (!rdev->audio.enabled)
dafc3bd5 CK	272	return;
dafc3bd5 CK	273
5230aea6	274	r600_audio_engine_enable(rdev, false);
dafc3bd5	275	}