[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_audio.c

/*
 * Copyright 2014 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Slava Grigorev <slava.grigorev@amd.com>
 */

#include <drm/drmP.h>
#include <drm/drm_crtc.h>
#include "radeon.h"
#include "atom.h"
#include "radeon_audio.h"

void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
		u8 enable_mask);
void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
		u8 enable_mask);
u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg);
void dce6_endpoint_wreg(struct radeon_device *rdev,
		u32 offset, u32 reg, u32 v);
void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder,
		struct cea_sad *sads, int sad_count);
void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder,
		struct cea_sad *sads, int sad_count);
void dce6_afmt_write_sad_regs(struct drm_encoder *encoder,
		struct cea_sad *sads, int sad_count);
void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
		u8 *sadb, int sad_count);
void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
		u8 *sadb, int sad_count);
void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
		u8 *sadb, int sad_count);
void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
		u8 *sadb, int sad_count);
void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
		u8 *sadb, int sad_count);
void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
		u8 *sadb, int sad_count);

static const u32 pin_offsets[7] =
{
	(0x5e00 - 0x5e00),
	(0x5e18 - 0x5e00),
	(0x5e30 - 0x5e00),
	(0x5e48 - 0x5e00),
	(0x5e60 - 0x5e00),
	(0x5e78 - 0x5e00),
	(0x5e90 - 0x5e00),
};

static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
{
	return RREG32(reg);
}

static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset,
		u32 reg, u32 v)
{
	WREG32(reg, v);
}

static struct radeon_audio_basic_funcs dce32_funcs = {
	.endpoint_rreg = radeon_audio_rreg,
	.endpoint_wreg = radeon_audio_wreg,
};

static struct radeon_audio_basic_funcs dce4_funcs = {
	.endpoint_rreg = radeon_audio_rreg,
	.endpoint_wreg = radeon_audio_wreg,
};

static struct radeon_audio_basic_funcs dce6_funcs = {
	.endpoint_rreg = dce6_endpoint_rreg,
	.endpoint_wreg = dce6_endpoint_wreg,
};

static struct radeon_audio_funcs dce32_hdmi_funcs = {
	.write_sad_regs = dce3_2_afmt_write_sad_regs,
	.write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation,
};

static struct radeon_audio_funcs dce32_dp_funcs = {
	.write_sad_regs = dce3_2_afmt_write_sad_regs,
	.write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation,
};

static struct radeon_audio_funcs dce4_hdmi_funcs = {
	.write_sad_regs = evergreen_hdmi_write_sad_regs,
	.write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation,
};

static struct radeon_audio_funcs dce4_dp_funcs = {
	.write_sad_regs = evergreen_hdmi_write_sad_regs,
	.write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation,
};

static struct radeon_audio_funcs dce6_hdmi_funcs = {
	.write_sad_regs = dce6_afmt_write_sad_regs,
	.write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation,
};

static struct radeon_audio_funcs dce6_dp_funcs = {
	.write_sad_regs = dce6_afmt_write_sad_regs,
	.write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation,
};

static void radeon_audio_interface_init(struct radeon_device *rdev)
{
	if (ASIC_IS_DCE6(rdev)) {
		rdev->audio.funcs = &dce6_funcs;
		rdev->audio.hdmi_funcs = &dce6_hdmi_funcs;
		rdev->audio.dp_funcs = &dce6_dp_funcs;
	} else if (ASIC_IS_DCE4(rdev)) {
		rdev->audio.funcs = &dce4_funcs;
		rdev->audio.hdmi_funcs = &dce4_hdmi_funcs;
		rdev->audio.dp_funcs = &dce4_dp_funcs;
	} else {
		rdev->audio.funcs = &dce32_funcs;
		rdev->audio.hdmi_funcs = &dce32_hdmi_funcs;
		rdev->audio.dp_funcs = &dce32_dp_funcs;
	}
}

static int radeon_audio_chipset_supported(struct radeon_device *rdev)
{
	return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev);
}

int radeon_audio_init(struct radeon_device *rdev)
{
	int i;

	if (!radeon_audio || !radeon_audio_chipset_supported(rdev))
		return 0;

	rdev->audio.enabled = true;

	if (ASIC_IS_DCE83(rdev))		/* KB: 2 streams, 3 endpoints */
		rdev->audio.num_pins = 3;
	else if (ASIC_IS_DCE81(rdev))	/* KV: 4 streams, 7 endpoints */
		rdev->audio.num_pins = 7;
	else if (ASIC_IS_DCE8(rdev))	/* BN/HW: 6 streams, 7 endpoints */
		rdev->audio.num_pins = 7;
	else if (ASIC_IS_DCE64(rdev))	/* OL: 2 streams, 2 endpoints */
		rdev->audio.num_pins = 2;
	else if (ASIC_IS_DCE61(rdev))	/* TN: 4 streams, 6 endpoints */
		rdev->audio.num_pins = 6;
	else if (ASIC_IS_DCE6(rdev))	/* SI: 6 streams, 6 endpoints */
		rdev->audio.num_pins = 6;
	else
		rdev->audio.num_pins = 1;

	for (i = 0; i < rdev->audio.num_pins; i++) {
		rdev->audio.pin[i].channels = -1;
		rdev->audio.pin[i].rate = -1;
		rdev->audio.pin[i].bits_per_sample = -1;
		rdev->audio.pin[i].status_bits = 0;
		rdev->audio.pin[i].category_code = 0;
		rdev->audio.pin[i].connected = false;
		rdev->audio.pin[i].offset = pin_offsets[i];
		rdev->audio.pin[i].id = i;
	}

	radeon_audio_interface_init(rdev);

	/* disable audio.  it will be set up later */
	for (i = 0; i < rdev->audio.num_pins; i++)
		if (ASIC_IS_DCE6(rdev))
			dce6_audio_enable(rdev, &rdev->audio.pin[i], false);
		else
			r600_audio_enable(rdev, &rdev->audio.pin[i], false);

	return 0;
}

void radeon_audio_detect(struct drm_connector *connector,
	enum drm_connector_status status)
{
	if (!connector || !connector->encoder)
		return;

	if (status == connector_status_connected) {
		int sink_type;
		struct radeon_device *rdev = connector->encoder->dev->dev_private;
		struct radeon_connector *radeon_connector;
		struct radeon_encoder *radeon_encoder =
			to_radeon_encoder(connector->encoder);

		if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) {
			radeon_encoder->audio = 0;
			return;
		}

		radeon_connector = to_radeon_connector(connector);
		sink_type = radeon_dp_getsinktype(radeon_connector);

		if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
			sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
			radeon_encoder->audio = rdev->audio.dp_funcs;
		else
			radeon_encoder->audio = rdev->audio.hdmi_funcs;
		/* TODO: set up the sads, etc. and set the audio enable_mask */
	} else {
		/* TODO: reset the audio enable_mask */
	}
}

u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
{
	if (rdev->audio.funcs->endpoint_rreg)
		return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);

	return 0;
}

void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset,
	u32 reg, u32 v)
{
	if (rdev->audio.funcs->endpoint_wreg)
		rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);
}

void radeon_audio_write_sad_regs(struct drm_encoder *encoder)
{
	struct radeon_encoder *radeon_encoder;
	struct drm_connector *connector;
	struct radeon_connector *radeon_connector = NULL;
	struct cea_sad *sads;
	int sad_count;

	list_for_each_entry(connector,
		&encoder->dev->mode_config.connector_list, head) {
		if (connector->encoder == encoder) {
			radeon_connector = to_radeon_connector(connector);
			break;
		}
	}

	if (!radeon_connector) {
		DRM_ERROR("Couldn't find encoder's connector\n");
		return;
	}

	sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads);
	if (sad_count <= 0) {
		DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
		return;
	}
	BUG_ON(!sads);

	radeon_encoder = to_radeon_encoder(encoder);

	if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs)
		radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count);

	kfree(sads);
}

void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder)
{
	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
    struct drm_connector *connector;
    struct radeon_connector *radeon_connector = NULL;
    u8 *sadb = NULL;
    int sad_count;

    list_for_each_entry(connector,
		&encoder->dev->mode_config.connector_list, head) {
        if (connector->encoder == encoder) {
            radeon_connector = to_radeon_connector(connector);
            break;
        }
    }

    if (!radeon_connector) {
        DRM_ERROR("Couldn't find encoder's connector\n");
        return;
    }

    sad_count = drm_edid_to_speaker_allocation(
		radeon_connector_edid(connector), &sadb);
    if (sad_count < 0) {
        DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n",
			sad_count);
        sad_count = 0;
    }

	if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation)
		radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count);

    kfree(sadb);
}
Commit	Line	Data
bfc1f97d SG	1	/*
	2	* Copyright 2014 Advanced Micro Devices, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: Slava Grigorev <slava.grigorev@amd.com>
	23	*/
	24
	25	#include <drm/drmP.h>
1a626b68	26	#include <drm/drm_crtc.h>
bfc1f97d	27	#include "radeon.h"
1a626b68 SG	28	#include "atom.h"
1a626b68 SG	29	#include "radeon_audio.h"
bfc1f97d SG	30
	31	void r600_audio_enable(struct radeon_device rdev, struct r600_audio_pin pin,
	32	u8 enable_mask);
	33	void dce6_audio_enable(struct radeon_device rdev, struct r600_audio_pin pin,
	34	u8 enable_mask);
1a626b68 SG	35	u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg);
	36	void dce6_endpoint_wreg(struct radeon_device *rdev,
	37	u32 offset, u32 reg, u32 v);
070a2e63 AD	38	void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder,
	39	struct cea_sad *sads, int sad_count);
	40	void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder,
	41	struct cea_sad *sads, int sad_count);
	42	void dce6_afmt_write_sad_regs(struct drm_encoder *encoder,
	43	struct cea_sad *sads, int sad_count);
00a9d4bc SG	44	void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
	45	u8 *sadb, int sad_count);
	46	void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
	47	u8 *sadb, int sad_count);
	48	void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
	49	u8 *sadb, int sad_count);
	50	void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
	51	u8 *sadb, int sad_count);
	52	void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
	53	u8 *sadb, int sad_count);
	54	void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
	55	u8 *sadb, int sad_count);
bfc1f97d SG	56
	57	static const u32 pin_offsets[7] =
	58	{
	59	(0x5e00 - 0x5e00),
	60	(0x5e18 - 0x5e00),
	61	(0x5e30 - 0x5e00),
	62	(0x5e48 - 0x5e00),
	63	(0x5e60 - 0x5e00),
	64	(0x5e78 - 0x5e00),
	65	(0x5e90 - 0x5e00),
	66	};
	67
1a626b68 SG	68	static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
	69	{
	70	return RREG32(reg);
	71	}
	72
	73	static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset,
	74	u32 reg, u32 v)
	75	{
	76	WREG32(reg, v);
	77	}
	78
	79	static struct radeon_audio_basic_funcs dce32_funcs = {
	80	.endpoint_rreg = radeon_audio_rreg,
	81	.endpoint_wreg = radeon_audio_wreg,
	82	};
	83
	84	static struct radeon_audio_basic_funcs dce4_funcs = {
	85	.endpoint_rreg = radeon_audio_rreg,
	86	.endpoint_wreg = radeon_audio_wreg,
	87	};
	88
	89	static struct radeon_audio_basic_funcs dce6_funcs = {
	90	.endpoint_rreg = dce6_endpoint_rreg,
	91	.endpoint_wreg = dce6_endpoint_wreg,
	92	};
	93
070a2e63 AD	94	static struct radeon_audio_funcs dce32_hdmi_funcs = {
070a2e63 AD	95	.write_sad_regs = dce3_2_afmt_write_sad_regs,
00a9d4bc	96	.write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation,
070a2e63 AD	97	};
	98
	99	static struct radeon_audio_funcs dce32_dp_funcs = {
	100	.write_sad_regs = dce3_2_afmt_write_sad_regs,
00a9d4bc	101	.write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation,
070a2e63 AD	102	};
	103
	104	static struct radeon_audio_funcs dce4_hdmi_funcs = {
	105	.write_sad_regs = evergreen_hdmi_write_sad_regs,
00a9d4bc	106	.write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation,
070a2e63 AD	107	};
	108
	109	static struct radeon_audio_funcs dce4_dp_funcs = {
	110	.write_sad_regs = evergreen_hdmi_write_sad_regs,
00a9d4bc	111	.write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation,
070a2e63 AD	112	};
	113
	114	static struct radeon_audio_funcs dce6_hdmi_funcs = {
	115	.write_sad_regs = dce6_afmt_write_sad_regs,
00a9d4bc	116	.write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation,
070a2e63 AD	117	};
	118
	119	static struct radeon_audio_funcs dce6_dp_funcs = {
	120	.write_sad_regs = dce6_afmt_write_sad_regs,
00a9d4bc	121	.write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation,
070a2e63 AD	122	};
070a2e63 AD	123
1a626b68 SG	124	static void radeon_audio_interface_init(struct radeon_device *rdev)
	125	{
	126	if (ASIC_IS_DCE6(rdev)) {
	127	rdev->audio.funcs = &dce6_funcs;
070a2e63 AD	128	rdev->audio.hdmi_funcs = &dce6_hdmi_funcs;
070a2e63 AD	129	rdev->audio.dp_funcs = &dce6_dp_funcs;
1a626b68 SG	130	} else if (ASIC_IS_DCE4(rdev)) {
1a626b68 SG	131	rdev->audio.funcs = &dce4_funcs;
070a2e63 AD	132	rdev->audio.hdmi_funcs = &dce4_hdmi_funcs;
070a2e63 AD	133	rdev->audio.dp_funcs = &dce4_dp_funcs;
1a626b68 SG	134	} else {
1a626b68 SG	135	rdev->audio.funcs = &dce32_funcs;
070a2e63 AD	136	rdev->audio.hdmi_funcs = &dce32_hdmi_funcs;
070a2e63 AD	137	rdev->audio.dp_funcs = &dce32_dp_funcs;
1a626b68 SG	138	}
	139	}
	140
bfc1f97d SG	141	static int radeon_audio_chipset_supported(struct radeon_device *rdev)
	142	{
	143	return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev);
	144	}
	145
	146	int radeon_audio_init(struct radeon_device *rdev)
	147	{
	148	int i;
	149
	150	if (!radeon_audio \|\| !radeon_audio_chipset_supported(rdev))
	151	return 0;
	152
	153	rdev->audio.enabled = true;
	154
	155	if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */
	156	rdev->audio.num_pins = 3;
	157	else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */
	158	rdev->audio.num_pins = 7;
	159	else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */
	160	rdev->audio.num_pins = 7;
	161	else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */
	162	rdev->audio.num_pins = 2;
	163	else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */
	164	rdev->audio.num_pins = 6;
	165	else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */
	166	rdev->audio.num_pins = 6;
	167	else
	168	rdev->audio.num_pins = 1;
	169
	170	for (i = 0; i < rdev->audio.num_pins; i++) {
	171	rdev->audio.pin[i].channels = -1;
	172	rdev->audio.pin[i].rate = -1;
	173	rdev->audio.pin[i].bits_per_sample = -1;
	174	rdev->audio.pin[i].status_bits = 0;
	175	rdev->audio.pin[i].category_code = 0;
	176	rdev->audio.pin[i].connected = false;
	177	rdev->audio.pin[i].offset = pin_offsets[i];
	178	rdev->audio.pin[i].id = i;
1a626b68 SG	179	}
	180
	181	radeon_audio_interface_init(rdev);
	182
	183	/* disable audio. it will be set up later */
	184	for (i = 0; i < rdev->audio.num_pins; i++)
bfc1f97d SG	185	if (ASIC_IS_DCE6(rdev))
	186	dce6_audio_enable(rdev, &rdev->audio.pin[i], false);
	187	else
	188	r600_audio_enable(rdev, &rdev->audio.pin[i], false);
1a626b68 SG	189
	190	return 0;
	191	}
	192
	193	void radeon_audio_detect(struct drm_connector *connector,
	194	enum drm_connector_status status)
	195	{
	196	if (!connector \|\| !connector->encoder)
	197	return;
	198
	199	if (status == connector_status_connected) {
	200	int sink_type;
	201	struct radeon_device *rdev = connector->encoder->dev->dev_private;
	202	struct radeon_connector *radeon_connector;
	203	struct radeon_encoder *radeon_encoder =
	204	to_radeon_encoder(connector->encoder);
	205
	206	if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) {
	207	radeon_encoder->audio = 0;
	208	return;
	209	}
	210
	211	radeon_connector = to_radeon_connector(connector);
	212	sink_type = radeon_dp_getsinktype(radeon_connector);
	213
	214	if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
	215	sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
	216	radeon_encoder->audio = rdev->audio.dp_funcs;
	217	else
	218	radeon_encoder->audio = rdev->audio.hdmi_funcs;
	219	/* TODO: set up the sads, etc. and set the audio enable_mask */
	220	} else {
	221	/* TODO: reset the audio enable_mask */
bfc1f97d	222	}
1a626b68 SG	223	}
	224
	225	u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
	226	{
	227	if (rdev->audio.funcs->endpoint_rreg)
	228	return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);
bfc1f97d SG	229
	230	return 0;
	231	}
1a626b68 SG	232
	233	void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset,
	234	u32 reg, u32 v)
	235	{
	236	if (rdev->audio.funcs->endpoint_wreg)
	237	rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);
	238	}
070a2e63 AD	239
	240	void radeon_audio_write_sad_regs(struct drm_encoder *encoder)
	241	{
	242	struct radeon_encoder *radeon_encoder;
	243	struct drm_connector *connector;
	244	struct radeon_connector *radeon_connector = NULL;
	245	struct cea_sad *sads;
	246	int sad_count;
	247
	248	list_for_each_entry(connector,
	249	&encoder->dev->mode_config.connector_list, head) {
	250	if (connector->encoder == encoder) {
	251	radeon_connector = to_radeon_connector(connector);
	252	break;
	253	}
	254	}
	255
	256	if (!radeon_connector) {
	257	DRM_ERROR("Couldn't find encoder's connector\n");
	258	return;
	259	}
	260
	261	sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads);
	262	if (sad_count <= 0) {
	263	DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
	264	return;
	265	}
	266	BUG_ON(!sads);
	267
	268	radeon_encoder = to_radeon_encoder(encoder);
	269
	270	if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs)
	271	radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count);
	272
	273	kfree(sads);
	274	}
00a9d4bc SG	275
	276	void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder)
	277	{
	278	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	279	struct drm_connector *connector;
	280	struct radeon_connector *radeon_connector = NULL;
	281	u8 *sadb = NULL;
	282	int sad_count;
	283
	284	list_for_each_entry(connector,
	285	&encoder->dev->mode_config.connector_list, head) {
	286	if (connector->encoder == encoder) {
	287	radeon_connector = to_radeon_connector(connector);
	288	break;
	289	}
	290	}
	291
	292	if (!radeon_connector) {
	293	DRM_ERROR("Couldn't find encoder's connector\n");
	294	return;
	295	}
	296
	297	sad_count = drm_edid_to_speaker_allocation(
	298	radeon_connector_edid(connector), &sadb);
	299	if (sad_count < 0) {
	300	DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n",
	301	sad_count);
	302	sad_count = 0;
	303	}
	304
	305	if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation)
	306	radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count);
	307
	308	kfree(sadb);
	309	}