radeon/audio: consolidate audio_mode_set() functions
[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_audio.c
CommitLineData
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1/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Slava Grigorev <slava.grigorev@amd.com>
23 */
24
64424d6e 25#include <linux/gcd.h>
bfc1f97d 26#include <drm/drmP.h>
1a626b68 27#include <drm/drm_crtc.h>
bfc1f97d 28#include "radeon.h"
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29#include "atom.h"
30#include "radeon_audio.h"
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31
32void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
33 u8 enable_mask);
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34void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
35 u8 enable_mask);
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36void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
37 u8 enable_mask);
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38u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg);
39void dce6_endpoint_wreg(struct radeon_device *rdev,
40 u32 offset, u32 reg, u32 v);
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41void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder,
42 struct cea_sad *sads, int sad_count);
43void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder,
44 struct cea_sad *sads, int sad_count);
45void dce6_afmt_write_sad_regs(struct drm_encoder *encoder,
46 struct cea_sad *sads, int sad_count);
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47void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
48 u8 *sadb, int sad_count);
49void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
50 u8 *sadb, int sad_count);
51void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
52 u8 *sadb, int sad_count);
53void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
54 u8 *sadb, int sad_count);
55void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
56 u8 *sadb, int sad_count);
57void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
58 u8 *sadb, int sad_count);
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59void dce4_afmt_write_latency_fields(struct drm_encoder *encoder,
60 struct drm_connector *connector, struct drm_display_mode *mode);
61void dce6_afmt_write_latency_fields(struct drm_encoder *encoder,
62 struct drm_connector *connector, struct drm_display_mode *mode);
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63struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev);
64struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev);
88252d77 65void dce6_afmt_select_pin(struct drm_encoder *encoder);
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66void r600_hdmi_audio_set_dto(struct radeon_device *rdev,
67 struct radeon_crtc *crtc, unsigned int clock);
68void dce3_2_audio_set_dto(struct radeon_device *rdev,
69 struct radeon_crtc *crtc, unsigned int clock);
70void dce4_hdmi_audio_set_dto(struct radeon_device *rdev,
71 struct radeon_crtc *crtc, unsigned int clock);
72void dce4_dp_audio_set_dto(struct radeon_device *rdev,
73 struct radeon_crtc *crtc, unsigned int clock);
74void dce6_hdmi_audio_set_dto(struct radeon_device *rdev,
75 struct radeon_crtc *crtc, unsigned int clock);
76void dce6_dp_audio_set_dto(struct radeon_device *rdev,
77 struct radeon_crtc *crtc, unsigned int clock);
baa7d8e4 78void r600_set_avi_packet(struct radeon_device *rdev, u32 offset,
96ea7afb 79 unsigned char *buffer, size_t size);
baa7d8e4 80void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset,
96ea7afb 81 unsigned char *buffer, size_t size);
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82void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset,
83 const struct radeon_hdmi_acr *acr);
84void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset,
85 const struct radeon_hdmi_acr *acr);
86void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset,
87 const struct radeon_hdmi_acr *acr);
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88void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
89void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
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90void dce4_hdmi_set_color_depth(struct drm_encoder *encoder,
91 u32 offset, int bpc);
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92void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset);
93void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset);
94void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset);
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95void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
96void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
97void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
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98static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
99 struct drm_display_mode *mode);
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100
101static const u32 pin_offsets[7] =
102{
103 (0x5e00 - 0x5e00),
104 (0x5e18 - 0x5e00),
105 (0x5e30 - 0x5e00),
106 (0x5e48 - 0x5e00),
107 (0x5e60 - 0x5e00),
108 (0x5e78 - 0x5e00),
109 (0x5e90 - 0x5e00),
110};
111
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112static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
113{
114 return RREG32(reg);
115}
116
117static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset,
118 u32 reg, u32 v)
119{
120 WREG32(reg, v);
121}
122
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123static struct radeon_audio_basic_funcs r600_funcs = {
124 .endpoint_rreg = radeon_audio_rreg,
125 .endpoint_wreg = radeon_audio_wreg,
126 .enable = r600_audio_enable,
127};
128
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129static struct radeon_audio_basic_funcs dce32_funcs = {
130 .endpoint_rreg = radeon_audio_rreg,
131 .endpoint_wreg = radeon_audio_wreg,
8bf59820 132 .enable = r600_audio_enable,
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133};
134
135static struct radeon_audio_basic_funcs dce4_funcs = {
136 .endpoint_rreg = radeon_audio_rreg,
137 .endpoint_wreg = radeon_audio_wreg,
8bf59820 138 .enable = dce4_audio_enable,
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139};
140
141static struct radeon_audio_basic_funcs dce6_funcs = {
142 .endpoint_rreg = dce6_endpoint_rreg,
143 .endpoint_wreg = dce6_endpoint_wreg,
8bf59820 144 .enable = dce6_audio_enable,
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145};
146
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147static struct radeon_audio_funcs r600_hdmi_funcs = {
148 .get_pin = r600_audio_get_pin,
149 .set_dto = r600_hdmi_audio_set_dto,
64424d6e 150 .update_acr = r600_hdmi_update_acr,
930a9785 151 .set_vbi_packet = r600_set_vbi_packet,
baa7d8e4 152 .set_avi_packet = r600_set_avi_packet,
1852c9a0 153 .set_audio_packet = r600_set_audio_packet,
3be2e7d0 154 .set_mute = r600_set_mute,
6e72376d 155 .mode_set = radeon_audio_hdmi_mode_set,
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156};
157
070a2e63 158static struct radeon_audio_funcs dce32_hdmi_funcs = {
3cdde027 159 .get_pin = r600_audio_get_pin,
070a2e63 160 .write_sad_regs = dce3_2_afmt_write_sad_regs,
00a9d4bc 161 .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation,
a85d682a 162 .set_dto = dce3_2_audio_set_dto,
64424d6e 163 .update_acr = dce3_2_hdmi_update_acr,
930a9785 164 .set_vbi_packet = r600_set_vbi_packet,
baa7d8e4 165 .set_avi_packet = r600_set_avi_packet,
1852c9a0 166 .set_audio_packet = dce3_2_set_audio_packet,
3be2e7d0 167 .set_mute = dce3_2_set_mute,
6e72376d 168 .mode_set = radeon_audio_hdmi_mode_set,
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169};
170
171static struct radeon_audio_funcs dce32_dp_funcs = {
3cdde027 172 .get_pin = r600_audio_get_pin,
070a2e63 173 .write_sad_regs = dce3_2_afmt_write_sad_regs,
00a9d4bc 174 .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation,
a85d682a 175 .set_dto = dce3_2_audio_set_dto,
baa7d8e4 176 .set_avi_packet = r600_set_avi_packet,
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177};
178
179static struct radeon_audio_funcs dce4_hdmi_funcs = {
3cdde027 180 .get_pin = r600_audio_get_pin,
070a2e63 181 .write_sad_regs = evergreen_hdmi_write_sad_regs,
00a9d4bc 182 .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation,
87654f87 183 .write_latency_fields = dce4_afmt_write_latency_fields,
a85d682a 184 .set_dto = dce4_hdmi_audio_set_dto,
64424d6e 185 .update_acr = evergreen_hdmi_update_acr,
930a9785 186 .set_vbi_packet = dce4_set_vbi_packet,
be273e58 187 .set_color_depth = dce4_hdmi_set_color_depth,
baa7d8e4 188 .set_avi_packet = evergreen_set_avi_packet,
1852c9a0 189 .set_audio_packet = dce4_set_audio_packet,
3be2e7d0 190 .set_mute = dce4_set_mute,
6e72376d 191 .mode_set = radeon_audio_hdmi_mode_set,
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192};
193
194static struct radeon_audio_funcs dce4_dp_funcs = {
3cdde027 195 .get_pin = r600_audio_get_pin,
070a2e63 196 .write_sad_regs = evergreen_hdmi_write_sad_regs,
00a9d4bc 197 .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation,
87654f87 198 .write_latency_fields = dce4_afmt_write_latency_fields,
a85d682a 199 .set_dto = dce4_dp_audio_set_dto,
baa7d8e4 200 .set_avi_packet = evergreen_set_avi_packet,
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201};
202
203static struct radeon_audio_funcs dce6_hdmi_funcs = {
88252d77 204 .select_pin = dce6_afmt_select_pin,
3cdde027 205 .get_pin = dce6_audio_get_pin,
070a2e63 206 .write_sad_regs = dce6_afmt_write_sad_regs,
00a9d4bc 207 .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation,
87654f87 208 .write_latency_fields = dce6_afmt_write_latency_fields,
a85d682a 209 .set_dto = dce6_hdmi_audio_set_dto,
64424d6e 210 .update_acr = evergreen_hdmi_update_acr,
930a9785 211 .set_vbi_packet = dce4_set_vbi_packet,
be273e58 212 .set_color_depth = dce4_hdmi_set_color_depth,
baa7d8e4 213 .set_avi_packet = evergreen_set_avi_packet,
1852c9a0 214 .set_audio_packet = dce4_set_audio_packet,
3be2e7d0 215 .set_mute = dce4_set_mute,
6e72376d 216 .mode_set = radeon_audio_hdmi_mode_set,
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217};
218
219static struct radeon_audio_funcs dce6_dp_funcs = {
88252d77 220 .select_pin = dce6_afmt_select_pin,
3cdde027 221 .get_pin = dce6_audio_get_pin,
070a2e63 222 .write_sad_regs = dce6_afmt_write_sad_regs,
00a9d4bc 223 .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation,
87654f87 224 .write_latency_fields = dce6_afmt_write_latency_fields,
a85d682a 225 .set_dto = dce6_dp_audio_set_dto,
baa7d8e4 226 .set_avi_packet = evergreen_set_avi_packet,
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227};
228
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229static void radeon_audio_interface_init(struct radeon_device *rdev)
230{
231 if (ASIC_IS_DCE6(rdev)) {
232 rdev->audio.funcs = &dce6_funcs;
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233 rdev->audio.hdmi_funcs = &dce6_hdmi_funcs;
234 rdev->audio.dp_funcs = &dce6_dp_funcs;
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235 } else if (ASIC_IS_DCE4(rdev)) {
236 rdev->audio.funcs = &dce4_funcs;
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237 rdev->audio.hdmi_funcs = &dce4_hdmi_funcs;
238 rdev->audio.dp_funcs = &dce4_dp_funcs;
a85d682a 239 } else if (ASIC_IS_DCE32(rdev)) {
1a626b68 240 rdev->audio.funcs = &dce32_funcs;
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241 rdev->audio.hdmi_funcs = &dce32_hdmi_funcs;
242 rdev->audio.dp_funcs = &dce32_dp_funcs;
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243 } else {
244 rdev->audio.funcs = &r600_funcs;
245 rdev->audio.hdmi_funcs = &r600_hdmi_funcs;
246 rdev->audio.dp_funcs = 0;
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247 }
248}
249
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250static int radeon_audio_chipset_supported(struct radeon_device *rdev)
251{
252 return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev);
253}
254
255int radeon_audio_init(struct radeon_device *rdev)
256{
257 int i;
258
259 if (!radeon_audio || !radeon_audio_chipset_supported(rdev))
260 return 0;
261
262 rdev->audio.enabled = true;
263
264 if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */
265 rdev->audio.num_pins = 3;
266 else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */
267 rdev->audio.num_pins = 7;
268 else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */
269 rdev->audio.num_pins = 7;
270 else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */
271 rdev->audio.num_pins = 2;
272 else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */
273 rdev->audio.num_pins = 6;
274 else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */
275 rdev->audio.num_pins = 6;
276 else
277 rdev->audio.num_pins = 1;
278
279 for (i = 0; i < rdev->audio.num_pins; i++) {
280 rdev->audio.pin[i].channels = -1;
281 rdev->audio.pin[i].rate = -1;
282 rdev->audio.pin[i].bits_per_sample = -1;
283 rdev->audio.pin[i].status_bits = 0;
284 rdev->audio.pin[i].category_code = 0;
285 rdev->audio.pin[i].connected = false;
286 rdev->audio.pin[i].offset = pin_offsets[i];
287 rdev->audio.pin[i].id = i;
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288 }
289
290 radeon_audio_interface_init(rdev);
291
292 /* disable audio. it will be set up later */
293 for (i = 0; i < rdev->audio.num_pins; i++)
8bf59820 294 radeon_audio_enable(rdev, &rdev->audio.pin[i], false);
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295
296 return 0;
297}
298
299void radeon_audio_detect(struct drm_connector *connector,
300 enum drm_connector_status status)
301{
302 if (!connector || !connector->encoder)
303 return;
304
305 if (status == connector_status_connected) {
306 int sink_type;
307 struct radeon_device *rdev = connector->encoder->dev->dev_private;
308 struct radeon_connector *radeon_connector;
309 struct radeon_encoder *radeon_encoder =
310 to_radeon_encoder(connector->encoder);
311
312 if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) {
313 radeon_encoder->audio = 0;
314 return;
315 }
316
317 radeon_connector = to_radeon_connector(connector);
318 sink_type = radeon_dp_getsinktype(radeon_connector);
319
320 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
321 sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
322 radeon_encoder->audio = rdev->audio.dp_funcs;
323 else
324 radeon_encoder->audio = rdev->audio.hdmi_funcs;
325 /* TODO: set up the sads, etc. and set the audio enable_mask */
326 } else {
327 /* TODO: reset the audio enable_mask */
bfc1f97d 328 }
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329}
330
331u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
332{
333 if (rdev->audio.funcs->endpoint_rreg)
334 return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);
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335
336 return 0;
337}
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338
339void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset,
340 u32 reg, u32 v)
341{
342 if (rdev->audio.funcs->endpoint_wreg)
343 rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);
344}
070a2e63 345
6e72376d 346static void radeon_audio_write_sad_regs(struct drm_encoder *encoder)
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347{
348 struct radeon_encoder *radeon_encoder;
349 struct drm_connector *connector;
350 struct radeon_connector *radeon_connector = NULL;
351 struct cea_sad *sads;
352 int sad_count;
353
354 list_for_each_entry(connector,
355 &encoder->dev->mode_config.connector_list, head) {
356 if (connector->encoder == encoder) {
357 radeon_connector = to_radeon_connector(connector);
358 break;
359 }
360 }
361
362 if (!radeon_connector) {
363 DRM_ERROR("Couldn't find encoder's connector\n");
364 return;
365 }
366
367 sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads);
368 if (sad_count <= 0) {
369 DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
370 return;
371 }
372 BUG_ON(!sads);
373
374 radeon_encoder = to_radeon_encoder(encoder);
375
376 if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs)
377 radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count);
378
379 kfree(sads);
380}
00a9d4bc 381
6e72376d 382static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder)
00a9d4bc
SG
383{
384 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
385 struct drm_connector *connector;
386 struct radeon_connector *radeon_connector = NULL;
387 u8 *sadb = NULL;
388 int sad_count;
389
390 list_for_each_entry(connector,
391 &encoder->dev->mode_config.connector_list, head) {
392 if (connector->encoder == encoder) {
393 radeon_connector = to_radeon_connector(connector);
394 break;
395 }
396 }
397
398 if (!radeon_connector) {
399 DRM_ERROR("Couldn't find encoder's connector\n");
400 return;
401 }
402
403 sad_count = drm_edid_to_speaker_allocation(
404 radeon_connector_edid(connector), &sadb);
405 if (sad_count < 0) {
406 DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n",
407 sad_count);
408 sad_count = 0;
409 }
410
411 if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation)
412 radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count);
413
414 kfree(sadb);
415}
87654f87 416
6e72376d 417static void radeon_audio_write_latency_fields(struct drm_encoder *encoder,
87654f87
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418 struct drm_display_mode *mode)
419{
420 struct radeon_encoder *radeon_encoder;
421 struct drm_connector *connector;
422 struct radeon_connector *radeon_connector = 0;
423
424 list_for_each_entry(connector,
425 &encoder->dev->mode_config.connector_list, head) {
426 if (connector->encoder == encoder) {
427 radeon_connector = to_radeon_connector(connector);
428 break;
429 }
430 }
431
432 if (!radeon_connector) {
433 DRM_ERROR("Couldn't find encoder's connector\n");
434 return;
435 }
436
437 radeon_encoder = to_radeon_encoder(encoder);
438
439 if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields)
440 radeon_encoder->audio->write_latency_fields(encoder, connector, mode);
441}
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442
443struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder)
444{
445 struct radeon_device *rdev = encoder->dev->dev_private;
446 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
447
448 if (radeon_encoder->audio && radeon_encoder->audio->get_pin)
449 return radeon_encoder->audio->get_pin(rdev);
450
451 return NULL;
452}
88252d77 453
6e72376d 454static void radeon_audio_select_pin(struct drm_encoder *encoder)
88252d77
SG
455{
456 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
457
458 if (radeon_encoder->audio && radeon_encoder->audio->select_pin)
459 radeon_encoder->audio->select_pin(encoder);
460}
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461
462void radeon_audio_enable(struct radeon_device *rdev,
463 struct r600_audio_pin *pin, u8 enable_mask)
464{
465 if (rdev->audio.funcs->enable)
466 rdev->audio.funcs->enable(rdev, pin, enable_mask);
467}
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468
469void radeon_audio_fini(struct radeon_device *rdev)
470{
471 int i;
472
473 if (!rdev->audio.enabled)
474 return;
475
476 for (i = 0; i < rdev->audio.num_pins; i++)
477 radeon_audio_enable(rdev, &rdev->audio.pin[i], false);
478
479 rdev->audio.enabled = false;
480}
a85d682a 481
6e72376d 482static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock)
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SG
483{
484 struct radeon_device *rdev = encoder->dev->dev_private;
485 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
486 struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc);
487
488 if (radeon_encoder->audio && radeon_encoder->audio->set_dto)
489 radeon_encoder->audio->set_dto(rdev, crtc, clock);
490}
96ea7afb 491
6e72376d 492static int radeon_audio_set_avi_packet(struct drm_encoder *encoder,
baa7d8e4 493 struct drm_display_mode *mode)
96ea7afb
SG
494{
495 struct radeon_device *rdev = encoder->dev->dev_private;
496 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
497 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
baa7d8e4
SG
498 u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
499 struct hdmi_avi_infoframe frame;
500 int err;
501
502 err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode);
503 if (err < 0) {
504 DRM_ERROR("failed to setup AVI infoframe: %d\n", err);
505 return err;
506 }
507
508 err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer));
509 if (err < 0) {
510 DRM_ERROR("failed to pack AVI infoframe: %d\n", err);
511 return err;
512 }
513
514 if (dig && dig->afmt &&
515 radeon_encoder->audio && radeon_encoder->audio->set_avi_packet)
516 radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset,
517 buffer, sizeof(buffer));
96ea7afb 518
baa7d8e4 519 return 0;
96ea7afb 520}
64424d6e
SG
521
522/*
523 * calculate CTS and N values if they are not found in the table
524 */
525static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq)
526{
527 int n, cts;
528 unsigned long div, mul;
529
530 /* Safe, but overly large values */
531 n = 128 * freq;
532 cts = clock * 1000;
533
534 /* Smallest valid fraction */
535 div = gcd(n, cts);
536
537 n /= div;
538 cts /= div;
539
540 /*
541 * The optimal N is 128*freq/1000. Calculate the closest larger
542 * value that doesn't truncate any bits.
543 */
544 mul = ((128*freq/1000) + (n-1))/n;
545
546 n *= mul;
547 cts *= mul;
548
549 /* Check that we are in spec (not always possible) */
550 if (n < (128*freq/1500))
551 printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n");
552 if (n > (128*freq/300))
553 printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n");
554
555 *N = n;
556 *CTS = cts;
557
558 DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n",
559 *N, *CTS, freq);
560}
561
562static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock)
563{
564 static struct radeon_hdmi_acr res;
565 u8 i;
566
567 static const struct radeon_hdmi_acr hdmi_predefined_acr[] = {
568 /* 32kHz 44.1kHz 48kHz */
569 /* Clock N CTS N CTS N CTS */
570 { 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */
571 { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */
572 { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */
573 { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */
574 { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */
575 { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */
576 { 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */
577 { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */
578 { 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */
579 { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */
580 };
581
582 /* Precalculated values for common clocks */
583 for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++)
584 if (hdmi_predefined_acr[i].clock == clock)
585 return &hdmi_predefined_acr[i];
586
587 /* And odd clocks get manually calculated */
588 radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);
589 radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100);
590 radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000);
591
592 return &res;
593}
594
595/*
596 * update the N and CTS parameters for a given pixel clock rate
597 */
6e72376d 598static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock)
64424d6e
SG
599{
600 const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock);
601 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
602 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
603
604 if (!dig || !dig->afmt)
605 return;
606
607 if (radeon_encoder->audio && radeon_encoder->audio->update_acr)
608 radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr);
609}
930a9785 610
6e72376d 611static void radeon_audio_set_vbi_packet(struct drm_encoder *encoder)
930a9785
AD
612{
613 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
614 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
615
616 if (!dig || !dig->afmt)
617 return;
618
619 if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet)
620 radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset);
621}
be273e58 622
6e72376d 623static void radeon_hdmi_set_color_depth(struct drm_encoder *encoder)
be273e58
SG
624{
625 int bpc = 8;
626 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
627 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
628
629 if (!dig || !dig->afmt)
630 return;
631
632 if (encoder->crtc) {
633 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
634 bpc = radeon_crtc->bpc;
635 }
636
637 if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth)
638 radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc);
639}
1852c9a0 640
6e72376d 641static void radeon_audio_set_audio_packet(struct drm_encoder *encoder)
1852c9a0
SG
642{
643 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
644 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
645
646 if (!dig || !dig->afmt)
647 return;
648
649 if (radeon_encoder->audio && radeon_encoder->audio->set_audio_packet)
650 radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset);
651}
3be2e7d0 652
6e72376d 653static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute)
3be2e7d0
SG
654{
655 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
656 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
657
658 if (!dig || !dig->afmt)
659 return;
660
661 if (radeon_encoder->audio && radeon_encoder->audio->set_mute)
662 radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute);
663}
6e72376d
SG
664
665/*
666 * update the info frames with the data from the current display mode
667 */
668static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
669 struct drm_display_mode *mode)
670{
671 struct radeon_device *rdev = encoder->dev->dev_private;
672 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
673 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
674
675 if (!dig || !dig->afmt)
676 return;
677
678 /* disable audio prior to setting up hw */
679 dig->afmt->pin = radeon_audio_get_pin(encoder);
680 radeon_audio_enable(rdev, dig->afmt->pin, 0);
681
682 radeon_audio_set_dto(encoder, mode->clock);
683 radeon_audio_set_vbi_packet(encoder);
684 radeon_hdmi_set_color_depth(encoder);
685 radeon_audio_set_mute(encoder, false);
686 radeon_audio_update_acr(encoder, mode->clock);
687 radeon_audio_write_speaker_allocation(encoder);
688 radeon_audio_set_audio_packet(encoder);
689 radeon_audio_select_pin(encoder);
690 radeon_audio_write_sad_regs(encoder);
691 radeon_audio_write_latency_fields(encoder, mode);
692
693 if (radeon_audio_set_avi_packet(encoder, mode) < 0)
694 return;
695
696 /* enable audio after to setting up hw */
697 radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
698}
699
700void radeon_audio_mode_set(struct drm_encoder *encoder,
701 struct drm_display_mode *mode)
702{
703 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
704
705 if (radeon_encoder->audio && radeon_encoder->audio->mode_set)
706 radeon_encoder->audio->mode_set(encoder, mode);
707}
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