[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_benchmark.c

/*
 * Copyright 2009 Jerome Glisse.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Jerome Glisse
 */
#include <drm/drmP.h>
#include <drm/radeon_drm.h>
#include "radeon_reg.h"
#include "radeon.h"

#define RADEON_BENCHMARK_COPY_BLIT 1
#define RADEON_BENCHMARK_COPY_DMA  0

#define RADEON_BENCHMARK_ITERATIONS 1024
#define RADEON_BENCHMARK_COMMON_MODES_N 17

static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size,
				    uint64_t saddr, uint64_t daddr,
				    int flag, int n)
{
	unsigned long start_jiffies;
	unsigned long end_jiffies;
	struct radeon_fence *fence = NULL;
	int i, r;

	start_jiffies = jiffies;
	for (i = 0; i < n; i++) {
		switch (flag) {
		case RADEON_BENCHMARK_COPY_DMA:
			fence = radeon_copy_dma(rdev, saddr, daddr,
						size / RADEON_GPU_PAGE_SIZE,
						NULL);
			break;
		case RADEON_BENCHMARK_COPY_BLIT:
			fence = radeon_copy_blit(rdev, saddr, daddr,
						 size / RADEON_GPU_PAGE_SIZE,
						 NULL);
			break;
		default:
			DRM_ERROR("Unknown copy method\n");
			return -EINVAL;
		}
		if (IS_ERR(fence))
			return PTR_ERR(fence);

		r = radeon_fence_wait(fence, false);
		radeon_fence_unref(&fence);
		if (r)
			return r;
	}
	end_jiffies = jiffies;
	return jiffies_to_msecs(end_jiffies - start_jiffies);
}


static void radeon_benchmark_log_results(int n, unsigned size,
					 unsigned int time,
					 unsigned sdomain, unsigned ddomain,
					 char *kind)
{
	unsigned int throughput = (n * (size >> 10)) / time;
	DRM_INFO("radeon: %s %u bo moves of %u kB from"
		 " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n",
		 kind, n, size >> 10, sdomain, ddomain, time,
		 throughput * 8, throughput);
}

static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size,
				  unsigned sdomain, unsigned ddomain)
{
	struct radeon_bo *dobj = NULL;
	struct radeon_bo *sobj = NULL;
	uint64_t saddr, daddr;
	int r, n;
	int time;

	n = RADEON_BENCHMARK_ITERATIONS;
	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, 0, NULL, NULL, &sobj);
	if (r) {
		goto out_cleanup;
	}
	r = radeon_bo_reserve(sobj, false);
	if (unlikely(r != 0))
		goto out_cleanup;
	r = radeon_bo_pin(sobj, sdomain, &saddr);
	radeon_bo_unreserve(sobj);
	if (r) {
		goto out_cleanup;
	}
	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, 0, NULL, NULL, &dobj);
	if (r) {
		goto out_cleanup;
	}
	r = radeon_bo_reserve(dobj, false);
	if (unlikely(r != 0))
		goto out_cleanup;
	r = radeon_bo_pin(dobj, ddomain, &daddr);
	radeon_bo_unreserve(dobj);
	if (r) {
		goto out_cleanup;
	}

	if (rdev->asic->copy.dma) {
		time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
						RADEON_BENCHMARK_COPY_DMA, n);
		if (time < 0)
			goto out_cleanup;
		if (time > 0)
			radeon_benchmark_log_results(n, size, time,
						     sdomain, ddomain, "dma");
	}

	if (rdev->asic->copy.blit) {
		time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
						RADEON_BENCHMARK_COPY_BLIT, n);
		if (time < 0)
			goto out_cleanup;
		if (time > 0)
			radeon_benchmark_log_results(n, size, time,
						     sdomain, ddomain, "blit");
	}

out_cleanup:
	if (sobj) {
		r = radeon_bo_reserve(sobj, false);
		if (likely(r == 0)) {
			radeon_bo_unpin(sobj);
			radeon_bo_unreserve(sobj);
		}
		radeon_bo_unref(&sobj);
	}
	if (dobj) {
		r = radeon_bo_reserve(dobj, false);
		if (likely(r == 0)) {
			radeon_bo_unpin(dobj);
			radeon_bo_unreserve(dobj);
		}
		radeon_bo_unref(&dobj);
	}

	if (r) {
		DRM_ERROR("Error while benchmarking BO move.\n");
	}
}

void radeon_benchmark(struct radeon_device *rdev, int test_number)
{
	int i;
	int common_modes[RADEON_BENCHMARK_COMMON_MODES_N] = {
		640 * 480 * 4,
		720 * 480 * 4,
		800 * 600 * 4,
		848 * 480 * 4,
		1024 * 768 * 4,
		1152 * 768 * 4,
		1280 * 720 * 4,
		1280 * 800 * 4,
		1280 * 854 * 4,
		1280 * 960 * 4,
		1280 * 1024 * 4,
		1440 * 900 * 4,
		1400 * 1050 * 4,
		1680 * 1050 * 4,
		1600 * 1200 * 4,
		1920 * 1080 * 4,
		1920 * 1200 * 4
	};

	switch (test_number) {
	case 1:
		/* simple test, VRAM to GTT and GTT to VRAM */
		radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_GTT,
				      RADEON_GEM_DOMAIN_VRAM);
		radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
				      RADEON_GEM_DOMAIN_GTT);
		break;
	case 2:
		/* simple test, VRAM to VRAM */
		radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
				      RADEON_GEM_DOMAIN_VRAM);
		break;
	case 3:
		/* GTT to VRAM, buffer size sweep, powers of 2 */
		for (i = 1; i <= 16384; i <<= 1)
			radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
					      RADEON_GEM_DOMAIN_GTT,
					      RADEON_GEM_DOMAIN_VRAM);
		break;
	case 4:
		/* VRAM to GTT, buffer size sweep, powers of 2 */
		for (i = 1; i <= 16384; i <<= 1)
			radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
					      RADEON_GEM_DOMAIN_VRAM,
					      RADEON_GEM_DOMAIN_GTT);
		break;
	case 5:
		/* VRAM to VRAM, buffer size sweep, powers of 2 */
		for (i = 1; i <= 16384; i <<= 1)
			radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
					      RADEON_GEM_DOMAIN_VRAM,
					      RADEON_GEM_DOMAIN_VRAM);
		break;
	case 6:
		/* GTT to VRAM, buffer size sweep, common modes */
		for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
			radeon_benchmark_move(rdev, common_modes[i],
					      RADEON_GEM_DOMAIN_GTT,
					      RADEON_GEM_DOMAIN_VRAM);
		break;
	case 7:
		/* VRAM to GTT, buffer size sweep, common modes */
		for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
			radeon_benchmark_move(rdev, common_modes[i],
					      RADEON_GEM_DOMAIN_VRAM,
					      RADEON_GEM_DOMAIN_GTT);
		break;
	case 8:
		/* VRAM to VRAM, buffer size sweep, common modes */
		for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
			radeon_benchmark_move(rdev, common_modes[i],
					      RADEON_GEM_DOMAIN_VRAM,
					      RADEON_GEM_DOMAIN_VRAM);
		break;

	default:
		DRM_ERROR("Unknown benchmark\n");
	}
}
Commit	Line	Data
771fe6b9 JG	1	/*
	2	* Copyright 2009 Jerome Glisse.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: Jerome Glisse
	23	*/
	24	#include <drm/drmP.h>
	25	#include <drm/radeon_drm.h>
	26	#include "radeon_reg.h"
	27	#include "radeon.h"
	28
cc340515 IH	29	#define RADEON_BENCHMARK_COPY_BLIT 1
	30	#define RADEON_BENCHMARK_COPY_DMA 0
	31
	32	#define RADEON_BENCHMARK_ITERATIONS 1024
638dd7db	33	#define RADEON_BENCHMARK_COMMON_MODES_N 17
cc340515 IH	34
	35	static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size,
	36	uint64_t saddr, uint64_t daddr,
	37	int flag, int n)
	38	{
	39	unsigned long start_jiffies;
	40	unsigned long end_jiffies;
	41	struct radeon_fence *fence = NULL;
	42	int i, r;
	43
	44	start_jiffies = jiffies;
	45	for (i = 0; i < n; i++) {
cc340515 IH	46	switch (flag) {
cc340515 IH	47	case RADEON_BENCHMARK_COPY_DMA:
57d20a43 CK	48	fence = radeon_copy_dma(rdev, saddr, daddr,
	49	size / RADEON_GPU_PAGE_SIZE,
	50	NULL);
cc340515 IH	51	break;
cc340515 IH	52	case RADEON_BENCHMARK_COPY_BLIT:
57d20a43 CK	53	fence = radeon_copy_blit(rdev, saddr, daddr,
	54	size / RADEON_GPU_PAGE_SIZE,
	55	NULL);
cc340515 IH	56	break;
	57	default:
	58	DRM_ERROR("Unknown copy method\n");
57d20a43	59	return -EINVAL;
cc340515	60	}
57d20a43 CK	61	if (IS_ERR(fence))
	62	return PTR_ERR(fence);
	63
cc340515	64	r = radeon_fence_wait(fence, false);
cc340515	65	radeon_fence_unref(&fence);
57d20a43 CK	66	if (r)
57d20a43 CK	67	return r;
cc340515 IH	68	}
cc340515 IH	69	end_jiffies = jiffies;
57d20a43	70	return jiffies_to_msecs(end_jiffies - start_jiffies);
cc340515 IH	71	}
	72
	73
	74	static void radeon_benchmark_log_results(int n, unsigned size,
	75	unsigned int time,
	76	unsigned sdomain, unsigned ddomain,
	77	char *kind)
	78	{
	79	unsigned int throughput = (n * (size >> 10)) / time;
	80	DRM_INFO("radeon: %s %u bo moves of %u kB from"
	81	" %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n",
	82	kind, n, size >> 10, sdomain, ddomain, time,
	83	throughput * 8, throughput);
	84	}
	85
	86	static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size,
	87	unsigned sdomain, unsigned ddomain)
771fe6b9	88	{
4c788679 JG	89	struct radeon_bo *dobj = NULL;
4c788679 JG	90	struct radeon_bo *sobj = NULL;
771fe6b9	91	uint64_t saddr, daddr;
cc340515	92	int r, n;
bfba1658	93	int time;
771fe6b9	94
cc340515	95	n = RADEON_BENCHMARK_ITERATIONS;
831b6966	96	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, 0, NULL, NULL, &sobj);
771fe6b9 JG	97	if (r) {
	98	goto out_cleanup;
	99	}
4c788679 JG	100	r = radeon_bo_reserve(sobj, false);
	101	if (unlikely(r != 0))
	102	goto out_cleanup;
	103	r = radeon_bo_pin(sobj, sdomain, &saddr);
	104	radeon_bo_unreserve(sobj);
771fe6b9 JG	105	if (r) {
	106	goto out_cleanup;
	107	}
831b6966	108	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, 0, NULL, NULL, &dobj);
771fe6b9 JG	109	if (r) {
	110	goto out_cleanup;
	111	}
4c788679 JG	112	r = radeon_bo_reserve(dobj, false);
	113	if (unlikely(r != 0))
	114	goto out_cleanup;
	115	r = radeon_bo_pin(dobj, ddomain, &daddr);
	116	radeon_bo_unreserve(dobj);
771fe6b9 JG	117	if (r) {
	118	goto out_cleanup;
	119	}
c60a284c	120
271e53dc	121	if (rdev->asic->copy.dma) {
cc340515 IH	122	time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
	123	RADEON_BENCHMARK_COPY_DMA, n);
	124	if (time < 0)
771fe6b9	125	goto out_cleanup;
cc340515 IH	126	if (time > 0)
	127	radeon_benchmark_log_results(n, size, time,
	128	sdomain, ddomain, "dma");
771fe6b9	129	}
cc340515	130
fa8d387d AD	131	if (rdev->asic->copy.blit) {
	132	time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
	133	RADEON_BENCHMARK_COPY_BLIT, n);
	134	if (time < 0)
	135	goto out_cleanup;
	136	if (time > 0)
	137	radeon_benchmark_log_results(n, size, time,
	138	sdomain, ddomain, "blit");
	139	}
cc340515	140
771fe6b9 JG	141	out_cleanup:
771fe6b9 JG	142	if (sobj) {
4c788679 JG	143	r = radeon_bo_reserve(sobj, false);
	144	if (likely(r == 0)) {
	145	radeon_bo_unpin(sobj);
	146	radeon_bo_unreserve(sobj);
	147	}
	148	radeon_bo_unref(&sobj);
771fe6b9 JG	149	}
771fe6b9 JG	150	if (dobj) {
4c788679 JG	151	r = radeon_bo_reserve(dobj, false);
	152	if (likely(r == 0)) {
	153	radeon_bo_unpin(dobj);
	154	radeon_bo_unreserve(dobj);
	155	}
	156	radeon_bo_unref(&dobj);
771fe6b9	157	}
cc340515	158
771fe6b9	159	if (r) {
cc340515	160	DRM_ERROR("Error while benchmarking BO move.\n");
771fe6b9 JG	161	}
	162	}
	163
638dd7db	164	void radeon_benchmark(struct radeon_device *rdev, int test_number)
771fe6b9	165	{
638dd7db IH	166	int i;
	167	int common_modes[RADEON_BENCHMARK_COMMON_MODES_N] = {
	168	640 * 480 * 4,
	169	720 * 480 * 4,
	170	800 * 600 * 4,
	171	848 * 480 * 4,
	172	1024 * 768 * 4,
	173	1152 * 768 * 4,
	174	1280 * 720 * 4,
	175	1280 * 800 * 4,
	176	1280 * 854 * 4,
	177	1280 * 960 * 4,
	178	1280 * 1024 * 4,
	179	1440 * 900 * 4,
	180	1400 * 1050 * 4,
	181	1680 * 1050 * 4,
	182	1600 * 1200 * 4,
	183	1920 * 1080 * 4,
	184	1920 * 1200 * 4
	185	};
	186
	187	switch (test_number) {
	188	case 1:
	189	/* simple test, VRAM to GTT and GTT to VRAM */
	190	radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_GTT,
	191	RADEON_GEM_DOMAIN_VRAM);
	192	radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
	193	RADEON_GEM_DOMAIN_GTT);
	194	break;
	195	case 2:
	196	/* simple test, VRAM to VRAM */
	197	radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
	198	RADEON_GEM_DOMAIN_VRAM);
	199	break;
	200	case 3:
	201	/* GTT to VRAM, buffer size sweep, powers of 2 */
6d75e83e IH	202	for (i = 1; i <= 16384; i <<= 1)
6d75e83e IH	203	radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
638dd7db IH	204	RADEON_GEM_DOMAIN_GTT,
	205	RADEON_GEM_DOMAIN_VRAM);
	206	break;
	207	case 4:
	208	/* VRAM to GTT, buffer size sweep, powers of 2 */
6d75e83e IH	209	for (i = 1; i <= 16384; i <<= 1)
6d75e83e IH	210	radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
638dd7db IH	211	RADEON_GEM_DOMAIN_VRAM,
	212	RADEON_GEM_DOMAIN_GTT);
	213	break;
	214	case 5:
	215	/* VRAM to VRAM, buffer size sweep, powers of 2 */
6d75e83e IH	216	for (i = 1; i <= 16384; i <<= 1)
6d75e83e IH	217	radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
638dd7db IH	218	RADEON_GEM_DOMAIN_VRAM,
	219	RADEON_GEM_DOMAIN_VRAM);
	220	break;
	221	case 6:
	222	/* GTT to VRAM, buffer size sweep, common modes */
d7d0a75c	223	for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
638dd7db IH	224	radeon_benchmark_move(rdev, common_modes[i],
	225	RADEON_GEM_DOMAIN_GTT,
	226	RADEON_GEM_DOMAIN_VRAM);
	227	break;
	228	case 7:
	229	/* VRAM to GTT, buffer size sweep, common modes */
d7d0a75c	230	for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
638dd7db IH	231	radeon_benchmark_move(rdev, common_modes[i],
	232	RADEON_GEM_DOMAIN_VRAM,
	233	RADEON_GEM_DOMAIN_GTT);
	234	break;
	235	case 8:
	236	/* VRAM to VRAM, buffer size sweep, common modes */
d7d0a75c	237	for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
638dd7db IH	238	radeon_benchmark_move(rdev, common_modes[i],
	239	RADEON_GEM_DOMAIN_VRAM,
	240	RADEON_GEM_DOMAIN_VRAM);
	241	break;
	242
	243	default:
	244	DRM_ERROR("Unknown benchmark\n");
	245	}
771fe6b9	246	}