Commit | Line | Data |
---|---|---|
771fe6b9 JG |
1 | /* |
2 | * Copyright 2007-8 Advanced Micro Devices, Inc. | |
3 | * Copyright 2008 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice shall be included in | |
13 | * all copies or substantial portions of the Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
21 | * OTHER DEALINGS IN THE SOFTWARE. | |
22 | * | |
23 | * Authors: Dave Airlie | |
24 | * Alex Deucher | |
25 | */ | |
760285e7 DH |
26 | #include <drm/drmP.h> |
27 | #include <drm/drm_edid.h> | |
28 | #include <drm/drm_crtc_helper.h> | |
29 | #include <drm/drm_fb_helper.h> | |
30 | #include <drm/radeon_drm.h> | |
771fe6b9 | 31 | #include "radeon.h" |
923f6848 | 32 | #include "atom.h" |
771fe6b9 JG |
33 | |
34 | extern void | |
35 | radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |
36 | struct drm_encoder *encoder, | |
37 | bool connected); | |
38 | extern void | |
39 | radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |
40 | struct drm_encoder *encoder, | |
41 | bool connected); | |
42 | ||
d4877cf2 AD |
43 | void radeon_connector_hotplug(struct drm_connector *connector) |
44 | { | |
45 | struct drm_device *dev = connector->dev; | |
46 | struct radeon_device *rdev = dev->dev_private; | |
47 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
48 | ||
cbac9543 AD |
49 | /* bail if the connector does not have hpd pin, e.g., |
50 | * VGA, TV, etc. | |
51 | */ | |
52 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) | |
53 | return; | |
54 | ||
1e85e1d0 | 55 | radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); |
d4877cf2 | 56 | |
73104b5c AD |
57 | /* if the connector is already off, don't turn it back on */ |
58 | if (connector->dpms != DRM_MODE_DPMS_ON) | |
59 | return; | |
60 | ||
d5811e87 AD |
61 | /* just deal with DP (not eDP) here. */ |
62 | if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { | |
266dcba5 JG |
63 | struct radeon_connector_atom_dig *dig_connector = |
64 | radeon_connector->con_priv; | |
7c3ed0fd | 65 | |
266dcba5 JG |
66 | /* if existing sink type was not DP no need to retrain */ |
67 | if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT) | |
68 | return; | |
69 | ||
70 | /* first get sink type as it may be reset after (un)plug */ | |
71 | dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); | |
72 | /* don't do anything if sink is not display port, i.e., | |
73 | * passive dp->(dvi|hdmi) adaptor | |
74 | */ | |
75 | if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { | |
76 | int saved_dpms = connector->dpms; | |
77 | /* Only turn off the display if it's physically disconnected */ | |
ca2ccde5 | 78 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { |
266dcba5 | 79 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF); |
ca2ccde5 JG |
80 | } else if (radeon_dp_needs_link_train(radeon_connector)) { |
81 | /* set it to OFF so that drm_helper_connector_dpms() | |
82 | * won't return immediately since the current state | |
83 | * is ON at this point. | |
84 | */ | |
85 | connector->dpms = DRM_MODE_DPMS_OFF; | |
266dcba5 | 86 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON); |
ca2ccde5 | 87 | } |
266dcba5 JG |
88 | connector->dpms = saved_dpms; |
89 | } | |
d4877cf2 | 90 | } |
d4877cf2 AD |
91 | } |
92 | ||
445282db DA |
93 | static void radeon_property_change_mode(struct drm_encoder *encoder) |
94 | { | |
95 | struct drm_crtc *crtc = encoder->crtc; | |
96 | ||
97 | if (crtc && crtc->enabled) { | |
98 | drm_crtc_helper_set_mode(crtc, &crtc->mode, | |
99 | crtc->x, crtc->y, crtc->fb); | |
100 | } | |
101 | } | |
eccea792 AD |
102 | |
103 | int radeon_get_monitor_bpc(struct drm_connector *connector) | |
104 | { | |
105 | struct drm_device *dev = connector->dev; | |
106 | struct radeon_device *rdev = dev->dev_private; | |
107 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
108 | struct radeon_connector_atom_dig *dig_connector; | |
109 | int bpc = 8; | |
110 | ||
111 | switch (connector->connector_type) { | |
112 | case DRM_MODE_CONNECTOR_DVII: | |
113 | case DRM_MODE_CONNECTOR_HDMIB: | |
114 | if (radeon_connector->use_digital) { | |
115 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) { | |
116 | if (connector->display_info.bpc) | |
117 | bpc = connector->display_info.bpc; | |
118 | } | |
119 | } | |
120 | break; | |
121 | case DRM_MODE_CONNECTOR_DVID: | |
122 | case DRM_MODE_CONNECTOR_HDMIA: | |
123 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) { | |
124 | if (connector->display_info.bpc) | |
125 | bpc = connector->display_info.bpc; | |
126 | } | |
127 | break; | |
128 | case DRM_MODE_CONNECTOR_DisplayPort: | |
129 | dig_connector = radeon_connector->con_priv; | |
130 | if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | |
131 | (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) || | |
132 | drm_detect_hdmi_monitor(radeon_connector->edid)) { | |
133 | if (connector->display_info.bpc) | |
134 | bpc = connector->display_info.bpc; | |
135 | } | |
136 | break; | |
137 | case DRM_MODE_CONNECTOR_eDP: | |
138 | case DRM_MODE_CONNECTOR_LVDS: | |
139 | if (connector->display_info.bpc) | |
140 | bpc = connector->display_info.bpc; | |
141 | else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) { | |
142 | struct drm_connector_helper_funcs *connector_funcs = | |
143 | connector->helper_private; | |
144 | struct drm_encoder *encoder = connector_funcs->best_encoder(connector); | |
145 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
146 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; | |
147 | ||
148 | if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR) | |
149 | bpc = 6; | |
150 | else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR) | |
151 | bpc = 8; | |
152 | } | |
153 | break; | |
154 | } | |
155 | return bpc; | |
156 | } | |
157 | ||
771fe6b9 JG |
158 | static void |
159 | radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status) | |
160 | { | |
161 | struct drm_device *dev = connector->dev; | |
162 | struct radeon_device *rdev = dev->dev_private; | |
163 | struct drm_encoder *best_encoder = NULL; | |
164 | struct drm_encoder *encoder = NULL; | |
165 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
166 | struct drm_mode_object *obj; | |
167 | bool connected; | |
168 | int i; | |
169 | ||
170 | best_encoder = connector_funcs->best_encoder(connector); | |
171 | ||
172 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
173 | if (connector->encoder_ids[i] == 0) | |
174 | break; | |
175 | ||
176 | obj = drm_mode_object_find(connector->dev, | |
177 | connector->encoder_ids[i], | |
178 | DRM_MODE_OBJECT_ENCODER); | |
179 | if (!obj) | |
180 | continue; | |
181 | ||
182 | encoder = obj_to_encoder(obj); | |
183 | ||
184 | if ((encoder == best_encoder) && (status == connector_status_connected)) | |
185 | connected = true; | |
186 | else | |
187 | connected = false; | |
188 | ||
189 | if (rdev->is_atom_bios) | |
190 | radeon_atombios_connected_scratch_regs(connector, encoder, connected); | |
191 | else | |
192 | radeon_combios_connected_scratch_regs(connector, encoder, connected); | |
193 | ||
194 | } | |
195 | } | |
196 | ||
1109ca09 | 197 | static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type) |
445282db DA |
198 | { |
199 | struct drm_mode_object *obj; | |
200 | struct drm_encoder *encoder; | |
201 | int i; | |
202 | ||
203 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
204 | if (connector->encoder_ids[i] == 0) | |
205 | break; | |
206 | ||
207 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
208 | if (!obj) | |
209 | continue; | |
210 | ||
211 | encoder = obj_to_encoder(obj); | |
212 | if (encoder->encoder_type == encoder_type) | |
213 | return encoder; | |
214 | } | |
215 | return NULL; | |
216 | } | |
217 | ||
1109ca09 | 218 | static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector) |
771fe6b9 JG |
219 | { |
220 | int enc_id = connector->encoder_ids[0]; | |
221 | struct drm_mode_object *obj; | |
222 | struct drm_encoder *encoder; | |
223 | ||
224 | /* pick the encoder ids */ | |
225 | if (enc_id) { | |
226 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
227 | if (!obj) | |
228 | return NULL; | |
229 | encoder = obj_to_encoder(obj); | |
230 | return encoder; | |
231 | } | |
232 | return NULL; | |
233 | } | |
234 | ||
4ce001ab DA |
235 | /* |
236 | * radeon_connector_analog_encoder_conflict_solve | |
237 | * - search for other connectors sharing this encoder | |
238 | * if priority is true, then set them disconnected if this is connected | |
239 | * if priority is false, set us disconnected if they are connected | |
240 | */ | |
241 | static enum drm_connector_status | |
242 | radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, | |
243 | struct drm_encoder *encoder, | |
244 | enum drm_connector_status current_status, | |
245 | bool priority) | |
246 | { | |
247 | struct drm_device *dev = connector->dev; | |
248 | struct drm_connector *conflict; | |
08d07511 | 249 | struct radeon_connector *radeon_conflict; |
4ce001ab DA |
250 | int i; |
251 | ||
252 | list_for_each_entry(conflict, &dev->mode_config.connector_list, head) { | |
253 | if (conflict == connector) | |
254 | continue; | |
255 | ||
08d07511 | 256 | radeon_conflict = to_radeon_connector(conflict); |
4ce001ab DA |
257 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { |
258 | if (conflict->encoder_ids[i] == 0) | |
259 | break; | |
260 | ||
261 | /* if the IDs match */ | |
262 | if (conflict->encoder_ids[i] == encoder->base.id) { | |
263 | if (conflict->status != connector_status_connected) | |
264 | continue; | |
08d07511 AD |
265 | |
266 | if (radeon_conflict->use_digital) | |
267 | continue; | |
4ce001ab DA |
268 | |
269 | if (priority == true) { | |
c5d46b4e AD |
270 | DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict)); |
271 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(connector)); | |
4ce001ab DA |
272 | conflict->status = connector_status_disconnected; |
273 | radeon_connector_update_scratch_regs(conflict, connector_status_disconnected); | |
274 | } else { | |
c5d46b4e AD |
275 | DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector)); |
276 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(conflict)); | |
4ce001ab DA |
277 | current_status = connector_status_disconnected; |
278 | } | |
279 | break; | |
280 | } | |
281 | } | |
282 | } | |
283 | return current_status; | |
284 | ||
285 | } | |
286 | ||
771fe6b9 JG |
287 | static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder) |
288 | { | |
289 | struct drm_device *dev = encoder->dev; | |
290 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
291 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 292 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
771fe6b9 | 293 | |
de2103e4 AD |
294 | if (native_mode->hdisplay != 0 && |
295 | native_mode->vdisplay != 0 && | |
296 | native_mode->clock != 0) { | |
fb06ca8f | 297 | mode = drm_mode_duplicate(dev, native_mode); |
771fe6b9 JG |
298 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; |
299 | drm_mode_set_name(mode); | |
300 | ||
d9fdaafb | 301 | DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name); |
d2efdf6d AD |
302 | } else if (native_mode->hdisplay != 0 && |
303 | native_mode->vdisplay != 0) { | |
304 | /* mac laptops without an edid */ | |
305 | /* Note that this is not necessarily the exact panel mode, | |
306 | * but an approximation based on the cvt formula. For these | |
307 | * systems we should ideally read the mode info out of the | |
308 | * registers or add a mode table, but this works and is much | |
309 | * simpler. | |
310 | */ | |
311 | mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); | |
312 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | |
d9fdaafb | 313 | DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name); |
771fe6b9 JG |
314 | } |
315 | return mode; | |
316 | } | |
317 | ||
923f6848 AD |
318 | static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector) |
319 | { | |
320 | struct drm_device *dev = encoder->dev; | |
321 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
322 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 323 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
923f6848 AD |
324 | int i; |
325 | struct mode_size { | |
326 | int w; | |
327 | int h; | |
328 | } common_modes[17] = { | |
329 | { 640, 480}, | |
330 | { 720, 480}, | |
331 | { 800, 600}, | |
332 | { 848, 480}, | |
333 | {1024, 768}, | |
334 | {1152, 768}, | |
335 | {1280, 720}, | |
336 | {1280, 800}, | |
337 | {1280, 854}, | |
338 | {1280, 960}, | |
339 | {1280, 1024}, | |
340 | {1440, 900}, | |
341 | {1400, 1050}, | |
342 | {1680, 1050}, | |
343 | {1600, 1200}, | |
344 | {1920, 1080}, | |
345 | {1920, 1200} | |
346 | }; | |
347 | ||
348 | for (i = 0; i < 17; i++) { | |
dfdd6467 AD |
349 | if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) { |
350 | if (common_modes[i].w > 1024 || | |
351 | common_modes[i].h > 768) | |
352 | continue; | |
353 | } | |
923f6848 | 354 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
de2103e4 AD |
355 | if (common_modes[i].w > native_mode->hdisplay || |
356 | common_modes[i].h > native_mode->vdisplay || | |
357 | (common_modes[i].w == native_mode->hdisplay && | |
358 | common_modes[i].h == native_mode->vdisplay)) | |
923f6848 AD |
359 | continue; |
360 | } | |
361 | if (common_modes[i].w < 320 || common_modes[i].h < 200) | |
362 | continue; | |
363 | ||
d50ba256 | 364 | mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false); |
923f6848 AD |
365 | drm_mode_probed_add(connector, mode); |
366 | } | |
367 | } | |
368 | ||
1109ca09 | 369 | static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property, |
771fe6b9 JG |
370 | uint64_t val) |
371 | { | |
445282db DA |
372 | struct drm_device *dev = connector->dev; |
373 | struct radeon_device *rdev = dev->dev_private; | |
374 | struct drm_encoder *encoder; | |
375 | struct radeon_encoder *radeon_encoder; | |
376 | ||
377 | if (property == rdev->mode_info.coherent_mode_property) { | |
378 | struct radeon_encoder_atom_dig *dig; | |
ce227c41 | 379 | bool new_coherent_mode; |
445282db DA |
380 | |
381 | /* need to find digital encoder on connector */ | |
382 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
383 | if (!encoder) | |
384 | return 0; | |
385 | ||
386 | radeon_encoder = to_radeon_encoder(encoder); | |
387 | ||
388 | if (!radeon_encoder->enc_priv) | |
389 | return 0; | |
390 | ||
391 | dig = radeon_encoder->enc_priv; | |
ce227c41 DA |
392 | new_coherent_mode = val ? true : false; |
393 | if (dig->coherent_mode != new_coherent_mode) { | |
394 | dig->coherent_mode = new_coherent_mode; | |
395 | radeon_property_change_mode(&radeon_encoder->base); | |
396 | } | |
445282db DA |
397 | } |
398 | ||
5b1714d3 AD |
399 | if (property == rdev->mode_info.underscan_property) { |
400 | /* need to find digital encoder on connector */ | |
401 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
402 | if (!encoder) | |
403 | return 0; | |
404 | ||
405 | radeon_encoder = to_radeon_encoder(encoder); | |
406 | ||
407 | if (radeon_encoder->underscan_type != val) { | |
408 | radeon_encoder->underscan_type = val; | |
409 | radeon_property_change_mode(&radeon_encoder->base); | |
410 | } | |
411 | } | |
412 | ||
5bccf5e3 MG |
413 | if (property == rdev->mode_info.underscan_hborder_property) { |
414 | /* need to find digital encoder on connector */ | |
415 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
416 | if (!encoder) | |
417 | return 0; | |
418 | ||
419 | radeon_encoder = to_radeon_encoder(encoder); | |
420 | ||
421 | if (radeon_encoder->underscan_hborder != val) { | |
422 | radeon_encoder->underscan_hborder = val; | |
423 | radeon_property_change_mode(&radeon_encoder->base); | |
424 | } | |
425 | } | |
426 | ||
427 | if (property == rdev->mode_info.underscan_vborder_property) { | |
428 | /* need to find digital encoder on connector */ | |
429 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
430 | if (!encoder) | |
431 | return 0; | |
432 | ||
433 | radeon_encoder = to_radeon_encoder(encoder); | |
434 | ||
435 | if (radeon_encoder->underscan_vborder != val) { | |
436 | radeon_encoder->underscan_vborder = val; | |
437 | radeon_property_change_mode(&radeon_encoder->base); | |
438 | } | |
439 | } | |
440 | ||
445282db DA |
441 | if (property == rdev->mode_info.tv_std_property) { |
442 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC); | |
443 | if (!encoder) { | |
444 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC); | |
445 | } | |
446 | ||
447 | if (!encoder) | |
448 | return 0; | |
449 | ||
450 | radeon_encoder = to_radeon_encoder(encoder); | |
451 | if (!radeon_encoder->enc_priv) | |
452 | return 0; | |
643acacf | 453 | if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) { |
445282db DA |
454 | struct radeon_encoder_atom_dac *dac_int; |
455 | dac_int = radeon_encoder->enc_priv; | |
456 | dac_int->tv_std = val; | |
457 | } else { | |
458 | struct radeon_encoder_tv_dac *dac_int; | |
459 | dac_int = radeon_encoder->enc_priv; | |
460 | dac_int->tv_std = val; | |
461 | } | |
462 | radeon_property_change_mode(&radeon_encoder->base); | |
463 | } | |
464 | ||
465 | if (property == rdev->mode_info.load_detect_property) { | |
466 | struct radeon_connector *radeon_connector = | |
467 | to_radeon_connector(connector); | |
468 | ||
469 | if (val == 0) | |
470 | radeon_connector->dac_load_detect = false; | |
471 | else | |
472 | radeon_connector->dac_load_detect = true; | |
473 | } | |
474 | ||
475 | if (property == rdev->mode_info.tmds_pll_property) { | |
476 | struct radeon_encoder_int_tmds *tmds = NULL; | |
477 | bool ret = false; | |
478 | /* need to find digital encoder on connector */ | |
479 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
480 | if (!encoder) | |
481 | return 0; | |
482 | ||
483 | radeon_encoder = to_radeon_encoder(encoder); | |
484 | ||
485 | tmds = radeon_encoder->enc_priv; | |
486 | if (!tmds) | |
487 | return 0; | |
488 | ||
489 | if (val == 0) { | |
490 | if (rdev->is_atom_bios) | |
491 | ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds); | |
492 | else | |
493 | ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds); | |
494 | } | |
495 | if (val == 1 || ret == false) { | |
496 | radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds); | |
497 | } | |
498 | radeon_property_change_mode(&radeon_encoder->base); | |
499 | } | |
500 | ||
771fe6b9 JG |
501 | return 0; |
502 | } | |
503 | ||
8dfaa8a7 MD |
504 | static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder, |
505 | struct drm_connector *connector) | |
506 | { | |
507 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 508 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
13bb9430 MG |
509 | struct drm_display_mode *t, *mode; |
510 | ||
511 | /* If the EDID preferred mode doesn't match the native mode, use it */ | |
512 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { | |
513 | if (mode->type & DRM_MODE_TYPE_PREFERRED) { | |
514 | if (mode->hdisplay != native_mode->hdisplay || | |
515 | mode->vdisplay != native_mode->vdisplay) | |
516 | memcpy(native_mode, mode, sizeof(*mode)); | |
517 | } | |
518 | } | |
8dfaa8a7 MD |
519 | |
520 | /* Try to get native mode details from EDID if necessary */ | |
de2103e4 | 521 | if (!native_mode->clock) { |
8dfaa8a7 | 522 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { |
de2103e4 AD |
523 | if (mode->hdisplay == native_mode->hdisplay && |
524 | mode->vdisplay == native_mode->vdisplay) { | |
525 | *native_mode = *mode; | |
526 | drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); | |
c5d46b4e | 527 | DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n"); |
8dfaa8a7 MD |
528 | break; |
529 | } | |
530 | } | |
531 | } | |
13bb9430 | 532 | |
de2103e4 | 533 | if (!native_mode->clock) { |
c5d46b4e | 534 | DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n"); |
8dfaa8a7 MD |
535 | radeon_encoder->rmx_type = RMX_OFF; |
536 | } | |
537 | } | |
771fe6b9 JG |
538 | |
539 | static int radeon_lvds_get_modes(struct drm_connector *connector) | |
540 | { | |
541 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
542 | struct drm_encoder *encoder; | |
543 | int ret = 0; | |
544 | struct drm_display_mode *mode; | |
545 | ||
546 | if (radeon_connector->ddc_bus) { | |
547 | ret = radeon_ddc_get_modes(radeon_connector); | |
548 | if (ret > 0) { | |
7747b713 | 549 | encoder = radeon_best_single_encoder(connector); |
8dfaa8a7 MD |
550 | if (encoder) { |
551 | radeon_fixup_lvds_native_mode(encoder, connector); | |
7747b713 AD |
552 | /* add scaled modes */ |
553 | radeon_add_common_modes(encoder, connector); | |
8dfaa8a7 | 554 | } |
771fe6b9 JG |
555 | return ret; |
556 | } | |
557 | } | |
558 | ||
559 | encoder = radeon_best_single_encoder(connector); | |
560 | if (!encoder) | |
561 | return 0; | |
562 | ||
563 | /* we have no EDID modes */ | |
564 | mode = radeon_fp_native_mode(encoder); | |
565 | if (mode) { | |
566 | ret = 1; | |
567 | drm_mode_probed_add(connector, mode); | |
7a868e18 AD |
568 | /* add the width/height from vbios tables if available */ |
569 | connector->display_info.width_mm = mode->width_mm; | |
570 | connector->display_info.height_mm = mode->height_mm; | |
7747b713 AD |
571 | /* add scaled modes */ |
572 | radeon_add_common_modes(encoder, connector); | |
771fe6b9 | 573 | } |
923f6848 | 574 | |
771fe6b9 JG |
575 | return ret; |
576 | } | |
577 | ||
578 | static int radeon_lvds_mode_valid(struct drm_connector *connector, | |
579 | struct drm_display_mode *mode) | |
580 | { | |
a3fa6320 AD |
581 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
582 | ||
583 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
584 | return MODE_PANEL; | |
585 | ||
586 | if (encoder) { | |
587 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
588 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
589 | ||
590 | /* AVIVO hardware supports downscaling modes larger than the panel | |
591 | * to the panel size, but I'm not sure this is desirable. | |
592 | */ | |
593 | if ((mode->hdisplay > native_mode->hdisplay) || | |
594 | (mode->vdisplay > native_mode->vdisplay)) | |
595 | return MODE_PANEL; | |
596 | ||
597 | /* if scaling is disabled, block non-native modes */ | |
598 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
599 | if ((mode->hdisplay != native_mode->hdisplay) || | |
600 | (mode->vdisplay != native_mode->vdisplay)) | |
601 | return MODE_PANEL; | |
602 | } | |
603 | } | |
604 | ||
771fe6b9 JG |
605 | return MODE_OK; |
606 | } | |
607 | ||
7b334fcb | 608 | static enum drm_connector_status |
930a9e28 | 609 | radeon_lvds_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 610 | { |
0549a061 | 611 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
2ffb8429 | 612 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
0549a061 | 613 | enum drm_connector_status ret = connector_status_disconnected; |
2ffb8429 AD |
614 | |
615 | if (encoder) { | |
616 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 617 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
2ffb8429 AD |
618 | |
619 | /* check if panel is valid */ | |
de2103e4 | 620 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) |
2ffb8429 AD |
621 | ret = connector_status_connected; |
622 | ||
623 | } | |
0549a061 AD |
624 | |
625 | /* check for edid as well */ | |
0294cf4f AD |
626 | if (radeon_connector->edid) |
627 | ret = connector_status_connected; | |
628 | else { | |
629 | if (radeon_connector->ddc_bus) { | |
0294cf4f AD |
630 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
631 | &radeon_connector->ddc_bus->adapter); | |
0294cf4f AD |
632 | if (radeon_connector->edid) |
633 | ret = connector_status_connected; | |
634 | } | |
0549a061 | 635 | } |
771fe6b9 | 636 | /* check acpi lid status ??? */ |
2ffb8429 | 637 | |
771fe6b9 JG |
638 | radeon_connector_update_scratch_regs(connector, ret); |
639 | return ret; | |
640 | } | |
641 | ||
642 | static void radeon_connector_destroy(struct drm_connector *connector) | |
643 | { | |
644 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
645 | ||
0294cf4f AD |
646 | if (radeon_connector->edid) |
647 | kfree(radeon_connector->edid); | |
771fe6b9 JG |
648 | kfree(radeon_connector->con_priv); |
649 | drm_sysfs_connector_remove(connector); | |
650 | drm_connector_cleanup(connector); | |
651 | kfree(connector); | |
652 | } | |
653 | ||
445282db DA |
654 | static int radeon_lvds_set_property(struct drm_connector *connector, |
655 | struct drm_property *property, | |
656 | uint64_t value) | |
657 | { | |
658 | struct drm_device *dev = connector->dev; | |
659 | struct radeon_encoder *radeon_encoder; | |
660 | enum radeon_rmx_type rmx_type; | |
661 | ||
d9fdaafb | 662 | DRM_DEBUG_KMS("\n"); |
445282db DA |
663 | if (property != dev->mode_config.scaling_mode_property) |
664 | return 0; | |
665 | ||
666 | if (connector->encoder) | |
667 | radeon_encoder = to_radeon_encoder(connector->encoder); | |
668 | else { | |
669 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
670 | radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector)); | |
671 | } | |
672 | ||
673 | switch (value) { | |
674 | case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break; | |
675 | case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break; | |
676 | case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break; | |
677 | default: | |
678 | case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break; | |
679 | } | |
680 | if (radeon_encoder->rmx_type == rmx_type) | |
681 | return 0; | |
682 | ||
683 | radeon_encoder->rmx_type = rmx_type; | |
684 | ||
685 | radeon_property_change_mode(&radeon_encoder->base); | |
686 | return 0; | |
687 | } | |
688 | ||
689 | ||
1109ca09 | 690 | static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = { |
771fe6b9 JG |
691 | .get_modes = radeon_lvds_get_modes, |
692 | .mode_valid = radeon_lvds_mode_valid, | |
693 | .best_encoder = radeon_best_single_encoder, | |
694 | }; | |
695 | ||
1109ca09 | 696 | static const struct drm_connector_funcs radeon_lvds_connector_funcs = { |
771fe6b9 JG |
697 | .dpms = drm_helper_connector_dpms, |
698 | .detect = radeon_lvds_detect, | |
699 | .fill_modes = drm_helper_probe_single_connector_modes, | |
700 | .destroy = radeon_connector_destroy, | |
445282db | 701 | .set_property = radeon_lvds_set_property, |
771fe6b9 JG |
702 | }; |
703 | ||
704 | static int radeon_vga_get_modes(struct drm_connector *connector) | |
705 | { | |
706 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
707 | int ret; | |
708 | ||
709 | ret = radeon_ddc_get_modes(radeon_connector); | |
710 | ||
711 | return ret; | |
712 | } | |
713 | ||
714 | static int radeon_vga_mode_valid(struct drm_connector *connector, | |
715 | struct drm_display_mode *mode) | |
716 | { | |
b20f9bef AD |
717 | struct drm_device *dev = connector->dev; |
718 | struct radeon_device *rdev = dev->dev_private; | |
719 | ||
a3fa6320 | 720 | /* XXX check mode bandwidth */ |
b20f9bef AD |
721 | |
722 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | |
723 | return MODE_CLOCK_HIGH; | |
724 | ||
771fe6b9 JG |
725 | return MODE_OK; |
726 | } | |
727 | ||
7b334fcb | 728 | static enum drm_connector_status |
930a9e28 | 729 | radeon_vga_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 730 | { |
fafcf94e AD |
731 | struct drm_device *dev = connector->dev; |
732 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 JG |
733 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
734 | struct drm_encoder *encoder; | |
735 | struct drm_encoder_helper_funcs *encoder_funcs; | |
4b9d2a21 | 736 | bool dret = false; |
771fe6b9 JG |
737 | enum drm_connector_status ret = connector_status_disconnected; |
738 | ||
4ce001ab DA |
739 | encoder = radeon_best_single_encoder(connector); |
740 | if (!encoder) | |
741 | ret = connector_status_disconnected; | |
742 | ||
eb6b6d7c | 743 | if (radeon_connector->ddc_bus) |
0a9069d3 | 744 | dret = radeon_ddc_probe(radeon_connector, false); |
0294cf4f | 745 | if (dret) { |
d0d0a225 | 746 | radeon_connector->detected_by_load = false; |
0294cf4f AD |
747 | if (radeon_connector->edid) { |
748 | kfree(radeon_connector->edid); | |
749 | radeon_connector->edid = NULL; | |
750 | } | |
0294cf4f | 751 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
0294cf4f AD |
752 | |
753 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
754 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
755 | drm_get_connector_name(connector)); | |
756 | ret = connector_status_connected; | |
0294cf4f AD |
757 | } else { |
758 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
759 | ||
760 | /* some oems have boards with separate digital and analog connectors | |
761 | * with a shared ddc line (often vga + hdmi) | |
762 | */ | |
763 | if (radeon_connector->use_digital && radeon_connector->shared_ddc) { | |
764 | kfree(radeon_connector->edid); | |
765 | radeon_connector->edid = NULL; | |
766 | ret = connector_status_disconnected; | |
767 | } else | |
768 | ret = connector_status_connected; | |
769 | } | |
770 | } else { | |
c3cceedd DA |
771 | |
772 | /* if we aren't forcing don't do destructive polling */ | |
d0d0a225 AD |
773 | if (!force) { |
774 | /* only return the previous status if we last | |
775 | * detected a monitor via load. | |
776 | */ | |
777 | if (radeon_connector->detected_by_load) | |
778 | return connector->status; | |
779 | else | |
780 | return ret; | |
781 | } | |
c3cceedd | 782 | |
d8a7f792 | 783 | if (radeon_connector->dac_load_detect && encoder) { |
445282db DA |
784 | encoder_funcs = encoder->helper_private; |
785 | ret = encoder_funcs->detect(encoder, connector); | |
34076446 | 786 | if (ret != connector_status_disconnected) |
d0d0a225 | 787 | radeon_connector->detected_by_load = true; |
445282db | 788 | } |
771fe6b9 JG |
789 | } |
790 | ||
4ce001ab DA |
791 | if (ret == connector_status_connected) |
792 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
fafcf94e AD |
793 | |
794 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the | |
795 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
796 | * by other means, assume the CRT is connected and use that EDID. | |
797 | */ | |
798 | if ((!rdev->is_atom_bios) && | |
799 | (ret == connector_status_disconnected) && | |
800 | rdev->mode_info.bios_hardcoded_edid_size) { | |
801 | ret = connector_status_connected; | |
802 | } | |
803 | ||
771fe6b9 JG |
804 | radeon_connector_update_scratch_regs(connector, ret); |
805 | return ret; | |
806 | } | |
807 | ||
1109ca09 | 808 | static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = { |
771fe6b9 JG |
809 | .get_modes = radeon_vga_get_modes, |
810 | .mode_valid = radeon_vga_mode_valid, | |
811 | .best_encoder = radeon_best_single_encoder, | |
812 | }; | |
813 | ||
1109ca09 | 814 | static const struct drm_connector_funcs radeon_vga_connector_funcs = { |
771fe6b9 JG |
815 | .dpms = drm_helper_connector_dpms, |
816 | .detect = radeon_vga_detect, | |
817 | .fill_modes = drm_helper_probe_single_connector_modes, | |
818 | .destroy = radeon_connector_destroy, | |
819 | .set_property = radeon_connector_set_property, | |
820 | }; | |
821 | ||
4ce001ab DA |
822 | static int radeon_tv_get_modes(struct drm_connector *connector) |
823 | { | |
824 | struct drm_device *dev = connector->dev; | |
923f6848 | 825 | struct radeon_device *rdev = dev->dev_private; |
4ce001ab | 826 | struct drm_display_mode *tv_mode; |
923f6848 | 827 | struct drm_encoder *encoder; |
4ce001ab | 828 | |
923f6848 AD |
829 | encoder = radeon_best_single_encoder(connector); |
830 | if (!encoder) | |
831 | return 0; | |
4ce001ab | 832 | |
923f6848 AD |
833 | /* avivo chips can scale any mode */ |
834 | if (rdev->family >= CHIP_RS600) | |
835 | /* add scaled modes */ | |
836 | radeon_add_common_modes(encoder, connector); | |
837 | else { | |
838 | /* only 800x600 is supported right now on pre-avivo chips */ | |
d50ba256 | 839 | tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false); |
923f6848 AD |
840 | tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; |
841 | drm_mode_probed_add(connector, tv_mode); | |
842 | } | |
4ce001ab DA |
843 | return 1; |
844 | } | |
845 | ||
846 | static int radeon_tv_mode_valid(struct drm_connector *connector, | |
847 | struct drm_display_mode *mode) | |
848 | { | |
a3fa6320 AD |
849 | if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) |
850 | return MODE_CLOCK_RANGE; | |
4ce001ab DA |
851 | return MODE_OK; |
852 | } | |
853 | ||
7b334fcb | 854 | static enum drm_connector_status |
930a9e28 | 855 | radeon_tv_detect(struct drm_connector *connector, bool force) |
4ce001ab DA |
856 | { |
857 | struct drm_encoder *encoder; | |
858 | struct drm_encoder_helper_funcs *encoder_funcs; | |
445282db DA |
859 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
860 | enum drm_connector_status ret = connector_status_disconnected; | |
861 | ||
862 | if (!radeon_connector->dac_load_detect) | |
863 | return ret; | |
4ce001ab DA |
864 | |
865 | encoder = radeon_best_single_encoder(connector); | |
866 | if (!encoder) | |
867 | ret = connector_status_disconnected; | |
868 | else { | |
869 | encoder_funcs = encoder->helper_private; | |
870 | ret = encoder_funcs->detect(encoder, connector); | |
871 | } | |
872 | if (ret == connector_status_connected) | |
873 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false); | |
874 | radeon_connector_update_scratch_regs(connector, ret); | |
875 | return ret; | |
876 | } | |
877 | ||
1109ca09 | 878 | static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = { |
4ce001ab DA |
879 | .get_modes = radeon_tv_get_modes, |
880 | .mode_valid = radeon_tv_mode_valid, | |
881 | .best_encoder = radeon_best_single_encoder, | |
882 | }; | |
883 | ||
1109ca09 | 884 | static const struct drm_connector_funcs radeon_tv_connector_funcs = { |
4ce001ab DA |
885 | .dpms = drm_helper_connector_dpms, |
886 | .detect = radeon_tv_detect, | |
887 | .fill_modes = drm_helper_probe_single_connector_modes, | |
888 | .destroy = radeon_connector_destroy, | |
889 | .set_property = radeon_connector_set_property, | |
890 | }; | |
891 | ||
771fe6b9 JG |
892 | static int radeon_dvi_get_modes(struct drm_connector *connector) |
893 | { | |
894 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
895 | int ret; | |
896 | ||
897 | ret = radeon_ddc_get_modes(radeon_connector); | |
771fe6b9 JG |
898 | return ret; |
899 | } | |
900 | ||
11fe1266 TU |
901 | static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector) |
902 | { | |
903 | struct drm_device *dev = connector->dev; | |
904 | struct radeon_device *rdev = dev->dev_private; | |
905 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
906 | enum drm_connector_status status; | |
907 | ||
908 | /* We only trust HPD on R600 and newer ASICS. */ | |
909 | if (rdev->family >= CHIP_R600 | |
910 | && radeon_connector->hpd.hpd != RADEON_HPD_NONE) { | |
911 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) | |
912 | status = connector_status_connected; | |
913 | else | |
914 | status = connector_status_disconnected; | |
915 | if (connector->status == status) | |
916 | return true; | |
917 | } | |
918 | ||
919 | return false; | |
920 | } | |
921 | ||
4ce001ab DA |
922 | /* |
923 | * DVI is complicated | |
924 | * Do a DDC probe, if DDC probe passes, get the full EDID so | |
925 | * we can do analog/digital monitor detection at this point. | |
926 | * If the monitor is an analog monitor or we got no DDC, | |
927 | * we need to find the DAC encoder object for this connector. | |
928 | * If we got no DDC, we do load detection on the DAC encoder object. | |
929 | * If we got analog DDC or load detection passes on the DAC encoder | |
930 | * we have to check if this analog encoder is shared with anyone else (TV) | |
931 | * if its shared we have to set the other connector to disconnected. | |
932 | */ | |
7b334fcb | 933 | static enum drm_connector_status |
930a9e28 | 934 | radeon_dvi_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 935 | { |
fafcf94e AD |
936 | struct drm_device *dev = connector->dev; |
937 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 | 938 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
4ce001ab | 939 | struct drm_encoder *encoder = NULL; |
771fe6b9 JG |
940 | struct drm_encoder_helper_funcs *encoder_funcs; |
941 | struct drm_mode_object *obj; | |
942 | int i; | |
943 | enum drm_connector_status ret = connector_status_disconnected; | |
fc87f13b | 944 | bool dret = false, broken_edid = false; |
771fe6b9 | 945 | |
11fe1266 TU |
946 | if (!force && radeon_check_hpd_status_unchanged(connector)) |
947 | return connector->status; | |
948 | ||
eb6b6d7c | 949 | if (radeon_connector->ddc_bus) |
0a9069d3 | 950 | dret = radeon_ddc_probe(radeon_connector, false); |
4ce001ab | 951 | if (dret) { |
d0d0a225 | 952 | radeon_connector->detected_by_load = false; |
0294cf4f AD |
953 | if (radeon_connector->edid) { |
954 | kfree(radeon_connector->edid); | |
955 | radeon_connector->edid = NULL; | |
956 | } | |
4ce001ab | 957 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
4ce001ab DA |
958 | |
959 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
960 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
961 | drm_get_connector_name(connector)); | |
4a9a8b71 DA |
962 | /* rs690 seems to have a problem with connectors not existing and always |
963 | * return a block of 0's. If we see this just stop polling on this output */ | |
964 | if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) { | |
965 | ret = connector_status_disconnected; | |
966 | DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector)); | |
967 | radeon_connector->ddc_bus = NULL; | |
fc87f13b EE |
968 | } else { |
969 | ret = connector_status_connected; | |
970 | broken_edid = true; /* defer use_digital to later */ | |
4a9a8b71 | 971 | } |
4ce001ab DA |
972 | } else { |
973 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
974 | ||
0294cf4f AD |
975 | /* some oems have boards with separate digital and analog connectors |
976 | * with a shared ddc line (often vga + hdmi) | |
977 | */ | |
978 | if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) { | |
979 | kfree(radeon_connector->edid); | |
980 | radeon_connector->edid = NULL; | |
981 | ret = connector_status_disconnected; | |
982 | } else | |
983 | ret = connector_status_connected; | |
71407c46 | 984 | |
42f14c4b AD |
985 | /* This gets complicated. We have boards with VGA + HDMI with a |
986 | * shared DDC line and we have boards with DVI-D + HDMI with a shared | |
987 | * DDC line. The latter is more complex because with DVI<->HDMI adapters | |
988 | * you don't really know what's connected to which port as both are digital. | |
71407c46 | 989 | */ |
d3932d6c | 990 | if (radeon_connector->shared_ddc && (ret == connector_status_connected)) { |
71407c46 AD |
991 | struct drm_connector *list_connector; |
992 | struct radeon_connector *list_radeon_connector; | |
993 | list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) { | |
994 | if (connector == list_connector) | |
995 | continue; | |
996 | list_radeon_connector = to_radeon_connector(list_connector); | |
b2ea4aa6 AD |
997 | if (list_radeon_connector->shared_ddc && |
998 | (list_radeon_connector->ddc_bus->rec.i2c_id == | |
999 | radeon_connector->ddc_bus->rec.i2c_id)) { | |
42f14c4b AD |
1000 | /* cases where both connectors are digital */ |
1001 | if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) { | |
1002 | /* hpd is our only option in this case */ | |
1003 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { | |
71407c46 AD |
1004 | kfree(radeon_connector->edid); |
1005 | radeon_connector->edid = NULL; | |
1006 | ret = connector_status_disconnected; | |
1007 | } | |
1008 | } | |
1009 | } | |
1010 | } | |
1011 | } | |
4ce001ab DA |
1012 | } |
1013 | } | |
1014 | ||
1015 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == true)) | |
1016 | goto out; | |
1017 | ||
5f0a2612 AD |
1018 | /* DVI-D and HDMI-A are digital only */ |
1019 | if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) || | |
1020 | (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA)) | |
1021 | goto out; | |
1022 | ||
d0d0a225 | 1023 | /* if we aren't forcing don't do destructive polling */ |
c3cceedd | 1024 | if (!force) { |
d0d0a225 AD |
1025 | /* only return the previous status if we last |
1026 | * detected a monitor via load. | |
1027 | */ | |
1028 | if (radeon_connector->detected_by_load) | |
1029 | ret = connector->status; | |
c3cceedd DA |
1030 | goto out; |
1031 | } | |
1032 | ||
4ce001ab | 1033 | /* find analog encoder */ |
445282db DA |
1034 | if (radeon_connector->dac_load_detect) { |
1035 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1036 | if (connector->encoder_ids[i] == 0) | |
1037 | break; | |
771fe6b9 | 1038 | |
445282db DA |
1039 | obj = drm_mode_object_find(connector->dev, |
1040 | connector->encoder_ids[i], | |
1041 | DRM_MODE_OBJECT_ENCODER); | |
1042 | if (!obj) | |
1043 | continue; | |
771fe6b9 | 1044 | |
445282db | 1045 | encoder = obj_to_encoder(obj); |
771fe6b9 | 1046 | |
e3632507 | 1047 | if (encoder->encoder_type != DRM_MODE_ENCODER_DAC && |
e00e8b5e AD |
1048 | encoder->encoder_type != DRM_MODE_ENCODER_TVDAC) |
1049 | continue; | |
1050 | ||
445282db DA |
1051 | encoder_funcs = encoder->helper_private; |
1052 | if (encoder_funcs->detect) { | |
fc87f13b EE |
1053 | if (!broken_edid) { |
1054 | if (ret != connector_status_connected) { | |
1055 | /* deal with analog monitors without DDC */ | |
1056 | ret = encoder_funcs->detect(encoder, connector); | |
1057 | if (ret == connector_status_connected) { | |
1058 | radeon_connector->use_digital = false; | |
1059 | } | |
1060 | if (ret != connector_status_disconnected) | |
1061 | radeon_connector->detected_by_load = true; | |
445282db | 1062 | } |
fc87f13b EE |
1063 | } else { |
1064 | enum drm_connector_status lret; | |
1065 | /* assume digital unless load detected otherwise */ | |
1066 | radeon_connector->use_digital = true; | |
1067 | lret = encoder_funcs->detect(encoder, connector); | |
1068 | DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret); | |
1069 | if (lret == connector_status_connected) | |
1070 | radeon_connector->use_digital = false; | |
771fe6b9 | 1071 | } |
445282db | 1072 | break; |
771fe6b9 JG |
1073 | } |
1074 | } | |
1075 | } | |
1076 | ||
4ce001ab DA |
1077 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) && |
1078 | encoder) { | |
1079 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
1080 | } | |
1081 | ||
fafcf94e AD |
1082 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the |
1083 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
1084 | * by other means, assume the DFP is connected and use that EDID. In most | |
1085 | * cases the DVI port is actually a virtual KVM port connected to the service | |
1086 | * processor. | |
1087 | */ | |
a09d431f | 1088 | out: |
fafcf94e AD |
1089 | if ((!rdev->is_atom_bios) && |
1090 | (ret == connector_status_disconnected) && | |
1091 | rdev->mode_info.bios_hardcoded_edid_size) { | |
1092 | radeon_connector->use_digital = true; | |
1093 | ret = connector_status_connected; | |
1094 | } | |
1095 | ||
771fe6b9 JG |
1096 | /* updated in get modes as well since we need to know if it's analog or digital */ |
1097 | radeon_connector_update_scratch_regs(connector, ret); | |
1098 | return ret; | |
1099 | } | |
1100 | ||
1101 | /* okay need to be smart in here about which encoder to pick */ | |
1109ca09 | 1102 | static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector) |
771fe6b9 JG |
1103 | { |
1104 | int enc_id = connector->encoder_ids[0]; | |
1105 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1106 | struct drm_mode_object *obj; | |
1107 | struct drm_encoder *encoder; | |
1108 | int i; | |
1109 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1110 | if (connector->encoder_ids[i] == 0) | |
1111 | break; | |
1112 | ||
1113 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1114 | if (!obj) | |
1115 | continue; | |
1116 | ||
1117 | encoder = obj_to_encoder(obj); | |
1118 | ||
4ce001ab | 1119 | if (radeon_connector->use_digital == true) { |
771fe6b9 JG |
1120 | if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) |
1121 | return encoder; | |
1122 | } else { | |
1123 | if (encoder->encoder_type == DRM_MODE_ENCODER_DAC || | |
1124 | encoder->encoder_type == DRM_MODE_ENCODER_TVDAC) | |
1125 | return encoder; | |
1126 | } | |
1127 | } | |
1128 | ||
1129 | /* see if we have a default encoder TODO */ | |
1130 | ||
1131 | /* then check use digitial */ | |
1132 | /* pick the first one */ | |
1133 | if (enc_id) { | |
1134 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
1135 | if (!obj) | |
1136 | return NULL; | |
1137 | encoder = obj_to_encoder(obj); | |
1138 | return encoder; | |
1139 | } | |
1140 | return NULL; | |
1141 | } | |
1142 | ||
d50ba256 DA |
1143 | static void radeon_dvi_force(struct drm_connector *connector) |
1144 | { | |
1145 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1146 | if (connector->force == DRM_FORCE_ON) | |
1147 | radeon_connector->use_digital = false; | |
1148 | if (connector->force == DRM_FORCE_ON_DIGITAL) | |
1149 | radeon_connector->use_digital = true; | |
1150 | } | |
1151 | ||
a3fa6320 AD |
1152 | static int radeon_dvi_mode_valid(struct drm_connector *connector, |
1153 | struct drm_display_mode *mode) | |
1154 | { | |
1b24203e AD |
1155 | struct drm_device *dev = connector->dev; |
1156 | struct radeon_device *rdev = dev->dev_private; | |
a3fa6320 AD |
1157 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
1158 | ||
1159 | /* XXX check mode bandwidth */ | |
1160 | ||
1b24203e AD |
1161 | /* clocks over 135 MHz have heat issues with DVI on RV100 */ |
1162 | if (radeon_connector->use_digital && | |
1163 | (rdev->family == CHIP_RV100) && | |
1164 | (mode->clock > 135000)) | |
1165 | return MODE_CLOCK_HIGH; | |
1166 | ||
a3fa6320 AD |
1167 | if (radeon_connector->use_digital && (mode->clock > 165000)) { |
1168 | if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || | |
1169 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || | |
1170 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) | |
1171 | return MODE_OK; | |
e1e84017 | 1172 | else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) { |
1b2681ba | 1173 | if (ASIC_IS_DCE6(rdev)) { |
e1e84017 AD |
1174 | /* HDMI 1.3+ supports max clock of 340 Mhz */ |
1175 | if (mode->clock > 340000) | |
1176 | return MODE_CLOCK_HIGH; | |
1177 | else | |
1178 | return MODE_OK; | |
1179 | } else | |
1180 | return MODE_CLOCK_HIGH; | |
1181 | } else | |
a3fa6320 AD |
1182 | return MODE_CLOCK_HIGH; |
1183 | } | |
b20f9bef AD |
1184 | |
1185 | /* check against the max pixel clock */ | |
1186 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | |
1187 | return MODE_CLOCK_HIGH; | |
1188 | ||
a3fa6320 AD |
1189 | return MODE_OK; |
1190 | } | |
1191 | ||
1109ca09 | 1192 | static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { |
771fe6b9 | 1193 | .get_modes = radeon_dvi_get_modes, |
a3fa6320 | 1194 | .mode_valid = radeon_dvi_mode_valid, |
771fe6b9 JG |
1195 | .best_encoder = radeon_dvi_encoder, |
1196 | }; | |
1197 | ||
1109ca09 | 1198 | static const struct drm_connector_funcs radeon_dvi_connector_funcs = { |
771fe6b9 JG |
1199 | .dpms = drm_helper_connector_dpms, |
1200 | .detect = radeon_dvi_detect, | |
1201 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1202 | .set_property = radeon_connector_set_property, | |
1203 | .destroy = radeon_connector_destroy, | |
d50ba256 | 1204 | .force = radeon_dvi_force, |
771fe6b9 JG |
1205 | }; |
1206 | ||
ffd09c64 AD |
1207 | static void radeon_dp_connector_destroy(struct drm_connector *connector) |
1208 | { | |
1209 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1210 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1211 | ||
ffd09c64 AD |
1212 | if (radeon_connector->edid) |
1213 | kfree(radeon_connector->edid); | |
1214 | if (radeon_dig_connector->dp_i2c_bus) | |
ac1aade6 | 1215 | radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus); |
ffd09c64 AD |
1216 | kfree(radeon_connector->con_priv); |
1217 | drm_sysfs_connector_remove(connector); | |
1218 | drm_connector_cleanup(connector); | |
1219 | kfree(connector); | |
1220 | } | |
1221 | ||
746c1aa4 DA |
1222 | static int radeon_dp_get_modes(struct drm_connector *connector) |
1223 | { | |
1224 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
8b834852 | 1225 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
591a10e1 | 1226 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
746c1aa4 DA |
1227 | int ret; |
1228 | ||
f89931f3 AD |
1229 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1230 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1231 | struct drm_display_mode *mode; |
1232 | ||
2b69ffb9 AD |
1233 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
1234 | if (!radeon_dig_connector->edp_on) | |
1235 | atombios_set_edp_panel_power(connector, | |
1236 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
1237 | ret = radeon_ddc_get_modes(radeon_connector); | |
1238 | if (!radeon_dig_connector->edp_on) | |
1239 | atombios_set_edp_panel_power(connector, | |
1240 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
1241 | } else { | |
1242 | /* need to setup ddc on the bridge */ | |
1243 | if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != | |
1244 | ENCODER_OBJECT_ID_NONE) { | |
1245 | if (encoder) | |
1246 | radeon_atom_ext_encoder_setup_ddc(encoder); | |
1247 | } | |
1248 | ret = radeon_ddc_get_modes(radeon_connector); | |
1249 | } | |
d291767b AD |
1250 | |
1251 | if (ret > 0) { | |
d291767b AD |
1252 | if (encoder) { |
1253 | radeon_fixup_lvds_native_mode(encoder, connector); | |
1254 | /* add scaled modes */ | |
1255 | radeon_add_common_modes(encoder, connector); | |
1256 | } | |
1257 | return ret; | |
1258 | } | |
1259 | ||
d291767b AD |
1260 | if (!encoder) |
1261 | return 0; | |
1262 | ||
1263 | /* we have no EDID modes */ | |
1264 | mode = radeon_fp_native_mode(encoder); | |
1265 | if (mode) { | |
1266 | ret = 1; | |
1267 | drm_mode_probed_add(connector, mode); | |
1268 | /* add the width/height from vbios tables if available */ | |
1269 | connector->display_info.width_mm = mode->width_mm; | |
1270 | connector->display_info.height_mm = mode->height_mm; | |
1271 | /* add scaled modes */ | |
1272 | radeon_add_common_modes(encoder, connector); | |
1273 | } | |
591a10e1 AD |
1274 | } else { |
1275 | /* need to setup ddc on the bridge */ | |
1d33e1fc AD |
1276 | if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != |
1277 | ENCODER_OBJECT_ID_NONE) { | |
591a10e1 AD |
1278 | if (encoder) |
1279 | radeon_atom_ext_encoder_setup_ddc(encoder); | |
1280 | } | |
d291767b | 1281 | ret = radeon_ddc_get_modes(radeon_connector); |
591a10e1 | 1282 | } |
8b834852 | 1283 | |
746c1aa4 DA |
1284 | return ret; |
1285 | } | |
1286 | ||
1d33e1fc | 1287 | u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector) |
d7fa8bb3 AD |
1288 | { |
1289 | struct drm_mode_object *obj; | |
1290 | struct drm_encoder *encoder; | |
1291 | struct radeon_encoder *radeon_encoder; | |
1292 | int i; | |
d7fa8bb3 AD |
1293 | |
1294 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1295 | if (connector->encoder_ids[i] == 0) | |
1296 | break; | |
1297 | ||
1298 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1299 | if (!obj) | |
1300 | continue; | |
1301 | ||
1302 | encoder = obj_to_encoder(obj); | |
1303 | radeon_encoder = to_radeon_encoder(encoder); | |
1304 | ||
1305 | switch (radeon_encoder->encoder_id) { | |
1306 | case ENCODER_OBJECT_ID_TRAVIS: | |
1307 | case ENCODER_OBJECT_ID_NUTMEG: | |
1d33e1fc | 1308 | return radeon_encoder->encoder_id; |
d7fa8bb3 AD |
1309 | default: |
1310 | break; | |
1311 | } | |
1312 | } | |
1313 | ||
1d33e1fc | 1314 | return ENCODER_OBJECT_ID_NONE; |
d7fa8bb3 AD |
1315 | } |
1316 | ||
1317 | bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector) | |
1318 | { | |
1319 | struct drm_mode_object *obj; | |
1320 | struct drm_encoder *encoder; | |
1321 | struct radeon_encoder *radeon_encoder; | |
1322 | int i; | |
1323 | bool found = false; | |
1324 | ||
1325 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1326 | if (connector->encoder_ids[i] == 0) | |
1327 | break; | |
1328 | ||
1329 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1330 | if (!obj) | |
1331 | continue; | |
1332 | ||
1333 | encoder = obj_to_encoder(obj); | |
1334 | radeon_encoder = to_radeon_encoder(encoder); | |
1335 | if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2) | |
1336 | found = true; | |
1337 | } | |
1338 | ||
1339 | return found; | |
1340 | } | |
1341 | ||
1342 | bool radeon_connector_is_dp12_capable(struct drm_connector *connector) | |
1343 | { | |
1344 | struct drm_device *dev = connector->dev; | |
1345 | struct radeon_device *rdev = dev->dev_private; | |
1346 | ||
1347 | if (ASIC_IS_DCE5(rdev) && | |
1348 | (rdev->clock.dp_extclk >= 53900) && | |
1349 | radeon_connector_encoder_is_hbr2(connector)) { | |
1350 | return true; | |
1351 | } | |
1352 | ||
1353 | return false; | |
1354 | } | |
1355 | ||
7b334fcb | 1356 | static enum drm_connector_status |
930a9e28 | 1357 | radeon_dp_detect(struct drm_connector *connector, bool force) |
746c1aa4 | 1358 | { |
f8d0edde AD |
1359 | struct drm_device *dev = connector->dev; |
1360 | struct radeon_device *rdev = dev->dev_private; | |
746c1aa4 | 1361 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
746c1aa4 | 1362 | enum drm_connector_status ret = connector_status_disconnected; |
4143e919 | 1363 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
591a10e1 | 1364 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
746c1aa4 | 1365 | |
11fe1266 TU |
1366 | if (!force && radeon_check_hpd_status_unchanged(connector)) |
1367 | return connector->status; | |
1368 | ||
746c1aa4 DA |
1369 | if (radeon_connector->edid) { |
1370 | kfree(radeon_connector->edid); | |
1371 | radeon_connector->edid = NULL; | |
1372 | } | |
1373 | ||
f89931f3 AD |
1374 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1375 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1376 | if (encoder) { |
1377 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
1378 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
1379 | ||
1380 | /* check if panel is valid */ | |
1381 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) | |
1382 | ret = connector_status_connected; | |
1383 | } | |
6f50eae7 AD |
1384 | /* eDP is always DP */ |
1385 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
8b834852 AD |
1386 | if (!radeon_dig_connector->edp_on) |
1387 | atombios_set_edp_panel_power(connector, | |
1388 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
6f50eae7 | 1389 | if (radeon_dp_getdpcd(radeon_connector)) |
9fa05c98 | 1390 | ret = connector_status_connected; |
8b834852 AD |
1391 | if (!radeon_dig_connector->edp_on) |
1392 | atombios_set_edp_panel_power(connector, | |
1393 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
1d33e1fc AD |
1394 | } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != |
1395 | ENCODER_OBJECT_ID_NONE) { | |
b06947b5 AD |
1396 | /* DP bridges are always DP */ |
1397 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
1398 | /* get the DPCD from the bridge */ | |
1399 | radeon_dp_getdpcd(radeon_connector); | |
1400 | ||
6777a4f6 AD |
1401 | if (encoder) { |
1402 | /* setup ddc on the bridge */ | |
1403 | radeon_atom_ext_encoder_setup_ddc(encoder); | |
0a9069d3 NOS |
1404 | /* bridge chips are always aux */ |
1405 | if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */ | |
b06947b5 | 1406 | ret = connector_status_connected; |
6777a4f6 AD |
1407 | else if (radeon_connector->dac_load_detect) { /* try load detection */ |
1408 | struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; | |
b06947b5 AD |
1409 | ret = encoder_funcs->detect(encoder, connector); |
1410 | } | |
591a10e1 | 1411 | } |
b06947b5 | 1412 | } else { |
6f50eae7 | 1413 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
f8d0edde AD |
1414 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { |
1415 | ret = connector_status_connected; | |
1416 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) | |
1417 | radeon_dp_getdpcd(radeon_connector); | |
6f50eae7 | 1418 | } else { |
f8d0edde AD |
1419 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { |
1420 | if (radeon_dp_getdpcd(radeon_connector)) | |
1421 | ret = connector_status_connected; | |
1422 | } else { | |
0a9069d3 NOS |
1423 | /* try non-aux ddc (DP to DVI/HMDI/etc. adapter) */ |
1424 | if (radeon_ddc_probe(radeon_connector, false)) | |
f8d0edde AD |
1425 | ret = connector_status_connected; |
1426 | } | |
4143e919 | 1427 | } |
746c1aa4 | 1428 | } |
4143e919 | 1429 | |
30f44372 | 1430 | radeon_connector_update_scratch_regs(connector, ret); |
746c1aa4 DA |
1431 | return ret; |
1432 | } | |
1433 | ||
5801ead6 AD |
1434 | static int radeon_dp_mode_valid(struct drm_connector *connector, |
1435 | struct drm_display_mode *mode) | |
1436 | { | |
1437 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1438 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1439 | ||
1440 | /* XXX check mode bandwidth */ | |
1441 | ||
f89931f3 AD |
1442 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1443 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1444 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
1445 | ||
1446 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
1447 | return MODE_PANEL; | |
1448 | ||
1449 | if (encoder) { | |
1450 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
1451 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
1452 | ||
f89931f3 | 1453 | /* AVIVO hardware supports downscaling modes larger than the panel |
d291767b AD |
1454 | * to the panel size, but I'm not sure this is desirable. |
1455 | */ | |
1456 | if ((mode->hdisplay > native_mode->hdisplay) || | |
1457 | (mode->vdisplay > native_mode->vdisplay)) | |
1458 | return MODE_PANEL; | |
1459 | ||
1460 | /* if scaling is disabled, block non-native modes */ | |
1461 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
1462 | if ((mode->hdisplay != native_mode->hdisplay) || | |
1463 | (mode->vdisplay != native_mode->vdisplay)) | |
1464 | return MODE_PANEL; | |
1465 | } | |
1466 | } | |
5801ead6 | 1467 | return MODE_OK; |
d291767b AD |
1468 | } else { |
1469 | if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | |
1470 | (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) | |
1471 | return radeon_dp_mode_valid_helper(connector, mode); | |
1472 | else | |
1473 | return MODE_OK; | |
1474 | } | |
5801ead6 AD |
1475 | } |
1476 | ||
1109ca09 | 1477 | static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = { |
746c1aa4 | 1478 | .get_modes = radeon_dp_get_modes, |
5801ead6 | 1479 | .mode_valid = radeon_dp_mode_valid, |
746c1aa4 DA |
1480 | .best_encoder = radeon_dvi_encoder, |
1481 | }; | |
1482 | ||
1109ca09 | 1483 | static const struct drm_connector_funcs radeon_dp_connector_funcs = { |
746c1aa4 DA |
1484 | .dpms = drm_helper_connector_dpms, |
1485 | .detect = radeon_dp_detect, | |
1486 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1487 | .set_property = radeon_connector_set_property, | |
ffd09c64 | 1488 | .destroy = radeon_dp_connector_destroy, |
746c1aa4 DA |
1489 | .force = radeon_dvi_force, |
1490 | }; | |
1491 | ||
771fe6b9 JG |
1492 | void |
1493 | radeon_add_atom_connector(struct drm_device *dev, | |
1494 | uint32_t connector_id, | |
1495 | uint32_t supported_device, | |
1496 | int connector_type, | |
1497 | struct radeon_i2c_bus_rec *i2c_bus, | |
b75fad06 | 1498 | uint32_t igp_lane_info, |
eed45b30 | 1499 | uint16_t connector_object_id, |
26b5bc98 AD |
1500 | struct radeon_hpd *hpd, |
1501 | struct radeon_router *router) | |
771fe6b9 | 1502 | { |
445282db | 1503 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1504 | struct drm_connector *connector; |
1505 | struct radeon_connector *radeon_connector; | |
1506 | struct radeon_connector_atom_dig *radeon_dig_connector; | |
eac4dff6 AD |
1507 | struct drm_encoder *encoder; |
1508 | struct radeon_encoder *radeon_encoder; | |
771fe6b9 | 1509 | uint32_t subpixel_order = SubPixelNone; |
0294cf4f | 1510 | bool shared_ddc = false; |
eac4dff6 | 1511 | bool is_dp_bridge = false; |
771fe6b9 | 1512 | |
4ce001ab | 1513 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1514 | return; |
1515 | ||
cf4c12f9 AD |
1516 | /* if the user selected tv=0 don't try and add the connector */ |
1517 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1518 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1519 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1520 | (radeon_tv == 0)) | |
1521 | return; | |
1522 | ||
771fe6b9 JG |
1523 | /* see if we already added it */ |
1524 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1525 | radeon_connector = to_radeon_connector(connector); | |
1526 | if (radeon_connector->connector_id == connector_id) { | |
1527 | radeon_connector->devices |= supported_device; | |
1528 | return; | |
1529 | } | |
0294cf4f | 1530 | if (radeon_connector->ddc_bus && i2c_bus->valid) { |
d3932d6c | 1531 | if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) { |
0294cf4f AD |
1532 | radeon_connector->shared_ddc = true; |
1533 | shared_ddc = true; | |
1534 | } | |
fb939dfc | 1535 | if (radeon_connector->router_bus && router->ddc_valid && |
26b5bc98 AD |
1536 | (radeon_connector->router.router_id == router->router_id)) { |
1537 | radeon_connector->shared_ddc = false; | |
1538 | shared_ddc = false; | |
1539 | } | |
0294cf4f | 1540 | } |
771fe6b9 JG |
1541 | } |
1542 | ||
eac4dff6 AD |
1543 | /* check if it's a dp bridge */ |
1544 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | |
1545 | radeon_encoder = to_radeon_encoder(encoder); | |
1546 | if (radeon_encoder->devices & supported_device) { | |
1547 | switch (radeon_encoder->encoder_id) { | |
1548 | case ENCODER_OBJECT_ID_TRAVIS: | |
1549 | case ENCODER_OBJECT_ID_NUTMEG: | |
1550 | is_dp_bridge = true; | |
1551 | break; | |
1552 | default: | |
1553 | break; | |
1554 | } | |
1555 | } | |
1556 | } | |
1557 | ||
771fe6b9 JG |
1558 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); |
1559 | if (!radeon_connector) | |
1560 | return; | |
1561 | ||
1562 | connector = &radeon_connector->base; | |
1563 | ||
1564 | radeon_connector->connector_id = connector_id; | |
1565 | radeon_connector->devices = supported_device; | |
0294cf4f | 1566 | radeon_connector->shared_ddc = shared_ddc; |
b75fad06 | 1567 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1568 | radeon_connector->hpd = *hpd; |
bc1c4dc3 | 1569 | |
26b5bc98 | 1570 | radeon_connector->router = *router; |
fb939dfc | 1571 | if (router->ddc_valid || router->cd_valid) { |
26b5bc98 AD |
1572 | radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info); |
1573 | if (!radeon_connector->router_bus) | |
a70882aa | 1574 | DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n"); |
26b5bc98 | 1575 | } |
eac4dff6 AD |
1576 | |
1577 | if (is_dp_bridge) { | |
771fe6b9 JG |
1578 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); |
1579 | if (!radeon_dig_connector) | |
1580 | goto failed; | |
771fe6b9 JG |
1581 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1582 | radeon_connector->con_priv = radeon_dig_connector; | |
eac4dff6 AD |
1583 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); |
1584 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
771fe6b9 | 1585 | if (i2c_bus->valid) { |
eac4dff6 AD |
1586 | /* add DP i2c bus */ |
1587 | if (connector_type == DRM_MODE_CONNECTOR_eDP) | |
1588 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1589 | else | |
1590 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1591 | if (!radeon_dig_connector->dp_i2c_bus) | |
1592 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
f376b94f | 1593 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1594 | if (!radeon_connector->ddc_bus) |
eac4dff6 | 1595 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1596 | } |
eac4dff6 AD |
1597 | switch (connector_type) { |
1598 | case DRM_MODE_CONNECTOR_VGA: | |
1599 | case DRM_MODE_CONNECTOR_DVIA: | |
1600 | default: | |
1601 | connector->interlace_allowed = true; | |
1602 | connector->doublescan_allowed = true; | |
d629a3ce | 1603 | radeon_connector->dac_load_detect = true; |
e35755fa | 1604 | drm_object_attach_property(&radeon_connector->base.base, |
d629a3ce AD |
1605 | rdev->mode_info.load_detect_property, |
1606 | 1); | |
eac4dff6 AD |
1607 | break; |
1608 | case DRM_MODE_CONNECTOR_DVII: | |
1609 | case DRM_MODE_CONNECTOR_DVID: | |
1610 | case DRM_MODE_CONNECTOR_HDMIA: | |
1611 | case DRM_MODE_CONNECTOR_HDMIB: | |
1612 | case DRM_MODE_CONNECTOR_DisplayPort: | |
e35755fa | 1613 | drm_object_attach_property(&radeon_connector->base.base, |
430f70d5 | 1614 | rdev->mode_info.underscan_property, |
56bec7c0 | 1615 | UNDERSCAN_OFF); |
e35755fa | 1616 | drm_object_attach_property(&radeon_connector->base.base, |
5bccf5e3 MG |
1617 | rdev->mode_info.underscan_hborder_property, |
1618 | 0); | |
e35755fa | 1619 | drm_object_attach_property(&radeon_connector->base.base, |
5bccf5e3 MG |
1620 | rdev->mode_info.underscan_vborder_property, |
1621 | 0); | |
eac4dff6 AD |
1622 | subpixel_order = SubPixelHorizontalRGB; |
1623 | connector->interlace_allowed = true; | |
1624 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1625 | connector->doublescan_allowed = true; | |
1626 | else | |
1627 | connector->doublescan_allowed = false; | |
d629a3ce AD |
1628 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { |
1629 | radeon_connector->dac_load_detect = true; | |
e35755fa | 1630 | drm_object_attach_property(&radeon_connector->base.base, |
d629a3ce AD |
1631 | rdev->mode_info.load_detect_property, |
1632 | 1); | |
1633 | } | |
eac4dff6 AD |
1634 | break; |
1635 | case DRM_MODE_CONNECTOR_LVDS: | |
1636 | case DRM_MODE_CONNECTOR_eDP: | |
e35755fa | 1637 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1638 | dev->mode_config.scaling_mode_property, |
1639 | DRM_MODE_SCALE_FULLSCREEN); | |
1640 | subpixel_order = SubPixelHorizontalRGB; | |
1641 | connector->interlace_allowed = false; | |
1642 | connector->doublescan_allowed = false; | |
1643 | break; | |
5bccf5e3 | 1644 | } |
eac4dff6 AD |
1645 | } else { |
1646 | switch (connector_type) { | |
1647 | case DRM_MODE_CONNECTOR_VGA: | |
1648 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1649 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1650 | if (i2c_bus->valid) { | |
1651 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1652 | if (!radeon_connector->ddc_bus) | |
1653 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1654 | } | |
390d0bbe | 1655 | radeon_connector->dac_load_detect = true; |
e35755fa | 1656 | drm_object_attach_property(&radeon_connector->base.base, |
390d0bbe AD |
1657 | rdev->mode_info.load_detect_property, |
1658 | 1); | |
eac4dff6 AD |
1659 | /* no HPD on analog connectors */ |
1660 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1661 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1662 | connector->interlace_allowed = true; | |
c49948f4 | 1663 | connector->doublescan_allowed = true; |
eac4dff6 AD |
1664 | break; |
1665 | case DRM_MODE_CONNECTOR_DVIA: | |
1666 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1667 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1668 | if (i2c_bus->valid) { | |
1669 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1670 | if (!radeon_connector->ddc_bus) | |
1671 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1672 | } | |
1673 | radeon_connector->dac_load_detect = true; | |
e35755fa | 1674 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1675 | rdev->mode_info.load_detect_property, |
1676 | 1); | |
1677 | /* no HPD on analog connectors */ | |
1678 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1679 | connector->interlace_allowed = true; | |
1680 | connector->doublescan_allowed = true; | |
1681 | break; | |
1682 | case DRM_MODE_CONNECTOR_DVII: | |
1683 | case DRM_MODE_CONNECTOR_DVID: | |
1684 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1685 | if (!radeon_dig_connector) | |
1686 | goto failed; | |
1687 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1688 | radeon_connector->con_priv = radeon_dig_connector; | |
1689 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1690 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1691 | if (i2c_bus->valid) { | |
1692 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1693 | if (!radeon_connector->ddc_bus) | |
1694 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1695 | } | |
1696 | subpixel_order = SubPixelHorizontalRGB; | |
e35755fa | 1697 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1698 | rdev->mode_info.coherent_mode_property, |
1699 | 1); | |
1700 | if (ASIC_IS_AVIVO(rdev)) { | |
e35755fa | 1701 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1702 | rdev->mode_info.underscan_property, |
1703 | UNDERSCAN_OFF); | |
e35755fa | 1704 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1705 | rdev->mode_info.underscan_hborder_property, |
1706 | 0); | |
e35755fa | 1707 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1708 | rdev->mode_info.underscan_vborder_property, |
1709 | 0); | |
1710 | } | |
1711 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
1712 | radeon_connector->dac_load_detect = true; | |
e35755fa | 1713 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1714 | rdev->mode_info.load_detect_property, |
1715 | 1); | |
1716 | } | |
1717 | connector->interlace_allowed = true; | |
1718 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
1719 | connector->doublescan_allowed = true; | |
1720 | else | |
1721 | connector->doublescan_allowed = false; | |
1722 | break; | |
1723 | case DRM_MODE_CONNECTOR_HDMIA: | |
1724 | case DRM_MODE_CONNECTOR_HDMIB: | |
1725 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1726 | if (!radeon_dig_connector) | |
1727 | goto failed; | |
1728 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1729 | radeon_connector->con_priv = radeon_dig_connector; | |
1730 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1731 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1732 | if (i2c_bus->valid) { | |
1733 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1734 | if (!radeon_connector->ddc_bus) | |
1735 | DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1736 | } | |
e35755fa | 1737 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1738 | rdev->mode_info.coherent_mode_property, |
1739 | 1); | |
1740 | if (ASIC_IS_AVIVO(rdev)) { | |
e35755fa | 1741 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1742 | rdev->mode_info.underscan_property, |
1743 | UNDERSCAN_OFF); | |
e35755fa | 1744 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1745 | rdev->mode_info.underscan_hborder_property, |
1746 | 0); | |
e35755fa | 1747 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1748 | rdev->mode_info.underscan_vborder_property, |
1749 | 0); | |
1750 | } | |
1751 | subpixel_order = SubPixelHorizontalRGB; | |
1752 | connector->interlace_allowed = true; | |
1753 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1754 | connector->doublescan_allowed = true; | |
1755 | else | |
1756 | connector->doublescan_allowed = false; | |
1757 | break; | |
1758 | case DRM_MODE_CONNECTOR_DisplayPort: | |
1759 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1760 | if (!radeon_dig_connector) | |
1761 | goto failed; | |
1762 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1763 | radeon_connector->con_priv = radeon_dig_connector; | |
1764 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | |
1765 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
1766 | if (i2c_bus->valid) { | |
1767 | /* add DP i2c bus */ | |
1768 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1769 | if (!radeon_dig_connector->dp_i2c_bus) | |
1770 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1771 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1772 | if (!radeon_connector->ddc_bus) | |
1773 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1774 | } | |
1775 | subpixel_order = SubPixelHorizontalRGB; | |
e35755fa | 1776 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1777 | rdev->mode_info.coherent_mode_property, |
1778 | 1); | |
1779 | if (ASIC_IS_AVIVO(rdev)) { | |
e35755fa | 1780 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1781 | rdev->mode_info.underscan_property, |
1782 | UNDERSCAN_OFF); | |
e35755fa | 1783 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1784 | rdev->mode_info.underscan_hborder_property, |
1785 | 0); | |
e35755fa | 1786 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1787 | rdev->mode_info.underscan_vborder_property, |
1788 | 0); | |
1789 | } | |
1790 | connector->interlace_allowed = true; | |
1791 | /* in theory with a DP to VGA converter... */ | |
c49948f4 | 1792 | connector->doublescan_allowed = false; |
eac4dff6 AD |
1793 | break; |
1794 | case DRM_MODE_CONNECTOR_eDP: | |
1795 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1796 | if (!radeon_dig_connector) | |
1797 | goto failed; | |
1798 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1799 | radeon_connector->con_priv = radeon_dig_connector; | |
1800 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | |
1801 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
1802 | if (i2c_bus->valid) { | |
1803 | /* add DP i2c bus */ | |
1804 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1805 | if (!radeon_dig_connector->dp_i2c_bus) | |
1806 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1807 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1808 | if (!radeon_connector->ddc_bus) | |
1809 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1810 | } | |
e35755fa | 1811 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1812 | dev->mode_config.scaling_mode_property, |
1813 | DRM_MODE_SCALE_FULLSCREEN); | |
1814 | subpixel_order = SubPixelHorizontalRGB; | |
1815 | connector->interlace_allowed = false; | |
1816 | connector->doublescan_allowed = false; | |
1817 | break; | |
1818 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1819 | case DRM_MODE_CONNECTOR_Composite: | |
1820 | case DRM_MODE_CONNECTOR_9PinDIN: | |
1821 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); | |
1822 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1823 | radeon_connector->dac_load_detect = true; | |
e35755fa | 1824 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1825 | rdev->mode_info.load_detect_property, |
1826 | 1); | |
e35755fa | 1827 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1828 | rdev->mode_info.tv_std_property, |
1829 | radeon_atombios_get_tv_info(rdev)); | |
1830 | /* no HPD on analog connectors */ | |
1831 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1832 | connector->interlace_allowed = false; | |
1833 | connector->doublescan_allowed = false; | |
1834 | break; | |
1835 | case DRM_MODE_CONNECTOR_LVDS: | |
1836 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1837 | if (!radeon_dig_connector) | |
1838 | goto failed; | |
1839 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1840 | radeon_connector->con_priv = radeon_dig_connector; | |
1841 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
1842 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); | |
1843 | if (i2c_bus->valid) { | |
1844 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1845 | if (!radeon_connector->ddc_bus) | |
1846 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1847 | } | |
e35755fa | 1848 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1849 | dev->mode_config.scaling_mode_property, |
1850 | DRM_MODE_SCALE_FULLSCREEN); | |
1851 | subpixel_order = SubPixelHorizontalRGB; | |
1852 | connector->interlace_allowed = false; | |
1853 | connector->doublescan_allowed = false; | |
1854 | break; | |
771fe6b9 | 1855 | } |
771fe6b9 JG |
1856 | } |
1857 | ||
2581afcc | 1858 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1859 | if (i2c_bus->valid) |
1860 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1861 | } else | |
1862 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
1863 | ||
771fe6b9 JG |
1864 | connector->display_info.subpixel_order = subpixel_order; |
1865 | drm_sysfs_connector_add(connector); | |
1866 | return; | |
1867 | ||
1868 | failed: | |
771fe6b9 JG |
1869 | drm_connector_cleanup(connector); |
1870 | kfree(connector); | |
1871 | } | |
1872 | ||
1873 | void | |
1874 | radeon_add_legacy_connector(struct drm_device *dev, | |
1875 | uint32_t connector_id, | |
1876 | uint32_t supported_device, | |
1877 | int connector_type, | |
b75fad06 | 1878 | struct radeon_i2c_bus_rec *i2c_bus, |
eed45b30 AD |
1879 | uint16_t connector_object_id, |
1880 | struct radeon_hpd *hpd) | |
771fe6b9 | 1881 | { |
445282db | 1882 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1883 | struct drm_connector *connector; |
1884 | struct radeon_connector *radeon_connector; | |
1885 | uint32_t subpixel_order = SubPixelNone; | |
1886 | ||
4ce001ab | 1887 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1888 | return; |
1889 | ||
cf4c12f9 AD |
1890 | /* if the user selected tv=0 don't try and add the connector */ |
1891 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1892 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1893 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1894 | (radeon_tv == 0)) | |
1895 | return; | |
1896 | ||
771fe6b9 JG |
1897 | /* see if we already added it */ |
1898 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1899 | radeon_connector = to_radeon_connector(connector); | |
1900 | if (radeon_connector->connector_id == connector_id) { | |
1901 | radeon_connector->devices |= supported_device; | |
1902 | return; | |
1903 | } | |
1904 | } | |
1905 | ||
1906 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); | |
1907 | if (!radeon_connector) | |
1908 | return; | |
1909 | ||
1910 | connector = &radeon_connector->base; | |
1911 | ||
1912 | radeon_connector->connector_id = connector_id; | |
1913 | radeon_connector->devices = supported_device; | |
b75fad06 | 1914 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1915 | radeon_connector->hpd = *hpd; |
bc1c4dc3 | 1916 | |
771fe6b9 JG |
1917 | switch (connector_type) { |
1918 | case DRM_MODE_CONNECTOR_VGA: | |
1919 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1920 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1921 | if (i2c_bus->valid) { |
f376b94f | 1922 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1923 | if (!radeon_connector->ddc_bus) |
a70882aa | 1924 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1925 | } |
35e4b7af | 1926 | radeon_connector->dac_load_detect = true; |
e35755fa | 1927 | drm_object_attach_property(&radeon_connector->base.base, |
445282db DA |
1928 | rdev->mode_info.load_detect_property, |
1929 | 1); | |
2581afcc AD |
1930 | /* no HPD on analog connectors */ |
1931 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
eb1f8e4f | 1932 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
c49948f4 AD |
1933 | connector->interlace_allowed = true; |
1934 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1935 | break; |
1936 | case DRM_MODE_CONNECTOR_DVIA: | |
1937 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1938 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1939 | if (i2c_bus->valid) { |
f376b94f | 1940 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1941 | if (!radeon_connector->ddc_bus) |
a70882aa | 1942 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1943 | } |
35e4b7af | 1944 | radeon_connector->dac_load_detect = true; |
e35755fa | 1945 | drm_object_attach_property(&radeon_connector->base.base, |
445282db DA |
1946 | rdev->mode_info.load_detect_property, |
1947 | 1); | |
2581afcc AD |
1948 | /* no HPD on analog connectors */ |
1949 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1950 | connector->interlace_allowed = true; |
1951 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1952 | break; |
1953 | case DRM_MODE_CONNECTOR_DVII: | |
1954 | case DRM_MODE_CONNECTOR_DVID: | |
1955 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 1956 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 1957 | if (i2c_bus->valid) { |
f376b94f | 1958 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1959 | if (!radeon_connector->ddc_bus) |
a70882aa | 1960 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
68b3adb4 AD |
1961 | } |
1962 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
35e4b7af | 1963 | radeon_connector->dac_load_detect = true; |
e35755fa | 1964 | drm_object_attach_property(&radeon_connector->base.base, |
445282db DA |
1965 | rdev->mode_info.load_detect_property, |
1966 | 1); | |
771fe6b9 JG |
1967 | } |
1968 | subpixel_order = SubPixelHorizontalRGB; | |
c49948f4 AD |
1969 | connector->interlace_allowed = true; |
1970 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
1971 | connector->doublescan_allowed = true; | |
1972 | else | |
1973 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1974 | break; |
1975 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1976 | case DRM_MODE_CONNECTOR_Composite: | |
1977 | case DRM_MODE_CONNECTOR_9PinDIN: | |
cf4c12f9 AD |
1978 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); |
1979 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1980 | radeon_connector->dac_load_detect = true; | |
1981 | /* RS400,RC410,RS480 chipset seems to report a lot | |
1982 | * of false positive on load detect, we haven't yet | |
1983 | * found a way to make load detect reliable on those | |
1984 | * chipset, thus just disable it for TV. | |
1985 | */ | |
1986 | if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) | |
1987 | radeon_connector->dac_load_detect = false; | |
e35755fa | 1988 | drm_object_attach_property(&radeon_connector->base.base, |
cf4c12f9 AD |
1989 | rdev->mode_info.load_detect_property, |
1990 | radeon_connector->dac_load_detect); | |
e35755fa | 1991 | drm_object_attach_property(&radeon_connector->base.base, |
cf4c12f9 AD |
1992 | rdev->mode_info.tv_std_property, |
1993 | radeon_combios_get_tv_info(rdev)); | |
1994 | /* no HPD on analog connectors */ | |
1995 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1996 | connector->interlace_allowed = false; |
1997 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1998 | break; |
1999 | case DRM_MODE_CONNECTOR_LVDS: | |
2000 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
0b4c0f3f | 2001 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
771fe6b9 | 2002 | if (i2c_bus->valid) { |
f376b94f | 2003 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 2004 | if (!radeon_connector->ddc_bus) |
a70882aa | 2005 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 2006 | } |
e35755fa | 2007 | drm_object_attach_property(&radeon_connector->base.base, |
445282db DA |
2008 | dev->mode_config.scaling_mode_property, |
2009 | DRM_MODE_SCALE_FULLSCREEN); | |
771fe6b9 | 2010 | subpixel_order = SubPixelHorizontalRGB; |
c49948f4 AD |
2011 | connector->interlace_allowed = false; |
2012 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
2013 | break; |
2014 | } | |
2015 | ||
2581afcc | 2016 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
2017 | if (i2c_bus->valid) |
2018 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
2019 | } else | |
2020 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
771fe6b9 JG |
2021 | connector->display_info.subpixel_order = subpixel_order; |
2022 | drm_sysfs_connector_add(connector); | |
771fe6b9 | 2023 | } |