Commit | Line | Data |
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771fe6b9 JG |
1 | /* |
2 | * Copyright 2007-8 Advanced Micro Devices, Inc. | |
3 | * Copyright 2008 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice shall be included in | |
13 | * all copies or substantial portions of the Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
21 | * OTHER DEALINGS IN THE SOFTWARE. | |
22 | * | |
23 | * Authors: Dave Airlie | |
24 | * Alex Deucher | |
25 | */ | |
760285e7 DH |
26 | #include <drm/drmP.h> |
27 | #include <drm/drm_edid.h> | |
28 | #include <drm/drm_crtc_helper.h> | |
29 | #include <drm/drm_fb_helper.h> | |
30 | #include <drm/radeon_drm.h> | |
771fe6b9 | 31 | #include "radeon.h" |
923f6848 | 32 | #include "atom.h" |
771fe6b9 JG |
33 | |
34 | extern void | |
35 | radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |
36 | struct drm_encoder *encoder, | |
37 | bool connected); | |
38 | extern void | |
39 | radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |
40 | struct drm_encoder *encoder, | |
41 | bool connected); | |
42 | ||
d4877cf2 AD |
43 | void radeon_connector_hotplug(struct drm_connector *connector) |
44 | { | |
45 | struct drm_device *dev = connector->dev; | |
46 | struct radeon_device *rdev = dev->dev_private; | |
47 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
48 | ||
cbac9543 AD |
49 | /* bail if the connector does not have hpd pin, e.g., |
50 | * VGA, TV, etc. | |
51 | */ | |
52 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) | |
53 | return; | |
54 | ||
1e85e1d0 | 55 | radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); |
d4877cf2 | 56 | |
73104b5c AD |
57 | /* if the connector is already off, don't turn it back on */ |
58 | if (connector->dpms != DRM_MODE_DPMS_ON) | |
59 | return; | |
60 | ||
d5811e87 AD |
61 | /* just deal with DP (not eDP) here. */ |
62 | if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { | |
266dcba5 JG |
63 | struct radeon_connector_atom_dig *dig_connector = |
64 | radeon_connector->con_priv; | |
7c3ed0fd | 65 | |
266dcba5 JG |
66 | /* if existing sink type was not DP no need to retrain */ |
67 | if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT) | |
68 | return; | |
69 | ||
70 | /* first get sink type as it may be reset after (un)plug */ | |
71 | dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); | |
72 | /* don't do anything if sink is not display port, i.e., | |
73 | * passive dp->(dvi|hdmi) adaptor | |
74 | */ | |
75 | if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { | |
76 | int saved_dpms = connector->dpms; | |
77 | /* Only turn off the display if it's physically disconnected */ | |
ca2ccde5 | 78 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { |
266dcba5 | 79 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF); |
ca2ccde5 JG |
80 | } else if (radeon_dp_needs_link_train(radeon_connector)) { |
81 | /* set it to OFF so that drm_helper_connector_dpms() | |
82 | * won't return immediately since the current state | |
83 | * is ON at this point. | |
84 | */ | |
85 | connector->dpms = DRM_MODE_DPMS_OFF; | |
266dcba5 | 86 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON); |
ca2ccde5 | 87 | } |
266dcba5 JG |
88 | connector->dpms = saved_dpms; |
89 | } | |
d4877cf2 | 90 | } |
d4877cf2 AD |
91 | } |
92 | ||
445282db DA |
93 | static void radeon_property_change_mode(struct drm_encoder *encoder) |
94 | { | |
95 | struct drm_crtc *crtc = encoder->crtc; | |
96 | ||
97 | if (crtc && crtc->enabled) { | |
98 | drm_crtc_helper_set_mode(crtc, &crtc->mode, | |
99 | crtc->x, crtc->y, crtc->fb); | |
100 | } | |
101 | } | |
eccea792 AD |
102 | |
103 | int radeon_get_monitor_bpc(struct drm_connector *connector) | |
104 | { | |
105 | struct drm_device *dev = connector->dev; | |
106 | struct radeon_device *rdev = dev->dev_private; | |
107 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
108 | struct radeon_connector_atom_dig *dig_connector; | |
109 | int bpc = 8; | |
110 | ||
111 | switch (connector->connector_type) { | |
112 | case DRM_MODE_CONNECTOR_DVII: | |
113 | case DRM_MODE_CONNECTOR_HDMIB: | |
114 | if (radeon_connector->use_digital) { | |
115 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) { | |
116 | if (connector->display_info.bpc) | |
117 | bpc = connector->display_info.bpc; | |
118 | } | |
119 | } | |
120 | break; | |
121 | case DRM_MODE_CONNECTOR_DVID: | |
122 | case DRM_MODE_CONNECTOR_HDMIA: | |
123 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) { | |
124 | if (connector->display_info.bpc) | |
125 | bpc = connector->display_info.bpc; | |
126 | } | |
127 | break; | |
128 | case DRM_MODE_CONNECTOR_DisplayPort: | |
129 | dig_connector = radeon_connector->con_priv; | |
130 | if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | |
131 | (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) || | |
132 | drm_detect_hdmi_monitor(radeon_connector->edid)) { | |
133 | if (connector->display_info.bpc) | |
134 | bpc = connector->display_info.bpc; | |
135 | } | |
136 | break; | |
137 | case DRM_MODE_CONNECTOR_eDP: | |
138 | case DRM_MODE_CONNECTOR_LVDS: | |
139 | if (connector->display_info.bpc) | |
140 | bpc = connector->display_info.bpc; | |
141 | else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) { | |
142 | struct drm_connector_helper_funcs *connector_funcs = | |
143 | connector->helper_private; | |
144 | struct drm_encoder *encoder = connector_funcs->best_encoder(connector); | |
145 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
146 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; | |
147 | ||
148 | if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR) | |
149 | bpc = 6; | |
150 | else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR) | |
151 | bpc = 8; | |
152 | } | |
153 | break; | |
154 | } | |
155 | return bpc; | |
156 | } | |
157 | ||
771fe6b9 JG |
158 | static void |
159 | radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status) | |
160 | { | |
161 | struct drm_device *dev = connector->dev; | |
162 | struct radeon_device *rdev = dev->dev_private; | |
163 | struct drm_encoder *best_encoder = NULL; | |
164 | struct drm_encoder *encoder = NULL; | |
165 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
166 | struct drm_mode_object *obj; | |
167 | bool connected; | |
168 | int i; | |
169 | ||
170 | best_encoder = connector_funcs->best_encoder(connector); | |
171 | ||
172 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
173 | if (connector->encoder_ids[i] == 0) | |
174 | break; | |
175 | ||
176 | obj = drm_mode_object_find(connector->dev, | |
177 | connector->encoder_ids[i], | |
178 | DRM_MODE_OBJECT_ENCODER); | |
179 | if (!obj) | |
180 | continue; | |
181 | ||
182 | encoder = obj_to_encoder(obj); | |
183 | ||
184 | if ((encoder == best_encoder) && (status == connector_status_connected)) | |
185 | connected = true; | |
186 | else | |
187 | connected = false; | |
188 | ||
189 | if (rdev->is_atom_bios) | |
190 | radeon_atombios_connected_scratch_regs(connector, encoder, connected); | |
191 | else | |
192 | radeon_combios_connected_scratch_regs(connector, encoder, connected); | |
193 | ||
194 | } | |
195 | } | |
196 | ||
1109ca09 | 197 | static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type) |
445282db DA |
198 | { |
199 | struct drm_mode_object *obj; | |
200 | struct drm_encoder *encoder; | |
201 | int i; | |
202 | ||
203 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
204 | if (connector->encoder_ids[i] == 0) | |
205 | break; | |
206 | ||
207 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
208 | if (!obj) | |
209 | continue; | |
210 | ||
211 | encoder = obj_to_encoder(obj); | |
212 | if (encoder->encoder_type == encoder_type) | |
213 | return encoder; | |
214 | } | |
215 | return NULL; | |
216 | } | |
217 | ||
1109ca09 | 218 | static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector) |
771fe6b9 JG |
219 | { |
220 | int enc_id = connector->encoder_ids[0]; | |
221 | struct drm_mode_object *obj; | |
222 | struct drm_encoder *encoder; | |
223 | ||
224 | /* pick the encoder ids */ | |
225 | if (enc_id) { | |
226 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
227 | if (!obj) | |
228 | return NULL; | |
229 | encoder = obj_to_encoder(obj); | |
230 | return encoder; | |
231 | } | |
232 | return NULL; | |
233 | } | |
234 | ||
4ce001ab DA |
235 | /* |
236 | * radeon_connector_analog_encoder_conflict_solve | |
237 | * - search for other connectors sharing this encoder | |
238 | * if priority is true, then set them disconnected if this is connected | |
239 | * if priority is false, set us disconnected if they are connected | |
240 | */ | |
241 | static enum drm_connector_status | |
242 | radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, | |
243 | struct drm_encoder *encoder, | |
244 | enum drm_connector_status current_status, | |
245 | bool priority) | |
246 | { | |
247 | struct drm_device *dev = connector->dev; | |
248 | struct drm_connector *conflict; | |
08d07511 | 249 | struct radeon_connector *radeon_conflict; |
4ce001ab DA |
250 | int i; |
251 | ||
252 | list_for_each_entry(conflict, &dev->mode_config.connector_list, head) { | |
253 | if (conflict == connector) | |
254 | continue; | |
255 | ||
08d07511 | 256 | radeon_conflict = to_radeon_connector(conflict); |
4ce001ab DA |
257 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { |
258 | if (conflict->encoder_ids[i] == 0) | |
259 | break; | |
260 | ||
261 | /* if the IDs match */ | |
262 | if (conflict->encoder_ids[i] == encoder->base.id) { | |
263 | if (conflict->status != connector_status_connected) | |
264 | continue; | |
08d07511 AD |
265 | |
266 | if (radeon_conflict->use_digital) | |
267 | continue; | |
4ce001ab DA |
268 | |
269 | if (priority == true) { | |
c5d46b4e AD |
270 | DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict)); |
271 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(connector)); | |
4ce001ab DA |
272 | conflict->status = connector_status_disconnected; |
273 | radeon_connector_update_scratch_regs(conflict, connector_status_disconnected); | |
274 | } else { | |
c5d46b4e AD |
275 | DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector)); |
276 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(conflict)); | |
4ce001ab DA |
277 | current_status = connector_status_disconnected; |
278 | } | |
279 | break; | |
280 | } | |
281 | } | |
282 | } | |
283 | return current_status; | |
284 | ||
285 | } | |
286 | ||
771fe6b9 JG |
287 | static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder) |
288 | { | |
289 | struct drm_device *dev = encoder->dev; | |
290 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
291 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 292 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
771fe6b9 | 293 | |
de2103e4 AD |
294 | if (native_mode->hdisplay != 0 && |
295 | native_mode->vdisplay != 0 && | |
296 | native_mode->clock != 0) { | |
fb06ca8f | 297 | mode = drm_mode_duplicate(dev, native_mode); |
771fe6b9 JG |
298 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; |
299 | drm_mode_set_name(mode); | |
300 | ||
d9fdaafb | 301 | DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name); |
d2efdf6d AD |
302 | } else if (native_mode->hdisplay != 0 && |
303 | native_mode->vdisplay != 0) { | |
304 | /* mac laptops without an edid */ | |
305 | /* Note that this is not necessarily the exact panel mode, | |
306 | * but an approximation based on the cvt formula. For these | |
307 | * systems we should ideally read the mode info out of the | |
308 | * registers or add a mode table, but this works and is much | |
309 | * simpler. | |
310 | */ | |
311 | mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); | |
312 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | |
d9fdaafb | 313 | DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name); |
771fe6b9 JG |
314 | } |
315 | return mode; | |
316 | } | |
317 | ||
923f6848 AD |
318 | static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector) |
319 | { | |
320 | struct drm_device *dev = encoder->dev; | |
321 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
322 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 323 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
923f6848 AD |
324 | int i; |
325 | struct mode_size { | |
326 | int w; | |
327 | int h; | |
328 | } common_modes[17] = { | |
329 | { 640, 480}, | |
330 | { 720, 480}, | |
331 | { 800, 600}, | |
332 | { 848, 480}, | |
333 | {1024, 768}, | |
334 | {1152, 768}, | |
335 | {1280, 720}, | |
336 | {1280, 800}, | |
337 | {1280, 854}, | |
338 | {1280, 960}, | |
339 | {1280, 1024}, | |
340 | {1440, 900}, | |
341 | {1400, 1050}, | |
342 | {1680, 1050}, | |
343 | {1600, 1200}, | |
344 | {1920, 1080}, | |
345 | {1920, 1200} | |
346 | }; | |
347 | ||
348 | for (i = 0; i < 17; i++) { | |
dfdd6467 AD |
349 | if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) { |
350 | if (common_modes[i].w > 1024 || | |
351 | common_modes[i].h > 768) | |
352 | continue; | |
353 | } | |
923f6848 | 354 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
de2103e4 AD |
355 | if (common_modes[i].w > native_mode->hdisplay || |
356 | common_modes[i].h > native_mode->vdisplay || | |
357 | (common_modes[i].w == native_mode->hdisplay && | |
358 | common_modes[i].h == native_mode->vdisplay)) | |
923f6848 AD |
359 | continue; |
360 | } | |
361 | if (common_modes[i].w < 320 || common_modes[i].h < 200) | |
362 | continue; | |
363 | ||
d50ba256 | 364 | mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false); |
923f6848 AD |
365 | drm_mode_probed_add(connector, mode); |
366 | } | |
367 | } | |
368 | ||
1109ca09 | 369 | static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property, |
771fe6b9 JG |
370 | uint64_t val) |
371 | { | |
445282db DA |
372 | struct drm_device *dev = connector->dev; |
373 | struct radeon_device *rdev = dev->dev_private; | |
374 | struct drm_encoder *encoder; | |
375 | struct radeon_encoder *radeon_encoder; | |
376 | ||
377 | if (property == rdev->mode_info.coherent_mode_property) { | |
378 | struct radeon_encoder_atom_dig *dig; | |
ce227c41 | 379 | bool new_coherent_mode; |
445282db DA |
380 | |
381 | /* need to find digital encoder on connector */ | |
382 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
383 | if (!encoder) | |
384 | return 0; | |
385 | ||
386 | radeon_encoder = to_radeon_encoder(encoder); | |
387 | ||
388 | if (!radeon_encoder->enc_priv) | |
389 | return 0; | |
390 | ||
391 | dig = radeon_encoder->enc_priv; | |
ce227c41 DA |
392 | new_coherent_mode = val ? true : false; |
393 | if (dig->coherent_mode != new_coherent_mode) { | |
394 | dig->coherent_mode = new_coherent_mode; | |
395 | radeon_property_change_mode(&radeon_encoder->base); | |
396 | } | |
445282db DA |
397 | } |
398 | ||
8666c076 AD |
399 | if (property == rdev->mode_info.audio_property) { |
400 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
401 | /* need to find digital encoder on connector */ | |
402 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
403 | if (!encoder) | |
404 | return 0; | |
405 | ||
406 | radeon_encoder = to_radeon_encoder(encoder); | |
407 | ||
408 | if (radeon_connector->audio != val) { | |
409 | radeon_connector->audio = val; | |
410 | radeon_property_change_mode(&radeon_encoder->base); | |
411 | } | |
412 | } | |
413 | ||
5b1714d3 AD |
414 | if (property == rdev->mode_info.underscan_property) { |
415 | /* need to find digital encoder on connector */ | |
416 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
417 | if (!encoder) | |
418 | return 0; | |
419 | ||
420 | radeon_encoder = to_radeon_encoder(encoder); | |
421 | ||
422 | if (radeon_encoder->underscan_type != val) { | |
423 | radeon_encoder->underscan_type = val; | |
424 | radeon_property_change_mode(&radeon_encoder->base); | |
425 | } | |
426 | } | |
427 | ||
5bccf5e3 MG |
428 | if (property == rdev->mode_info.underscan_hborder_property) { |
429 | /* need to find digital encoder on connector */ | |
430 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
431 | if (!encoder) | |
432 | return 0; | |
433 | ||
434 | radeon_encoder = to_radeon_encoder(encoder); | |
435 | ||
436 | if (radeon_encoder->underscan_hborder != val) { | |
437 | radeon_encoder->underscan_hborder = val; | |
438 | radeon_property_change_mode(&radeon_encoder->base); | |
439 | } | |
440 | } | |
441 | ||
442 | if (property == rdev->mode_info.underscan_vborder_property) { | |
443 | /* need to find digital encoder on connector */ | |
444 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
445 | if (!encoder) | |
446 | return 0; | |
447 | ||
448 | radeon_encoder = to_radeon_encoder(encoder); | |
449 | ||
450 | if (radeon_encoder->underscan_vborder != val) { | |
451 | radeon_encoder->underscan_vborder = val; | |
452 | radeon_property_change_mode(&radeon_encoder->base); | |
453 | } | |
454 | } | |
455 | ||
445282db DA |
456 | if (property == rdev->mode_info.tv_std_property) { |
457 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC); | |
458 | if (!encoder) { | |
459 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC); | |
460 | } | |
461 | ||
462 | if (!encoder) | |
463 | return 0; | |
464 | ||
465 | radeon_encoder = to_radeon_encoder(encoder); | |
466 | if (!radeon_encoder->enc_priv) | |
467 | return 0; | |
643acacf | 468 | if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) { |
445282db DA |
469 | struct radeon_encoder_atom_dac *dac_int; |
470 | dac_int = radeon_encoder->enc_priv; | |
471 | dac_int->tv_std = val; | |
472 | } else { | |
473 | struct radeon_encoder_tv_dac *dac_int; | |
474 | dac_int = radeon_encoder->enc_priv; | |
475 | dac_int->tv_std = val; | |
476 | } | |
477 | radeon_property_change_mode(&radeon_encoder->base); | |
478 | } | |
479 | ||
480 | if (property == rdev->mode_info.load_detect_property) { | |
481 | struct radeon_connector *radeon_connector = | |
482 | to_radeon_connector(connector); | |
483 | ||
484 | if (val == 0) | |
485 | radeon_connector->dac_load_detect = false; | |
486 | else | |
487 | radeon_connector->dac_load_detect = true; | |
488 | } | |
489 | ||
490 | if (property == rdev->mode_info.tmds_pll_property) { | |
491 | struct radeon_encoder_int_tmds *tmds = NULL; | |
492 | bool ret = false; | |
493 | /* need to find digital encoder on connector */ | |
494 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
495 | if (!encoder) | |
496 | return 0; | |
497 | ||
498 | radeon_encoder = to_radeon_encoder(encoder); | |
499 | ||
500 | tmds = radeon_encoder->enc_priv; | |
501 | if (!tmds) | |
502 | return 0; | |
503 | ||
504 | if (val == 0) { | |
505 | if (rdev->is_atom_bios) | |
506 | ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds); | |
507 | else | |
508 | ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds); | |
509 | } | |
510 | if (val == 1 || ret == false) { | |
511 | radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds); | |
512 | } | |
513 | radeon_property_change_mode(&radeon_encoder->base); | |
514 | } | |
515 | ||
771fe6b9 JG |
516 | return 0; |
517 | } | |
518 | ||
8dfaa8a7 MD |
519 | static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder, |
520 | struct drm_connector *connector) | |
521 | { | |
522 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 523 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
13bb9430 MG |
524 | struct drm_display_mode *t, *mode; |
525 | ||
526 | /* If the EDID preferred mode doesn't match the native mode, use it */ | |
527 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { | |
528 | if (mode->type & DRM_MODE_TYPE_PREFERRED) { | |
529 | if (mode->hdisplay != native_mode->hdisplay || | |
530 | mode->vdisplay != native_mode->vdisplay) | |
531 | memcpy(native_mode, mode, sizeof(*mode)); | |
532 | } | |
533 | } | |
8dfaa8a7 MD |
534 | |
535 | /* Try to get native mode details from EDID if necessary */ | |
de2103e4 | 536 | if (!native_mode->clock) { |
8dfaa8a7 | 537 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { |
de2103e4 AD |
538 | if (mode->hdisplay == native_mode->hdisplay && |
539 | mode->vdisplay == native_mode->vdisplay) { | |
540 | *native_mode = *mode; | |
541 | drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); | |
c5d46b4e | 542 | DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n"); |
8dfaa8a7 MD |
543 | break; |
544 | } | |
545 | } | |
546 | } | |
13bb9430 | 547 | |
de2103e4 | 548 | if (!native_mode->clock) { |
c5d46b4e | 549 | DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n"); |
8dfaa8a7 MD |
550 | radeon_encoder->rmx_type = RMX_OFF; |
551 | } | |
552 | } | |
771fe6b9 JG |
553 | |
554 | static int radeon_lvds_get_modes(struct drm_connector *connector) | |
555 | { | |
556 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
557 | struct drm_encoder *encoder; | |
558 | int ret = 0; | |
559 | struct drm_display_mode *mode; | |
560 | ||
561 | if (radeon_connector->ddc_bus) { | |
562 | ret = radeon_ddc_get_modes(radeon_connector); | |
563 | if (ret > 0) { | |
7747b713 | 564 | encoder = radeon_best_single_encoder(connector); |
8dfaa8a7 MD |
565 | if (encoder) { |
566 | radeon_fixup_lvds_native_mode(encoder, connector); | |
7747b713 AD |
567 | /* add scaled modes */ |
568 | radeon_add_common_modes(encoder, connector); | |
8dfaa8a7 | 569 | } |
771fe6b9 JG |
570 | return ret; |
571 | } | |
572 | } | |
573 | ||
574 | encoder = radeon_best_single_encoder(connector); | |
575 | if (!encoder) | |
576 | return 0; | |
577 | ||
578 | /* we have no EDID modes */ | |
579 | mode = radeon_fp_native_mode(encoder); | |
580 | if (mode) { | |
581 | ret = 1; | |
582 | drm_mode_probed_add(connector, mode); | |
7a868e18 AD |
583 | /* add the width/height from vbios tables if available */ |
584 | connector->display_info.width_mm = mode->width_mm; | |
585 | connector->display_info.height_mm = mode->height_mm; | |
7747b713 AD |
586 | /* add scaled modes */ |
587 | radeon_add_common_modes(encoder, connector); | |
771fe6b9 | 588 | } |
923f6848 | 589 | |
771fe6b9 JG |
590 | return ret; |
591 | } | |
592 | ||
593 | static int radeon_lvds_mode_valid(struct drm_connector *connector, | |
594 | struct drm_display_mode *mode) | |
595 | { | |
a3fa6320 AD |
596 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
597 | ||
598 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
599 | return MODE_PANEL; | |
600 | ||
601 | if (encoder) { | |
602 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
603 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
604 | ||
605 | /* AVIVO hardware supports downscaling modes larger than the panel | |
606 | * to the panel size, but I'm not sure this is desirable. | |
607 | */ | |
608 | if ((mode->hdisplay > native_mode->hdisplay) || | |
609 | (mode->vdisplay > native_mode->vdisplay)) | |
610 | return MODE_PANEL; | |
611 | ||
612 | /* if scaling is disabled, block non-native modes */ | |
613 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
614 | if ((mode->hdisplay != native_mode->hdisplay) || | |
615 | (mode->vdisplay != native_mode->vdisplay)) | |
616 | return MODE_PANEL; | |
617 | } | |
618 | } | |
619 | ||
771fe6b9 JG |
620 | return MODE_OK; |
621 | } | |
622 | ||
7b334fcb | 623 | static enum drm_connector_status |
930a9e28 | 624 | radeon_lvds_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 625 | { |
0549a061 | 626 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
2ffb8429 | 627 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
0549a061 | 628 | enum drm_connector_status ret = connector_status_disconnected; |
2ffb8429 AD |
629 | |
630 | if (encoder) { | |
631 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 632 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
2ffb8429 AD |
633 | |
634 | /* check if panel is valid */ | |
de2103e4 | 635 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) |
2ffb8429 AD |
636 | ret = connector_status_connected; |
637 | ||
638 | } | |
0549a061 AD |
639 | |
640 | /* check for edid as well */ | |
0294cf4f AD |
641 | if (radeon_connector->edid) |
642 | ret = connector_status_connected; | |
643 | else { | |
644 | if (radeon_connector->ddc_bus) { | |
0294cf4f AD |
645 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
646 | &radeon_connector->ddc_bus->adapter); | |
0294cf4f AD |
647 | if (radeon_connector->edid) |
648 | ret = connector_status_connected; | |
649 | } | |
0549a061 | 650 | } |
771fe6b9 | 651 | /* check acpi lid status ??? */ |
2ffb8429 | 652 | |
771fe6b9 JG |
653 | radeon_connector_update_scratch_regs(connector, ret); |
654 | return ret; | |
655 | } | |
656 | ||
657 | static void radeon_connector_destroy(struct drm_connector *connector) | |
658 | { | |
659 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
660 | ||
0294cf4f AD |
661 | if (radeon_connector->edid) |
662 | kfree(radeon_connector->edid); | |
771fe6b9 JG |
663 | kfree(radeon_connector->con_priv); |
664 | drm_sysfs_connector_remove(connector); | |
665 | drm_connector_cleanup(connector); | |
666 | kfree(connector); | |
667 | } | |
668 | ||
445282db DA |
669 | static int radeon_lvds_set_property(struct drm_connector *connector, |
670 | struct drm_property *property, | |
671 | uint64_t value) | |
672 | { | |
673 | struct drm_device *dev = connector->dev; | |
674 | struct radeon_encoder *radeon_encoder; | |
675 | enum radeon_rmx_type rmx_type; | |
676 | ||
d9fdaafb | 677 | DRM_DEBUG_KMS("\n"); |
445282db DA |
678 | if (property != dev->mode_config.scaling_mode_property) |
679 | return 0; | |
680 | ||
681 | if (connector->encoder) | |
682 | radeon_encoder = to_radeon_encoder(connector->encoder); | |
683 | else { | |
684 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
685 | radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector)); | |
686 | } | |
687 | ||
688 | switch (value) { | |
689 | case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break; | |
690 | case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break; | |
691 | case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break; | |
692 | default: | |
693 | case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break; | |
694 | } | |
695 | if (radeon_encoder->rmx_type == rmx_type) | |
696 | return 0; | |
697 | ||
698 | radeon_encoder->rmx_type = rmx_type; | |
699 | ||
700 | radeon_property_change_mode(&radeon_encoder->base); | |
701 | return 0; | |
702 | } | |
703 | ||
704 | ||
1109ca09 | 705 | static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = { |
771fe6b9 JG |
706 | .get_modes = radeon_lvds_get_modes, |
707 | .mode_valid = radeon_lvds_mode_valid, | |
708 | .best_encoder = radeon_best_single_encoder, | |
709 | }; | |
710 | ||
1109ca09 | 711 | static const struct drm_connector_funcs radeon_lvds_connector_funcs = { |
771fe6b9 JG |
712 | .dpms = drm_helper_connector_dpms, |
713 | .detect = radeon_lvds_detect, | |
714 | .fill_modes = drm_helper_probe_single_connector_modes, | |
715 | .destroy = radeon_connector_destroy, | |
445282db | 716 | .set_property = radeon_lvds_set_property, |
771fe6b9 JG |
717 | }; |
718 | ||
719 | static int radeon_vga_get_modes(struct drm_connector *connector) | |
720 | { | |
721 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
722 | int ret; | |
723 | ||
724 | ret = radeon_ddc_get_modes(radeon_connector); | |
725 | ||
726 | return ret; | |
727 | } | |
728 | ||
729 | static int radeon_vga_mode_valid(struct drm_connector *connector, | |
730 | struct drm_display_mode *mode) | |
731 | { | |
b20f9bef AD |
732 | struct drm_device *dev = connector->dev; |
733 | struct radeon_device *rdev = dev->dev_private; | |
734 | ||
a3fa6320 | 735 | /* XXX check mode bandwidth */ |
b20f9bef AD |
736 | |
737 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | |
738 | return MODE_CLOCK_HIGH; | |
739 | ||
771fe6b9 JG |
740 | return MODE_OK; |
741 | } | |
742 | ||
7b334fcb | 743 | static enum drm_connector_status |
930a9e28 | 744 | radeon_vga_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 745 | { |
fafcf94e AD |
746 | struct drm_device *dev = connector->dev; |
747 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 JG |
748 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
749 | struct drm_encoder *encoder; | |
750 | struct drm_encoder_helper_funcs *encoder_funcs; | |
4b9d2a21 | 751 | bool dret = false; |
771fe6b9 JG |
752 | enum drm_connector_status ret = connector_status_disconnected; |
753 | ||
4ce001ab DA |
754 | encoder = radeon_best_single_encoder(connector); |
755 | if (!encoder) | |
756 | ret = connector_status_disconnected; | |
757 | ||
eb6b6d7c | 758 | if (radeon_connector->ddc_bus) |
0a9069d3 | 759 | dret = radeon_ddc_probe(radeon_connector, false); |
0294cf4f | 760 | if (dret) { |
d0d0a225 | 761 | radeon_connector->detected_by_load = false; |
0294cf4f AD |
762 | if (radeon_connector->edid) { |
763 | kfree(radeon_connector->edid); | |
764 | radeon_connector->edid = NULL; | |
765 | } | |
0294cf4f | 766 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
0294cf4f AD |
767 | |
768 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
769 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
770 | drm_get_connector_name(connector)); | |
771 | ret = connector_status_connected; | |
0294cf4f AD |
772 | } else { |
773 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
774 | ||
775 | /* some oems have boards with separate digital and analog connectors | |
776 | * with a shared ddc line (often vga + hdmi) | |
777 | */ | |
778 | if (radeon_connector->use_digital && radeon_connector->shared_ddc) { | |
779 | kfree(radeon_connector->edid); | |
780 | radeon_connector->edid = NULL; | |
781 | ret = connector_status_disconnected; | |
782 | } else | |
783 | ret = connector_status_connected; | |
784 | } | |
785 | } else { | |
c3cceedd DA |
786 | |
787 | /* if we aren't forcing don't do destructive polling */ | |
d0d0a225 AD |
788 | if (!force) { |
789 | /* only return the previous status if we last | |
790 | * detected a monitor via load. | |
791 | */ | |
792 | if (radeon_connector->detected_by_load) | |
793 | return connector->status; | |
794 | else | |
795 | return ret; | |
796 | } | |
c3cceedd | 797 | |
d8a7f792 | 798 | if (radeon_connector->dac_load_detect && encoder) { |
445282db DA |
799 | encoder_funcs = encoder->helper_private; |
800 | ret = encoder_funcs->detect(encoder, connector); | |
34076446 | 801 | if (ret != connector_status_disconnected) |
d0d0a225 | 802 | radeon_connector->detected_by_load = true; |
445282db | 803 | } |
771fe6b9 JG |
804 | } |
805 | ||
4ce001ab DA |
806 | if (ret == connector_status_connected) |
807 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
fafcf94e AD |
808 | |
809 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the | |
810 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
811 | * by other means, assume the CRT is connected and use that EDID. | |
812 | */ | |
813 | if ((!rdev->is_atom_bios) && | |
814 | (ret == connector_status_disconnected) && | |
815 | rdev->mode_info.bios_hardcoded_edid_size) { | |
816 | ret = connector_status_connected; | |
817 | } | |
818 | ||
771fe6b9 JG |
819 | radeon_connector_update_scratch_regs(connector, ret); |
820 | return ret; | |
821 | } | |
822 | ||
1109ca09 | 823 | static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = { |
771fe6b9 JG |
824 | .get_modes = radeon_vga_get_modes, |
825 | .mode_valid = radeon_vga_mode_valid, | |
826 | .best_encoder = radeon_best_single_encoder, | |
827 | }; | |
828 | ||
1109ca09 | 829 | static const struct drm_connector_funcs radeon_vga_connector_funcs = { |
771fe6b9 JG |
830 | .dpms = drm_helper_connector_dpms, |
831 | .detect = radeon_vga_detect, | |
832 | .fill_modes = drm_helper_probe_single_connector_modes, | |
833 | .destroy = radeon_connector_destroy, | |
834 | .set_property = radeon_connector_set_property, | |
835 | }; | |
836 | ||
4ce001ab DA |
837 | static int radeon_tv_get_modes(struct drm_connector *connector) |
838 | { | |
839 | struct drm_device *dev = connector->dev; | |
923f6848 | 840 | struct radeon_device *rdev = dev->dev_private; |
4ce001ab | 841 | struct drm_display_mode *tv_mode; |
923f6848 | 842 | struct drm_encoder *encoder; |
4ce001ab | 843 | |
923f6848 AD |
844 | encoder = radeon_best_single_encoder(connector); |
845 | if (!encoder) | |
846 | return 0; | |
4ce001ab | 847 | |
923f6848 AD |
848 | /* avivo chips can scale any mode */ |
849 | if (rdev->family >= CHIP_RS600) | |
850 | /* add scaled modes */ | |
851 | radeon_add_common_modes(encoder, connector); | |
852 | else { | |
853 | /* only 800x600 is supported right now on pre-avivo chips */ | |
d50ba256 | 854 | tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false); |
923f6848 AD |
855 | tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; |
856 | drm_mode_probed_add(connector, tv_mode); | |
857 | } | |
4ce001ab DA |
858 | return 1; |
859 | } | |
860 | ||
861 | static int radeon_tv_mode_valid(struct drm_connector *connector, | |
862 | struct drm_display_mode *mode) | |
863 | { | |
a3fa6320 AD |
864 | if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) |
865 | return MODE_CLOCK_RANGE; | |
4ce001ab DA |
866 | return MODE_OK; |
867 | } | |
868 | ||
7b334fcb | 869 | static enum drm_connector_status |
930a9e28 | 870 | radeon_tv_detect(struct drm_connector *connector, bool force) |
4ce001ab DA |
871 | { |
872 | struct drm_encoder *encoder; | |
873 | struct drm_encoder_helper_funcs *encoder_funcs; | |
445282db DA |
874 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
875 | enum drm_connector_status ret = connector_status_disconnected; | |
876 | ||
877 | if (!radeon_connector->dac_load_detect) | |
878 | return ret; | |
4ce001ab DA |
879 | |
880 | encoder = radeon_best_single_encoder(connector); | |
881 | if (!encoder) | |
882 | ret = connector_status_disconnected; | |
883 | else { | |
884 | encoder_funcs = encoder->helper_private; | |
885 | ret = encoder_funcs->detect(encoder, connector); | |
886 | } | |
887 | if (ret == connector_status_connected) | |
888 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false); | |
889 | radeon_connector_update_scratch_regs(connector, ret); | |
890 | return ret; | |
891 | } | |
892 | ||
1109ca09 | 893 | static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = { |
4ce001ab DA |
894 | .get_modes = radeon_tv_get_modes, |
895 | .mode_valid = radeon_tv_mode_valid, | |
896 | .best_encoder = radeon_best_single_encoder, | |
897 | }; | |
898 | ||
1109ca09 | 899 | static const struct drm_connector_funcs radeon_tv_connector_funcs = { |
4ce001ab DA |
900 | .dpms = drm_helper_connector_dpms, |
901 | .detect = radeon_tv_detect, | |
902 | .fill_modes = drm_helper_probe_single_connector_modes, | |
903 | .destroy = radeon_connector_destroy, | |
904 | .set_property = radeon_connector_set_property, | |
905 | }; | |
906 | ||
771fe6b9 JG |
907 | static int radeon_dvi_get_modes(struct drm_connector *connector) |
908 | { | |
909 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
910 | int ret; | |
911 | ||
912 | ret = radeon_ddc_get_modes(radeon_connector); | |
771fe6b9 JG |
913 | return ret; |
914 | } | |
915 | ||
11fe1266 TU |
916 | static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector) |
917 | { | |
918 | struct drm_device *dev = connector->dev; | |
919 | struct radeon_device *rdev = dev->dev_private; | |
920 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
921 | enum drm_connector_status status; | |
922 | ||
923 | /* We only trust HPD on R600 and newer ASICS. */ | |
924 | if (rdev->family >= CHIP_R600 | |
925 | && radeon_connector->hpd.hpd != RADEON_HPD_NONE) { | |
926 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) | |
927 | status = connector_status_connected; | |
928 | else | |
929 | status = connector_status_disconnected; | |
930 | if (connector->status == status) | |
931 | return true; | |
932 | } | |
933 | ||
934 | return false; | |
935 | } | |
936 | ||
4ce001ab DA |
937 | /* |
938 | * DVI is complicated | |
939 | * Do a DDC probe, if DDC probe passes, get the full EDID so | |
940 | * we can do analog/digital monitor detection at this point. | |
941 | * If the monitor is an analog monitor or we got no DDC, | |
942 | * we need to find the DAC encoder object for this connector. | |
943 | * If we got no DDC, we do load detection on the DAC encoder object. | |
944 | * If we got analog DDC or load detection passes on the DAC encoder | |
945 | * we have to check if this analog encoder is shared with anyone else (TV) | |
946 | * if its shared we have to set the other connector to disconnected. | |
947 | */ | |
7b334fcb | 948 | static enum drm_connector_status |
930a9e28 | 949 | radeon_dvi_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 950 | { |
fafcf94e AD |
951 | struct drm_device *dev = connector->dev; |
952 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 | 953 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
4ce001ab | 954 | struct drm_encoder *encoder = NULL; |
771fe6b9 JG |
955 | struct drm_encoder_helper_funcs *encoder_funcs; |
956 | struct drm_mode_object *obj; | |
957 | int i; | |
958 | enum drm_connector_status ret = connector_status_disconnected; | |
fc87f13b | 959 | bool dret = false, broken_edid = false; |
771fe6b9 | 960 | |
11fe1266 TU |
961 | if (!force && radeon_check_hpd_status_unchanged(connector)) |
962 | return connector->status; | |
963 | ||
eb6b6d7c | 964 | if (radeon_connector->ddc_bus) |
0a9069d3 | 965 | dret = radeon_ddc_probe(radeon_connector, false); |
4ce001ab | 966 | if (dret) { |
d0d0a225 | 967 | radeon_connector->detected_by_load = false; |
0294cf4f AD |
968 | if (radeon_connector->edid) { |
969 | kfree(radeon_connector->edid); | |
970 | radeon_connector->edid = NULL; | |
971 | } | |
4ce001ab | 972 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
4ce001ab DA |
973 | |
974 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
975 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
976 | drm_get_connector_name(connector)); | |
4a9a8b71 DA |
977 | /* rs690 seems to have a problem with connectors not existing and always |
978 | * return a block of 0's. If we see this just stop polling on this output */ | |
979 | if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) { | |
980 | ret = connector_status_disconnected; | |
981 | DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector)); | |
982 | radeon_connector->ddc_bus = NULL; | |
fc87f13b EE |
983 | } else { |
984 | ret = connector_status_connected; | |
985 | broken_edid = true; /* defer use_digital to later */ | |
4a9a8b71 | 986 | } |
4ce001ab DA |
987 | } else { |
988 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
989 | ||
0294cf4f AD |
990 | /* some oems have boards with separate digital and analog connectors |
991 | * with a shared ddc line (often vga + hdmi) | |
992 | */ | |
993 | if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) { | |
994 | kfree(radeon_connector->edid); | |
995 | radeon_connector->edid = NULL; | |
996 | ret = connector_status_disconnected; | |
997 | } else | |
998 | ret = connector_status_connected; | |
71407c46 | 999 | |
42f14c4b AD |
1000 | /* This gets complicated. We have boards with VGA + HDMI with a |
1001 | * shared DDC line and we have boards with DVI-D + HDMI with a shared | |
1002 | * DDC line. The latter is more complex because with DVI<->HDMI adapters | |
1003 | * you don't really know what's connected to which port as both are digital. | |
71407c46 | 1004 | */ |
d3932d6c | 1005 | if (radeon_connector->shared_ddc && (ret == connector_status_connected)) { |
71407c46 AD |
1006 | struct drm_connector *list_connector; |
1007 | struct radeon_connector *list_radeon_connector; | |
1008 | list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) { | |
1009 | if (connector == list_connector) | |
1010 | continue; | |
1011 | list_radeon_connector = to_radeon_connector(list_connector); | |
b2ea4aa6 AD |
1012 | if (list_radeon_connector->shared_ddc && |
1013 | (list_radeon_connector->ddc_bus->rec.i2c_id == | |
1014 | radeon_connector->ddc_bus->rec.i2c_id)) { | |
42f14c4b AD |
1015 | /* cases where both connectors are digital */ |
1016 | if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) { | |
1017 | /* hpd is our only option in this case */ | |
1018 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { | |
71407c46 AD |
1019 | kfree(radeon_connector->edid); |
1020 | radeon_connector->edid = NULL; | |
1021 | ret = connector_status_disconnected; | |
1022 | } | |
1023 | } | |
1024 | } | |
1025 | } | |
1026 | } | |
4ce001ab DA |
1027 | } |
1028 | } | |
1029 | ||
1030 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == true)) | |
1031 | goto out; | |
1032 | ||
5f0a2612 AD |
1033 | /* DVI-D and HDMI-A are digital only */ |
1034 | if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) || | |
1035 | (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA)) | |
1036 | goto out; | |
1037 | ||
d0d0a225 | 1038 | /* if we aren't forcing don't do destructive polling */ |
c3cceedd | 1039 | if (!force) { |
d0d0a225 AD |
1040 | /* only return the previous status if we last |
1041 | * detected a monitor via load. | |
1042 | */ | |
1043 | if (radeon_connector->detected_by_load) | |
1044 | ret = connector->status; | |
c3cceedd DA |
1045 | goto out; |
1046 | } | |
1047 | ||
4ce001ab | 1048 | /* find analog encoder */ |
445282db DA |
1049 | if (radeon_connector->dac_load_detect) { |
1050 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1051 | if (connector->encoder_ids[i] == 0) | |
1052 | break; | |
771fe6b9 | 1053 | |
445282db DA |
1054 | obj = drm_mode_object_find(connector->dev, |
1055 | connector->encoder_ids[i], | |
1056 | DRM_MODE_OBJECT_ENCODER); | |
1057 | if (!obj) | |
1058 | continue; | |
771fe6b9 | 1059 | |
445282db | 1060 | encoder = obj_to_encoder(obj); |
771fe6b9 | 1061 | |
e3632507 | 1062 | if (encoder->encoder_type != DRM_MODE_ENCODER_DAC && |
e00e8b5e AD |
1063 | encoder->encoder_type != DRM_MODE_ENCODER_TVDAC) |
1064 | continue; | |
1065 | ||
445282db DA |
1066 | encoder_funcs = encoder->helper_private; |
1067 | if (encoder_funcs->detect) { | |
fc87f13b EE |
1068 | if (!broken_edid) { |
1069 | if (ret != connector_status_connected) { | |
1070 | /* deal with analog monitors without DDC */ | |
1071 | ret = encoder_funcs->detect(encoder, connector); | |
1072 | if (ret == connector_status_connected) { | |
1073 | radeon_connector->use_digital = false; | |
1074 | } | |
1075 | if (ret != connector_status_disconnected) | |
1076 | radeon_connector->detected_by_load = true; | |
445282db | 1077 | } |
fc87f13b EE |
1078 | } else { |
1079 | enum drm_connector_status lret; | |
1080 | /* assume digital unless load detected otherwise */ | |
1081 | radeon_connector->use_digital = true; | |
1082 | lret = encoder_funcs->detect(encoder, connector); | |
1083 | DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret); | |
1084 | if (lret == connector_status_connected) | |
1085 | radeon_connector->use_digital = false; | |
771fe6b9 | 1086 | } |
445282db | 1087 | break; |
771fe6b9 JG |
1088 | } |
1089 | } | |
1090 | } | |
1091 | ||
4ce001ab DA |
1092 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) && |
1093 | encoder) { | |
1094 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
1095 | } | |
1096 | ||
fafcf94e AD |
1097 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the |
1098 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
1099 | * by other means, assume the DFP is connected and use that EDID. In most | |
1100 | * cases the DVI port is actually a virtual KVM port connected to the service | |
1101 | * processor. | |
1102 | */ | |
a09d431f | 1103 | out: |
fafcf94e AD |
1104 | if ((!rdev->is_atom_bios) && |
1105 | (ret == connector_status_disconnected) && | |
1106 | rdev->mode_info.bios_hardcoded_edid_size) { | |
1107 | radeon_connector->use_digital = true; | |
1108 | ret = connector_status_connected; | |
1109 | } | |
1110 | ||
771fe6b9 JG |
1111 | /* updated in get modes as well since we need to know if it's analog or digital */ |
1112 | radeon_connector_update_scratch_regs(connector, ret); | |
1113 | return ret; | |
1114 | } | |
1115 | ||
1116 | /* okay need to be smart in here about which encoder to pick */ | |
1109ca09 | 1117 | static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector) |
771fe6b9 JG |
1118 | { |
1119 | int enc_id = connector->encoder_ids[0]; | |
1120 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1121 | struct drm_mode_object *obj; | |
1122 | struct drm_encoder *encoder; | |
1123 | int i; | |
1124 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1125 | if (connector->encoder_ids[i] == 0) | |
1126 | break; | |
1127 | ||
1128 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1129 | if (!obj) | |
1130 | continue; | |
1131 | ||
1132 | encoder = obj_to_encoder(obj); | |
1133 | ||
4ce001ab | 1134 | if (radeon_connector->use_digital == true) { |
771fe6b9 JG |
1135 | if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) |
1136 | return encoder; | |
1137 | } else { | |
1138 | if (encoder->encoder_type == DRM_MODE_ENCODER_DAC || | |
1139 | encoder->encoder_type == DRM_MODE_ENCODER_TVDAC) | |
1140 | return encoder; | |
1141 | } | |
1142 | } | |
1143 | ||
1144 | /* see if we have a default encoder TODO */ | |
1145 | ||
1146 | /* then check use digitial */ | |
1147 | /* pick the first one */ | |
1148 | if (enc_id) { | |
1149 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
1150 | if (!obj) | |
1151 | return NULL; | |
1152 | encoder = obj_to_encoder(obj); | |
1153 | return encoder; | |
1154 | } | |
1155 | return NULL; | |
1156 | } | |
1157 | ||
d50ba256 DA |
1158 | static void radeon_dvi_force(struct drm_connector *connector) |
1159 | { | |
1160 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1161 | if (connector->force == DRM_FORCE_ON) | |
1162 | radeon_connector->use_digital = false; | |
1163 | if (connector->force == DRM_FORCE_ON_DIGITAL) | |
1164 | radeon_connector->use_digital = true; | |
1165 | } | |
1166 | ||
a3fa6320 AD |
1167 | static int radeon_dvi_mode_valid(struct drm_connector *connector, |
1168 | struct drm_display_mode *mode) | |
1169 | { | |
1b24203e AD |
1170 | struct drm_device *dev = connector->dev; |
1171 | struct radeon_device *rdev = dev->dev_private; | |
a3fa6320 AD |
1172 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
1173 | ||
1174 | /* XXX check mode bandwidth */ | |
1175 | ||
1b24203e AD |
1176 | /* clocks over 135 MHz have heat issues with DVI on RV100 */ |
1177 | if (radeon_connector->use_digital && | |
1178 | (rdev->family == CHIP_RV100) && | |
1179 | (mode->clock > 135000)) | |
1180 | return MODE_CLOCK_HIGH; | |
1181 | ||
a3fa6320 AD |
1182 | if (radeon_connector->use_digital && (mode->clock > 165000)) { |
1183 | if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || | |
1184 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || | |
1185 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) | |
1186 | return MODE_OK; | |
e1e84017 | 1187 | else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) { |
1b2681ba | 1188 | if (ASIC_IS_DCE6(rdev)) { |
e1e84017 AD |
1189 | /* HDMI 1.3+ supports max clock of 340 Mhz */ |
1190 | if (mode->clock > 340000) | |
1191 | return MODE_CLOCK_HIGH; | |
1192 | else | |
1193 | return MODE_OK; | |
1194 | } else | |
1195 | return MODE_CLOCK_HIGH; | |
1196 | } else | |
a3fa6320 AD |
1197 | return MODE_CLOCK_HIGH; |
1198 | } | |
b20f9bef AD |
1199 | |
1200 | /* check against the max pixel clock */ | |
1201 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | |
1202 | return MODE_CLOCK_HIGH; | |
1203 | ||
a3fa6320 AD |
1204 | return MODE_OK; |
1205 | } | |
1206 | ||
1109ca09 | 1207 | static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { |
771fe6b9 | 1208 | .get_modes = radeon_dvi_get_modes, |
a3fa6320 | 1209 | .mode_valid = radeon_dvi_mode_valid, |
771fe6b9 JG |
1210 | .best_encoder = radeon_dvi_encoder, |
1211 | }; | |
1212 | ||
1109ca09 | 1213 | static const struct drm_connector_funcs radeon_dvi_connector_funcs = { |
771fe6b9 JG |
1214 | .dpms = drm_helper_connector_dpms, |
1215 | .detect = radeon_dvi_detect, | |
1216 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1217 | .set_property = radeon_connector_set_property, | |
1218 | .destroy = radeon_connector_destroy, | |
d50ba256 | 1219 | .force = radeon_dvi_force, |
771fe6b9 JG |
1220 | }; |
1221 | ||
ffd09c64 AD |
1222 | static void radeon_dp_connector_destroy(struct drm_connector *connector) |
1223 | { | |
1224 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1225 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1226 | ||
ffd09c64 AD |
1227 | if (radeon_connector->edid) |
1228 | kfree(radeon_connector->edid); | |
1229 | if (radeon_dig_connector->dp_i2c_bus) | |
ac1aade6 | 1230 | radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus); |
ffd09c64 AD |
1231 | kfree(radeon_connector->con_priv); |
1232 | drm_sysfs_connector_remove(connector); | |
1233 | drm_connector_cleanup(connector); | |
1234 | kfree(connector); | |
1235 | } | |
1236 | ||
746c1aa4 DA |
1237 | static int radeon_dp_get_modes(struct drm_connector *connector) |
1238 | { | |
1239 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
8b834852 | 1240 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
591a10e1 | 1241 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
746c1aa4 DA |
1242 | int ret; |
1243 | ||
f89931f3 AD |
1244 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1245 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1246 | struct drm_display_mode *mode; |
1247 | ||
2b69ffb9 AD |
1248 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
1249 | if (!radeon_dig_connector->edp_on) | |
1250 | atombios_set_edp_panel_power(connector, | |
1251 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
1252 | ret = radeon_ddc_get_modes(radeon_connector); | |
1253 | if (!radeon_dig_connector->edp_on) | |
1254 | atombios_set_edp_panel_power(connector, | |
1255 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
1256 | } else { | |
1257 | /* need to setup ddc on the bridge */ | |
1258 | if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != | |
1259 | ENCODER_OBJECT_ID_NONE) { | |
1260 | if (encoder) | |
1261 | radeon_atom_ext_encoder_setup_ddc(encoder); | |
1262 | } | |
1263 | ret = radeon_ddc_get_modes(radeon_connector); | |
1264 | } | |
d291767b AD |
1265 | |
1266 | if (ret > 0) { | |
d291767b AD |
1267 | if (encoder) { |
1268 | radeon_fixup_lvds_native_mode(encoder, connector); | |
1269 | /* add scaled modes */ | |
1270 | radeon_add_common_modes(encoder, connector); | |
1271 | } | |
1272 | return ret; | |
1273 | } | |
1274 | ||
d291767b AD |
1275 | if (!encoder) |
1276 | return 0; | |
1277 | ||
1278 | /* we have no EDID modes */ | |
1279 | mode = radeon_fp_native_mode(encoder); | |
1280 | if (mode) { | |
1281 | ret = 1; | |
1282 | drm_mode_probed_add(connector, mode); | |
1283 | /* add the width/height from vbios tables if available */ | |
1284 | connector->display_info.width_mm = mode->width_mm; | |
1285 | connector->display_info.height_mm = mode->height_mm; | |
1286 | /* add scaled modes */ | |
1287 | radeon_add_common_modes(encoder, connector); | |
1288 | } | |
591a10e1 AD |
1289 | } else { |
1290 | /* need to setup ddc on the bridge */ | |
1d33e1fc AD |
1291 | if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != |
1292 | ENCODER_OBJECT_ID_NONE) { | |
591a10e1 AD |
1293 | if (encoder) |
1294 | radeon_atom_ext_encoder_setup_ddc(encoder); | |
1295 | } | |
d291767b | 1296 | ret = radeon_ddc_get_modes(radeon_connector); |
591a10e1 | 1297 | } |
8b834852 | 1298 | |
746c1aa4 DA |
1299 | return ret; |
1300 | } | |
1301 | ||
1d33e1fc | 1302 | u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector) |
d7fa8bb3 AD |
1303 | { |
1304 | struct drm_mode_object *obj; | |
1305 | struct drm_encoder *encoder; | |
1306 | struct radeon_encoder *radeon_encoder; | |
1307 | int i; | |
d7fa8bb3 AD |
1308 | |
1309 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1310 | if (connector->encoder_ids[i] == 0) | |
1311 | break; | |
1312 | ||
1313 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1314 | if (!obj) | |
1315 | continue; | |
1316 | ||
1317 | encoder = obj_to_encoder(obj); | |
1318 | radeon_encoder = to_radeon_encoder(encoder); | |
1319 | ||
1320 | switch (radeon_encoder->encoder_id) { | |
1321 | case ENCODER_OBJECT_ID_TRAVIS: | |
1322 | case ENCODER_OBJECT_ID_NUTMEG: | |
1d33e1fc | 1323 | return radeon_encoder->encoder_id; |
d7fa8bb3 AD |
1324 | default: |
1325 | break; | |
1326 | } | |
1327 | } | |
1328 | ||
1d33e1fc | 1329 | return ENCODER_OBJECT_ID_NONE; |
d7fa8bb3 AD |
1330 | } |
1331 | ||
1332 | bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector) | |
1333 | { | |
1334 | struct drm_mode_object *obj; | |
1335 | struct drm_encoder *encoder; | |
1336 | struct radeon_encoder *radeon_encoder; | |
1337 | int i; | |
1338 | bool found = false; | |
1339 | ||
1340 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1341 | if (connector->encoder_ids[i] == 0) | |
1342 | break; | |
1343 | ||
1344 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1345 | if (!obj) | |
1346 | continue; | |
1347 | ||
1348 | encoder = obj_to_encoder(obj); | |
1349 | radeon_encoder = to_radeon_encoder(encoder); | |
1350 | if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2) | |
1351 | found = true; | |
1352 | } | |
1353 | ||
1354 | return found; | |
1355 | } | |
1356 | ||
1357 | bool radeon_connector_is_dp12_capable(struct drm_connector *connector) | |
1358 | { | |
1359 | struct drm_device *dev = connector->dev; | |
1360 | struct radeon_device *rdev = dev->dev_private; | |
1361 | ||
1362 | if (ASIC_IS_DCE5(rdev) && | |
1363 | (rdev->clock.dp_extclk >= 53900) && | |
1364 | radeon_connector_encoder_is_hbr2(connector)) { | |
1365 | return true; | |
1366 | } | |
1367 | ||
1368 | return false; | |
1369 | } | |
1370 | ||
7b334fcb | 1371 | static enum drm_connector_status |
930a9e28 | 1372 | radeon_dp_detect(struct drm_connector *connector, bool force) |
746c1aa4 | 1373 | { |
f8d0edde AD |
1374 | struct drm_device *dev = connector->dev; |
1375 | struct radeon_device *rdev = dev->dev_private; | |
746c1aa4 | 1376 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
746c1aa4 | 1377 | enum drm_connector_status ret = connector_status_disconnected; |
4143e919 | 1378 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
591a10e1 | 1379 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
746c1aa4 | 1380 | |
11fe1266 TU |
1381 | if (!force && radeon_check_hpd_status_unchanged(connector)) |
1382 | return connector->status; | |
1383 | ||
746c1aa4 DA |
1384 | if (radeon_connector->edid) { |
1385 | kfree(radeon_connector->edid); | |
1386 | radeon_connector->edid = NULL; | |
1387 | } | |
1388 | ||
f89931f3 AD |
1389 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1390 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1391 | if (encoder) { |
1392 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
1393 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
1394 | ||
1395 | /* check if panel is valid */ | |
1396 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) | |
1397 | ret = connector_status_connected; | |
1398 | } | |
6f50eae7 AD |
1399 | /* eDP is always DP */ |
1400 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
8b834852 AD |
1401 | if (!radeon_dig_connector->edp_on) |
1402 | atombios_set_edp_panel_power(connector, | |
1403 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
6f50eae7 | 1404 | if (radeon_dp_getdpcd(radeon_connector)) |
9fa05c98 | 1405 | ret = connector_status_connected; |
8b834852 AD |
1406 | if (!radeon_dig_connector->edp_on) |
1407 | atombios_set_edp_panel_power(connector, | |
1408 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
1d33e1fc AD |
1409 | } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != |
1410 | ENCODER_OBJECT_ID_NONE) { | |
b06947b5 AD |
1411 | /* DP bridges are always DP */ |
1412 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
1413 | /* get the DPCD from the bridge */ | |
1414 | radeon_dp_getdpcd(radeon_connector); | |
1415 | ||
6777a4f6 AD |
1416 | if (encoder) { |
1417 | /* setup ddc on the bridge */ | |
1418 | radeon_atom_ext_encoder_setup_ddc(encoder); | |
0a9069d3 NOS |
1419 | /* bridge chips are always aux */ |
1420 | if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */ | |
b06947b5 | 1421 | ret = connector_status_connected; |
6777a4f6 AD |
1422 | else if (radeon_connector->dac_load_detect) { /* try load detection */ |
1423 | struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; | |
b06947b5 AD |
1424 | ret = encoder_funcs->detect(encoder, connector); |
1425 | } | |
591a10e1 | 1426 | } |
b06947b5 | 1427 | } else { |
6f50eae7 | 1428 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
f8d0edde AD |
1429 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { |
1430 | ret = connector_status_connected; | |
1431 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) | |
1432 | radeon_dp_getdpcd(radeon_connector); | |
6f50eae7 | 1433 | } else { |
f8d0edde AD |
1434 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { |
1435 | if (radeon_dp_getdpcd(radeon_connector)) | |
1436 | ret = connector_status_connected; | |
1437 | } else { | |
d592fca9 | 1438 | /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */ |
0a9069d3 | 1439 | if (radeon_ddc_probe(radeon_connector, false)) |
f8d0edde AD |
1440 | ret = connector_status_connected; |
1441 | } | |
4143e919 | 1442 | } |
746c1aa4 | 1443 | } |
4143e919 | 1444 | |
30f44372 | 1445 | radeon_connector_update_scratch_regs(connector, ret); |
746c1aa4 DA |
1446 | return ret; |
1447 | } | |
1448 | ||
5801ead6 AD |
1449 | static int radeon_dp_mode_valid(struct drm_connector *connector, |
1450 | struct drm_display_mode *mode) | |
1451 | { | |
1452 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1453 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1454 | ||
1455 | /* XXX check mode bandwidth */ | |
1456 | ||
f89931f3 AD |
1457 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1458 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1459 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
1460 | ||
1461 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
1462 | return MODE_PANEL; | |
1463 | ||
1464 | if (encoder) { | |
1465 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
1466 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
1467 | ||
f89931f3 | 1468 | /* AVIVO hardware supports downscaling modes larger than the panel |
d291767b AD |
1469 | * to the panel size, but I'm not sure this is desirable. |
1470 | */ | |
1471 | if ((mode->hdisplay > native_mode->hdisplay) || | |
1472 | (mode->vdisplay > native_mode->vdisplay)) | |
1473 | return MODE_PANEL; | |
1474 | ||
1475 | /* if scaling is disabled, block non-native modes */ | |
1476 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
1477 | if ((mode->hdisplay != native_mode->hdisplay) || | |
1478 | (mode->vdisplay != native_mode->vdisplay)) | |
1479 | return MODE_PANEL; | |
1480 | } | |
1481 | } | |
5801ead6 | 1482 | return MODE_OK; |
d291767b AD |
1483 | } else { |
1484 | if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | |
1485 | (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) | |
1486 | return radeon_dp_mode_valid_helper(connector, mode); | |
1487 | else | |
1488 | return MODE_OK; | |
1489 | } | |
5801ead6 AD |
1490 | } |
1491 | ||
1109ca09 | 1492 | static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = { |
746c1aa4 | 1493 | .get_modes = radeon_dp_get_modes, |
5801ead6 | 1494 | .mode_valid = radeon_dp_mode_valid, |
746c1aa4 DA |
1495 | .best_encoder = radeon_dvi_encoder, |
1496 | }; | |
1497 | ||
1109ca09 | 1498 | static const struct drm_connector_funcs radeon_dp_connector_funcs = { |
746c1aa4 DA |
1499 | .dpms = drm_helper_connector_dpms, |
1500 | .detect = radeon_dp_detect, | |
1501 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1502 | .set_property = radeon_connector_set_property, | |
ffd09c64 | 1503 | .destroy = radeon_dp_connector_destroy, |
746c1aa4 DA |
1504 | .force = radeon_dvi_force, |
1505 | }; | |
1506 | ||
855f5f1d AD |
1507 | static const struct drm_connector_funcs radeon_edp_connector_funcs = { |
1508 | .dpms = drm_helper_connector_dpms, | |
1509 | .detect = radeon_dp_detect, | |
1510 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1511 | .set_property = radeon_lvds_set_property, | |
1512 | .destroy = radeon_dp_connector_destroy, | |
1513 | .force = radeon_dvi_force, | |
1514 | }; | |
1515 | ||
1516 | static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = { | |
1517 | .dpms = drm_helper_connector_dpms, | |
1518 | .detect = radeon_dp_detect, | |
1519 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1520 | .set_property = radeon_lvds_set_property, | |
1521 | .destroy = radeon_dp_connector_destroy, | |
1522 | .force = radeon_dvi_force, | |
1523 | }; | |
1524 | ||
771fe6b9 JG |
1525 | void |
1526 | radeon_add_atom_connector(struct drm_device *dev, | |
1527 | uint32_t connector_id, | |
1528 | uint32_t supported_device, | |
1529 | int connector_type, | |
1530 | struct radeon_i2c_bus_rec *i2c_bus, | |
b75fad06 | 1531 | uint32_t igp_lane_info, |
eed45b30 | 1532 | uint16_t connector_object_id, |
26b5bc98 AD |
1533 | struct radeon_hpd *hpd, |
1534 | struct radeon_router *router) | |
771fe6b9 | 1535 | { |
445282db | 1536 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1537 | struct drm_connector *connector; |
1538 | struct radeon_connector *radeon_connector; | |
1539 | struct radeon_connector_atom_dig *radeon_dig_connector; | |
eac4dff6 AD |
1540 | struct drm_encoder *encoder; |
1541 | struct radeon_encoder *radeon_encoder; | |
771fe6b9 | 1542 | uint32_t subpixel_order = SubPixelNone; |
0294cf4f | 1543 | bool shared_ddc = false; |
eac4dff6 | 1544 | bool is_dp_bridge = false; |
771fe6b9 | 1545 | |
4ce001ab | 1546 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1547 | return; |
1548 | ||
cf4c12f9 AD |
1549 | /* if the user selected tv=0 don't try and add the connector */ |
1550 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1551 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1552 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1553 | (radeon_tv == 0)) | |
1554 | return; | |
1555 | ||
771fe6b9 JG |
1556 | /* see if we already added it */ |
1557 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1558 | radeon_connector = to_radeon_connector(connector); | |
1559 | if (radeon_connector->connector_id == connector_id) { | |
1560 | radeon_connector->devices |= supported_device; | |
1561 | return; | |
1562 | } | |
0294cf4f | 1563 | if (radeon_connector->ddc_bus && i2c_bus->valid) { |
d3932d6c | 1564 | if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) { |
0294cf4f AD |
1565 | radeon_connector->shared_ddc = true; |
1566 | shared_ddc = true; | |
1567 | } | |
fb939dfc | 1568 | if (radeon_connector->router_bus && router->ddc_valid && |
26b5bc98 AD |
1569 | (radeon_connector->router.router_id == router->router_id)) { |
1570 | radeon_connector->shared_ddc = false; | |
1571 | shared_ddc = false; | |
1572 | } | |
0294cf4f | 1573 | } |
771fe6b9 JG |
1574 | } |
1575 | ||
eac4dff6 AD |
1576 | /* check if it's a dp bridge */ |
1577 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | |
1578 | radeon_encoder = to_radeon_encoder(encoder); | |
1579 | if (radeon_encoder->devices & supported_device) { | |
1580 | switch (radeon_encoder->encoder_id) { | |
1581 | case ENCODER_OBJECT_ID_TRAVIS: | |
1582 | case ENCODER_OBJECT_ID_NUTMEG: | |
1583 | is_dp_bridge = true; | |
1584 | break; | |
1585 | default: | |
1586 | break; | |
1587 | } | |
1588 | } | |
1589 | } | |
1590 | ||
771fe6b9 JG |
1591 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); |
1592 | if (!radeon_connector) | |
1593 | return; | |
1594 | ||
1595 | connector = &radeon_connector->base; | |
1596 | ||
1597 | radeon_connector->connector_id = connector_id; | |
1598 | radeon_connector->devices = supported_device; | |
0294cf4f | 1599 | radeon_connector->shared_ddc = shared_ddc; |
b75fad06 | 1600 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1601 | radeon_connector->hpd = *hpd; |
bc1c4dc3 | 1602 | |
26b5bc98 | 1603 | radeon_connector->router = *router; |
fb939dfc | 1604 | if (router->ddc_valid || router->cd_valid) { |
26b5bc98 AD |
1605 | radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info); |
1606 | if (!radeon_connector->router_bus) | |
a70882aa | 1607 | DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n"); |
26b5bc98 | 1608 | } |
eac4dff6 AD |
1609 | |
1610 | if (is_dp_bridge) { | |
771fe6b9 JG |
1611 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); |
1612 | if (!radeon_dig_connector) | |
1613 | goto failed; | |
771fe6b9 JG |
1614 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1615 | radeon_connector->con_priv = radeon_dig_connector; | |
771fe6b9 | 1616 | if (i2c_bus->valid) { |
eac4dff6 AD |
1617 | /* add DP i2c bus */ |
1618 | if (connector_type == DRM_MODE_CONNECTOR_eDP) | |
1619 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1620 | else | |
1621 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1622 | if (!radeon_dig_connector->dp_i2c_bus) | |
1623 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
f376b94f | 1624 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1625 | if (!radeon_connector->ddc_bus) |
eac4dff6 | 1626 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1627 | } |
eac4dff6 AD |
1628 | switch (connector_type) { |
1629 | case DRM_MODE_CONNECTOR_VGA: | |
1630 | case DRM_MODE_CONNECTOR_DVIA: | |
1631 | default: | |
855f5f1d AD |
1632 | drm_connector_init(dev, &radeon_connector->base, |
1633 | &radeon_dp_connector_funcs, connector_type); | |
1634 | drm_connector_helper_add(&radeon_connector->base, | |
1635 | &radeon_dp_connector_helper_funcs); | |
eac4dff6 AD |
1636 | connector->interlace_allowed = true; |
1637 | connector->doublescan_allowed = true; | |
d629a3ce | 1638 | radeon_connector->dac_load_detect = true; |
e35755fa | 1639 | drm_object_attach_property(&radeon_connector->base.base, |
d629a3ce AD |
1640 | rdev->mode_info.load_detect_property, |
1641 | 1); | |
eac4dff6 AD |
1642 | break; |
1643 | case DRM_MODE_CONNECTOR_DVII: | |
1644 | case DRM_MODE_CONNECTOR_DVID: | |
1645 | case DRM_MODE_CONNECTOR_HDMIA: | |
1646 | case DRM_MODE_CONNECTOR_HDMIB: | |
1647 | case DRM_MODE_CONNECTOR_DisplayPort: | |
855f5f1d AD |
1648 | drm_connector_init(dev, &radeon_connector->base, |
1649 | &radeon_dp_connector_funcs, connector_type); | |
1650 | drm_connector_helper_add(&radeon_connector->base, | |
1651 | &radeon_dp_connector_helper_funcs); | |
e35755fa | 1652 | drm_object_attach_property(&radeon_connector->base.base, |
430f70d5 | 1653 | rdev->mode_info.underscan_property, |
56bec7c0 | 1654 | UNDERSCAN_OFF); |
e35755fa | 1655 | drm_object_attach_property(&radeon_connector->base.base, |
5bccf5e3 MG |
1656 | rdev->mode_info.underscan_hborder_property, |
1657 | 0); | |
e35755fa | 1658 | drm_object_attach_property(&radeon_connector->base.base, |
5bccf5e3 MG |
1659 | rdev->mode_info.underscan_vborder_property, |
1660 | 0); | |
8666c076 AD |
1661 | drm_object_attach_property(&radeon_connector->base.base, |
1662 | rdev->mode_info.audio_property, | |
1663 | RADEON_AUDIO_DISABLE); | |
eac4dff6 AD |
1664 | subpixel_order = SubPixelHorizontalRGB; |
1665 | connector->interlace_allowed = true; | |
1666 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1667 | connector->doublescan_allowed = true; | |
1668 | else | |
1669 | connector->doublescan_allowed = false; | |
d629a3ce AD |
1670 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { |
1671 | radeon_connector->dac_load_detect = true; | |
e35755fa | 1672 | drm_object_attach_property(&radeon_connector->base.base, |
d629a3ce AD |
1673 | rdev->mode_info.load_detect_property, |
1674 | 1); | |
1675 | } | |
eac4dff6 AD |
1676 | break; |
1677 | case DRM_MODE_CONNECTOR_LVDS: | |
1678 | case DRM_MODE_CONNECTOR_eDP: | |
855f5f1d AD |
1679 | drm_connector_init(dev, &radeon_connector->base, |
1680 | &radeon_lvds_bridge_connector_funcs, connector_type); | |
1681 | drm_connector_helper_add(&radeon_connector->base, | |
1682 | &radeon_dp_connector_helper_funcs); | |
e35755fa | 1683 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1684 | dev->mode_config.scaling_mode_property, |
1685 | DRM_MODE_SCALE_FULLSCREEN); | |
1686 | subpixel_order = SubPixelHorizontalRGB; | |
1687 | connector->interlace_allowed = false; | |
1688 | connector->doublescan_allowed = false; | |
1689 | break; | |
5bccf5e3 | 1690 | } |
eac4dff6 AD |
1691 | } else { |
1692 | switch (connector_type) { | |
1693 | case DRM_MODE_CONNECTOR_VGA: | |
1694 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1695 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1696 | if (i2c_bus->valid) { | |
1697 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1698 | if (!radeon_connector->ddc_bus) | |
1699 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1700 | } | |
390d0bbe | 1701 | radeon_connector->dac_load_detect = true; |
e35755fa | 1702 | drm_object_attach_property(&radeon_connector->base.base, |
390d0bbe AD |
1703 | rdev->mode_info.load_detect_property, |
1704 | 1); | |
eac4dff6 AD |
1705 | /* no HPD on analog connectors */ |
1706 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1707 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1708 | connector->interlace_allowed = true; | |
c49948f4 | 1709 | connector->doublescan_allowed = true; |
eac4dff6 AD |
1710 | break; |
1711 | case DRM_MODE_CONNECTOR_DVIA: | |
1712 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1713 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1714 | if (i2c_bus->valid) { | |
1715 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1716 | if (!radeon_connector->ddc_bus) | |
1717 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1718 | } | |
1719 | radeon_connector->dac_load_detect = true; | |
e35755fa | 1720 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1721 | rdev->mode_info.load_detect_property, |
1722 | 1); | |
1723 | /* no HPD on analog connectors */ | |
1724 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1725 | connector->interlace_allowed = true; | |
1726 | connector->doublescan_allowed = true; | |
1727 | break; | |
1728 | case DRM_MODE_CONNECTOR_DVII: | |
1729 | case DRM_MODE_CONNECTOR_DVID: | |
1730 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1731 | if (!radeon_dig_connector) | |
1732 | goto failed; | |
1733 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1734 | radeon_connector->con_priv = radeon_dig_connector; | |
1735 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1736 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1737 | if (i2c_bus->valid) { | |
1738 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1739 | if (!radeon_connector->ddc_bus) | |
1740 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1741 | } | |
1742 | subpixel_order = SubPixelHorizontalRGB; | |
e35755fa | 1743 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1744 | rdev->mode_info.coherent_mode_property, |
1745 | 1); | |
1746 | if (ASIC_IS_AVIVO(rdev)) { | |
e35755fa | 1747 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1748 | rdev->mode_info.underscan_property, |
1749 | UNDERSCAN_OFF); | |
e35755fa | 1750 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1751 | rdev->mode_info.underscan_hborder_property, |
1752 | 0); | |
e35755fa | 1753 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1754 | rdev->mode_info.underscan_vborder_property, |
1755 | 0); | |
1756 | } | |
8666c076 AD |
1757 | if (ASIC_IS_DCE2(rdev)) { |
1758 | drm_object_attach_property(&radeon_connector->base.base, | |
1759 | rdev->mode_info.audio_property, | |
1760 | RADEON_AUDIO_DISABLE); | |
1761 | } | |
eac4dff6 AD |
1762 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { |
1763 | radeon_connector->dac_load_detect = true; | |
e35755fa | 1764 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1765 | rdev->mode_info.load_detect_property, |
1766 | 1); | |
1767 | } | |
1768 | connector->interlace_allowed = true; | |
1769 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
1770 | connector->doublescan_allowed = true; | |
1771 | else | |
1772 | connector->doublescan_allowed = false; | |
1773 | break; | |
1774 | case DRM_MODE_CONNECTOR_HDMIA: | |
1775 | case DRM_MODE_CONNECTOR_HDMIB: | |
1776 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1777 | if (!radeon_dig_connector) | |
1778 | goto failed; | |
1779 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1780 | radeon_connector->con_priv = radeon_dig_connector; | |
1781 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1782 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1783 | if (i2c_bus->valid) { | |
1784 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1785 | if (!radeon_connector->ddc_bus) | |
1786 | DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1787 | } | |
e35755fa | 1788 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1789 | rdev->mode_info.coherent_mode_property, |
1790 | 1); | |
1791 | if (ASIC_IS_AVIVO(rdev)) { | |
e35755fa | 1792 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1793 | rdev->mode_info.underscan_property, |
1794 | UNDERSCAN_OFF); | |
e35755fa | 1795 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1796 | rdev->mode_info.underscan_hborder_property, |
1797 | 0); | |
e35755fa | 1798 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1799 | rdev->mode_info.underscan_vborder_property, |
1800 | 0); | |
1801 | } | |
8666c076 AD |
1802 | if (ASIC_IS_DCE2(rdev)) { |
1803 | drm_object_attach_property(&radeon_connector->base.base, | |
1804 | rdev->mode_info.audio_property, | |
1805 | RADEON_AUDIO_DISABLE); | |
1806 | } | |
eac4dff6 AD |
1807 | subpixel_order = SubPixelHorizontalRGB; |
1808 | connector->interlace_allowed = true; | |
1809 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1810 | connector->doublescan_allowed = true; | |
1811 | else | |
1812 | connector->doublescan_allowed = false; | |
1813 | break; | |
1814 | case DRM_MODE_CONNECTOR_DisplayPort: | |
1815 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1816 | if (!radeon_dig_connector) | |
1817 | goto failed; | |
1818 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1819 | radeon_connector->con_priv = radeon_dig_connector; | |
1820 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | |
1821 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
1822 | if (i2c_bus->valid) { | |
1823 | /* add DP i2c bus */ | |
1824 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1825 | if (!radeon_dig_connector->dp_i2c_bus) | |
1826 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1827 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1828 | if (!radeon_connector->ddc_bus) | |
1829 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1830 | } | |
1831 | subpixel_order = SubPixelHorizontalRGB; | |
e35755fa | 1832 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1833 | rdev->mode_info.coherent_mode_property, |
1834 | 1); | |
1835 | if (ASIC_IS_AVIVO(rdev)) { | |
e35755fa | 1836 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1837 | rdev->mode_info.underscan_property, |
1838 | UNDERSCAN_OFF); | |
e35755fa | 1839 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1840 | rdev->mode_info.underscan_hborder_property, |
1841 | 0); | |
e35755fa | 1842 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1843 | rdev->mode_info.underscan_vborder_property, |
1844 | 0); | |
1845 | } | |
8666c076 AD |
1846 | if (ASIC_IS_DCE2(rdev)) { |
1847 | drm_object_attach_property(&radeon_connector->base.base, | |
1848 | rdev->mode_info.audio_property, | |
1849 | RADEON_AUDIO_DISABLE); | |
1850 | } | |
eac4dff6 AD |
1851 | connector->interlace_allowed = true; |
1852 | /* in theory with a DP to VGA converter... */ | |
c49948f4 | 1853 | connector->doublescan_allowed = false; |
eac4dff6 AD |
1854 | break; |
1855 | case DRM_MODE_CONNECTOR_eDP: | |
1856 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1857 | if (!radeon_dig_connector) | |
1858 | goto failed; | |
1859 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1860 | radeon_connector->con_priv = radeon_dig_connector; | |
855f5f1d | 1861 | drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type); |
eac4dff6 AD |
1862 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); |
1863 | if (i2c_bus->valid) { | |
1864 | /* add DP i2c bus */ | |
1865 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1866 | if (!radeon_dig_connector->dp_i2c_bus) | |
1867 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1868 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1869 | if (!radeon_connector->ddc_bus) | |
1870 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1871 | } | |
e35755fa | 1872 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1873 | dev->mode_config.scaling_mode_property, |
1874 | DRM_MODE_SCALE_FULLSCREEN); | |
1875 | subpixel_order = SubPixelHorizontalRGB; | |
1876 | connector->interlace_allowed = false; | |
1877 | connector->doublescan_allowed = false; | |
1878 | break; | |
1879 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1880 | case DRM_MODE_CONNECTOR_Composite: | |
1881 | case DRM_MODE_CONNECTOR_9PinDIN: | |
1882 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); | |
1883 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1884 | radeon_connector->dac_load_detect = true; | |
e35755fa | 1885 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1886 | rdev->mode_info.load_detect_property, |
1887 | 1); | |
e35755fa | 1888 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1889 | rdev->mode_info.tv_std_property, |
1890 | radeon_atombios_get_tv_info(rdev)); | |
1891 | /* no HPD on analog connectors */ | |
1892 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1893 | connector->interlace_allowed = false; | |
1894 | connector->doublescan_allowed = false; | |
1895 | break; | |
1896 | case DRM_MODE_CONNECTOR_LVDS: | |
1897 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1898 | if (!radeon_dig_connector) | |
1899 | goto failed; | |
1900 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1901 | radeon_connector->con_priv = radeon_dig_connector; | |
1902 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
1903 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); | |
1904 | if (i2c_bus->valid) { | |
1905 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1906 | if (!radeon_connector->ddc_bus) | |
1907 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1908 | } | |
e35755fa | 1909 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1910 | dev->mode_config.scaling_mode_property, |
1911 | DRM_MODE_SCALE_FULLSCREEN); | |
1912 | subpixel_order = SubPixelHorizontalRGB; | |
1913 | connector->interlace_allowed = false; | |
1914 | connector->doublescan_allowed = false; | |
1915 | break; | |
771fe6b9 | 1916 | } |
771fe6b9 JG |
1917 | } |
1918 | ||
2581afcc | 1919 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1920 | if (i2c_bus->valid) |
1921 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1922 | } else | |
1923 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
1924 | ||
771fe6b9 JG |
1925 | connector->display_info.subpixel_order = subpixel_order; |
1926 | drm_sysfs_connector_add(connector); | |
1927 | return; | |
1928 | ||
1929 | failed: | |
771fe6b9 JG |
1930 | drm_connector_cleanup(connector); |
1931 | kfree(connector); | |
1932 | } | |
1933 | ||
1934 | void | |
1935 | radeon_add_legacy_connector(struct drm_device *dev, | |
1936 | uint32_t connector_id, | |
1937 | uint32_t supported_device, | |
1938 | int connector_type, | |
b75fad06 | 1939 | struct radeon_i2c_bus_rec *i2c_bus, |
eed45b30 AD |
1940 | uint16_t connector_object_id, |
1941 | struct radeon_hpd *hpd) | |
771fe6b9 | 1942 | { |
445282db | 1943 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1944 | struct drm_connector *connector; |
1945 | struct radeon_connector *radeon_connector; | |
1946 | uint32_t subpixel_order = SubPixelNone; | |
1947 | ||
4ce001ab | 1948 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1949 | return; |
1950 | ||
cf4c12f9 AD |
1951 | /* if the user selected tv=0 don't try and add the connector */ |
1952 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1953 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1954 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1955 | (radeon_tv == 0)) | |
1956 | return; | |
1957 | ||
771fe6b9 JG |
1958 | /* see if we already added it */ |
1959 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1960 | radeon_connector = to_radeon_connector(connector); | |
1961 | if (radeon_connector->connector_id == connector_id) { | |
1962 | radeon_connector->devices |= supported_device; | |
1963 | return; | |
1964 | } | |
1965 | } | |
1966 | ||
1967 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); | |
1968 | if (!radeon_connector) | |
1969 | return; | |
1970 | ||
1971 | connector = &radeon_connector->base; | |
1972 | ||
1973 | radeon_connector->connector_id = connector_id; | |
1974 | radeon_connector->devices = supported_device; | |
b75fad06 | 1975 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1976 | radeon_connector->hpd = *hpd; |
bc1c4dc3 | 1977 | |
771fe6b9 JG |
1978 | switch (connector_type) { |
1979 | case DRM_MODE_CONNECTOR_VGA: | |
1980 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1981 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1982 | if (i2c_bus->valid) { |
f376b94f | 1983 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1984 | if (!radeon_connector->ddc_bus) |
a70882aa | 1985 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1986 | } |
35e4b7af | 1987 | radeon_connector->dac_load_detect = true; |
e35755fa | 1988 | drm_object_attach_property(&radeon_connector->base.base, |
445282db DA |
1989 | rdev->mode_info.load_detect_property, |
1990 | 1); | |
2581afcc AD |
1991 | /* no HPD on analog connectors */ |
1992 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
eb1f8e4f | 1993 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
c49948f4 AD |
1994 | connector->interlace_allowed = true; |
1995 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1996 | break; |
1997 | case DRM_MODE_CONNECTOR_DVIA: | |
1998 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1999 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 2000 | if (i2c_bus->valid) { |
f376b94f | 2001 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 2002 | if (!radeon_connector->ddc_bus) |
a70882aa | 2003 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 2004 | } |
35e4b7af | 2005 | radeon_connector->dac_load_detect = true; |
e35755fa | 2006 | drm_object_attach_property(&radeon_connector->base.base, |
445282db DA |
2007 | rdev->mode_info.load_detect_property, |
2008 | 1); | |
2581afcc AD |
2009 | /* no HPD on analog connectors */ |
2010 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
2011 | connector->interlace_allowed = true; |
2012 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
2013 | break; |
2014 | case DRM_MODE_CONNECTOR_DVII: | |
2015 | case DRM_MODE_CONNECTOR_DVID: | |
2016 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 2017 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 2018 | if (i2c_bus->valid) { |
f376b94f | 2019 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 2020 | if (!radeon_connector->ddc_bus) |
a70882aa | 2021 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
68b3adb4 AD |
2022 | } |
2023 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
35e4b7af | 2024 | radeon_connector->dac_load_detect = true; |
e35755fa | 2025 | drm_object_attach_property(&radeon_connector->base.base, |
445282db DA |
2026 | rdev->mode_info.load_detect_property, |
2027 | 1); | |
771fe6b9 JG |
2028 | } |
2029 | subpixel_order = SubPixelHorizontalRGB; | |
c49948f4 AD |
2030 | connector->interlace_allowed = true; |
2031 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
2032 | connector->doublescan_allowed = true; | |
2033 | else | |
2034 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
2035 | break; |
2036 | case DRM_MODE_CONNECTOR_SVIDEO: | |
2037 | case DRM_MODE_CONNECTOR_Composite: | |
2038 | case DRM_MODE_CONNECTOR_9PinDIN: | |
cf4c12f9 AD |
2039 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); |
2040 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
2041 | radeon_connector->dac_load_detect = true; | |
2042 | /* RS400,RC410,RS480 chipset seems to report a lot | |
2043 | * of false positive on load detect, we haven't yet | |
2044 | * found a way to make load detect reliable on those | |
2045 | * chipset, thus just disable it for TV. | |
2046 | */ | |
2047 | if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) | |
2048 | radeon_connector->dac_load_detect = false; | |
e35755fa | 2049 | drm_object_attach_property(&radeon_connector->base.base, |
cf4c12f9 AD |
2050 | rdev->mode_info.load_detect_property, |
2051 | radeon_connector->dac_load_detect); | |
e35755fa | 2052 | drm_object_attach_property(&radeon_connector->base.base, |
cf4c12f9 AD |
2053 | rdev->mode_info.tv_std_property, |
2054 | radeon_combios_get_tv_info(rdev)); | |
2055 | /* no HPD on analog connectors */ | |
2056 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
2057 | connector->interlace_allowed = false; |
2058 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
2059 | break; |
2060 | case DRM_MODE_CONNECTOR_LVDS: | |
2061 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
0b4c0f3f | 2062 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
771fe6b9 | 2063 | if (i2c_bus->valid) { |
f376b94f | 2064 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 2065 | if (!radeon_connector->ddc_bus) |
a70882aa | 2066 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 2067 | } |
e35755fa | 2068 | drm_object_attach_property(&radeon_connector->base.base, |
445282db DA |
2069 | dev->mode_config.scaling_mode_property, |
2070 | DRM_MODE_SCALE_FULLSCREEN); | |
771fe6b9 | 2071 | subpixel_order = SubPixelHorizontalRGB; |
c49948f4 AD |
2072 | connector->interlace_allowed = false; |
2073 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
2074 | break; |
2075 | } | |
2076 | ||
2581afcc | 2077 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
2078 | if (i2c_bus->valid) |
2079 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
2080 | } else | |
2081 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
771fe6b9 JG |
2082 | connector->display_info.subpixel_order = subpixel_order; |
2083 | drm_sysfs_connector_add(connector); | |
771fe6b9 | 2084 | } |