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drm/nouveau: Switch DDC when reading the EDID
[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_connectors.c
CommitLineData
771fe6b9
JG		 1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
760285e7
DH		 26#include <drm/drmP.h>
27#include <drm/drm_edid.h>
28#include <drm/drm_crtc_helper.h>
29#include <drm/drm_fb_helper.h>
9843ead0 30#include <drm/drm_dp_mst_helper.h>
760285e7 31#include <drm/radeon_drm.h>
771fe6b9 32#include "radeon.h"
1a626b68 33#include "radeon_audio.h"
923f6848 34#include "atom.h"
771fe6b9 35
10ebc0bc
DA		 36#include <linux/pm_runtime.h>
37
9843ead0
DA		 38static int radeon_dp_handle_hpd(struct drm_connector *connector)
39{
40 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
41 int ret;
42
43 ret = radeon_dp_mst_check_status(radeon_connector);
44 if (ret == -EINVAL)
45 return 1;
46 return 0;
47}
d4877cf2
AD		 48void radeon_connector_hotplug(struct drm_connector *connector)
49{
50 struct drm_device *dev = connector->dev;
51 struct radeon_device *rdev = dev->dev_private;
52 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
53
9843ead0
DA		 54 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
55 struct radeon_connector_atom_dig *dig_connector =
56 radeon_connector->con_priv;
57
58 if (radeon_connector->is_mst_connector)
59 return;
60 if (dig_connector->is_mst) {
61 radeon_dp_handle_hpd(connector);
62 return;
63 }
64 }
cbac9543
AD		 65 /* bail if the connector does not have hpd pin, e.g.,
66 * VGA, TV, etc.
67 */
68 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE)
69 return;
70
1e85e1d0 71 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
d4877cf2 72
73104b5c 73 /* if the connector is already off, don't turn it back on */
6e9f798d 74 /* FIXME: This access isn't protected by any locks. */
73104b5c
AD		 75 if (connector->dpms != DRM_MODE_DPMS_ON)
76 return;
77
d5811e87
AD		 78 /* just deal with DP (not eDP) here. */
79 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
266dcba5
JG		 80 struct radeon_connector_atom_dig *dig_connector =
81 radeon_connector->con_priv;
7c3ed0fd 82
266dcba5
JG		 83 /* if existing sink type was not DP no need to retrain */
84 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT)
85 return;
86
87 /* first get sink type as it may be reset after (un)plug */
88 dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
89 /* don't do anything if sink is not display port, i.e.,
90 * passive dp->(dvi|hdmi) adaptor
91 */
92 if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
93 int saved_dpms = connector->dpms;
94 /* Only turn off the display if it's physically disconnected */
ca2ccde5 95 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
266dcba5 96 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
ca2ccde5 97 } else if (radeon_dp_needs_link_train(radeon_connector)) {
924f92bf
SCP		 98 /* Don't try to start link training before we
99 * have the dpcd */
100 if (!radeon_dp_getdpcd(radeon_connector))
101 return;
102
ca2ccde5
JG		 103 /* set it to OFF so that drm_helper_connector_dpms()
104 * won't return immediately since the current state
105 * is ON at this point.
106 */
107 connector->dpms = DRM_MODE_DPMS_OFF;
266dcba5 108 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
ca2ccde5 109 }
266dcba5
JG		 110 connector->dpms = saved_dpms;
111 }
d4877cf2 112 }
d4877cf2
AD		 113}
114
445282db
DA		 115static void radeon_property_change_mode(struct drm_encoder *encoder)
116{
117 struct drm_crtc *crtc = encoder->crtc;
118
119 if (crtc && crtc->enabled) {
120 drm_crtc_helper_set_mode(crtc, &crtc->mode,
f4510a27 121 crtc->x, crtc->y, crtc->primary->fb);
445282db
DA		 122 }
123}
eccea792
AD		 124
125int radeon_get_monitor_bpc(struct drm_connector *connector)
126{
127 struct drm_device *dev = connector->dev;
128 struct radeon_device *rdev = dev->dev_private;
129 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
130 struct radeon_connector_atom_dig *dig_connector;
131 int bpc = 8;
ea292861 132 int mode_clock, max_tmds_clock;
eccea792
AD		 133
134 switch (connector->connector_type) {
135 case DRM_MODE_CONNECTOR_DVII:
136 case DRM_MODE_CONNECTOR_HDMIB:
137 if (radeon_connector->use_digital) {
377bd8a9 138 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 139 if (connector->display_info.bpc)
140 bpc = connector->display_info.bpc;
141 }
142 }
143 break;
144 case DRM_MODE_CONNECTOR_DVID:
145 case DRM_MODE_CONNECTOR_HDMIA:
377bd8a9 146 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 147 if (connector->display_info.bpc)
148 bpc = connector->display_info.bpc;
149 }
150 break;
151 case DRM_MODE_CONNECTOR_DisplayPort:
152 dig_connector = radeon_connector->con_priv;
153 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
154 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) ||
377bd8a9 155 drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 156 if (connector->display_info.bpc)
157 bpc = connector->display_info.bpc;
158 }
159 break;
160 case DRM_MODE_CONNECTOR_eDP:
161 case DRM_MODE_CONNECTOR_LVDS:
162 if (connector->display_info.bpc)
163 bpc = connector->display_info.bpc;
164 else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) {
319d1e14 165 const struct drm_connector_helper_funcs *connector_funcs =
eccea792
AD		 166 connector->helper_private;
167 struct drm_encoder *encoder = connector_funcs->best_encoder(connector);
168 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
169 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
170
171 if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR)
172 bpc = 6;
173 else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR)
174 bpc = 8;
175 }
176 break;
177 }
89b92339 178
377bd8a9 179 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
89b92339
MK		 180 /* hdmi deep color only implemented on DCE4+ */
181 if ((bpc > 8) && !ASIC_IS_DCE4(rdev)) {
182 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n",
72082093 183 connector->name, bpc);
89b92339
MK		 184 bpc = 8;
185 }
186
187 /*
188 * Pre DCE-8 hw can't handle > 12 bpc, and more than 12 bpc doesn't make
189 * much sense without support for > 12 bpc framebuffers. RGB 4:4:4 at
190 * 12 bpc is always supported on hdmi deep color sinks, as this is
191 * required by the HDMI-1.3 spec. Clamp to a safe 12 bpc maximum.
192 */
193 if (bpc > 12) {
194 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",
72082093 195 connector->name, bpc);
89b92339
MK		 196 bpc = 12;
197 }
ea292861
MK		 198
199 /* Any defined maximum tmds clock limit we must not exceed? */
200 if (connector->max_tmds_clock > 0) {
201 /* mode_clock is clock in kHz for mode to be modeset on this connector */
202 mode_clock = radeon_connector->pixelclock_for_modeset;
203
204 /* Maximum allowable input clock in kHz */
205 max_tmds_clock = connector->max_tmds_clock * 1000;
206
207 DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",
208 connector->name, mode_clock, max_tmds_clock);
209
210 /* Check if bpc is within clock limit. Try to degrade gracefully otherwise */
211 if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) {
212 if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) &&
213 (mode_clock * 5/4 <= max_tmds_clock))
214 bpc = 10;
215 else
216 bpc = 8;
217
218 DRM_DEBUG("%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n",
219 connector->name, bpc);
220 }
221
222 if ((bpc == 10) && (mode_clock * 5/4 > max_tmds_clock)) {
223 bpc = 8;
224 DRM_DEBUG("%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n",
225 connector->name, bpc);
226 }
227 }
9f51e2e0
MK		 228 else if (bpc > 8) {
229 /* max_tmds_clock missing, but hdmi spec mandates it for deep color. */
230 DRM_DEBUG("%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.\n",
231 connector->name);
232 bpc = 8;
233 }
89b92339
MK		 234 }
235
9f51e2e0
MK		 236 if ((radeon_deep_color == 0) && (bpc > 8)) {
237 DRM_DEBUG("%s: Deep color disabled. Set radeon module param deep_color=1 to enable.\n",
238 connector->name);
a624f429 239 bpc = 8;
9f51e2e0 240 }
a624f429 241
89b92339 242 DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",
72082093 243 connector->name, connector->display_info.bpc, bpc);
89b92339 244
eccea792
AD		 245 return bpc;
246}
247
771fe6b9
JG		 248static void
249radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
250{
251 struct drm_device *dev = connector->dev;
252 struct radeon_device *rdev = dev->dev_private;
253 struct drm_encoder *best_encoder = NULL;
254 struct drm_encoder *encoder = NULL;
319d1e14 255 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
771fe6b9
JG		 256 bool connected;
257 int i;
258
259 best_encoder = connector_funcs->best_encoder(connector);
260
261 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
262 if (connector->encoder_ids[i] == 0)
263 break;
264
b957f457
RC		 265 encoder = drm_encoder_find(connector->dev,
266 connector->encoder_ids[i]);
267 if (!encoder)
771fe6b9
JG		 268 continue;
269
771fe6b9
JG		 270 if ((encoder == best_encoder) && (status == connector_status_connected))
271 connected = true;
272 else
273 connected = false;
274
275 if (rdev->is_atom_bios)
276 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
277 else
278 radeon_combios_connected_scratch_regs(connector, encoder, connected);
279
280 }
281}
282
1109ca09 283static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
445282db 284{
445282db
DA		 285 struct drm_encoder *encoder;
286 int i;
287
288 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
289 if (connector->encoder_ids[i] == 0)
290 break;
291
b957f457
RC		 292 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
293 if (!encoder)
445282db
DA		 294 continue;
295
445282db
DA		 296 if (encoder->encoder_type == encoder_type)
297 return encoder;
298 }
299 return NULL;
300}
301
377bd8a9
AD		 302struct edid *radeon_connector_edid(struct drm_connector *connector)
303{
304 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
305 struct drm_property_blob *edid_blob = connector->edid_blob_ptr;
306
307 if (radeon_connector->edid) {
308 return radeon_connector->edid;
309 } else if (edid_blob) {
310 struct edid *edid = kmemdup(edid_blob->data, edid_blob->length, GFP_KERNEL);
311 if (edid)
312 radeon_connector->edid = edid;
313 }
314 return radeon_connector->edid;
315}
316
72a5c970
AD		 317static void radeon_connector_get_edid(struct drm_connector *connector)
318{
319 struct drm_device *dev = connector->dev;
320 struct radeon_device *rdev = dev->dev_private;
321 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
322
323 if (radeon_connector->edid)
324 return;
325
326 /* on hw with routers, select right port */
327 if (radeon_connector->router.ddc_valid)
328 radeon_router_select_ddc_port(radeon_connector);
329
330 if ((radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
331 ENCODER_OBJECT_ID_NONE) &&
332 radeon_connector->ddc_bus->has_aux) {
333 radeon_connector->edid = drm_get_edid(connector,
334 &radeon_connector->ddc_bus->aux.ddc);
335 } else if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
336 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
337 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
338
339 if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
340 dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) &&
341 radeon_connector->ddc_bus->has_aux)
342 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
343 &radeon_connector->ddc_bus->aux.ddc);
344 else if (radeon_connector->ddc_bus)
345 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
346 &radeon_connector->ddc_bus->adapter);
347 } else if (radeon_connector->ddc_bus) {
348 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
349 &radeon_connector->ddc_bus->adapter);
350 }
351
352 if (!radeon_connector->edid) {
13485794
AD		 353 /* don't fetch the edid from the vbios if ddc fails and runpm is
354 * enabled so we report disconnected.
355 */
356 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
357 return;
358
72a5c970
AD		 359 if (rdev->is_atom_bios) {
360 /* some laptops provide a hardcoded edid in rom for LCDs */
361 if (((connector->connector_type == DRM_MODE_CONNECTOR_LVDS) ||
362 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)))
363 radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev);
364 } else {
365 /* some servers provide a hardcoded edid in rom for KVMs */
366 radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev);
367 }
368 }
369}
370
371static void radeon_connector_free_edid(struct drm_connector *connector)
372{
373 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
374
375 if (radeon_connector->edid) {
376 kfree(radeon_connector->edid);
377 radeon_connector->edid = NULL;
378 }
379}
380
381static int radeon_ddc_get_modes(struct drm_connector *connector)
382{
383 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
384 int ret;
385
386 if (radeon_connector->edid) {
387 drm_mode_connector_update_edid_property(connector, radeon_connector->edid);
388 ret = drm_add_edid_modes(connector, radeon_connector->edid);
389 drm_edid_to_eld(connector, radeon_connector->edid);
390 return ret;
391 }
392 drm_mode_connector_update_edid_property(connector, NULL);
393 return 0;
394}
395
1109ca09 396static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
771fe6b9
JG		 397{
398 int enc_id = connector->encoder_ids[0];
771fe6b9 399 /* pick the encoder ids */
b957f457
RC		 400 if (enc_id)
401 return drm_encoder_find(connector->dev, enc_id);
771fe6b9
JG		 402 return NULL;
403}
404
da997620
AD		 405static void radeon_get_native_mode(struct drm_connector *connector)
406{
407 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
408 struct radeon_encoder *radeon_encoder;
409
410 if (encoder == NULL)
411 return;
412
413 radeon_encoder = to_radeon_encoder(encoder);
414
415 if (!list_empty(&connector->probed_modes)) {
416 struct drm_display_mode *preferred_mode =
417 list_first_entry(&connector->probed_modes,
418 struct drm_display_mode, head);
419
420 radeon_encoder->native_mode = *preferred_mode;
421 } else {
422 radeon_encoder->native_mode.clock = 0;
423 }
424}
425
4ce001ab
DA		 426/*
427 * radeon_connector_analog_encoder_conflict_solve
428 * - search for other connectors sharing this encoder
429 * if priority is true, then set them disconnected if this is connected
430 * if priority is false, set us disconnected if they are connected
431 */
432static enum drm_connector_status
433radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
434 struct drm_encoder *encoder,
435 enum drm_connector_status current_status,
436 bool priority)
437{
438 struct drm_device *dev = connector->dev;
439 struct drm_connector *conflict;
08d07511 440 struct radeon_connector *radeon_conflict;
4ce001ab
DA		 441 int i;
442
443 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
444 if (conflict == connector)
445 continue;
446
08d07511 447 radeon_conflict = to_radeon_connector(conflict);
4ce001ab
DA		 448 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
449 if (conflict->encoder_ids[i] == 0)
450 break;
451
452 /* if the IDs match */
453 if (conflict->encoder_ids[i] == encoder->base.id) {
454 if (conflict->status != connector_status_connected)
455 continue;
08d07511
AD		 456
457 if (radeon_conflict->use_digital)
458 continue;
4ce001ab
DA		 459
460 if (priority == true) {
72082093
JN		 461 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n",
462 conflict->name);
463 DRM_DEBUG_KMS("in favor of %s\n",
464 connector->name);
4ce001ab
DA		 465 conflict->status = connector_status_disconnected;
466 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
467 } else {
72082093
JN		 468 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n",
469 connector->name);
470 DRM_DEBUG_KMS("in favor of %s\n",
471 conflict->name);
4ce001ab
DA		 472 current_status = connector_status_disconnected;
473 }
474 break;
475 }
476 }
477 }
478 return current_status;
479
480}
481
771fe6b9
JG		 482static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
483{
484 struct drm_device *dev = encoder->dev;
485 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
486 struct drm_display_mode *mode = NULL;
de2103e4 487 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
771fe6b9 488
de2103e4
AD		 489 if (native_mode->hdisplay != 0 &&
490 native_mode->vdisplay != 0 &&
491 native_mode->clock != 0) {
fb06ca8f 492 mode = drm_mode_duplicate(dev, native_mode);
771fe6b9
JG		 493 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
494 drm_mode_set_name(mode);
495
d9fdaafb 496 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
d2efdf6d
AD		 497 } else if (native_mode->hdisplay != 0 &&
498 native_mode->vdisplay != 0) {
499 /* mac laptops without an edid */
500 /* Note that this is not necessarily the exact panel mode,
501 * but an approximation based on the cvt formula. For these
502 * systems we should ideally read the mode info out of the
503 * registers or add a mode table, but this works and is much
504 * simpler.
505 */
506 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
507 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
d9fdaafb 508 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
771fe6b9
JG		 509 }
510 return mode;
511}
512
923f6848
AD		 513static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
514{
515 struct drm_device *dev = encoder->dev;
516 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
517 struct drm_display_mode *mode = NULL;
de2103e4 518 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
923f6848
AD		 519 int i;
520 struct mode_size {
521 int w;
522 int h;
523 } common_modes[17] = {
524 { 640, 480},
525 { 720, 480},
526 { 800, 600},
527 { 848, 480},
528 {1024, 768},
529 {1152, 768},
530 {1280, 720},
531 {1280, 800},
532 {1280, 854},
533 {1280, 960},
534 {1280, 1024},
535 {1440, 900},
536 {1400, 1050},
537 {1680, 1050},
538 {1600, 1200},
539 {1920, 1080},
540 {1920, 1200}
541 };
542
543 for (i = 0; i < 17; i++) {
dfdd6467
AD		 544 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
545 if (common_modes[i].w > 1024 ||
546 common_modes[i].h > 768)
547 continue;
548 }
923f6848 549 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
de2103e4
AD		 550 if (common_modes[i].w > native_mode->hdisplay ||
551 common_modes[i].h > native_mode->vdisplay ||
552 (common_modes[i].w == native_mode->hdisplay &&
553 common_modes[i].h == native_mode->vdisplay))
923f6848
AD		 554 continue;
555 }
556 if (common_modes[i].w < 320 || common_modes[i].h < 200)
557 continue;
558
d50ba256 559 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
923f6848
AD		 560 drm_mode_probed_add(connector, mode);
561 }
562}
563
1109ca09 564static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
771fe6b9
JG		 565 uint64_t val)
566{
445282db
DA		 567 struct drm_device *dev = connector->dev;
568 struct radeon_device *rdev = dev->dev_private;
569 struct drm_encoder *encoder;
570 struct radeon_encoder *radeon_encoder;
571
572 if (property == rdev->mode_info.coherent_mode_property) {
573 struct radeon_encoder_atom_dig *dig;
ce227c41 574 bool new_coherent_mode;
445282db
DA		 575
576 /* need to find digital encoder on connector */
577 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
578 if (!encoder)
579 return 0;
580
581 radeon_encoder = to_radeon_encoder(encoder);
582
583 if (!radeon_encoder->enc_priv)
584 return 0;
585
586 dig = radeon_encoder->enc_priv;
ce227c41
DA		 587 new_coherent_mode = val ? true : false;
588 if (dig->coherent_mode != new_coherent_mode) {
589 dig->coherent_mode = new_coherent_mode;
590 radeon_property_change_mode(&radeon_encoder->base);
591 }
445282db
DA		 592 }
593
8666c076
AD		 594 if (property == rdev->mode_info.audio_property) {
595 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
596 /* need to find digital encoder on connector */
597 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
598 if (!encoder)
599 return 0;
600
601 radeon_encoder = to_radeon_encoder(encoder);
602
603 if (radeon_connector->audio != val) {
604 radeon_connector->audio = val;
605 radeon_property_change_mode(&radeon_encoder->base);
606 }
607 }
608
6214bb74
AD		 609 if (property == rdev->mode_info.dither_property) {
610 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
611 /* need to find digital encoder on connector */
612 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
613 if (!encoder)
614 return 0;
615
616 radeon_encoder = to_radeon_encoder(encoder);
617
618 if (radeon_connector->dither != val) {
619 radeon_connector->dither = val;
620 radeon_property_change_mode(&radeon_encoder->base);
621 }
622 }
623
5b1714d3
AD		 624 if (property == rdev->mode_info.underscan_property) {
625 /* need to find digital encoder on connector */
626 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
627 if (!encoder)
628 return 0;
629
630 radeon_encoder = to_radeon_encoder(encoder);
631
632 if (radeon_encoder->underscan_type != val) {
633 radeon_encoder->underscan_type = val;
634 radeon_property_change_mode(&radeon_encoder->base);
635 }
636 }
637
5bccf5e3
MG		 638 if (property == rdev->mode_info.underscan_hborder_property) {
639 /* need to find digital encoder on connector */
640 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
641 if (!encoder)
642 return 0;
643
644 radeon_encoder = to_radeon_encoder(encoder);
645
646 if (radeon_encoder->underscan_hborder != val) {
647 radeon_encoder->underscan_hborder = val;
648 radeon_property_change_mode(&radeon_encoder->base);
649 }
650 }
651
652 if (property == rdev->mode_info.underscan_vborder_property) {
653 /* need to find digital encoder on connector */
654 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
655 if (!encoder)
656 return 0;
657
658 radeon_encoder = to_radeon_encoder(encoder);
659
660 if (radeon_encoder->underscan_vborder != val) {
661 radeon_encoder->underscan_vborder = val;
662 radeon_property_change_mode(&radeon_encoder->base);
663 }
664 }
665
445282db
DA		 666 if (property == rdev->mode_info.tv_std_property) {
667 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
668 if (!encoder) {
669 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
670 }
671
672 if (!encoder)
673 return 0;
674
675 radeon_encoder = to_radeon_encoder(encoder);
676 if (!radeon_encoder->enc_priv)
677 return 0;
643acacf 678 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
445282db
DA		 679 struct radeon_encoder_atom_dac *dac_int;
680 dac_int = radeon_encoder->enc_priv;
681 dac_int->tv_std = val;
682 } else {
683 struct radeon_encoder_tv_dac *dac_int;
684 dac_int = radeon_encoder->enc_priv;
685 dac_int->tv_std = val;
686 }
687 radeon_property_change_mode(&radeon_encoder->base);
688 }
689
690 if (property == rdev->mode_info.load_detect_property) {
691 struct radeon_connector *radeon_connector =
692 to_radeon_connector(connector);
693
694 if (val == 0)
695 radeon_connector->dac_load_detect = false;
696 else
697 radeon_connector->dac_load_detect = true;
698 }
699
700 if (property == rdev->mode_info.tmds_pll_property) {
701 struct radeon_encoder_int_tmds *tmds = NULL;
702 bool ret = false;
703 /* need to find digital encoder on connector */
704 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
705 if (!encoder)
706 return 0;
707
708 radeon_encoder = to_radeon_encoder(encoder);
709
710 tmds = radeon_encoder->enc_priv;
711 if (!tmds)
712 return 0;
713
714 if (val == 0) {
715 if (rdev->is_atom_bios)
716 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
717 else
718 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
719 }
720 if (val == 1 || ret == false) {
721 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
722 }
723 radeon_property_change_mode(&radeon_encoder->base);
724 }
725
da997620
AD		 726 if (property == dev->mode_config.scaling_mode_property) {
727 enum radeon_rmx_type rmx_type;
728
729 if (connector->encoder)
730 radeon_encoder = to_radeon_encoder(connector->encoder);
731 else {
319d1e14 732 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
da997620
AD		 733 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
734 }
735
736 switch (val) {
737 default:
738 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
739 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
740 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
741 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
742 }
743 if (radeon_encoder->rmx_type == rmx_type)
744 return 0;
745
746 if ((rmx_type != DRM_MODE_SCALE_NONE) &&
747 (radeon_encoder->native_mode.clock == 0))
748 return 0;
749
750 radeon_encoder->rmx_type = rmx_type;
751
752 radeon_property_change_mode(&radeon_encoder->base);
753 }
754
643b1f56
AD		 755 if (property == rdev->mode_info.output_csc_property) {
756 if (connector->encoder)
757 radeon_encoder = to_radeon_encoder(connector->encoder);
758 else {
16bb079e 759 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
643b1f56
AD		 760 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
761 }
762
763 if (radeon_encoder->output_csc == val)
764 return 0;
765
766 radeon_encoder->output_csc = val;
767
768 if (connector->encoder->crtc) {
769 struct drm_crtc *crtc = connector->encoder->crtc;
16bb079e 770 const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
643b1f56
AD		 771 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
772
773 radeon_crtc->output_csc = radeon_encoder->output_csc;
774
775 (*crtc_funcs->load_lut)(crtc);
776 }
777 }
778
771fe6b9
JG		 779 return 0;
780}
781
8dfaa8a7
MD		 782static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
783 struct drm_connector *connector)
784{
785 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 786 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
13bb9430
MG		 787 struct drm_display_mode *t, *mode;
788
789 /* If the EDID preferred mode doesn't match the native mode, use it */
790 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
791 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
792 if (mode->hdisplay != native_mode->hdisplay ||
793 mode->vdisplay != native_mode->vdisplay)
794 memcpy(native_mode, mode, sizeof(*mode));
795 }
796 }
8dfaa8a7
MD		 797
798 /* Try to get native mode details from EDID if necessary */
de2103e4 799 if (!native_mode->clock) {
8dfaa8a7 800 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
de2103e4
AD		 801 if (mode->hdisplay == native_mode->hdisplay &&
802 mode->vdisplay == native_mode->vdisplay) {
803 *native_mode = *mode;
804 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
c5d46b4e 805 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
8dfaa8a7
MD		 806 break;
807 }
808 }
809 }
13bb9430 810
de2103e4 811 if (!native_mode->clock) {
c5d46b4e 812 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
8dfaa8a7
MD		 813 radeon_encoder->rmx_type = RMX_OFF;
814 }
815}
771fe6b9
JG		 816
817static int radeon_lvds_get_modes(struct drm_connector *connector)
818{
771fe6b9
JG		 819 struct drm_encoder *encoder;
820 int ret = 0;
821 struct drm_display_mode *mode;
822
72a5c970
AD		 823 radeon_connector_get_edid(connector);
824 ret = radeon_ddc_get_modes(connector);
825 if (ret > 0) {
826 encoder = radeon_best_single_encoder(connector);
827 if (encoder) {
828 radeon_fixup_lvds_native_mode(encoder, connector);
829 /* add scaled modes */
830 radeon_add_common_modes(encoder, connector);
771fe6b9 831 }
72a5c970 832 return ret;
771fe6b9
JG		 833 }
834
835 encoder = radeon_best_single_encoder(connector);
836 if (!encoder)
837 return 0;
838
839 /* we have no EDID modes */
840 mode = radeon_fp_native_mode(encoder);
841 if (mode) {
842 ret = 1;
843 drm_mode_probed_add(connector, mode);
7a868e18
AD		 844 /* add the width/height from vbios tables if available */
845 connector->display_info.width_mm = mode->width_mm;
846 connector->display_info.height_mm = mode->height_mm;
7747b713
AD		 847 /* add scaled modes */
848 radeon_add_common_modes(encoder, connector);
771fe6b9 849 }
923f6848 850
771fe6b9
JG		 851 return ret;
852}
853
854static int radeon_lvds_mode_valid(struct drm_connector *connector,
855 struct drm_display_mode *mode)
856{
a3fa6320
AD		 857 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
858
859 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
860 return MODE_PANEL;
861
862 if (encoder) {
863 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
864 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
865
866 /* AVIVO hardware supports downscaling modes larger than the panel
867 * to the panel size, but I'm not sure this is desirable.
868 */
869 if ((mode->hdisplay > native_mode->hdisplay) ||
870 (mode->vdisplay > native_mode->vdisplay))
871 return MODE_PANEL;
872
873 /* if scaling is disabled, block non-native modes */
874 if (radeon_encoder->rmx_type == RMX_OFF) {
875 if ((mode->hdisplay != native_mode->hdisplay) ||
876 (mode->vdisplay != native_mode->vdisplay))
877 return MODE_PANEL;
878 }
879 }
880
771fe6b9
JG		 881 return MODE_OK;
882}
883
7b334fcb 884static enum drm_connector_status
930a9e28 885radeon_lvds_detect(struct drm_connector *connector, bool force)
771fe6b9 886{
13485794
AD		 887 struct drm_device *dev = connector->dev;
888 struct radeon_device *rdev = dev->dev_private;
0549a061 889 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2ffb8429 890 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0549a061 891 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA		 892 int r;
893
894 r = pm_runtime_get_sync(connector->dev->dev);
895 if (r < 0)
896 return connector_status_disconnected;
2ffb8429
AD		 897
898 if (encoder) {
899 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 900 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2ffb8429
AD		 901
902 /* check if panel is valid */
de2103e4 903 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
2ffb8429 904 ret = connector_status_connected;
13485794
AD		 905 /* don't fetch the edid from the vbios if ddc fails and runpm is
906 * enabled so we report disconnected.
907 */
908 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
909 ret = connector_status_disconnected;
2ffb8429 910 }
0549a061
AD		 911
912 /* check for edid as well */
72a5c970 913 radeon_connector_get_edid(connector);
0294cf4f
AD		 914 if (radeon_connector->edid)
915 ret = connector_status_connected;
771fe6b9 916 /* check acpi lid status ??? */
2ffb8429 917
771fe6b9 918 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 919 pm_runtime_mark_last_busy(connector->dev->dev);
920 pm_runtime_put_autosuspend(connector->dev->dev);
771fe6b9
JG		 921 return ret;
922}
923
924static void radeon_connector_destroy(struct drm_connector *connector)
925{
926 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
927
72a5c970 928 radeon_connector_free_edid(connector);
771fe6b9 929 kfree(radeon_connector->con_priv);
34ea3d38 930 drm_connector_unregister(connector);
771fe6b9
JG		 931 drm_connector_cleanup(connector);
932 kfree(connector);
933}
934
445282db
DA		 935static int radeon_lvds_set_property(struct drm_connector *connector,
936 struct drm_property *property,
937 uint64_t value)
938{
939 struct drm_device *dev = connector->dev;
940 struct radeon_encoder *radeon_encoder;
941 enum radeon_rmx_type rmx_type;
942
d9fdaafb 943 DRM_DEBUG_KMS("\n");
445282db
DA		 944 if (property != dev->mode_config.scaling_mode_property)
945 return 0;
946
947 if (connector->encoder)
948 radeon_encoder = to_radeon_encoder(connector->encoder);
949 else {
319d1e14 950 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
445282db
DA		 951 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
952 }
953
954 switch (value) {
955 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
956 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
957 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
958 default:
959 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
960 }
961 if (radeon_encoder->rmx_type == rmx_type)
962 return 0;
963
964 radeon_encoder->rmx_type = rmx_type;
965
966 radeon_property_change_mode(&radeon_encoder->base);
967 return 0;
968}
969
970
1109ca09 971static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
771fe6b9
JG		 972 .get_modes = radeon_lvds_get_modes,
973 .mode_valid = radeon_lvds_mode_valid,
974 .best_encoder = radeon_best_single_encoder,
975};
976
1109ca09 977static const struct drm_connector_funcs radeon_lvds_connector_funcs = {
771fe6b9
JG		 978 .dpms = drm_helper_connector_dpms,
979 .detect = radeon_lvds_detect,
980 .fill_modes = drm_helper_probe_single_connector_modes,
981 .destroy = radeon_connector_destroy,
445282db 982 .set_property = radeon_lvds_set_property,
771fe6b9
JG		 983};
984
985static int radeon_vga_get_modes(struct drm_connector *connector)
986{
771fe6b9
JG		 987 int ret;
988
72a5c970
AD		 989 radeon_connector_get_edid(connector);
990 ret = radeon_ddc_get_modes(connector);
771fe6b9 991
da997620
AD		 992 radeon_get_native_mode(connector);
993
771fe6b9
JG		 994 return ret;
995}
996
997static int radeon_vga_mode_valid(struct drm_connector *connector,
998 struct drm_display_mode *mode)
999{
b20f9bef
AD		 1000 struct drm_device *dev = connector->dev;
1001 struct radeon_device *rdev = dev->dev_private;
1002
a3fa6320 1003 /* XXX check mode bandwidth */
b20f9bef
AD		 1004
1005 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1006 return MODE_CLOCK_HIGH;
1007
771fe6b9
JG		 1008 return MODE_OK;
1009}
1010
7b334fcb 1011static enum drm_connector_status
930a9e28 1012radeon_vga_detect(struct drm_connector *connector, bool force)
771fe6b9 1013{
fafcf94e
AD		 1014 struct drm_device *dev = connector->dev;
1015 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 1016 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1017 struct drm_encoder *encoder;
319d1e14 1018 const struct drm_encoder_helper_funcs *encoder_funcs;
4b9d2a21 1019 bool dret = false;
771fe6b9 1020 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA		 1021 int r;
1022
1023 r = pm_runtime_get_sync(connector->dev->dev);
1024 if (r < 0)
1025 return connector_status_disconnected;
771fe6b9 1026
4ce001ab
DA		 1027 encoder = radeon_best_single_encoder(connector);
1028 if (!encoder)
1029 ret = connector_status_disconnected;
1030
eb6b6d7c 1031 if (radeon_connector->ddc_bus)
0a9069d3 1032 dret = radeon_ddc_probe(radeon_connector, false);
0294cf4f 1033 if (dret) {
d0d0a225 1034 radeon_connector->detected_by_load = false;
72a5c970
AD		 1035 radeon_connector_free_edid(connector);
1036 radeon_connector_get_edid(connector);
0294cf4f
AD		 1037
1038 if (!radeon_connector->edid) {
f82f5f3a 1039 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 1040 connector->name);
f82f5f3a 1041 ret = connector_status_connected;
0294cf4f 1042 } else {
72a5c970
AD		 1043 radeon_connector->use_digital =
1044 !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
0294cf4f
AD		 1045
1046 /* some oems have boards with separate digital and analog connectors
1047 * with a shared ddc line (often vga + hdmi)
1048 */
1049 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
72a5c970 1050 radeon_connector_free_edid(connector);
0294cf4f 1051 ret = connector_status_disconnected;
72a5c970 1052 } else {
0294cf4f 1053 ret = connector_status_connected;
72a5c970 1054 }
0294cf4f
AD		 1055 }
1056 } else {
c3cceedd
DA		 1057
1058 /* if we aren't forcing don't do destructive polling */
d0d0a225
AD		 1059 if (!force) {
1060 /* only return the previous status if we last
1061 * detected a monitor via load.
1062 */
1063 if (radeon_connector->detected_by_load)
10ebc0bc
DA		 1064 ret = connector->status;
1065 goto out;
d0d0a225 1066 }
c3cceedd 1067
d8a7f792 1068 if (radeon_connector->dac_load_detect && encoder) {
445282db
DA		 1069 encoder_funcs = encoder->helper_private;
1070 ret = encoder_funcs->detect(encoder, connector);
34076446 1071 if (ret != connector_status_disconnected)
d0d0a225 1072 radeon_connector->detected_by_load = true;
445282db 1073 }
771fe6b9
JG		 1074 }
1075
4ce001ab
DA		 1076 if (ret == connector_status_connected)
1077 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
fafcf94e
AD		 1078
1079 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1080 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1081 * by other means, assume the CRT is connected and use that EDID.
1082 */
1083 if ((!rdev->is_atom_bios) &&
1084 (ret == connector_status_disconnected) &&
1085 rdev->mode_info.bios_hardcoded_edid_size) {
1086 ret = connector_status_connected;
1087 }
1088
771fe6b9 1089 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 1090
1091out:
1092 pm_runtime_mark_last_busy(connector->dev->dev);
1093 pm_runtime_put_autosuspend(connector->dev->dev);
1094
771fe6b9
JG		 1095 return ret;
1096}
1097
1109ca09 1098static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
771fe6b9
JG		 1099 .get_modes = radeon_vga_get_modes,
1100 .mode_valid = radeon_vga_mode_valid,
1101 .best_encoder = radeon_best_single_encoder,
1102};
1103
1109ca09 1104static const struct drm_connector_funcs radeon_vga_connector_funcs = {
771fe6b9
JG		 1105 .dpms = drm_helper_connector_dpms,
1106 .detect = radeon_vga_detect,
1107 .fill_modes = drm_helper_probe_single_connector_modes,
1108 .destroy = radeon_connector_destroy,
1109 .set_property = radeon_connector_set_property,
1110};
1111
4ce001ab
DA		 1112static int radeon_tv_get_modes(struct drm_connector *connector)
1113{
1114 struct drm_device *dev = connector->dev;
923f6848 1115 struct radeon_device *rdev = dev->dev_private;
4ce001ab 1116 struct drm_display_mode *tv_mode;
923f6848 1117 struct drm_encoder *encoder;
4ce001ab 1118
923f6848
AD		 1119 encoder = radeon_best_single_encoder(connector);
1120 if (!encoder)
1121 return 0;
4ce001ab 1122
923f6848
AD		 1123 /* avivo chips can scale any mode */
1124 if (rdev->family >= CHIP_RS600)
1125 /* add scaled modes */
1126 radeon_add_common_modes(encoder, connector);
1127 else {
1128 /* only 800x600 is supported right now on pre-avivo chips */
d50ba256 1129 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
923f6848
AD		 1130 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
1131 drm_mode_probed_add(connector, tv_mode);
1132 }
4ce001ab
DA		 1133 return 1;
1134}
1135
1136static int radeon_tv_mode_valid(struct drm_connector *connector,
1137 struct drm_display_mode *mode)
1138{
a3fa6320
AD		 1139 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
1140 return MODE_CLOCK_RANGE;
4ce001ab
DA		 1141 return MODE_OK;
1142}
1143
7b334fcb 1144static enum drm_connector_status
930a9e28 1145radeon_tv_detect(struct drm_connector *connector, bool force)
4ce001ab
DA		 1146{
1147 struct drm_encoder *encoder;
319d1e14 1148 const struct drm_encoder_helper_funcs *encoder_funcs;
445282db
DA		 1149 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1150 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc 1151 int r;
445282db
DA		 1152
1153 if (!radeon_connector->dac_load_detect)
1154 return ret;
4ce001ab 1155
10ebc0bc
DA		 1156 r = pm_runtime_get_sync(connector->dev->dev);
1157 if (r < 0)
1158 return connector_status_disconnected;
1159
4ce001ab
DA		 1160 encoder = radeon_best_single_encoder(connector);
1161 if (!encoder)
1162 ret = connector_status_disconnected;
1163 else {
1164 encoder_funcs = encoder->helper_private;
1165 ret = encoder_funcs->detect(encoder, connector);
1166 }
1167 if (ret == connector_status_connected)
1168 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
1169 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 1170 pm_runtime_mark_last_busy(connector->dev->dev);
1171 pm_runtime_put_autosuspend(connector->dev->dev);
4ce001ab
DA		 1172 return ret;
1173}
1174
1109ca09 1175static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
4ce001ab
DA		 1176 .get_modes = radeon_tv_get_modes,
1177 .mode_valid = radeon_tv_mode_valid,
1178 .best_encoder = radeon_best_single_encoder,
1179};
1180
1109ca09 1181static const struct drm_connector_funcs radeon_tv_connector_funcs = {
4ce001ab
DA		 1182 .dpms = drm_helper_connector_dpms,
1183 .detect = radeon_tv_detect,
1184 .fill_modes = drm_helper_probe_single_connector_modes,
1185 .destroy = radeon_connector_destroy,
1186 .set_property = radeon_connector_set_property,
1187};
1188
11fe1266
TU		 1189static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector)
1190{
1191 struct drm_device *dev = connector->dev;
1192 struct radeon_device *rdev = dev->dev_private;
1193 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1194 enum drm_connector_status status;
1195
1196 /* We only trust HPD on R600 and newer ASICS. */
1197 if (rdev->family >= CHIP_R600
1198 && radeon_connector->hpd.hpd != RADEON_HPD_NONE) {
1199 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
1200 status = connector_status_connected;
1201 else
1202 status = connector_status_disconnected;
1203 if (connector->status == status)
1204 return true;
1205 }
1206
1207 return false;
1208}
1209
4ce001ab
DA		 1210/*
1211 * DVI is complicated
1212 * Do a DDC probe, if DDC probe passes, get the full EDID so
1213 * we can do analog/digital monitor detection at this point.
1214 * If the monitor is an analog monitor or we got no DDC,
1215 * we need to find the DAC encoder object for this connector.
1216 * If we got no DDC, we do load detection on the DAC encoder object.
1217 * If we got analog DDC or load detection passes on the DAC encoder
1218 * we have to check if this analog encoder is shared with anyone else (TV)
1219 * if its shared we have to set the other connector to disconnected.
1220 */
7b334fcb 1221static enum drm_connector_status
930a9e28 1222radeon_dvi_detect(struct drm_connector *connector, bool force)
771fe6b9 1223{
fafcf94e
AD		 1224 struct drm_device *dev = connector->dev;
1225 struct radeon_device *rdev = dev->dev_private;
771fe6b9 1226 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
4ce001ab 1227 struct drm_encoder *encoder = NULL;
319d1e14 1228 const struct drm_encoder_helper_funcs *encoder_funcs;
10ebc0bc 1229 int i, r;
771fe6b9 1230 enum drm_connector_status ret = connector_status_disconnected;
fc87f13b 1231 bool dret = false, broken_edid = false;
771fe6b9 1232
10ebc0bc
DA		 1233 r = pm_runtime_get_sync(connector->dev->dev);
1234 if (r < 0)
1235 return connector_status_disconnected;
1236
cb5d4166
L		 1237 if (radeon_connector->detected_hpd_without_ddc) {
1238 force = true;
1239 radeon_connector->detected_hpd_without_ddc = false;
1240 }
1241
10ebc0bc
DA		 1242 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1243 ret = connector->status;
1244 goto exit;
1245 }
11fe1266 1246
cb5d4166 1247 if (radeon_connector->ddc_bus) {
0a9069d3 1248 dret = radeon_ddc_probe(radeon_connector, false);
cb5d4166
L		 1249
1250 /* Sometimes the pins required for the DDC probe on DVI
1251 * connectors don't make contact at the same time that the ones
1252 * for HPD do. If the DDC probe fails even though we had an HPD
1253 * signal, try again later */
1254 if (!dret && !force &&
1255 connector->status != connector_status_connected) {
1256 DRM_DEBUG_KMS("hpd detected without ddc, retrying in 1 second\n");
1257 radeon_connector->detected_hpd_without_ddc = true;
1258 schedule_delayed_work(&rdev->hotplug_work,
1259 msecs_to_jiffies(1000));
1260 goto exit;
1261 }
1262 }
4ce001ab 1263 if (dret) {
d0d0a225 1264 radeon_connector->detected_by_load = false;
72a5c970
AD		 1265 radeon_connector_free_edid(connector);
1266 radeon_connector_get_edid(connector);
4ce001ab
DA		 1267
1268 if (!radeon_connector->edid) {
f82f5f3a 1269 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 1270 connector->name);
4a9a8b71
DA		 1271 /* rs690 seems to have a problem with connectors not existing and always
1272 * return a block of 0's. If we see this just stop polling on this output */
72a5c970
AD		 1273 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) &&
1274 radeon_connector->base.null_edid_counter) {
4a9a8b71 1275 ret = connector_status_disconnected;
72082093
JN		 1276 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n",
1277 connector->name);
4a9a8b71 1278 radeon_connector->ddc_bus = NULL;
fc87f13b
EE		 1279 } else {
1280 ret = connector_status_connected;
1281 broken_edid = true; /* defer use_digital to later */
4a9a8b71 1282 }
4ce001ab 1283 } else {
72a5c970
AD		 1284 radeon_connector->use_digital =
1285 !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
4ce001ab 1286
0294cf4f
AD		 1287 /* some oems have boards with separate digital and analog connectors
1288 * with a shared ddc line (often vga + hdmi)
1289 */
1290 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
72a5c970 1291 radeon_connector_free_edid(connector);
0294cf4f 1292 ret = connector_status_disconnected;
72a5c970 1293 } else {
0294cf4f 1294 ret = connector_status_connected;
72a5c970 1295 }
42f14c4b
AD		 1296 /* This gets complicated. We have boards with VGA + HDMI with a
1297 * shared DDC line and we have boards with DVI-D + HDMI with a shared
1298 * DDC line. The latter is more complex because with DVI<->HDMI adapters
1299 * you don't really know what's connected to which port as both are digital.
71407c46 1300 */
d3932d6c 1301 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
71407c46
AD		 1302 struct drm_connector *list_connector;
1303 struct radeon_connector *list_radeon_connector;
1304 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
1305 if (connector == list_connector)
1306 continue;
1307 list_radeon_connector = to_radeon_connector(list_connector);
b2ea4aa6
AD		 1308 if (list_radeon_connector->shared_ddc &&
1309 (list_radeon_connector->ddc_bus->rec.i2c_id ==
1310 radeon_connector->ddc_bus->rec.i2c_id)) {
42f14c4b
AD		 1311 /* cases where both connectors are digital */
1312 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
1313 /* hpd is our only option in this case */
1314 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
72a5c970 1315 radeon_connector_free_edid(connector);
71407c46
AD		 1316 ret = connector_status_disconnected;
1317 }
1318 }
1319 }
1320 }
1321 }
4ce001ab
DA		 1322 }
1323 }
1324
1325 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
1326 goto out;
1327
5f0a2612
AD		 1328 /* DVI-D and HDMI-A are digital only */
1329 if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) ||
1330 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
1331 goto out;
1332
d0d0a225 1333 /* if we aren't forcing don't do destructive polling */
c3cceedd 1334 if (!force) {
d0d0a225
AD		 1335 /* only return the previous status if we last
1336 * detected a monitor via load.
1337 */
1338 if (radeon_connector->detected_by_load)
1339 ret = connector->status;
c3cceedd
DA		 1340 goto out;
1341 }
1342
4ce001ab 1343 /* find analog encoder */
445282db
DA		 1344 if (radeon_connector->dac_load_detect) {
1345 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1346 if (connector->encoder_ids[i] == 0)
1347 break;
771fe6b9 1348
b957f457
RC		 1349 encoder = drm_encoder_find(connector->dev,
1350 connector->encoder_ids[i]);
1351 if (!encoder)
445282db 1352 continue;
771fe6b9 1353
e3632507 1354 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC &&
e00e8b5e
AD		 1355 encoder->encoder_type != DRM_MODE_ENCODER_TVDAC)
1356 continue;
1357
445282db
DA		 1358 encoder_funcs = encoder->helper_private;
1359 if (encoder_funcs->detect) {
fc87f13b
EE		 1360 if (!broken_edid) {
1361 if (ret != connector_status_connected) {
1362 /* deal with analog monitors without DDC */
1363 ret = encoder_funcs->detect(encoder, connector);
1364 if (ret == connector_status_connected) {
1365 radeon_connector->use_digital = false;
1366 }
1367 if (ret != connector_status_disconnected)
1368 radeon_connector->detected_by_load = true;
445282db 1369 }
fc87f13b
EE		 1370 } else {
1371 enum drm_connector_status lret;
1372 /* assume digital unless load detected otherwise */
1373 radeon_connector->use_digital = true;
1374 lret = encoder_funcs->detect(encoder, connector);
1375 DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret);
1376 if (lret == connector_status_connected)
1377 radeon_connector->use_digital = false;
771fe6b9 1378 }
445282db 1379 break;
771fe6b9
JG		 1380 }
1381 }
1382 }
1383
4ce001ab
DA		 1384 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
1385 encoder) {
1386 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
1387 }
1388
fafcf94e
AD		 1389 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1390 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1391 * by other means, assume the DFP is connected and use that EDID. In most
1392 * cases the DVI port is actually a virtual KVM port connected to the service
1393 * processor.
1394 */
a09d431f 1395out:
fafcf94e
AD		 1396 if ((!rdev->is_atom_bios) &&
1397 (ret == connector_status_disconnected) &&
1398 rdev->mode_info.bios_hardcoded_edid_size) {
1399 radeon_connector->use_digital = true;
1400 ret = connector_status_connected;
1401 }
1402
771fe6b9
JG		 1403 /* updated in get modes as well since we need to know if it's analog or digital */
1404 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc 1405
d0ea397e
AD		 1406 if ((radeon_audio != 0) && radeon_connector->use_digital) {
1407 const struct drm_connector_helper_funcs *connector_funcs =
1408 connector->helper_private;
1409
1410 encoder = connector_funcs->best_encoder(connector);
1411 if (encoder && (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)) {
1412 radeon_connector_get_edid(connector);
1413 radeon_audio_detect(connector, encoder, ret);
1414 }
1415 }
1a626b68 1416
10ebc0bc
DA		 1417exit:
1418 pm_runtime_mark_last_busy(connector->dev->dev);
1419 pm_runtime_put_autosuspend(connector->dev->dev);
1420
771fe6b9
JG		 1421 return ret;
1422}
1423
1424/* okay need to be smart in here about which encoder to pick */
1109ca09 1425static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
771fe6b9
JG		 1426{
1427 int enc_id = connector->encoder_ids[0];
1428 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
771fe6b9
JG		 1429 struct drm_encoder *encoder;
1430 int i;
1431 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1432 if (connector->encoder_ids[i] == 0)
1433 break;
1434
b957f457
RC		 1435 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1436 if (!encoder)
771fe6b9
JG		 1437 continue;
1438
4ce001ab 1439 if (radeon_connector->use_digital == true) {
771fe6b9
JG		 1440 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1441 return encoder;
1442 } else {
1443 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
1444 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
1445 return encoder;
1446 }
1447 }
1448
1449 /* see if we have a default encoder TODO */
1450
1451 /* then check use digitial */
1452 /* pick the first one */
b957f457
RC		 1453 if (enc_id)
1454 return drm_encoder_find(connector->dev, enc_id);
771fe6b9
JG		 1455 return NULL;
1456}
1457
d50ba256
DA		 1458static void radeon_dvi_force(struct drm_connector *connector)
1459{
1460 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1461 if (connector->force == DRM_FORCE_ON)
1462 radeon_connector->use_digital = false;
1463 if (connector->force == DRM_FORCE_ON_DIGITAL)
1464 radeon_connector->use_digital = true;
1465}
1466
a3fa6320
AD		 1467static int radeon_dvi_mode_valid(struct drm_connector *connector,
1468 struct drm_display_mode *mode)
1469{
1b24203e
AD		 1470 struct drm_device *dev = connector->dev;
1471 struct radeon_device *rdev = dev->dev_private;
a3fa6320
AD		 1472 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1473
1474 /* XXX check mode bandwidth */
1475
1b24203e
AD		 1476 /* clocks over 135 MHz have heat issues with DVI on RV100 */
1477 if (radeon_connector->use_digital &&
1478 (rdev->family == CHIP_RV100) &&
1479 (mode->clock > 135000))
1480 return MODE_CLOCK_HIGH;
1481
a3fa6320
AD		 1482 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1483 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1484 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1485 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1486 return MODE_OK;
377bd8a9 1487 else if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
f2263fc7
AD		 1488 /* HDMI 1.3+ supports max clock of 340 Mhz */
1489 if (mode->clock > 340000)
e1e84017 1490 return MODE_CLOCK_HIGH;
f2263fc7
AD		 1491 else
1492 return MODE_OK;
1493 } else {
a3fa6320 1494 return MODE_CLOCK_HIGH;
f2263fc7 1495 }
a3fa6320 1496 }
b20f9bef
AD		 1497
1498 /* check against the max pixel clock */
1499 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1500 return MODE_CLOCK_HIGH;
1501
a3fa6320
AD		 1502 return MODE_OK;
1503}
1504
1109ca09 1505static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
3e22920f 1506 .get_modes = radeon_vga_get_modes,
a3fa6320 1507 .mode_valid = radeon_dvi_mode_valid,
771fe6b9
JG		 1508 .best_encoder = radeon_dvi_encoder,
1509};
1510
1109ca09 1511static const struct drm_connector_funcs radeon_dvi_connector_funcs = {
771fe6b9
JG		 1512 .dpms = drm_helper_connector_dpms,
1513 .detect = radeon_dvi_detect,
1514 .fill_modes = drm_helper_probe_single_connector_modes,
1515 .set_property = radeon_connector_set_property,
1516 .destroy = radeon_connector_destroy,
d50ba256 1517 .force = radeon_dvi_force,
771fe6b9
JG		 1518};
1519
746c1aa4
DA		 1520static int radeon_dp_get_modes(struct drm_connector *connector)
1521{
1522 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
8b834852 1523 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1524 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA		 1525 int ret;
1526
f89931f3
AD		 1527 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1528 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1529 struct drm_display_mode *mode;
1530
2b69ffb9
AD		 1531 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1532 if (!radeon_dig_connector->edp_on)
1533 atombios_set_edp_panel_power(connector,
1534 ATOM_TRANSMITTER_ACTION_POWER_ON);
72a5c970
AD		 1535 radeon_connector_get_edid(connector);
1536 ret = radeon_ddc_get_modes(connector);
2b69ffb9
AD		 1537 if (!radeon_dig_connector->edp_on)
1538 atombios_set_edp_panel_power(connector,
1539 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1540 } else {
1541 /* need to setup ddc on the bridge */
1542 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1543 ENCODER_OBJECT_ID_NONE) {
1544 if (encoder)
1545 radeon_atom_ext_encoder_setup_ddc(encoder);
1546 }
72a5c970
AD		 1547 radeon_connector_get_edid(connector);
1548 ret = radeon_ddc_get_modes(connector);
2b69ffb9 1549 }
d291767b
AD		 1550
1551 if (ret > 0) {
d291767b
AD		 1552 if (encoder) {
1553 radeon_fixup_lvds_native_mode(encoder, connector);
1554 /* add scaled modes */
1555 radeon_add_common_modes(encoder, connector);
1556 }
1557 return ret;
1558 }
1559
d291767b
AD		 1560 if (!encoder)
1561 return 0;
1562
1563 /* we have no EDID modes */
1564 mode = radeon_fp_native_mode(encoder);
1565 if (mode) {
1566 ret = 1;
1567 drm_mode_probed_add(connector, mode);
1568 /* add the width/height from vbios tables if available */
1569 connector->display_info.width_mm = mode->width_mm;
1570 connector->display_info.height_mm = mode->height_mm;
1571 /* add scaled modes */
1572 radeon_add_common_modes(encoder, connector);
1573 }
591a10e1
AD		 1574 } else {
1575 /* need to setup ddc on the bridge */
1d33e1fc
AD		 1576 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1577 ENCODER_OBJECT_ID_NONE) {
591a10e1
AD		 1578 if (encoder)
1579 radeon_atom_ext_encoder_setup_ddc(encoder);
1580 }
72a5c970
AD		 1581 radeon_connector_get_edid(connector);
1582 ret = radeon_ddc_get_modes(connector);
da997620
AD		 1583
1584 radeon_get_native_mode(connector);
591a10e1 1585 }
8b834852 1586
746c1aa4
DA		 1587 return ret;
1588}
1589
1d33e1fc 1590u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
d7fa8bb3 1591{
d7fa8bb3
AD		 1592 struct drm_encoder *encoder;
1593 struct radeon_encoder *radeon_encoder;
1594 int i;
d7fa8bb3
AD		 1595
1596 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1597 if (connector->encoder_ids[i] == 0)
1598 break;
1599
b957f457
RC		 1600 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1601 if (!encoder)
d7fa8bb3
AD		 1602 continue;
1603
d7fa8bb3
AD		 1604 radeon_encoder = to_radeon_encoder(encoder);
1605
1606 switch (radeon_encoder->encoder_id) {
1607 case ENCODER_OBJECT_ID_TRAVIS:
1608 case ENCODER_OBJECT_ID_NUTMEG:
1d33e1fc 1609 return radeon_encoder->encoder_id;
d7fa8bb3
AD		 1610 default:
1611 break;
1612 }
1613 }
1614
1d33e1fc 1615 return ENCODER_OBJECT_ID_NONE;
d7fa8bb3
AD		 1616}
1617
ebdea82d 1618static bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
d7fa8bb3 1619{
d7fa8bb3
AD		 1620 struct drm_encoder *encoder;
1621 struct radeon_encoder *radeon_encoder;
1622 int i;
1623 bool found = false;
1624
1625 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1626 if (connector->encoder_ids[i] == 0)
1627 break;
1628
b957f457
RC		 1629 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1630 if (!encoder)
d7fa8bb3
AD		 1631 continue;
1632
d7fa8bb3
AD		 1633 radeon_encoder = to_radeon_encoder(encoder);
1634 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1635 found = true;
1636 }
1637
1638 return found;
1639}
1640
1641bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1642{
1643 struct drm_device *dev = connector->dev;
1644 struct radeon_device *rdev = dev->dev_private;
1645
1646 if (ASIC_IS_DCE5(rdev) &&
af5d3653 1647 (rdev->clock.default_dispclk >= 53900) &&
d7fa8bb3
AD		 1648 radeon_connector_encoder_is_hbr2(connector)) {
1649 return true;
1650 }
1651
1652 return false;
1653}
1654
7b334fcb 1655static enum drm_connector_status
930a9e28 1656radeon_dp_detect(struct drm_connector *connector, bool force)
746c1aa4 1657{
f8d0edde
AD		 1658 struct drm_device *dev = connector->dev;
1659 struct radeon_device *rdev = dev->dev_private;
746c1aa4 1660 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
746c1aa4 1661 enum drm_connector_status ret = connector_status_disconnected;
4143e919 1662 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1663 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
10ebc0bc 1664 int r;
746c1aa4 1665
9843ead0
DA		 1666 if (radeon_dig_connector->is_mst)
1667 return connector_status_disconnected;
1668
10ebc0bc
DA		 1669 r = pm_runtime_get_sync(connector->dev->dev);
1670 if (r < 0)
1671 return connector_status_disconnected;
1672
1673 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1674 ret = connector->status;
1675 goto out;
1676 }
11fe1266 1677
72a5c970 1678 radeon_connector_free_edid(connector);
746c1aa4 1679
f89931f3
AD		 1680 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1681 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1682 if (encoder) {
1683 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1684 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1685
1686 /* check if panel is valid */
1687 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1688 ret = connector_status_connected;
13485794
AD		 1689 /* don't fetch the edid from the vbios if ddc fails and runpm is
1690 * enabled so we report disconnected.
1691 */
1692 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
1693 ret = connector_status_disconnected;
d291767b 1694 }
6f50eae7
AD		 1695 /* eDP is always DP */
1696 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
8b834852
AD		 1697 if (!radeon_dig_connector->edp_on)
1698 atombios_set_edp_panel_power(connector,
1699 ATOM_TRANSMITTER_ACTION_POWER_ON);
6f50eae7 1700 if (radeon_dp_getdpcd(radeon_connector))
9fa05c98 1701 ret = connector_status_connected;
8b834852
AD		 1702 if (!radeon_dig_connector->edp_on)
1703 atombios_set_edp_panel_power(connector,
1704 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1d33e1fc
AD		 1705 } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1706 ENCODER_OBJECT_ID_NONE) {
b06947b5
AD		 1707 /* DP bridges are always DP */
1708 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1709 /* get the DPCD from the bridge */
1710 radeon_dp_getdpcd(radeon_connector);
1711
6777a4f6
AD		 1712 if (encoder) {
1713 /* setup ddc on the bridge */
1714 radeon_atom_ext_encoder_setup_ddc(encoder);
0a9069d3
NOS		 1715 /* bridge chips are always aux */
1716 if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */
b06947b5 1717 ret = connector_status_connected;
6777a4f6 1718 else if (radeon_connector->dac_load_detect) { /* try load detection */
319d1e14 1719 const struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
b06947b5
AD		 1720 ret = encoder_funcs->detect(encoder, connector);
1721 }
591a10e1 1722 }
b06947b5 1723 } else {
6f50eae7 1724 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
f8d0edde
AD		 1725 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1726 ret = connector_status_connected;
9843ead0 1727 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
f8d0edde 1728 radeon_dp_getdpcd(radeon_connector);
9843ead0
DA		 1729 r = radeon_dp_mst_probe(radeon_connector);
1730 if (r == 1)
1731 ret = connector_status_disconnected;
1732 }
6f50eae7 1733 } else {
f8d0edde 1734 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
9843ead0
DA		 1735 if (radeon_dp_getdpcd(radeon_connector)) {
1736 r = radeon_dp_mst_probe(radeon_connector);
1737 if (r == 1)
1738 ret = connector_status_disconnected;
1739 else
1740 ret = connector_status_connected;
1741 }
f8d0edde 1742 } else {
d592fca9 1743 /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */
0a9069d3 1744 if (radeon_ddc_probe(radeon_connector, false))
f8d0edde
AD		 1745 ret = connector_status_connected;
1746 }
4143e919 1747 }
746c1aa4 1748 }
4143e919 1749
30f44372 1750 radeon_connector_update_scratch_regs(connector, ret);
1a626b68 1751
d0ea397e
AD		 1752 if ((radeon_audio != 0) && encoder) {
1753 radeon_connector_get_edid(connector);
1754 radeon_audio_detect(connector, encoder, ret);
1755 }
1a626b68 1756
10ebc0bc
DA		 1757out:
1758 pm_runtime_mark_last_busy(connector->dev->dev);
1759 pm_runtime_put_autosuspend(connector->dev->dev);
1760
746c1aa4
DA		 1761 return ret;
1762}
1763
5801ead6
AD		 1764static int radeon_dp_mode_valid(struct drm_connector *connector,
1765 struct drm_display_mode *mode)
1766{
6536a3a6
AD		 1767 struct drm_device *dev = connector->dev;
1768 struct radeon_device *rdev = dev->dev_private;
5801ead6
AD		 1769 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1770 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1771
1772 /* XXX check mode bandwidth */
1773
f89931f3
AD		 1774 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1775 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1776 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1777
1778 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1779 return MODE_PANEL;
1780
1781 if (encoder) {
1782 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1783 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1784
f89931f3 1785 /* AVIVO hardware supports downscaling modes larger than the panel
d291767b
AD		 1786 * to the panel size, but I'm not sure this is desirable.
1787 */
1788 if ((mode->hdisplay > native_mode->hdisplay) ||
1789 (mode->vdisplay > native_mode->vdisplay))
1790 return MODE_PANEL;
1791
1792 /* if scaling is disabled, block non-native modes */
1793 if (radeon_encoder->rmx_type == RMX_OFF) {
1794 if ((mode->hdisplay != native_mode->hdisplay) ||
1795 (mode->vdisplay != native_mode->vdisplay))
1796 return MODE_PANEL;
1797 }
1798 }
d291767b
AD		 1799 } else {
1800 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
6536a3a6 1801 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) {
d291767b 1802 return radeon_dp_mode_valid_helper(connector, mode);
6536a3a6 1803 } else {
377bd8a9 1804 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
6536a3a6
AD		 1805 /* HDMI 1.3+ supports max clock of 340 Mhz */
1806 if (mode->clock > 340000)
1807 return MODE_CLOCK_HIGH;
1808 } else {
1809 if (mode->clock > 165000)
1810 return MODE_CLOCK_HIGH;
1811 }
1812 }
d291767b 1813 }
6536a3a6
AD		 1814
1815 return MODE_OK;
5801ead6
AD		 1816}
1817
1109ca09 1818static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
746c1aa4 1819 .get_modes = radeon_dp_get_modes,
5801ead6 1820 .mode_valid = radeon_dp_mode_valid,
746c1aa4
DA		 1821 .best_encoder = radeon_dvi_encoder,
1822};
1823
1109ca09 1824static const struct drm_connector_funcs radeon_dp_connector_funcs = {
746c1aa4
DA		 1825 .dpms = drm_helper_connector_dpms,
1826 .detect = radeon_dp_detect,
1827 .fill_modes = drm_helper_probe_single_connector_modes,
1828 .set_property = radeon_connector_set_property,
379dfc25 1829 .destroy = radeon_connector_destroy,
746c1aa4
DA		 1830 .force = radeon_dvi_force,
1831};
1832
855f5f1d
AD		 1833static const struct drm_connector_funcs radeon_edp_connector_funcs = {
1834 .dpms = drm_helper_connector_dpms,
1835 .detect = radeon_dp_detect,
1836 .fill_modes = drm_helper_probe_single_connector_modes,
1837 .set_property = radeon_lvds_set_property,
379dfc25 1838 .destroy = radeon_connector_destroy,
855f5f1d
AD		 1839 .force = radeon_dvi_force,
1840};
1841
1842static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = {
1843 .dpms = drm_helper_connector_dpms,
1844 .detect = radeon_dp_detect,
1845 .fill_modes = drm_helper_probe_single_connector_modes,
1846 .set_property = radeon_lvds_set_property,
379dfc25 1847 .destroy = radeon_connector_destroy,
855f5f1d
AD		 1848 .force = radeon_dvi_force,
1849};
1850
771fe6b9
JG		 1851void
1852radeon_add_atom_connector(struct drm_device *dev,
1853 uint32_t connector_id,
1854 uint32_t supported_device,
1855 int connector_type,
1856 struct radeon_i2c_bus_rec *i2c_bus,
b75fad06 1857 uint32_t igp_lane_info,
eed45b30 1858 uint16_t connector_object_id,
26b5bc98
AD		 1859 struct radeon_hpd *hpd,
1860 struct radeon_router *router)
771fe6b9 1861{
445282db 1862 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 1863 struct drm_connector *connector;
1864 struct radeon_connector *radeon_connector;
1865 struct radeon_connector_atom_dig *radeon_dig_connector;
eac4dff6
AD		 1866 struct drm_encoder *encoder;
1867 struct radeon_encoder *radeon_encoder;
771fe6b9 1868 uint32_t subpixel_order = SubPixelNone;
0294cf4f 1869 bool shared_ddc = false;
eac4dff6 1870 bool is_dp_bridge = false;
496263bf 1871 bool has_aux = false;
771fe6b9 1872
4ce001ab 1873 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 1874 return;
1875
cf4c12f9
AD		 1876 /* if the user selected tv=0 don't try and add the connector */
1877 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1878 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1879 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1880 (radeon_tv == 0))
1881 return;
1882
771fe6b9
JG		 1883 /* see if we already added it */
1884 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1885 radeon_connector = to_radeon_connector(connector);
1886 if (radeon_connector->connector_id == connector_id) {
1887 radeon_connector->devices |= supported_device;
1888 return;
1889 }
0294cf4f 1890 if (radeon_connector->ddc_bus && i2c_bus->valid) {
d3932d6c 1891 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
0294cf4f
AD		 1892 radeon_connector->shared_ddc = true;
1893 shared_ddc = true;
1894 }
fb939dfc 1895 if (radeon_connector->router_bus && router->ddc_valid &&
26b5bc98
AD		 1896 (radeon_connector->router.router_id == router->router_id)) {
1897 radeon_connector->shared_ddc = false;
1898 shared_ddc = false;
1899 }
0294cf4f 1900 }
771fe6b9
JG		 1901 }
1902
eac4dff6
AD		 1903 /* check if it's a dp bridge */
1904 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1905 radeon_encoder = to_radeon_encoder(encoder);
1906 if (radeon_encoder->devices & supported_device) {
1907 switch (radeon_encoder->encoder_id) {
1908 case ENCODER_OBJECT_ID_TRAVIS:
1909 case ENCODER_OBJECT_ID_NUTMEG:
1910 is_dp_bridge = true;
1911 break;
1912 default:
1913 break;
1914 }
1915 }
1916 }
1917
771fe6b9
JG		 1918 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1919 if (!radeon_connector)
1920 return;
1921
1922 connector = &radeon_connector->base;
1923
1924 radeon_connector->connector_id = connector_id;
1925 radeon_connector->devices = supported_device;
0294cf4f 1926 radeon_connector->shared_ddc = shared_ddc;
b75fad06 1927 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1928 radeon_connector->hpd = *hpd;
bc1c4dc3 1929
26b5bc98 1930 radeon_connector->router = *router;
fb939dfc 1931 if (router->ddc_valid || router->cd_valid) {
26b5bc98
AD		 1932 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1933 if (!radeon_connector->router_bus)
a70882aa 1934 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
26b5bc98 1935 }
eac4dff6
AD		 1936
1937 if (is_dp_bridge) {
771fe6b9
JG		 1938 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1939 if (!radeon_dig_connector)
1940 goto failed;
771fe6b9
JG		 1941 radeon_dig_connector->igp_lane_info = igp_lane_info;
1942 radeon_connector->con_priv = radeon_dig_connector;
771fe6b9 1943 if (i2c_bus->valid) {
379dfc25
AD		 1944 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1945 if (radeon_connector->ddc_bus)
496263bf
AD		 1946 has_aux = true;
1947 else
eac4dff6 1948 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1949 }
eac4dff6
AD		 1950 switch (connector_type) {
1951 case DRM_MODE_CONNECTOR_VGA:
1952 case DRM_MODE_CONNECTOR_DVIA:
1953 default:
855f5f1d
AD		 1954 drm_connector_init(dev, &radeon_connector->base,
1955 &radeon_dp_connector_funcs, connector_type);
1956 drm_connector_helper_add(&radeon_connector->base,
1957 &radeon_dp_connector_helper_funcs);
eac4dff6
AD		 1958 connector->interlace_allowed = true;
1959 connector->doublescan_allowed = true;
d629a3ce 1960 radeon_connector->dac_load_detect = true;
e35755fa 1961 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD		 1962 rdev->mode_info.load_detect_property,
1963 1);
da997620
AD		 1964 drm_object_attach_property(&radeon_connector->base.base,
1965 dev->mode_config.scaling_mode_property,
1966 DRM_MODE_SCALE_NONE);
643b1f56
AD		 1967 if (ASIC_IS_DCE5(rdev))
1968 drm_object_attach_property(&radeon_connector->base.base,
1969 rdev->mode_info.output_csc_property,
1970 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 1971 break;
1972 case DRM_MODE_CONNECTOR_DVII:
1973 case DRM_MODE_CONNECTOR_DVID:
1974 case DRM_MODE_CONNECTOR_HDMIA:
1975 case DRM_MODE_CONNECTOR_HDMIB:
1976 case DRM_MODE_CONNECTOR_DisplayPort:
855f5f1d
AD		 1977 drm_connector_init(dev, &radeon_connector->base,
1978 &radeon_dp_connector_funcs, connector_type);
1979 drm_connector_helper_add(&radeon_connector->base,
1980 &radeon_dp_connector_helper_funcs);
e35755fa 1981 drm_object_attach_property(&radeon_connector->base.base,
430f70d5 1982 rdev->mode_info.underscan_property,
56bec7c0 1983 UNDERSCAN_OFF);
e35755fa 1984 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG		 1985 rdev->mode_info.underscan_hborder_property,
1986 0);
e35755fa 1987 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG		 1988 rdev->mode_info.underscan_vborder_property,
1989 0);
91915260 1990
da997620
AD		 1991 drm_object_attach_property(&radeon_connector->base.base,
1992 dev->mode_config.scaling_mode_property,
1993 DRM_MODE_SCALE_NONE);
1994
6214bb74
AD		 1995 drm_object_attach_property(&radeon_connector->base.base,
1996 rdev->mode_info.dither_property,
1997 RADEON_FMT_DITHER_DISABLE);
91915260 1998
108dc8e8
AD		 1999 if (radeon_audio != 0)
2000 drm_object_attach_property(&radeon_connector->base.base,
2001 rdev->mode_info.audio_property,
e31fadd3 2002 RADEON_AUDIO_AUTO);
643b1f56
AD		 2003 if (ASIC_IS_DCE5(rdev))
2004 drm_object_attach_property(&radeon_connector->base.base,
2005 rdev->mode_info.output_csc_property,
2006 RADEON_OUTPUT_CSC_BYPASS);
91915260 2007
eac4dff6
AD		 2008 subpixel_order = SubPixelHorizontalRGB;
2009 connector->interlace_allowed = true;
2010 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
2011 connector->doublescan_allowed = true;
2012 else
2013 connector->doublescan_allowed = false;
d629a3ce
AD		 2014 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
2015 radeon_connector->dac_load_detect = true;
e35755fa 2016 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD		 2017 rdev->mode_info.load_detect_property,
2018 1);
2019 }
eac4dff6
AD		 2020 break;
2021 case DRM_MODE_CONNECTOR_LVDS:
2022 case DRM_MODE_CONNECTOR_eDP:
855f5f1d
AD		 2023 drm_connector_init(dev, &radeon_connector->base,
2024 &radeon_lvds_bridge_connector_funcs, connector_type);
2025 drm_connector_helper_add(&radeon_connector->base,
2026 &radeon_dp_connector_helper_funcs);
e35755fa 2027 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2028 dev->mode_config.scaling_mode_property,
2029 DRM_MODE_SCALE_FULLSCREEN);
2030 subpixel_order = SubPixelHorizontalRGB;
2031 connector->interlace_allowed = false;
2032 connector->doublescan_allowed = false;
2033 break;
5bccf5e3 2034 }
eac4dff6
AD		 2035 } else {
2036 switch (connector_type) {
2037 case DRM_MODE_CONNECTOR_VGA:
2038 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
2039 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
2040 if (i2c_bus->valid) {
2041 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2042 if (!radeon_connector->ddc_bus)
2043 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2044 }
390d0bbe 2045 radeon_connector->dac_load_detect = true;
e35755fa 2046 drm_object_attach_property(&radeon_connector->base.base,
390d0bbe
AD		 2047 rdev->mode_info.load_detect_property,
2048 1);
da997620
AD		 2049 if (ASIC_IS_AVIVO(rdev))
2050 drm_object_attach_property(&radeon_connector->base.base,
2051 dev->mode_config.scaling_mode_property,
2052 DRM_MODE_SCALE_NONE);
643b1f56
AD		 2053 if (ASIC_IS_DCE5(rdev))
2054 drm_object_attach_property(&radeon_connector->base.base,
2055 rdev->mode_info.output_csc_property,
2056 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2057 /* no HPD on analog connectors */
2058 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2059 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2060 connector->interlace_allowed = true;
c49948f4 2061 connector->doublescan_allowed = true;
eac4dff6
AD		 2062 break;
2063 case DRM_MODE_CONNECTOR_DVIA:
2064 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
2065 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
2066 if (i2c_bus->valid) {
2067 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2068 if (!radeon_connector->ddc_bus)
2069 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2070 }
2071 radeon_connector->dac_load_detect = true;
e35755fa 2072 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2073 rdev->mode_info.load_detect_property,
2074 1);
da997620
AD		 2075 if (ASIC_IS_AVIVO(rdev))
2076 drm_object_attach_property(&radeon_connector->base.base,
2077 dev->mode_config.scaling_mode_property,
2078 DRM_MODE_SCALE_NONE);
643b1f56
AD		 2079 if (ASIC_IS_DCE5(rdev))
2080 drm_object_attach_property(&radeon_connector->base.base,
2081 rdev->mode_info.output_csc_property,
2082 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2083 /* no HPD on analog connectors */
2084 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2085 connector->interlace_allowed = true;
2086 connector->doublescan_allowed = true;
2087 break;
2088 case DRM_MODE_CONNECTOR_DVII:
2089 case DRM_MODE_CONNECTOR_DVID:
2090 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2091 if (!radeon_dig_connector)
2092 goto failed;
2093 radeon_dig_connector->igp_lane_info = igp_lane_info;
2094 radeon_connector->con_priv = radeon_dig_connector;
2095 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
2096 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
2097 if (i2c_bus->valid) {
2098 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2099 if (!radeon_connector->ddc_bus)
2100 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2101 }
2102 subpixel_order = SubPixelHorizontalRGB;
e35755fa 2103 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2104 rdev->mode_info.coherent_mode_property,
2105 1);
2106 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 2107 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2108 rdev->mode_info.underscan_property,
2109 UNDERSCAN_OFF);
e35755fa 2110 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2111 rdev->mode_info.underscan_hborder_property,
2112 0);
e35755fa 2113 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2114 rdev->mode_info.underscan_vborder_property,
2115 0);
da997620
AD		 2116 drm_object_attach_property(&radeon_connector->base.base,
2117 rdev->mode_info.dither_property,
2118 RADEON_FMT_DITHER_DISABLE);
2119 drm_object_attach_property(&radeon_connector->base.base,
2120 dev->mode_config.scaling_mode_property,
2121 DRM_MODE_SCALE_NONE);
eac4dff6 2122 }
108dc8e8 2123 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 2124 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 2125 rdev->mode_info.audio_property,
e31fadd3 2126 RADEON_AUDIO_AUTO);
8666c076 2127 }
eac4dff6
AD		 2128 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
2129 radeon_connector->dac_load_detect = true;
e35755fa 2130 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2131 rdev->mode_info.load_detect_property,
2132 1);
2133 }
643b1f56
AD		 2134 if (ASIC_IS_DCE5(rdev))
2135 drm_object_attach_property(&radeon_connector->base.base,
2136 rdev->mode_info.output_csc_property,
2137 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2138 connector->interlace_allowed = true;
2139 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2140 connector->doublescan_allowed = true;
2141 else
2142 connector->doublescan_allowed = false;
2143 break;
2144 case DRM_MODE_CONNECTOR_HDMIA:
2145 case DRM_MODE_CONNECTOR_HDMIB:
2146 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2147 if (!radeon_dig_connector)
2148 goto failed;
2149 radeon_dig_connector->igp_lane_info = igp_lane_info;
2150 radeon_connector->con_priv = radeon_dig_connector;
2151 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
2152 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
2153 if (i2c_bus->valid) {
2154 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2155 if (!radeon_connector->ddc_bus)
2156 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2157 }
e35755fa 2158 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2159 rdev->mode_info.coherent_mode_property,
2160 1);
2161 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 2162 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2163 rdev->mode_info.underscan_property,
2164 UNDERSCAN_OFF);
e35755fa 2165 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2166 rdev->mode_info.underscan_hborder_property,
2167 0);
e35755fa 2168 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2169 rdev->mode_info.underscan_vborder_property,
2170 0);
da997620
AD		 2171 drm_object_attach_property(&radeon_connector->base.base,
2172 rdev->mode_info.dither_property,
2173 RADEON_FMT_DITHER_DISABLE);
2174 drm_object_attach_property(&radeon_connector->base.base,
2175 dev->mode_config.scaling_mode_property,
2176 DRM_MODE_SCALE_NONE);
eac4dff6 2177 }
108dc8e8 2178 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 2179 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 2180 rdev->mode_info.audio_property,
e31fadd3 2181 RADEON_AUDIO_AUTO);
8666c076 2182 }
643b1f56
AD		 2183 if (ASIC_IS_DCE5(rdev))
2184 drm_object_attach_property(&radeon_connector->base.base,
2185 rdev->mode_info.output_csc_property,
2186 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2187 subpixel_order = SubPixelHorizontalRGB;
2188 connector->interlace_allowed = true;
2189 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
2190 connector->doublescan_allowed = true;
2191 else
2192 connector->doublescan_allowed = false;
2193 break;
2194 case DRM_MODE_CONNECTOR_DisplayPort:
2195 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2196 if (!radeon_dig_connector)
2197 goto failed;
2198 radeon_dig_connector->igp_lane_info = igp_lane_info;
2199 radeon_connector->con_priv = radeon_dig_connector;
2200 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
2201 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
2202 if (i2c_bus->valid) {
eac4dff6 2203 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
496263bf
AD		 2204 if (radeon_connector->ddc_bus)
2205 has_aux = true;
2206 else
eac4dff6
AD		 2207 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2208 }
2209 subpixel_order = SubPixelHorizontalRGB;
e35755fa 2210 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2211 rdev->mode_info.coherent_mode_property,
2212 1);
2213 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 2214 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2215 rdev->mode_info.underscan_property,
2216 UNDERSCAN_OFF);
e35755fa 2217 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2218 rdev->mode_info.underscan_hborder_property,
2219 0);
e35755fa 2220 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2221 rdev->mode_info.underscan_vborder_property,
2222 0);
da997620
AD		 2223 drm_object_attach_property(&radeon_connector->base.base,
2224 rdev->mode_info.dither_property,
2225 RADEON_FMT_DITHER_DISABLE);
2226 drm_object_attach_property(&radeon_connector->base.base,
2227 dev->mode_config.scaling_mode_property,
2228 DRM_MODE_SCALE_NONE);
eac4dff6 2229 }
108dc8e8 2230 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 2231 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 2232 rdev->mode_info.audio_property,
e31fadd3 2233 RADEON_AUDIO_AUTO);
8666c076 2234 }
643b1f56
AD		 2235 if (ASIC_IS_DCE5(rdev))
2236 drm_object_attach_property(&radeon_connector->base.base,
2237 rdev->mode_info.output_csc_property,
2238 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2239 connector->interlace_allowed = true;
2240 /* in theory with a DP to VGA converter... */
c49948f4 2241 connector->doublescan_allowed = false;
eac4dff6
AD		 2242 break;
2243 case DRM_MODE_CONNECTOR_eDP:
2244 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2245 if (!radeon_dig_connector)
2246 goto failed;
2247 radeon_dig_connector->igp_lane_info = igp_lane_info;
2248 radeon_connector->con_priv = radeon_dig_connector;
855f5f1d 2249 drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type);
eac4dff6
AD		 2250 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
2251 if (i2c_bus->valid) {
379dfc25
AD		 2252 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2253 if (radeon_connector->ddc_bus)
496263bf
AD		 2254 has_aux = true;
2255 else
eac4dff6
AD		 2256 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2257 }
e35755fa 2258 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2259 dev->mode_config.scaling_mode_property,
2260 DRM_MODE_SCALE_FULLSCREEN);
2261 subpixel_order = SubPixelHorizontalRGB;
2262 connector->interlace_allowed = false;
2263 connector->doublescan_allowed = false;
2264 break;
2265 case DRM_MODE_CONNECTOR_SVIDEO:
2266 case DRM_MODE_CONNECTOR_Composite:
2267 case DRM_MODE_CONNECTOR_9PinDIN:
2268 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2269 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2270 radeon_connector->dac_load_detect = true;
e35755fa 2271 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2272 rdev->mode_info.load_detect_property,
2273 1);
e35755fa 2274 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2275 rdev->mode_info.tv_std_property,
2276 radeon_atombios_get_tv_info(rdev));
2277 /* no HPD on analog connectors */
2278 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2279 connector->interlace_allowed = false;
2280 connector->doublescan_allowed = false;
2281 break;
2282 case DRM_MODE_CONNECTOR_LVDS:
2283 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2284 if (!radeon_dig_connector)
2285 goto failed;
2286 radeon_dig_connector->igp_lane_info = igp_lane_info;
2287 radeon_connector->con_priv = radeon_dig_connector;
2288 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
2289 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
2290 if (i2c_bus->valid) {
2291 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2292 if (!radeon_connector->ddc_bus)
2293 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2294 }
e35755fa 2295 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2296 dev->mode_config.scaling_mode_property,
2297 DRM_MODE_SCALE_FULLSCREEN);
2298 subpixel_order = SubPixelHorizontalRGB;
2299 connector->interlace_allowed = false;
2300 connector->doublescan_allowed = false;
2301 break;
771fe6b9 2302 }
771fe6b9
JG		 2303 }
2304
2581afcc 2305 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 2306 if (i2c_bus->valid)
2307 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2308 } else
2309 connector->polled = DRM_CONNECTOR_POLL_HPD;
2310
771fe6b9 2311 connector->display_info.subpixel_order = subpixel_order;
34ea3d38 2312 drm_connector_register(connector);
496263bf
AD		 2313
2314 if (has_aux)
2315 radeon_dp_aux_init(radeon_connector);
2316
771fe6b9
JG		 2317 return;
2318
2319failed:
771fe6b9
JG		 2320 drm_connector_cleanup(connector);
2321 kfree(connector);
2322}
2323
2324void
2325radeon_add_legacy_connector(struct drm_device *dev,
2326 uint32_t connector_id,
2327 uint32_t supported_device,
2328 int connector_type,
b75fad06 2329 struct radeon_i2c_bus_rec *i2c_bus,
eed45b30
AD		 2330 uint16_t connector_object_id,
2331 struct radeon_hpd *hpd)
771fe6b9 2332{
445282db 2333 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 2334 struct drm_connector *connector;
2335 struct radeon_connector *radeon_connector;
2336 uint32_t subpixel_order = SubPixelNone;
2337
4ce001ab 2338 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 2339 return;
2340
cf4c12f9
AD		 2341 /* if the user selected tv=0 don't try and add the connector */
2342 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
2343 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
2344 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
2345 (radeon_tv == 0))
2346 return;
2347
771fe6b9
JG		 2348 /* see if we already added it */
2349 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2350 radeon_connector = to_radeon_connector(connector);
2351 if (radeon_connector->connector_id == connector_id) {
2352 radeon_connector->devices |= supported_device;
2353 return;
2354 }
2355 }
2356
2357 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
2358 if (!radeon_connector)
2359 return;
2360
2361 connector = &radeon_connector->base;
2362
2363 radeon_connector->connector_id = connector_id;
2364 radeon_connector->devices = supported_device;
b75fad06 2365 radeon_connector->connector_object_id = connector_object_id;
eed45b30 2366 radeon_connector->hpd = *hpd;
bc1c4dc3 2367
771fe6b9
JG		 2368 switch (connector_type) {
2369 case DRM_MODE_CONNECTOR_VGA:
2370 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2371 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2372 if (i2c_bus->valid) {
f376b94f 2373 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2374 if (!radeon_connector->ddc_bus)
a70882aa 2375 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2376 }
35e4b7af 2377 radeon_connector->dac_load_detect = true;
e35755fa 2378 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2379 rdev->mode_info.load_detect_property,
2380 1);
2581afcc
AD		 2381 /* no HPD on analog connectors */
2382 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
eb1f8e4f 2383 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
c49948f4
AD		 2384 connector->interlace_allowed = true;
2385 connector->doublescan_allowed = true;
771fe6b9
JG		 2386 break;
2387 case DRM_MODE_CONNECTOR_DVIA:
2388 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2389 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2390 if (i2c_bus->valid) {
f376b94f 2391 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2392 if (!radeon_connector->ddc_bus)
a70882aa 2393 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2394 }
35e4b7af 2395 radeon_connector->dac_load_detect = true;
e35755fa 2396 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2397 rdev->mode_info.load_detect_property,
2398 1);
2581afcc
AD		 2399 /* no HPD on analog connectors */
2400 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 2401 connector->interlace_allowed = true;
2402 connector->doublescan_allowed = true;
771fe6b9
JG		 2403 break;
2404 case DRM_MODE_CONNECTOR_DVII:
2405 case DRM_MODE_CONNECTOR_DVID:
2406 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
0b4c0f3f 2407 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
771fe6b9 2408 if (i2c_bus->valid) {
f376b94f 2409 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2410 if (!radeon_connector->ddc_bus)
a70882aa 2411 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
68b3adb4
AD		 2412 }
2413 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
35e4b7af 2414 radeon_connector->dac_load_detect = true;
e35755fa 2415 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2416 rdev->mode_info.load_detect_property,
2417 1);
771fe6b9
JG		 2418 }
2419 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 2420 connector->interlace_allowed = true;
2421 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2422 connector->doublescan_allowed = true;
2423 else
2424 connector->doublescan_allowed = false;
771fe6b9
JG		 2425 break;
2426 case DRM_MODE_CONNECTOR_SVIDEO:
2427 case DRM_MODE_CONNECTOR_Composite:
2428 case DRM_MODE_CONNECTOR_9PinDIN:
cf4c12f9
AD		 2429 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2430 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2431 radeon_connector->dac_load_detect = true;
2432 /* RS400,RC410,RS480 chipset seems to report a lot
2433 * of false positive on load detect, we haven't yet
2434 * found a way to make load detect reliable on those
2435 * chipset, thus just disable it for TV.
2436 */
2437 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
2438 radeon_connector->dac_load_detect = false;
e35755fa 2439 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD		 2440 rdev->mode_info.load_detect_property,
2441 radeon_connector->dac_load_detect);
e35755fa 2442 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD		 2443 rdev->mode_info.tv_std_property,
2444 radeon_combios_get_tv_info(rdev));
2445 /* no HPD on analog connectors */
2446 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 2447 connector->interlace_allowed = false;
2448 connector->doublescan_allowed = false;
771fe6b9
JG		 2449 break;
2450 case DRM_MODE_CONNECTOR_LVDS:
2451 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
0b4c0f3f 2452 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
771fe6b9 2453 if (i2c_bus->valid) {
f376b94f 2454 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2455 if (!radeon_connector->ddc_bus)
a70882aa 2456 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2457 }
e35755fa 2458 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2459 dev->mode_config.scaling_mode_property,
2460 DRM_MODE_SCALE_FULLSCREEN);
771fe6b9 2461 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 2462 connector->interlace_allowed = false;
2463 connector->doublescan_allowed = false;
771fe6b9
JG		 2464 break;
2465 }
2466
2581afcc 2467 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 2468 if (i2c_bus->valid)
2469 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2470 } else
2471 connector->polled = DRM_CONNECTOR_POLL_HPD;
771fe6b9 2472 connector->display_info.subpixel_order = subpixel_order;
34ea3d38 2473 drm_connector_register(connector);
771fe6b9 2474}
9843ead0
DA		 2475
2476void radeon_setup_mst_connector(struct drm_device *dev)
2477{
2478 struct radeon_device *rdev = dev->dev_private;
2479 struct drm_connector *connector;
2480 struct radeon_connector *radeon_connector;
2481
2482 if (!ASIC_IS_DCE5(rdev))
2483 return;
2484
2485 if (radeon_mst == 0)
2486 return;
2487
2488 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2489 int ret;
2490
2491 radeon_connector = to_radeon_connector(connector);
2492
2493 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
2494 continue;
2495
2496 ret = radeon_dp_mst_init(radeon_connector);
2497 }
2498}
Linux kernel - Deliverables
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