drm/i915: use helpers
[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_connectors.c
CommitLineData
771fe6b9
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1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
760285e7
DH
26#include <drm/drmP.h>
27#include <drm/drm_edid.h>
28#include <drm/drm_crtc_helper.h>
29#include <drm/drm_fb_helper.h>
30#include <drm/radeon_drm.h>
771fe6b9 31#include "radeon.h"
923f6848 32#include "atom.h"
771fe6b9 33
10ebc0bc
DA
34#include <linux/pm_runtime.h>
35
d4877cf2
AD
36void radeon_connector_hotplug(struct drm_connector *connector)
37{
38 struct drm_device *dev = connector->dev;
39 struct radeon_device *rdev = dev->dev_private;
40 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
41
cbac9543
AD
42 /* bail if the connector does not have hpd pin, e.g.,
43 * VGA, TV, etc.
44 */
45 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE)
46 return;
47
1e85e1d0 48 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
d4877cf2 49
73104b5c 50 /* if the connector is already off, don't turn it back on */
6e9f798d 51 /* FIXME: This access isn't protected by any locks. */
73104b5c
AD
52 if (connector->dpms != DRM_MODE_DPMS_ON)
53 return;
54
d5811e87
AD
55 /* just deal with DP (not eDP) here. */
56 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
266dcba5
JG
57 struct radeon_connector_atom_dig *dig_connector =
58 radeon_connector->con_priv;
7c3ed0fd 59
266dcba5
JG
60 /* if existing sink type was not DP no need to retrain */
61 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT)
62 return;
63
64 /* first get sink type as it may be reset after (un)plug */
65 dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
66 /* don't do anything if sink is not display port, i.e.,
67 * passive dp->(dvi|hdmi) adaptor
68 */
69 if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
70 int saved_dpms = connector->dpms;
71 /* Only turn off the display if it's physically disconnected */
ca2ccde5 72 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
266dcba5 73 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
ca2ccde5
JG
74 } else if (radeon_dp_needs_link_train(radeon_connector)) {
75 /* set it to OFF so that drm_helper_connector_dpms()
76 * won't return immediately since the current state
77 * is ON at this point.
78 */
79 connector->dpms = DRM_MODE_DPMS_OFF;
266dcba5 80 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
ca2ccde5 81 }
266dcba5
JG
82 connector->dpms = saved_dpms;
83 }
d4877cf2 84 }
d4877cf2
AD
85}
86
445282db
DA
87static void radeon_property_change_mode(struct drm_encoder *encoder)
88{
89 struct drm_crtc *crtc = encoder->crtc;
90
91 if (crtc && crtc->enabled) {
92 drm_crtc_helper_set_mode(crtc, &crtc->mode,
f4510a27 93 crtc->x, crtc->y, crtc->primary->fb);
445282db
DA
94 }
95}
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AD
96
97int radeon_get_monitor_bpc(struct drm_connector *connector)
98{
99 struct drm_device *dev = connector->dev;
100 struct radeon_device *rdev = dev->dev_private;
101 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
102 struct radeon_connector_atom_dig *dig_connector;
103 int bpc = 8;
ea292861 104 int mode_clock, max_tmds_clock;
eccea792
AD
105
106 switch (connector->connector_type) {
107 case DRM_MODE_CONNECTOR_DVII:
108 case DRM_MODE_CONNECTOR_HDMIB:
109 if (radeon_connector->use_digital) {
110 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
111 if (connector->display_info.bpc)
112 bpc = connector->display_info.bpc;
113 }
114 }
115 break;
116 case DRM_MODE_CONNECTOR_DVID:
117 case DRM_MODE_CONNECTOR_HDMIA:
118 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
119 if (connector->display_info.bpc)
120 bpc = connector->display_info.bpc;
121 }
122 break;
123 case DRM_MODE_CONNECTOR_DisplayPort:
124 dig_connector = radeon_connector->con_priv;
125 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
126 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) ||
127 drm_detect_hdmi_monitor(radeon_connector->edid)) {
128 if (connector->display_info.bpc)
129 bpc = connector->display_info.bpc;
130 }
131 break;
132 case DRM_MODE_CONNECTOR_eDP:
133 case DRM_MODE_CONNECTOR_LVDS:
134 if (connector->display_info.bpc)
135 bpc = connector->display_info.bpc;
136 else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) {
137 struct drm_connector_helper_funcs *connector_funcs =
138 connector->helper_private;
139 struct drm_encoder *encoder = connector_funcs->best_encoder(connector);
140 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
141 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
142
143 if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR)
144 bpc = 6;
145 else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR)
146 bpc = 8;
147 }
148 break;
149 }
89b92339
MK
150
151 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
152 /* hdmi deep color only implemented on DCE4+ */
153 if ((bpc > 8) && !ASIC_IS_DCE4(rdev)) {
154 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n",
72082093 155 connector->name, bpc);
89b92339
MK
156 bpc = 8;
157 }
158
159 /*
160 * Pre DCE-8 hw can't handle > 12 bpc, and more than 12 bpc doesn't make
161 * much sense without support for > 12 bpc framebuffers. RGB 4:4:4 at
162 * 12 bpc is always supported on hdmi deep color sinks, as this is
163 * required by the HDMI-1.3 spec. Clamp to a safe 12 bpc maximum.
164 */
165 if (bpc > 12) {
166 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",
72082093 167 connector->name, bpc);
89b92339
MK
168 bpc = 12;
169 }
ea292861
MK
170
171 /* Any defined maximum tmds clock limit we must not exceed? */
172 if (connector->max_tmds_clock > 0) {
173 /* mode_clock is clock in kHz for mode to be modeset on this connector */
174 mode_clock = radeon_connector->pixelclock_for_modeset;
175
176 /* Maximum allowable input clock in kHz */
177 max_tmds_clock = connector->max_tmds_clock * 1000;
178
179 DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",
180 connector->name, mode_clock, max_tmds_clock);
181
182 /* Check if bpc is within clock limit. Try to degrade gracefully otherwise */
183 if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) {
184 if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) &&
185 (mode_clock * 5/4 <= max_tmds_clock))
186 bpc = 10;
187 else
188 bpc = 8;
189
190 DRM_DEBUG("%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n",
191 connector->name, bpc);
192 }
193
194 if ((bpc == 10) && (mode_clock * 5/4 > max_tmds_clock)) {
195 bpc = 8;
196 DRM_DEBUG("%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n",
197 connector->name, bpc);
198 }
199 }
89b92339
MK
200 }
201
a624f429
AD
202 if ((radeon_deep_color == 0) && (bpc > 8))
203 bpc = 8;
204
89b92339 205 DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",
72082093 206 connector->name, connector->display_info.bpc, bpc);
89b92339 207
eccea792
AD
208 return bpc;
209}
210
771fe6b9
JG
211static void
212radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
213{
214 struct drm_device *dev = connector->dev;
215 struct radeon_device *rdev = dev->dev_private;
216 struct drm_encoder *best_encoder = NULL;
217 struct drm_encoder *encoder = NULL;
218 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
219 struct drm_mode_object *obj;
220 bool connected;
221 int i;
222
223 best_encoder = connector_funcs->best_encoder(connector);
224
225 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
226 if (connector->encoder_ids[i] == 0)
227 break;
228
229 obj = drm_mode_object_find(connector->dev,
230 connector->encoder_ids[i],
231 DRM_MODE_OBJECT_ENCODER);
232 if (!obj)
233 continue;
234
235 encoder = obj_to_encoder(obj);
236
237 if ((encoder == best_encoder) && (status == connector_status_connected))
238 connected = true;
239 else
240 connected = false;
241
242 if (rdev->is_atom_bios)
243 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
244 else
245 radeon_combios_connected_scratch_regs(connector, encoder, connected);
246
247 }
248}
249
1109ca09 250static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
445282db
DA
251{
252 struct drm_mode_object *obj;
253 struct drm_encoder *encoder;
254 int i;
255
256 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
257 if (connector->encoder_ids[i] == 0)
258 break;
259
260 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
261 if (!obj)
262 continue;
263
264 encoder = obj_to_encoder(obj);
265 if (encoder->encoder_type == encoder_type)
266 return encoder;
267 }
268 return NULL;
269}
270
1109ca09 271static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
771fe6b9
JG
272{
273 int enc_id = connector->encoder_ids[0];
274 struct drm_mode_object *obj;
275 struct drm_encoder *encoder;
276
277 /* pick the encoder ids */
278 if (enc_id) {
279 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
280 if (!obj)
281 return NULL;
282 encoder = obj_to_encoder(obj);
283 return encoder;
284 }
285 return NULL;
286}
287
4ce001ab
DA
288/*
289 * radeon_connector_analog_encoder_conflict_solve
290 * - search for other connectors sharing this encoder
291 * if priority is true, then set them disconnected if this is connected
292 * if priority is false, set us disconnected if they are connected
293 */
294static enum drm_connector_status
295radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
296 struct drm_encoder *encoder,
297 enum drm_connector_status current_status,
298 bool priority)
299{
300 struct drm_device *dev = connector->dev;
301 struct drm_connector *conflict;
08d07511 302 struct radeon_connector *radeon_conflict;
4ce001ab
DA
303 int i;
304
305 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
306 if (conflict == connector)
307 continue;
308
08d07511 309 radeon_conflict = to_radeon_connector(conflict);
4ce001ab
DA
310 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
311 if (conflict->encoder_ids[i] == 0)
312 break;
313
314 /* if the IDs match */
315 if (conflict->encoder_ids[i] == encoder->base.id) {
316 if (conflict->status != connector_status_connected)
317 continue;
08d07511
AD
318
319 if (radeon_conflict->use_digital)
320 continue;
4ce001ab
DA
321
322 if (priority == true) {
72082093
JN
323 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n",
324 conflict->name);
325 DRM_DEBUG_KMS("in favor of %s\n",
326 connector->name);
4ce001ab
DA
327 conflict->status = connector_status_disconnected;
328 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
329 } else {
72082093
JN
330 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n",
331 connector->name);
332 DRM_DEBUG_KMS("in favor of %s\n",
333 conflict->name);
4ce001ab
DA
334 current_status = connector_status_disconnected;
335 }
336 break;
337 }
338 }
339 }
340 return current_status;
341
342}
343
771fe6b9
JG
344static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
345{
346 struct drm_device *dev = encoder->dev;
347 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
348 struct drm_display_mode *mode = NULL;
de2103e4 349 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
771fe6b9 350
de2103e4
AD
351 if (native_mode->hdisplay != 0 &&
352 native_mode->vdisplay != 0 &&
353 native_mode->clock != 0) {
fb06ca8f 354 mode = drm_mode_duplicate(dev, native_mode);
771fe6b9
JG
355 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
356 drm_mode_set_name(mode);
357
d9fdaafb 358 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
d2efdf6d
AD
359 } else if (native_mode->hdisplay != 0 &&
360 native_mode->vdisplay != 0) {
361 /* mac laptops without an edid */
362 /* Note that this is not necessarily the exact panel mode,
363 * but an approximation based on the cvt formula. For these
364 * systems we should ideally read the mode info out of the
365 * registers or add a mode table, but this works and is much
366 * simpler.
367 */
368 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
369 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
d9fdaafb 370 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
771fe6b9
JG
371 }
372 return mode;
373}
374
923f6848
AD
375static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
376{
377 struct drm_device *dev = encoder->dev;
378 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
379 struct drm_display_mode *mode = NULL;
de2103e4 380 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
923f6848
AD
381 int i;
382 struct mode_size {
383 int w;
384 int h;
385 } common_modes[17] = {
386 { 640, 480},
387 { 720, 480},
388 { 800, 600},
389 { 848, 480},
390 {1024, 768},
391 {1152, 768},
392 {1280, 720},
393 {1280, 800},
394 {1280, 854},
395 {1280, 960},
396 {1280, 1024},
397 {1440, 900},
398 {1400, 1050},
399 {1680, 1050},
400 {1600, 1200},
401 {1920, 1080},
402 {1920, 1200}
403 };
404
405 for (i = 0; i < 17; i++) {
dfdd6467
AD
406 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
407 if (common_modes[i].w > 1024 ||
408 common_modes[i].h > 768)
409 continue;
410 }
923f6848 411 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
de2103e4
AD
412 if (common_modes[i].w > native_mode->hdisplay ||
413 common_modes[i].h > native_mode->vdisplay ||
414 (common_modes[i].w == native_mode->hdisplay &&
415 common_modes[i].h == native_mode->vdisplay))
923f6848
AD
416 continue;
417 }
418 if (common_modes[i].w < 320 || common_modes[i].h < 200)
419 continue;
420
d50ba256 421 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
923f6848
AD
422 drm_mode_probed_add(connector, mode);
423 }
424}
425
1109ca09 426static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
771fe6b9
JG
427 uint64_t val)
428{
445282db
DA
429 struct drm_device *dev = connector->dev;
430 struct radeon_device *rdev = dev->dev_private;
431 struct drm_encoder *encoder;
432 struct radeon_encoder *radeon_encoder;
433
434 if (property == rdev->mode_info.coherent_mode_property) {
435 struct radeon_encoder_atom_dig *dig;
ce227c41 436 bool new_coherent_mode;
445282db
DA
437
438 /* need to find digital encoder on connector */
439 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
440 if (!encoder)
441 return 0;
442
443 radeon_encoder = to_radeon_encoder(encoder);
444
445 if (!radeon_encoder->enc_priv)
446 return 0;
447
448 dig = radeon_encoder->enc_priv;
ce227c41
DA
449 new_coherent_mode = val ? true : false;
450 if (dig->coherent_mode != new_coherent_mode) {
451 dig->coherent_mode = new_coherent_mode;
452 radeon_property_change_mode(&radeon_encoder->base);
453 }
445282db
DA
454 }
455
8666c076
AD
456 if (property == rdev->mode_info.audio_property) {
457 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
458 /* need to find digital encoder on connector */
459 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
460 if (!encoder)
461 return 0;
462
463 radeon_encoder = to_radeon_encoder(encoder);
464
465 if (radeon_connector->audio != val) {
466 radeon_connector->audio = val;
467 radeon_property_change_mode(&radeon_encoder->base);
468 }
469 }
470
6214bb74
AD
471 if (property == rdev->mode_info.dither_property) {
472 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
473 /* need to find digital encoder on connector */
474 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
475 if (!encoder)
476 return 0;
477
478 radeon_encoder = to_radeon_encoder(encoder);
479
480 if (radeon_connector->dither != val) {
481 radeon_connector->dither = val;
482 radeon_property_change_mode(&radeon_encoder->base);
483 }
484 }
485
5b1714d3
AD
486 if (property == rdev->mode_info.underscan_property) {
487 /* need to find digital encoder on connector */
488 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
489 if (!encoder)
490 return 0;
491
492 radeon_encoder = to_radeon_encoder(encoder);
493
494 if (radeon_encoder->underscan_type != val) {
495 radeon_encoder->underscan_type = val;
496 radeon_property_change_mode(&radeon_encoder->base);
497 }
498 }
499
5bccf5e3
MG
500 if (property == rdev->mode_info.underscan_hborder_property) {
501 /* need to find digital encoder on connector */
502 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
503 if (!encoder)
504 return 0;
505
506 radeon_encoder = to_radeon_encoder(encoder);
507
508 if (radeon_encoder->underscan_hborder != val) {
509 radeon_encoder->underscan_hborder = val;
510 radeon_property_change_mode(&radeon_encoder->base);
511 }
512 }
513
514 if (property == rdev->mode_info.underscan_vborder_property) {
515 /* need to find digital encoder on connector */
516 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
517 if (!encoder)
518 return 0;
519
520 radeon_encoder = to_radeon_encoder(encoder);
521
522 if (radeon_encoder->underscan_vborder != val) {
523 radeon_encoder->underscan_vborder = val;
524 radeon_property_change_mode(&radeon_encoder->base);
525 }
526 }
527
445282db
DA
528 if (property == rdev->mode_info.tv_std_property) {
529 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
530 if (!encoder) {
531 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
532 }
533
534 if (!encoder)
535 return 0;
536
537 radeon_encoder = to_radeon_encoder(encoder);
538 if (!radeon_encoder->enc_priv)
539 return 0;
643acacf 540 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
445282db
DA
541 struct radeon_encoder_atom_dac *dac_int;
542 dac_int = radeon_encoder->enc_priv;
543 dac_int->tv_std = val;
544 } else {
545 struct radeon_encoder_tv_dac *dac_int;
546 dac_int = radeon_encoder->enc_priv;
547 dac_int->tv_std = val;
548 }
549 radeon_property_change_mode(&radeon_encoder->base);
550 }
551
552 if (property == rdev->mode_info.load_detect_property) {
553 struct radeon_connector *radeon_connector =
554 to_radeon_connector(connector);
555
556 if (val == 0)
557 radeon_connector->dac_load_detect = false;
558 else
559 radeon_connector->dac_load_detect = true;
560 }
561
562 if (property == rdev->mode_info.tmds_pll_property) {
563 struct radeon_encoder_int_tmds *tmds = NULL;
564 bool ret = false;
565 /* need to find digital encoder on connector */
566 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
567 if (!encoder)
568 return 0;
569
570 radeon_encoder = to_radeon_encoder(encoder);
571
572 tmds = radeon_encoder->enc_priv;
573 if (!tmds)
574 return 0;
575
576 if (val == 0) {
577 if (rdev->is_atom_bios)
578 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
579 else
580 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
581 }
582 if (val == 1 || ret == false) {
583 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
584 }
585 radeon_property_change_mode(&radeon_encoder->base);
586 }
587
771fe6b9
JG
588 return 0;
589}
590
8dfaa8a7
MD
591static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
592 struct drm_connector *connector)
593{
594 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 595 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
13bb9430
MG
596 struct drm_display_mode *t, *mode;
597
598 /* If the EDID preferred mode doesn't match the native mode, use it */
599 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
600 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
601 if (mode->hdisplay != native_mode->hdisplay ||
602 mode->vdisplay != native_mode->vdisplay)
603 memcpy(native_mode, mode, sizeof(*mode));
604 }
605 }
8dfaa8a7
MD
606
607 /* Try to get native mode details from EDID if necessary */
de2103e4 608 if (!native_mode->clock) {
8dfaa8a7 609 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
de2103e4
AD
610 if (mode->hdisplay == native_mode->hdisplay &&
611 mode->vdisplay == native_mode->vdisplay) {
612 *native_mode = *mode;
613 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
c5d46b4e 614 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
8dfaa8a7
MD
615 break;
616 }
617 }
618 }
13bb9430 619
de2103e4 620 if (!native_mode->clock) {
c5d46b4e 621 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
8dfaa8a7
MD
622 radeon_encoder->rmx_type = RMX_OFF;
623 }
624}
771fe6b9
JG
625
626static int radeon_lvds_get_modes(struct drm_connector *connector)
627{
628 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
629 struct drm_encoder *encoder;
630 int ret = 0;
631 struct drm_display_mode *mode;
632
633 if (radeon_connector->ddc_bus) {
634 ret = radeon_ddc_get_modes(radeon_connector);
635 if (ret > 0) {
7747b713 636 encoder = radeon_best_single_encoder(connector);
8dfaa8a7
MD
637 if (encoder) {
638 radeon_fixup_lvds_native_mode(encoder, connector);
7747b713
AD
639 /* add scaled modes */
640 radeon_add_common_modes(encoder, connector);
8dfaa8a7 641 }
771fe6b9
JG
642 return ret;
643 }
644 }
645
646 encoder = radeon_best_single_encoder(connector);
647 if (!encoder)
648 return 0;
649
650 /* we have no EDID modes */
651 mode = radeon_fp_native_mode(encoder);
652 if (mode) {
653 ret = 1;
654 drm_mode_probed_add(connector, mode);
7a868e18
AD
655 /* add the width/height from vbios tables if available */
656 connector->display_info.width_mm = mode->width_mm;
657 connector->display_info.height_mm = mode->height_mm;
7747b713
AD
658 /* add scaled modes */
659 radeon_add_common_modes(encoder, connector);
771fe6b9 660 }
923f6848 661
771fe6b9
JG
662 return ret;
663}
664
665static int radeon_lvds_mode_valid(struct drm_connector *connector,
666 struct drm_display_mode *mode)
667{
a3fa6320
AD
668 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
669
670 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
671 return MODE_PANEL;
672
673 if (encoder) {
674 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
675 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
676
677 /* AVIVO hardware supports downscaling modes larger than the panel
678 * to the panel size, but I'm not sure this is desirable.
679 */
680 if ((mode->hdisplay > native_mode->hdisplay) ||
681 (mode->vdisplay > native_mode->vdisplay))
682 return MODE_PANEL;
683
684 /* if scaling is disabled, block non-native modes */
685 if (radeon_encoder->rmx_type == RMX_OFF) {
686 if ((mode->hdisplay != native_mode->hdisplay) ||
687 (mode->vdisplay != native_mode->vdisplay))
688 return MODE_PANEL;
689 }
690 }
691
771fe6b9
JG
692 return MODE_OK;
693}
694
7b334fcb 695static enum drm_connector_status
930a9e28 696radeon_lvds_detect(struct drm_connector *connector, bool force)
771fe6b9 697{
0549a061 698 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2ffb8429 699 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0549a061 700 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA
701 int r;
702
703 r = pm_runtime_get_sync(connector->dev->dev);
704 if (r < 0)
705 return connector_status_disconnected;
2ffb8429
AD
706
707 if (encoder) {
708 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 709 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2ffb8429
AD
710
711 /* check if panel is valid */
de2103e4 712 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
2ffb8429
AD
713 ret = connector_status_connected;
714
715 }
0549a061
AD
716
717 /* check for edid as well */
0294cf4f
AD
718 if (radeon_connector->edid)
719 ret = connector_status_connected;
720 else {
721 if (radeon_connector->ddc_bus) {
0294cf4f
AD
722 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
723 &radeon_connector->ddc_bus->adapter);
0294cf4f
AD
724 if (radeon_connector->edid)
725 ret = connector_status_connected;
726 }
0549a061 727 }
771fe6b9 728 /* check acpi lid status ??? */
2ffb8429 729
771fe6b9 730 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
731 pm_runtime_mark_last_busy(connector->dev->dev);
732 pm_runtime_put_autosuspend(connector->dev->dev);
771fe6b9
JG
733 return ret;
734}
735
736static void radeon_connector_destroy(struct drm_connector *connector)
737{
738 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
739
0294cf4f
AD
740 if (radeon_connector->edid)
741 kfree(radeon_connector->edid);
771fe6b9 742 kfree(radeon_connector->con_priv);
34ea3d38 743 drm_connector_unregister(connector);
771fe6b9
JG
744 drm_connector_cleanup(connector);
745 kfree(connector);
746}
747
445282db
DA
748static int radeon_lvds_set_property(struct drm_connector *connector,
749 struct drm_property *property,
750 uint64_t value)
751{
752 struct drm_device *dev = connector->dev;
753 struct radeon_encoder *radeon_encoder;
754 enum radeon_rmx_type rmx_type;
755
d9fdaafb 756 DRM_DEBUG_KMS("\n");
445282db
DA
757 if (property != dev->mode_config.scaling_mode_property)
758 return 0;
759
760 if (connector->encoder)
761 radeon_encoder = to_radeon_encoder(connector->encoder);
762 else {
763 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
764 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
765 }
766
767 switch (value) {
768 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
769 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
770 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
771 default:
772 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
773 }
774 if (radeon_encoder->rmx_type == rmx_type)
775 return 0;
776
777 radeon_encoder->rmx_type = rmx_type;
778
779 radeon_property_change_mode(&radeon_encoder->base);
780 return 0;
781}
782
783
1109ca09 784static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
771fe6b9
JG
785 .get_modes = radeon_lvds_get_modes,
786 .mode_valid = radeon_lvds_mode_valid,
787 .best_encoder = radeon_best_single_encoder,
788};
789
1109ca09 790static const struct drm_connector_funcs radeon_lvds_connector_funcs = {
771fe6b9
JG
791 .dpms = drm_helper_connector_dpms,
792 .detect = radeon_lvds_detect,
793 .fill_modes = drm_helper_probe_single_connector_modes,
794 .destroy = radeon_connector_destroy,
445282db 795 .set_property = radeon_lvds_set_property,
771fe6b9
JG
796};
797
798static int radeon_vga_get_modes(struct drm_connector *connector)
799{
800 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
801 int ret;
802
803 ret = radeon_ddc_get_modes(radeon_connector);
804
805 return ret;
806}
807
808static int radeon_vga_mode_valid(struct drm_connector *connector,
809 struct drm_display_mode *mode)
810{
b20f9bef
AD
811 struct drm_device *dev = connector->dev;
812 struct radeon_device *rdev = dev->dev_private;
813
a3fa6320 814 /* XXX check mode bandwidth */
b20f9bef
AD
815
816 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
817 return MODE_CLOCK_HIGH;
818
771fe6b9
JG
819 return MODE_OK;
820}
821
7b334fcb 822static enum drm_connector_status
930a9e28 823radeon_vga_detect(struct drm_connector *connector, bool force)
771fe6b9 824{
fafcf94e
AD
825 struct drm_device *dev = connector->dev;
826 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
827 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
828 struct drm_encoder *encoder;
829 struct drm_encoder_helper_funcs *encoder_funcs;
4b9d2a21 830 bool dret = false;
771fe6b9 831 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA
832 int r;
833
834 r = pm_runtime_get_sync(connector->dev->dev);
835 if (r < 0)
836 return connector_status_disconnected;
771fe6b9 837
4ce001ab
DA
838 encoder = radeon_best_single_encoder(connector);
839 if (!encoder)
840 ret = connector_status_disconnected;
841
eb6b6d7c 842 if (radeon_connector->ddc_bus)
0a9069d3 843 dret = radeon_ddc_probe(radeon_connector, false);
0294cf4f 844 if (dret) {
d0d0a225 845 radeon_connector->detected_by_load = false;
0294cf4f
AD
846 if (radeon_connector->edid) {
847 kfree(radeon_connector->edid);
848 radeon_connector->edid = NULL;
849 }
0294cf4f 850 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
0294cf4f
AD
851
852 if (!radeon_connector->edid) {
f82f5f3a 853 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 854 connector->name);
f82f5f3a 855 ret = connector_status_connected;
0294cf4f
AD
856 } else {
857 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
858
859 /* some oems have boards with separate digital and analog connectors
860 * with a shared ddc line (often vga + hdmi)
861 */
862 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
863 kfree(radeon_connector->edid);
864 radeon_connector->edid = NULL;
865 ret = connector_status_disconnected;
866 } else
867 ret = connector_status_connected;
868 }
869 } else {
c3cceedd
DA
870
871 /* if we aren't forcing don't do destructive polling */
d0d0a225
AD
872 if (!force) {
873 /* only return the previous status if we last
874 * detected a monitor via load.
875 */
876 if (radeon_connector->detected_by_load)
10ebc0bc
DA
877 ret = connector->status;
878 goto out;
d0d0a225 879 }
c3cceedd 880
d8a7f792 881 if (radeon_connector->dac_load_detect && encoder) {
445282db
DA
882 encoder_funcs = encoder->helper_private;
883 ret = encoder_funcs->detect(encoder, connector);
34076446 884 if (ret != connector_status_disconnected)
d0d0a225 885 radeon_connector->detected_by_load = true;
445282db 886 }
771fe6b9
JG
887 }
888
4ce001ab
DA
889 if (ret == connector_status_connected)
890 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
fafcf94e
AD
891
892 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
893 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
894 * by other means, assume the CRT is connected and use that EDID.
895 */
896 if ((!rdev->is_atom_bios) &&
897 (ret == connector_status_disconnected) &&
898 rdev->mode_info.bios_hardcoded_edid_size) {
899 ret = connector_status_connected;
900 }
901
771fe6b9 902 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
903
904out:
905 pm_runtime_mark_last_busy(connector->dev->dev);
906 pm_runtime_put_autosuspend(connector->dev->dev);
907
771fe6b9
JG
908 return ret;
909}
910
1109ca09 911static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
771fe6b9
JG
912 .get_modes = radeon_vga_get_modes,
913 .mode_valid = radeon_vga_mode_valid,
914 .best_encoder = radeon_best_single_encoder,
915};
916
1109ca09 917static const struct drm_connector_funcs radeon_vga_connector_funcs = {
771fe6b9
JG
918 .dpms = drm_helper_connector_dpms,
919 .detect = radeon_vga_detect,
920 .fill_modes = drm_helper_probe_single_connector_modes,
921 .destroy = radeon_connector_destroy,
922 .set_property = radeon_connector_set_property,
923};
924
4ce001ab
DA
925static int radeon_tv_get_modes(struct drm_connector *connector)
926{
927 struct drm_device *dev = connector->dev;
923f6848 928 struct radeon_device *rdev = dev->dev_private;
4ce001ab 929 struct drm_display_mode *tv_mode;
923f6848 930 struct drm_encoder *encoder;
4ce001ab 931
923f6848
AD
932 encoder = radeon_best_single_encoder(connector);
933 if (!encoder)
934 return 0;
4ce001ab 935
923f6848
AD
936 /* avivo chips can scale any mode */
937 if (rdev->family >= CHIP_RS600)
938 /* add scaled modes */
939 radeon_add_common_modes(encoder, connector);
940 else {
941 /* only 800x600 is supported right now on pre-avivo chips */
d50ba256 942 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
923f6848
AD
943 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
944 drm_mode_probed_add(connector, tv_mode);
945 }
4ce001ab
DA
946 return 1;
947}
948
949static int radeon_tv_mode_valid(struct drm_connector *connector,
950 struct drm_display_mode *mode)
951{
a3fa6320
AD
952 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
953 return MODE_CLOCK_RANGE;
4ce001ab
DA
954 return MODE_OK;
955}
956
7b334fcb 957static enum drm_connector_status
930a9e28 958radeon_tv_detect(struct drm_connector *connector, bool force)
4ce001ab
DA
959{
960 struct drm_encoder *encoder;
961 struct drm_encoder_helper_funcs *encoder_funcs;
445282db
DA
962 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
963 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc 964 int r;
445282db
DA
965
966 if (!radeon_connector->dac_load_detect)
967 return ret;
4ce001ab 968
10ebc0bc
DA
969 r = pm_runtime_get_sync(connector->dev->dev);
970 if (r < 0)
971 return connector_status_disconnected;
972
4ce001ab
DA
973 encoder = radeon_best_single_encoder(connector);
974 if (!encoder)
975 ret = connector_status_disconnected;
976 else {
977 encoder_funcs = encoder->helper_private;
978 ret = encoder_funcs->detect(encoder, connector);
979 }
980 if (ret == connector_status_connected)
981 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
982 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
983 pm_runtime_mark_last_busy(connector->dev->dev);
984 pm_runtime_put_autosuspend(connector->dev->dev);
4ce001ab
DA
985 return ret;
986}
987
1109ca09 988static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
4ce001ab
DA
989 .get_modes = radeon_tv_get_modes,
990 .mode_valid = radeon_tv_mode_valid,
991 .best_encoder = radeon_best_single_encoder,
992};
993
1109ca09 994static const struct drm_connector_funcs radeon_tv_connector_funcs = {
4ce001ab
DA
995 .dpms = drm_helper_connector_dpms,
996 .detect = radeon_tv_detect,
997 .fill_modes = drm_helper_probe_single_connector_modes,
998 .destroy = radeon_connector_destroy,
999 .set_property = radeon_connector_set_property,
1000};
1001
771fe6b9
JG
1002static int radeon_dvi_get_modes(struct drm_connector *connector)
1003{
1004 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1005 int ret;
1006
1007 ret = radeon_ddc_get_modes(radeon_connector);
771fe6b9
JG
1008 return ret;
1009}
1010
11fe1266
TU
1011static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector)
1012{
1013 struct drm_device *dev = connector->dev;
1014 struct radeon_device *rdev = dev->dev_private;
1015 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1016 enum drm_connector_status status;
1017
1018 /* We only trust HPD on R600 and newer ASICS. */
1019 if (rdev->family >= CHIP_R600
1020 && radeon_connector->hpd.hpd != RADEON_HPD_NONE) {
1021 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
1022 status = connector_status_connected;
1023 else
1024 status = connector_status_disconnected;
1025 if (connector->status == status)
1026 return true;
1027 }
1028
1029 return false;
1030}
1031
4ce001ab
DA
1032/*
1033 * DVI is complicated
1034 * Do a DDC probe, if DDC probe passes, get the full EDID so
1035 * we can do analog/digital monitor detection at this point.
1036 * If the monitor is an analog monitor or we got no DDC,
1037 * we need to find the DAC encoder object for this connector.
1038 * If we got no DDC, we do load detection on the DAC encoder object.
1039 * If we got analog DDC or load detection passes on the DAC encoder
1040 * we have to check if this analog encoder is shared with anyone else (TV)
1041 * if its shared we have to set the other connector to disconnected.
1042 */
7b334fcb 1043static enum drm_connector_status
930a9e28 1044radeon_dvi_detect(struct drm_connector *connector, bool force)
771fe6b9 1045{
fafcf94e
AD
1046 struct drm_device *dev = connector->dev;
1047 struct radeon_device *rdev = dev->dev_private;
771fe6b9 1048 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
4ce001ab 1049 struct drm_encoder *encoder = NULL;
771fe6b9
JG
1050 struct drm_encoder_helper_funcs *encoder_funcs;
1051 struct drm_mode_object *obj;
10ebc0bc 1052 int i, r;
771fe6b9 1053 enum drm_connector_status ret = connector_status_disconnected;
fc87f13b 1054 bool dret = false, broken_edid = false;
771fe6b9 1055
10ebc0bc
DA
1056 r = pm_runtime_get_sync(connector->dev->dev);
1057 if (r < 0)
1058 return connector_status_disconnected;
1059
1060 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1061 ret = connector->status;
1062 goto exit;
1063 }
11fe1266 1064
eb6b6d7c 1065 if (radeon_connector->ddc_bus)
0a9069d3 1066 dret = radeon_ddc_probe(radeon_connector, false);
4ce001ab 1067 if (dret) {
d0d0a225 1068 radeon_connector->detected_by_load = false;
0294cf4f
AD
1069 if (radeon_connector->edid) {
1070 kfree(radeon_connector->edid);
1071 radeon_connector->edid = NULL;
1072 }
4ce001ab 1073 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
4ce001ab
DA
1074
1075 if (!radeon_connector->edid) {
f82f5f3a 1076 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 1077 connector->name);
4a9a8b71
DA
1078 /* rs690 seems to have a problem with connectors not existing and always
1079 * return a block of 0's. If we see this just stop polling on this output */
1080 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) {
1081 ret = connector_status_disconnected;
72082093
JN
1082 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n",
1083 connector->name);
4a9a8b71 1084 radeon_connector->ddc_bus = NULL;
fc87f13b
EE
1085 } else {
1086 ret = connector_status_connected;
1087 broken_edid = true; /* defer use_digital to later */
4a9a8b71 1088 }
4ce001ab
DA
1089 } else {
1090 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
1091
0294cf4f
AD
1092 /* some oems have boards with separate digital and analog connectors
1093 * with a shared ddc line (often vga + hdmi)
1094 */
1095 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
1096 kfree(radeon_connector->edid);
1097 radeon_connector->edid = NULL;
1098 ret = connector_status_disconnected;
1099 } else
1100 ret = connector_status_connected;
71407c46 1101
42f14c4b
AD
1102 /* This gets complicated. We have boards with VGA + HDMI with a
1103 * shared DDC line and we have boards with DVI-D + HDMI with a shared
1104 * DDC line. The latter is more complex because with DVI<->HDMI adapters
1105 * you don't really know what's connected to which port as both are digital.
71407c46 1106 */
d3932d6c 1107 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
71407c46
AD
1108 struct drm_connector *list_connector;
1109 struct radeon_connector *list_radeon_connector;
1110 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
1111 if (connector == list_connector)
1112 continue;
1113 list_radeon_connector = to_radeon_connector(list_connector);
b2ea4aa6
AD
1114 if (list_radeon_connector->shared_ddc &&
1115 (list_radeon_connector->ddc_bus->rec.i2c_id ==
1116 radeon_connector->ddc_bus->rec.i2c_id)) {
42f14c4b
AD
1117 /* cases where both connectors are digital */
1118 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
1119 /* hpd is our only option in this case */
1120 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
71407c46
AD
1121 kfree(radeon_connector->edid);
1122 radeon_connector->edid = NULL;
1123 ret = connector_status_disconnected;
1124 }
1125 }
1126 }
1127 }
1128 }
4ce001ab
DA
1129 }
1130 }
1131
1132 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
1133 goto out;
1134
5f0a2612
AD
1135 /* DVI-D and HDMI-A are digital only */
1136 if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) ||
1137 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
1138 goto out;
1139
d0d0a225 1140 /* if we aren't forcing don't do destructive polling */
c3cceedd 1141 if (!force) {
d0d0a225
AD
1142 /* only return the previous status if we last
1143 * detected a monitor via load.
1144 */
1145 if (radeon_connector->detected_by_load)
1146 ret = connector->status;
c3cceedd
DA
1147 goto out;
1148 }
1149
4ce001ab 1150 /* find analog encoder */
445282db
DA
1151 if (radeon_connector->dac_load_detect) {
1152 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1153 if (connector->encoder_ids[i] == 0)
1154 break;
771fe6b9 1155
445282db
DA
1156 obj = drm_mode_object_find(connector->dev,
1157 connector->encoder_ids[i],
1158 DRM_MODE_OBJECT_ENCODER);
1159 if (!obj)
1160 continue;
771fe6b9 1161
445282db 1162 encoder = obj_to_encoder(obj);
771fe6b9 1163
e3632507 1164 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC &&
e00e8b5e
AD
1165 encoder->encoder_type != DRM_MODE_ENCODER_TVDAC)
1166 continue;
1167
445282db
DA
1168 encoder_funcs = encoder->helper_private;
1169 if (encoder_funcs->detect) {
fc87f13b
EE
1170 if (!broken_edid) {
1171 if (ret != connector_status_connected) {
1172 /* deal with analog monitors without DDC */
1173 ret = encoder_funcs->detect(encoder, connector);
1174 if (ret == connector_status_connected) {
1175 radeon_connector->use_digital = false;
1176 }
1177 if (ret != connector_status_disconnected)
1178 radeon_connector->detected_by_load = true;
445282db 1179 }
fc87f13b
EE
1180 } else {
1181 enum drm_connector_status lret;
1182 /* assume digital unless load detected otherwise */
1183 radeon_connector->use_digital = true;
1184 lret = encoder_funcs->detect(encoder, connector);
1185 DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret);
1186 if (lret == connector_status_connected)
1187 radeon_connector->use_digital = false;
771fe6b9 1188 }
445282db 1189 break;
771fe6b9
JG
1190 }
1191 }
1192 }
1193
4ce001ab
DA
1194 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
1195 encoder) {
1196 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
1197 }
1198
fafcf94e
AD
1199 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1200 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1201 * by other means, assume the DFP is connected and use that EDID. In most
1202 * cases the DVI port is actually a virtual KVM port connected to the service
1203 * processor.
1204 */
a09d431f 1205out:
fafcf94e
AD
1206 if ((!rdev->is_atom_bios) &&
1207 (ret == connector_status_disconnected) &&
1208 rdev->mode_info.bios_hardcoded_edid_size) {
1209 radeon_connector->use_digital = true;
1210 ret = connector_status_connected;
1211 }
1212
771fe6b9
JG
1213 /* updated in get modes as well since we need to know if it's analog or digital */
1214 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
1215
1216exit:
1217 pm_runtime_mark_last_busy(connector->dev->dev);
1218 pm_runtime_put_autosuspend(connector->dev->dev);
1219
771fe6b9
JG
1220 return ret;
1221}
1222
1223/* okay need to be smart in here about which encoder to pick */
1109ca09 1224static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
771fe6b9
JG
1225{
1226 int enc_id = connector->encoder_ids[0];
1227 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1228 struct drm_mode_object *obj;
1229 struct drm_encoder *encoder;
1230 int i;
1231 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1232 if (connector->encoder_ids[i] == 0)
1233 break;
1234
1235 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1236 if (!obj)
1237 continue;
1238
1239 encoder = obj_to_encoder(obj);
1240
4ce001ab 1241 if (radeon_connector->use_digital == true) {
771fe6b9
JG
1242 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1243 return encoder;
1244 } else {
1245 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
1246 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
1247 return encoder;
1248 }
1249 }
1250
1251 /* see if we have a default encoder TODO */
1252
1253 /* then check use digitial */
1254 /* pick the first one */
1255 if (enc_id) {
1256 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
1257 if (!obj)
1258 return NULL;
1259 encoder = obj_to_encoder(obj);
1260 return encoder;
1261 }
1262 return NULL;
1263}
1264
d50ba256
DA
1265static void radeon_dvi_force(struct drm_connector *connector)
1266{
1267 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1268 if (connector->force == DRM_FORCE_ON)
1269 radeon_connector->use_digital = false;
1270 if (connector->force == DRM_FORCE_ON_DIGITAL)
1271 radeon_connector->use_digital = true;
1272}
1273
a3fa6320
AD
1274static int radeon_dvi_mode_valid(struct drm_connector *connector,
1275 struct drm_display_mode *mode)
1276{
1b24203e
AD
1277 struct drm_device *dev = connector->dev;
1278 struct radeon_device *rdev = dev->dev_private;
a3fa6320
AD
1279 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1280
1281 /* XXX check mode bandwidth */
1282
1b24203e
AD
1283 /* clocks over 135 MHz have heat issues with DVI on RV100 */
1284 if (radeon_connector->use_digital &&
1285 (rdev->family == CHIP_RV100) &&
1286 (mode->clock > 135000))
1287 return MODE_CLOCK_HIGH;
1288
a3fa6320
AD
1289 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1290 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1291 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1292 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1293 return MODE_OK;
f2263fc7
AD
1294 else if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) {
1295 /* HDMI 1.3+ supports max clock of 340 Mhz */
1296 if (mode->clock > 340000)
e1e84017 1297 return MODE_CLOCK_HIGH;
f2263fc7
AD
1298 else
1299 return MODE_OK;
1300 } else {
a3fa6320 1301 return MODE_CLOCK_HIGH;
f2263fc7 1302 }
a3fa6320 1303 }
b20f9bef
AD
1304
1305 /* check against the max pixel clock */
1306 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1307 return MODE_CLOCK_HIGH;
1308
a3fa6320
AD
1309 return MODE_OK;
1310}
1311
1109ca09 1312static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
771fe6b9 1313 .get_modes = radeon_dvi_get_modes,
a3fa6320 1314 .mode_valid = radeon_dvi_mode_valid,
771fe6b9
JG
1315 .best_encoder = radeon_dvi_encoder,
1316};
1317
1109ca09 1318static const struct drm_connector_funcs radeon_dvi_connector_funcs = {
771fe6b9
JG
1319 .dpms = drm_helper_connector_dpms,
1320 .detect = radeon_dvi_detect,
1321 .fill_modes = drm_helper_probe_single_connector_modes,
1322 .set_property = radeon_connector_set_property,
1323 .destroy = radeon_connector_destroy,
d50ba256 1324 .force = radeon_dvi_force,
771fe6b9
JG
1325};
1326
746c1aa4
DA
1327static int radeon_dp_get_modes(struct drm_connector *connector)
1328{
1329 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
8b834852 1330 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1331 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA
1332 int ret;
1333
f89931f3
AD
1334 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1335 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1336 struct drm_display_mode *mode;
1337
2b69ffb9
AD
1338 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1339 if (!radeon_dig_connector->edp_on)
1340 atombios_set_edp_panel_power(connector,
1341 ATOM_TRANSMITTER_ACTION_POWER_ON);
1342 ret = radeon_ddc_get_modes(radeon_connector);
1343 if (!radeon_dig_connector->edp_on)
1344 atombios_set_edp_panel_power(connector,
1345 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1346 } else {
1347 /* need to setup ddc on the bridge */
1348 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1349 ENCODER_OBJECT_ID_NONE) {
1350 if (encoder)
1351 radeon_atom_ext_encoder_setup_ddc(encoder);
1352 }
1353 ret = radeon_ddc_get_modes(radeon_connector);
1354 }
d291767b
AD
1355
1356 if (ret > 0) {
d291767b
AD
1357 if (encoder) {
1358 radeon_fixup_lvds_native_mode(encoder, connector);
1359 /* add scaled modes */
1360 radeon_add_common_modes(encoder, connector);
1361 }
1362 return ret;
1363 }
1364
d291767b
AD
1365 if (!encoder)
1366 return 0;
1367
1368 /* we have no EDID modes */
1369 mode = radeon_fp_native_mode(encoder);
1370 if (mode) {
1371 ret = 1;
1372 drm_mode_probed_add(connector, mode);
1373 /* add the width/height from vbios tables if available */
1374 connector->display_info.width_mm = mode->width_mm;
1375 connector->display_info.height_mm = mode->height_mm;
1376 /* add scaled modes */
1377 radeon_add_common_modes(encoder, connector);
1378 }
591a10e1
AD
1379 } else {
1380 /* need to setup ddc on the bridge */
1d33e1fc
AD
1381 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1382 ENCODER_OBJECT_ID_NONE) {
591a10e1
AD
1383 if (encoder)
1384 radeon_atom_ext_encoder_setup_ddc(encoder);
1385 }
d291767b 1386 ret = radeon_ddc_get_modes(radeon_connector);
591a10e1 1387 }
8b834852 1388
746c1aa4
DA
1389 return ret;
1390}
1391
1d33e1fc 1392u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
d7fa8bb3
AD
1393{
1394 struct drm_mode_object *obj;
1395 struct drm_encoder *encoder;
1396 struct radeon_encoder *radeon_encoder;
1397 int i;
d7fa8bb3
AD
1398
1399 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1400 if (connector->encoder_ids[i] == 0)
1401 break;
1402
1403 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1404 if (!obj)
1405 continue;
1406
1407 encoder = obj_to_encoder(obj);
1408 radeon_encoder = to_radeon_encoder(encoder);
1409
1410 switch (radeon_encoder->encoder_id) {
1411 case ENCODER_OBJECT_ID_TRAVIS:
1412 case ENCODER_OBJECT_ID_NUTMEG:
1d33e1fc 1413 return radeon_encoder->encoder_id;
d7fa8bb3
AD
1414 default:
1415 break;
1416 }
1417 }
1418
1d33e1fc 1419 return ENCODER_OBJECT_ID_NONE;
d7fa8bb3
AD
1420}
1421
1422bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
1423{
1424 struct drm_mode_object *obj;
1425 struct drm_encoder *encoder;
1426 struct radeon_encoder *radeon_encoder;
1427 int i;
1428 bool found = false;
1429
1430 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1431 if (connector->encoder_ids[i] == 0)
1432 break;
1433
1434 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1435 if (!obj)
1436 continue;
1437
1438 encoder = obj_to_encoder(obj);
1439 radeon_encoder = to_radeon_encoder(encoder);
1440 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1441 found = true;
1442 }
1443
1444 return found;
1445}
1446
1447bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1448{
1449 struct drm_device *dev = connector->dev;
1450 struct radeon_device *rdev = dev->dev_private;
1451
1452 if (ASIC_IS_DCE5(rdev) &&
af5d3653 1453 (rdev->clock.default_dispclk >= 53900) &&
d7fa8bb3
AD
1454 radeon_connector_encoder_is_hbr2(connector)) {
1455 return true;
1456 }
1457
1458 return false;
1459}
1460
7b334fcb 1461static enum drm_connector_status
930a9e28 1462radeon_dp_detect(struct drm_connector *connector, bool force)
746c1aa4 1463{
f8d0edde
AD
1464 struct drm_device *dev = connector->dev;
1465 struct radeon_device *rdev = dev->dev_private;
746c1aa4 1466 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
746c1aa4 1467 enum drm_connector_status ret = connector_status_disconnected;
4143e919 1468 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1469 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
10ebc0bc 1470 int r;
746c1aa4 1471
10ebc0bc
DA
1472 r = pm_runtime_get_sync(connector->dev->dev);
1473 if (r < 0)
1474 return connector_status_disconnected;
1475
1476 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1477 ret = connector->status;
1478 goto out;
1479 }
11fe1266 1480
746c1aa4
DA
1481 if (radeon_connector->edid) {
1482 kfree(radeon_connector->edid);
1483 radeon_connector->edid = NULL;
1484 }
1485
f89931f3
AD
1486 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1487 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1488 if (encoder) {
1489 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1490 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1491
1492 /* check if panel is valid */
1493 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1494 ret = connector_status_connected;
1495 }
6f50eae7
AD
1496 /* eDP is always DP */
1497 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
8b834852
AD
1498 if (!radeon_dig_connector->edp_on)
1499 atombios_set_edp_panel_power(connector,
1500 ATOM_TRANSMITTER_ACTION_POWER_ON);
6f50eae7 1501 if (radeon_dp_getdpcd(radeon_connector))
9fa05c98 1502 ret = connector_status_connected;
8b834852
AD
1503 if (!radeon_dig_connector->edp_on)
1504 atombios_set_edp_panel_power(connector,
1505 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1d33e1fc
AD
1506 } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1507 ENCODER_OBJECT_ID_NONE) {
b06947b5
AD
1508 /* DP bridges are always DP */
1509 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1510 /* get the DPCD from the bridge */
1511 radeon_dp_getdpcd(radeon_connector);
1512
6777a4f6
AD
1513 if (encoder) {
1514 /* setup ddc on the bridge */
1515 radeon_atom_ext_encoder_setup_ddc(encoder);
0a9069d3
NOS
1516 /* bridge chips are always aux */
1517 if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */
b06947b5 1518 ret = connector_status_connected;
6777a4f6
AD
1519 else if (radeon_connector->dac_load_detect) { /* try load detection */
1520 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
b06947b5
AD
1521 ret = encoder_funcs->detect(encoder, connector);
1522 }
591a10e1 1523 }
b06947b5 1524 } else {
6f50eae7 1525 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
f8d0edde
AD
1526 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1527 ret = connector_status_connected;
1528 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
1529 radeon_dp_getdpcd(radeon_connector);
6f50eae7 1530 } else {
f8d0edde
AD
1531 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1532 if (radeon_dp_getdpcd(radeon_connector))
1533 ret = connector_status_connected;
1534 } else {
d592fca9 1535 /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */
0a9069d3 1536 if (radeon_ddc_probe(radeon_connector, false))
f8d0edde
AD
1537 ret = connector_status_connected;
1538 }
4143e919 1539 }
746c1aa4 1540 }
4143e919 1541
30f44372 1542 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
1543out:
1544 pm_runtime_mark_last_busy(connector->dev->dev);
1545 pm_runtime_put_autosuspend(connector->dev->dev);
1546
746c1aa4
DA
1547 return ret;
1548}
1549
5801ead6
AD
1550static int radeon_dp_mode_valid(struct drm_connector *connector,
1551 struct drm_display_mode *mode)
1552{
6536a3a6
AD
1553 struct drm_device *dev = connector->dev;
1554 struct radeon_device *rdev = dev->dev_private;
5801ead6
AD
1555 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1556 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1557
1558 /* XXX check mode bandwidth */
1559
f89931f3
AD
1560 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1561 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1562 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1563
1564 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1565 return MODE_PANEL;
1566
1567 if (encoder) {
1568 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1569 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1570
f89931f3 1571 /* AVIVO hardware supports downscaling modes larger than the panel
d291767b
AD
1572 * to the panel size, but I'm not sure this is desirable.
1573 */
1574 if ((mode->hdisplay > native_mode->hdisplay) ||
1575 (mode->vdisplay > native_mode->vdisplay))
1576 return MODE_PANEL;
1577
1578 /* if scaling is disabled, block non-native modes */
1579 if (radeon_encoder->rmx_type == RMX_OFF) {
1580 if ((mode->hdisplay != native_mode->hdisplay) ||
1581 (mode->vdisplay != native_mode->vdisplay))
1582 return MODE_PANEL;
1583 }
1584 }
d291767b
AD
1585 } else {
1586 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
6536a3a6 1587 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) {
d291767b 1588 return radeon_dp_mode_valid_helper(connector, mode);
6536a3a6
AD
1589 } else {
1590 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) {
1591 /* HDMI 1.3+ supports max clock of 340 Mhz */
1592 if (mode->clock > 340000)
1593 return MODE_CLOCK_HIGH;
1594 } else {
1595 if (mode->clock > 165000)
1596 return MODE_CLOCK_HIGH;
1597 }
1598 }
d291767b 1599 }
6536a3a6
AD
1600
1601 return MODE_OK;
5801ead6
AD
1602}
1603
1109ca09 1604static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
746c1aa4 1605 .get_modes = radeon_dp_get_modes,
5801ead6 1606 .mode_valid = radeon_dp_mode_valid,
746c1aa4
DA
1607 .best_encoder = radeon_dvi_encoder,
1608};
1609
1109ca09 1610static const struct drm_connector_funcs radeon_dp_connector_funcs = {
746c1aa4
DA
1611 .dpms = drm_helper_connector_dpms,
1612 .detect = radeon_dp_detect,
1613 .fill_modes = drm_helper_probe_single_connector_modes,
1614 .set_property = radeon_connector_set_property,
379dfc25 1615 .destroy = radeon_connector_destroy,
746c1aa4
DA
1616 .force = radeon_dvi_force,
1617};
1618
855f5f1d
AD
1619static const struct drm_connector_funcs radeon_edp_connector_funcs = {
1620 .dpms = drm_helper_connector_dpms,
1621 .detect = radeon_dp_detect,
1622 .fill_modes = drm_helper_probe_single_connector_modes,
1623 .set_property = radeon_lvds_set_property,
379dfc25 1624 .destroy = radeon_connector_destroy,
855f5f1d
AD
1625 .force = radeon_dvi_force,
1626};
1627
1628static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = {
1629 .dpms = drm_helper_connector_dpms,
1630 .detect = radeon_dp_detect,
1631 .fill_modes = drm_helper_probe_single_connector_modes,
1632 .set_property = radeon_lvds_set_property,
379dfc25 1633 .destroy = radeon_connector_destroy,
855f5f1d
AD
1634 .force = radeon_dvi_force,
1635};
1636
771fe6b9
JG
1637void
1638radeon_add_atom_connector(struct drm_device *dev,
1639 uint32_t connector_id,
1640 uint32_t supported_device,
1641 int connector_type,
1642 struct radeon_i2c_bus_rec *i2c_bus,
b75fad06 1643 uint32_t igp_lane_info,
eed45b30 1644 uint16_t connector_object_id,
26b5bc98
AD
1645 struct radeon_hpd *hpd,
1646 struct radeon_router *router)
771fe6b9 1647{
445282db 1648 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
1649 struct drm_connector *connector;
1650 struct radeon_connector *radeon_connector;
1651 struct radeon_connector_atom_dig *radeon_dig_connector;
eac4dff6
AD
1652 struct drm_encoder *encoder;
1653 struct radeon_encoder *radeon_encoder;
771fe6b9 1654 uint32_t subpixel_order = SubPixelNone;
0294cf4f 1655 bool shared_ddc = false;
eac4dff6 1656 bool is_dp_bridge = false;
496263bf 1657 bool has_aux = false;
771fe6b9 1658
4ce001ab 1659 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG
1660 return;
1661
cf4c12f9
AD
1662 /* if the user selected tv=0 don't try and add the connector */
1663 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1664 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1665 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1666 (radeon_tv == 0))
1667 return;
1668
771fe6b9
JG
1669 /* see if we already added it */
1670 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1671 radeon_connector = to_radeon_connector(connector);
1672 if (radeon_connector->connector_id == connector_id) {
1673 radeon_connector->devices |= supported_device;
1674 return;
1675 }
0294cf4f 1676 if (radeon_connector->ddc_bus && i2c_bus->valid) {
d3932d6c 1677 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
0294cf4f
AD
1678 radeon_connector->shared_ddc = true;
1679 shared_ddc = true;
1680 }
fb939dfc 1681 if (radeon_connector->router_bus && router->ddc_valid &&
26b5bc98
AD
1682 (radeon_connector->router.router_id == router->router_id)) {
1683 radeon_connector->shared_ddc = false;
1684 shared_ddc = false;
1685 }
0294cf4f 1686 }
771fe6b9
JG
1687 }
1688
eac4dff6
AD
1689 /* check if it's a dp bridge */
1690 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1691 radeon_encoder = to_radeon_encoder(encoder);
1692 if (radeon_encoder->devices & supported_device) {
1693 switch (radeon_encoder->encoder_id) {
1694 case ENCODER_OBJECT_ID_TRAVIS:
1695 case ENCODER_OBJECT_ID_NUTMEG:
1696 is_dp_bridge = true;
1697 break;
1698 default:
1699 break;
1700 }
1701 }
1702 }
1703
771fe6b9
JG
1704 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1705 if (!radeon_connector)
1706 return;
1707
1708 connector = &radeon_connector->base;
1709
1710 radeon_connector->connector_id = connector_id;
1711 radeon_connector->devices = supported_device;
0294cf4f 1712 radeon_connector->shared_ddc = shared_ddc;
b75fad06 1713 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1714 radeon_connector->hpd = *hpd;
bc1c4dc3 1715
26b5bc98 1716 radeon_connector->router = *router;
fb939dfc 1717 if (router->ddc_valid || router->cd_valid) {
26b5bc98
AD
1718 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1719 if (!radeon_connector->router_bus)
a70882aa 1720 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
26b5bc98 1721 }
eac4dff6
AD
1722
1723 if (is_dp_bridge) {
771fe6b9
JG
1724 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1725 if (!radeon_dig_connector)
1726 goto failed;
771fe6b9
JG
1727 radeon_dig_connector->igp_lane_info = igp_lane_info;
1728 radeon_connector->con_priv = radeon_dig_connector;
771fe6b9 1729 if (i2c_bus->valid) {
379dfc25
AD
1730 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1731 if (radeon_connector->ddc_bus)
496263bf
AD
1732 has_aux = true;
1733 else
eac4dff6 1734 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1735 }
eac4dff6
AD
1736 switch (connector_type) {
1737 case DRM_MODE_CONNECTOR_VGA:
1738 case DRM_MODE_CONNECTOR_DVIA:
1739 default:
855f5f1d
AD
1740 drm_connector_init(dev, &radeon_connector->base,
1741 &radeon_dp_connector_funcs, connector_type);
1742 drm_connector_helper_add(&radeon_connector->base,
1743 &radeon_dp_connector_helper_funcs);
eac4dff6
AD
1744 connector->interlace_allowed = true;
1745 connector->doublescan_allowed = true;
d629a3ce 1746 radeon_connector->dac_load_detect = true;
e35755fa 1747 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD
1748 rdev->mode_info.load_detect_property,
1749 1);
eac4dff6
AD
1750 break;
1751 case DRM_MODE_CONNECTOR_DVII:
1752 case DRM_MODE_CONNECTOR_DVID:
1753 case DRM_MODE_CONNECTOR_HDMIA:
1754 case DRM_MODE_CONNECTOR_HDMIB:
1755 case DRM_MODE_CONNECTOR_DisplayPort:
855f5f1d
AD
1756 drm_connector_init(dev, &radeon_connector->base,
1757 &radeon_dp_connector_funcs, connector_type);
1758 drm_connector_helper_add(&radeon_connector->base,
1759 &radeon_dp_connector_helper_funcs);
e35755fa 1760 drm_object_attach_property(&radeon_connector->base.base,
430f70d5 1761 rdev->mode_info.underscan_property,
56bec7c0 1762 UNDERSCAN_OFF);
e35755fa 1763 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG
1764 rdev->mode_info.underscan_hborder_property,
1765 0);
e35755fa 1766 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG
1767 rdev->mode_info.underscan_vborder_property,
1768 0);
91915260 1769
6214bb74
AD
1770 drm_object_attach_property(&radeon_connector->base.base,
1771 rdev->mode_info.dither_property,
1772 RADEON_FMT_DITHER_DISABLE);
91915260 1773
108dc8e8
AD
1774 if (radeon_audio != 0)
1775 drm_object_attach_property(&radeon_connector->base.base,
1776 rdev->mode_info.audio_property,
e31fadd3 1777 RADEON_AUDIO_AUTO);
91915260 1778
eac4dff6
AD
1779 subpixel_order = SubPixelHorizontalRGB;
1780 connector->interlace_allowed = true;
1781 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1782 connector->doublescan_allowed = true;
1783 else
1784 connector->doublescan_allowed = false;
d629a3ce
AD
1785 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1786 radeon_connector->dac_load_detect = true;
e35755fa 1787 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD
1788 rdev->mode_info.load_detect_property,
1789 1);
1790 }
eac4dff6
AD
1791 break;
1792 case DRM_MODE_CONNECTOR_LVDS:
1793 case DRM_MODE_CONNECTOR_eDP:
855f5f1d
AD
1794 drm_connector_init(dev, &radeon_connector->base,
1795 &radeon_lvds_bridge_connector_funcs, connector_type);
1796 drm_connector_helper_add(&radeon_connector->base,
1797 &radeon_dp_connector_helper_funcs);
e35755fa 1798 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1799 dev->mode_config.scaling_mode_property,
1800 DRM_MODE_SCALE_FULLSCREEN);
1801 subpixel_order = SubPixelHorizontalRGB;
1802 connector->interlace_allowed = false;
1803 connector->doublescan_allowed = false;
1804 break;
5bccf5e3 1805 }
eac4dff6
AD
1806 } else {
1807 switch (connector_type) {
1808 case DRM_MODE_CONNECTOR_VGA:
1809 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1810 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1811 if (i2c_bus->valid) {
1812 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1813 if (!radeon_connector->ddc_bus)
1814 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1815 }
390d0bbe 1816 radeon_connector->dac_load_detect = true;
e35755fa 1817 drm_object_attach_property(&radeon_connector->base.base,
390d0bbe
AD
1818 rdev->mode_info.load_detect_property,
1819 1);
eac4dff6
AD
1820 /* no HPD on analog connectors */
1821 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1822 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1823 connector->interlace_allowed = true;
c49948f4 1824 connector->doublescan_allowed = true;
eac4dff6
AD
1825 break;
1826 case DRM_MODE_CONNECTOR_DVIA:
1827 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1828 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1829 if (i2c_bus->valid) {
1830 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1831 if (!radeon_connector->ddc_bus)
1832 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1833 }
1834 radeon_connector->dac_load_detect = true;
e35755fa 1835 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1836 rdev->mode_info.load_detect_property,
1837 1);
1838 /* no HPD on analog connectors */
1839 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1840 connector->interlace_allowed = true;
1841 connector->doublescan_allowed = true;
1842 break;
1843 case DRM_MODE_CONNECTOR_DVII:
1844 case DRM_MODE_CONNECTOR_DVID:
1845 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1846 if (!radeon_dig_connector)
1847 goto failed;
1848 radeon_dig_connector->igp_lane_info = igp_lane_info;
1849 radeon_connector->con_priv = radeon_dig_connector;
1850 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1851 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1852 if (i2c_bus->valid) {
1853 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1854 if (!radeon_connector->ddc_bus)
1855 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1856 }
1857 subpixel_order = SubPixelHorizontalRGB;
e35755fa 1858 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1859 rdev->mode_info.coherent_mode_property,
1860 1);
1861 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1862 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1863 rdev->mode_info.underscan_property,
1864 UNDERSCAN_OFF);
e35755fa 1865 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1866 rdev->mode_info.underscan_hborder_property,
1867 0);
e35755fa 1868 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1869 rdev->mode_info.underscan_vborder_property,
1870 0);
1871 }
108dc8e8 1872 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1873 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1874 rdev->mode_info.audio_property,
e31fadd3 1875 RADEON_AUDIO_AUTO);
8666c076 1876 }
6214bb74
AD
1877 if (ASIC_IS_AVIVO(rdev)) {
1878 drm_object_attach_property(&radeon_connector->base.base,
1879 rdev->mode_info.dither_property,
1880 RADEON_FMT_DITHER_DISABLE);
1881 }
eac4dff6
AD
1882 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1883 radeon_connector->dac_load_detect = true;
e35755fa 1884 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1885 rdev->mode_info.load_detect_property,
1886 1);
1887 }
1888 connector->interlace_allowed = true;
1889 if (connector_type == DRM_MODE_CONNECTOR_DVII)
1890 connector->doublescan_allowed = true;
1891 else
1892 connector->doublescan_allowed = false;
1893 break;
1894 case DRM_MODE_CONNECTOR_HDMIA:
1895 case DRM_MODE_CONNECTOR_HDMIB:
1896 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1897 if (!radeon_dig_connector)
1898 goto failed;
1899 radeon_dig_connector->igp_lane_info = igp_lane_info;
1900 radeon_connector->con_priv = radeon_dig_connector;
1901 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1902 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1903 if (i2c_bus->valid) {
1904 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1905 if (!radeon_connector->ddc_bus)
1906 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1907 }
e35755fa 1908 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1909 rdev->mode_info.coherent_mode_property,
1910 1);
1911 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1912 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1913 rdev->mode_info.underscan_property,
1914 UNDERSCAN_OFF);
e35755fa 1915 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1916 rdev->mode_info.underscan_hborder_property,
1917 0);
e35755fa 1918 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1919 rdev->mode_info.underscan_vborder_property,
1920 0);
1921 }
108dc8e8 1922 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1923 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1924 rdev->mode_info.audio_property,
e31fadd3 1925 RADEON_AUDIO_AUTO);
8666c076 1926 }
6214bb74
AD
1927 if (ASIC_IS_AVIVO(rdev)) {
1928 drm_object_attach_property(&radeon_connector->base.base,
1929 rdev->mode_info.dither_property,
1930 RADEON_FMT_DITHER_DISABLE);
1931 }
eac4dff6
AD
1932 subpixel_order = SubPixelHorizontalRGB;
1933 connector->interlace_allowed = true;
1934 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1935 connector->doublescan_allowed = true;
1936 else
1937 connector->doublescan_allowed = false;
1938 break;
1939 case DRM_MODE_CONNECTOR_DisplayPort:
1940 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1941 if (!radeon_dig_connector)
1942 goto failed;
1943 radeon_dig_connector->igp_lane_info = igp_lane_info;
1944 radeon_connector->con_priv = radeon_dig_connector;
1945 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1946 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1947 if (i2c_bus->valid) {
eac4dff6 1948 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
496263bf
AD
1949 if (radeon_connector->ddc_bus)
1950 has_aux = true;
1951 else
eac4dff6
AD
1952 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1953 }
1954 subpixel_order = SubPixelHorizontalRGB;
e35755fa 1955 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1956 rdev->mode_info.coherent_mode_property,
1957 1);
1958 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1959 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1960 rdev->mode_info.underscan_property,
1961 UNDERSCAN_OFF);
e35755fa 1962 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1963 rdev->mode_info.underscan_hborder_property,
1964 0);
e35755fa 1965 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1966 rdev->mode_info.underscan_vborder_property,
1967 0);
1968 }
108dc8e8 1969 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1970 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1971 rdev->mode_info.audio_property,
e31fadd3 1972 RADEON_AUDIO_AUTO);
8666c076 1973 }
6214bb74
AD
1974 if (ASIC_IS_AVIVO(rdev)) {
1975 drm_object_attach_property(&radeon_connector->base.base,
1976 rdev->mode_info.dither_property,
1977 RADEON_FMT_DITHER_DISABLE);
91915260 1978
6214bb74 1979 }
eac4dff6
AD
1980 connector->interlace_allowed = true;
1981 /* in theory with a DP to VGA converter... */
c49948f4 1982 connector->doublescan_allowed = false;
eac4dff6
AD
1983 break;
1984 case DRM_MODE_CONNECTOR_eDP:
1985 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1986 if (!radeon_dig_connector)
1987 goto failed;
1988 radeon_dig_connector->igp_lane_info = igp_lane_info;
1989 radeon_connector->con_priv = radeon_dig_connector;
855f5f1d 1990 drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type);
eac4dff6
AD
1991 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1992 if (i2c_bus->valid) {
379dfc25
AD
1993 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1994 if (radeon_connector->ddc_bus)
496263bf
AD
1995 has_aux = true;
1996 else
eac4dff6
AD
1997 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1998 }
e35755fa 1999 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
2000 dev->mode_config.scaling_mode_property,
2001 DRM_MODE_SCALE_FULLSCREEN);
2002 subpixel_order = SubPixelHorizontalRGB;
2003 connector->interlace_allowed = false;
2004 connector->doublescan_allowed = false;
2005 break;
2006 case DRM_MODE_CONNECTOR_SVIDEO:
2007 case DRM_MODE_CONNECTOR_Composite:
2008 case DRM_MODE_CONNECTOR_9PinDIN:
2009 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2010 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2011 radeon_connector->dac_load_detect = true;
e35755fa 2012 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
2013 rdev->mode_info.load_detect_property,
2014 1);
e35755fa 2015 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
2016 rdev->mode_info.tv_std_property,
2017 radeon_atombios_get_tv_info(rdev));
2018 /* no HPD on analog connectors */
2019 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2020 connector->interlace_allowed = false;
2021 connector->doublescan_allowed = false;
2022 break;
2023 case DRM_MODE_CONNECTOR_LVDS:
2024 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2025 if (!radeon_dig_connector)
2026 goto failed;
2027 radeon_dig_connector->igp_lane_info = igp_lane_info;
2028 radeon_connector->con_priv = radeon_dig_connector;
2029 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
2030 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
2031 if (i2c_bus->valid) {
2032 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2033 if (!radeon_connector->ddc_bus)
2034 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2035 }
e35755fa 2036 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
2037 dev->mode_config.scaling_mode_property,
2038 DRM_MODE_SCALE_FULLSCREEN);
2039 subpixel_order = SubPixelHorizontalRGB;
2040 connector->interlace_allowed = false;
2041 connector->doublescan_allowed = false;
2042 break;
771fe6b9 2043 }
771fe6b9
JG
2044 }
2045
2581afcc 2046 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA
2047 if (i2c_bus->valid)
2048 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2049 } else
2050 connector->polled = DRM_CONNECTOR_POLL_HPD;
2051
771fe6b9 2052 connector->display_info.subpixel_order = subpixel_order;
34ea3d38 2053 drm_connector_register(connector);
496263bf
AD
2054
2055 if (has_aux)
2056 radeon_dp_aux_init(radeon_connector);
2057
771fe6b9
JG
2058 return;
2059
2060failed:
771fe6b9
JG
2061 drm_connector_cleanup(connector);
2062 kfree(connector);
2063}
2064
2065void
2066radeon_add_legacy_connector(struct drm_device *dev,
2067 uint32_t connector_id,
2068 uint32_t supported_device,
2069 int connector_type,
b75fad06 2070 struct radeon_i2c_bus_rec *i2c_bus,
eed45b30
AD
2071 uint16_t connector_object_id,
2072 struct radeon_hpd *hpd)
771fe6b9 2073{
445282db 2074 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
2075 struct drm_connector *connector;
2076 struct radeon_connector *radeon_connector;
2077 uint32_t subpixel_order = SubPixelNone;
2078
4ce001ab 2079 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG
2080 return;
2081
cf4c12f9
AD
2082 /* if the user selected tv=0 don't try and add the connector */
2083 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
2084 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
2085 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
2086 (radeon_tv == 0))
2087 return;
2088
771fe6b9
JG
2089 /* see if we already added it */
2090 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2091 radeon_connector = to_radeon_connector(connector);
2092 if (radeon_connector->connector_id == connector_id) {
2093 radeon_connector->devices |= supported_device;
2094 return;
2095 }
2096 }
2097
2098 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
2099 if (!radeon_connector)
2100 return;
2101
2102 connector = &radeon_connector->base;
2103
2104 radeon_connector->connector_id = connector_id;
2105 radeon_connector->devices = supported_device;
b75fad06 2106 radeon_connector->connector_object_id = connector_object_id;
eed45b30 2107 radeon_connector->hpd = *hpd;
bc1c4dc3 2108
771fe6b9
JG
2109 switch (connector_type) {
2110 case DRM_MODE_CONNECTOR_VGA:
2111 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2112 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2113 if (i2c_bus->valid) {
f376b94f 2114 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2115 if (!radeon_connector->ddc_bus)
a70882aa 2116 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2117 }
35e4b7af 2118 radeon_connector->dac_load_detect = true;
e35755fa 2119 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA
2120 rdev->mode_info.load_detect_property,
2121 1);
2581afcc
AD
2122 /* no HPD on analog connectors */
2123 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
eb1f8e4f 2124 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
c49948f4
AD
2125 connector->interlace_allowed = true;
2126 connector->doublescan_allowed = true;
771fe6b9
JG
2127 break;
2128 case DRM_MODE_CONNECTOR_DVIA:
2129 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2130 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2131 if (i2c_bus->valid) {
f376b94f 2132 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2133 if (!radeon_connector->ddc_bus)
a70882aa 2134 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2135 }
35e4b7af 2136 radeon_connector->dac_load_detect = true;
e35755fa 2137 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA
2138 rdev->mode_info.load_detect_property,
2139 1);
2581afcc
AD
2140 /* no HPD on analog connectors */
2141 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD
2142 connector->interlace_allowed = true;
2143 connector->doublescan_allowed = true;
771fe6b9
JG
2144 break;
2145 case DRM_MODE_CONNECTOR_DVII:
2146 case DRM_MODE_CONNECTOR_DVID:
2147 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
0b4c0f3f 2148 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
771fe6b9 2149 if (i2c_bus->valid) {
f376b94f 2150 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2151 if (!radeon_connector->ddc_bus)
a70882aa 2152 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
68b3adb4
AD
2153 }
2154 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
35e4b7af 2155 radeon_connector->dac_load_detect = true;
e35755fa 2156 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA
2157 rdev->mode_info.load_detect_property,
2158 1);
771fe6b9
JG
2159 }
2160 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD
2161 connector->interlace_allowed = true;
2162 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2163 connector->doublescan_allowed = true;
2164 else
2165 connector->doublescan_allowed = false;
771fe6b9
JG
2166 break;
2167 case DRM_MODE_CONNECTOR_SVIDEO:
2168 case DRM_MODE_CONNECTOR_Composite:
2169 case DRM_MODE_CONNECTOR_9PinDIN:
cf4c12f9
AD
2170 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2171 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2172 radeon_connector->dac_load_detect = true;
2173 /* RS400,RC410,RS480 chipset seems to report a lot
2174 * of false positive on load detect, we haven't yet
2175 * found a way to make load detect reliable on those
2176 * chipset, thus just disable it for TV.
2177 */
2178 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
2179 radeon_connector->dac_load_detect = false;
e35755fa 2180 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD
2181 rdev->mode_info.load_detect_property,
2182 radeon_connector->dac_load_detect);
e35755fa 2183 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD
2184 rdev->mode_info.tv_std_property,
2185 radeon_combios_get_tv_info(rdev));
2186 /* no HPD on analog connectors */
2187 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD
2188 connector->interlace_allowed = false;
2189 connector->doublescan_allowed = false;
771fe6b9
JG
2190 break;
2191 case DRM_MODE_CONNECTOR_LVDS:
2192 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
0b4c0f3f 2193 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
771fe6b9 2194 if (i2c_bus->valid) {
f376b94f 2195 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2196 if (!radeon_connector->ddc_bus)
a70882aa 2197 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2198 }
e35755fa 2199 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA
2200 dev->mode_config.scaling_mode_property,
2201 DRM_MODE_SCALE_FULLSCREEN);
771fe6b9 2202 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD
2203 connector->interlace_allowed = false;
2204 connector->doublescan_allowed = false;
771fe6b9
JG
2205 break;
2206 }
2207
2581afcc 2208 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA
2209 if (i2c_bus->valid)
2210 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2211 } else
2212 connector->polled = DRM_CONNECTOR_POLL_HPD;
771fe6b9 2213 connector->display_info.subpixel_order = subpixel_order;
34ea3d38 2214 drm_connector_register(connector);
771fe6b9 2215}
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