Commit | Line | Data |
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771fe6b9 JG |
1 | /* |
2 | * Copyright 2007-8 Advanced Micro Devices, Inc. | |
3 | * Copyright 2008 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice shall be included in | |
13 | * all copies or substantial portions of the Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
21 | * OTHER DEALINGS IN THE SOFTWARE. | |
22 | * | |
23 | * Authors: Dave Airlie | |
24 | * Alex Deucher | |
25 | */ | |
26 | #include "drmP.h" | |
27 | #include "drm_edid.h" | |
28 | #include "drm_crtc_helper.h" | |
d50ba256 | 29 | #include "drm_fb_helper.h" |
771fe6b9 JG |
30 | #include "radeon_drm.h" |
31 | #include "radeon.h" | |
923f6848 | 32 | #include "atom.h" |
771fe6b9 JG |
33 | |
34 | extern void | |
35 | radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |
36 | struct drm_encoder *encoder, | |
37 | bool connected); | |
38 | extern void | |
39 | radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |
40 | struct drm_encoder *encoder, | |
41 | bool connected); | |
42 | ||
63ec0119 MD |
43 | extern void |
44 | radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder, | |
45 | struct drm_connector *drm_connector); | |
46 | ||
d4877cf2 AD |
47 | void radeon_connector_hotplug(struct drm_connector *connector) |
48 | { | |
49 | struct drm_device *dev = connector->dev; | |
50 | struct radeon_device *rdev = dev->dev_private; | |
51 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
52 | ||
1e85e1d0 | 53 | radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); |
d4877cf2 | 54 | |
7c3ed0fd AD |
55 | /* powering up/down the eDP panel generates hpd events which |
56 | * can interfere with modesetting. | |
57 | */ | |
58 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) | |
59 | return; | |
60 | ||
1e85e1d0 AD |
61 | /* pre-r600 did not always have the hpd pins mapped accurately to connectors */ |
62 | if (rdev->family >= CHIP_R600) { | |
63 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) | |
64 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON); | |
65 | else | |
66 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF); | |
d4877cf2 | 67 | } |
d4877cf2 AD |
68 | } |
69 | ||
445282db DA |
70 | static void radeon_property_change_mode(struct drm_encoder *encoder) |
71 | { | |
72 | struct drm_crtc *crtc = encoder->crtc; | |
73 | ||
74 | if (crtc && crtc->enabled) { | |
75 | drm_crtc_helper_set_mode(crtc, &crtc->mode, | |
76 | crtc->x, crtc->y, crtc->fb); | |
77 | } | |
78 | } | |
771fe6b9 JG |
79 | static void |
80 | radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status) | |
81 | { | |
82 | struct drm_device *dev = connector->dev; | |
83 | struct radeon_device *rdev = dev->dev_private; | |
84 | struct drm_encoder *best_encoder = NULL; | |
85 | struct drm_encoder *encoder = NULL; | |
86 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
87 | struct drm_mode_object *obj; | |
88 | bool connected; | |
89 | int i; | |
90 | ||
91 | best_encoder = connector_funcs->best_encoder(connector); | |
92 | ||
93 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
94 | if (connector->encoder_ids[i] == 0) | |
95 | break; | |
96 | ||
97 | obj = drm_mode_object_find(connector->dev, | |
98 | connector->encoder_ids[i], | |
99 | DRM_MODE_OBJECT_ENCODER); | |
100 | if (!obj) | |
101 | continue; | |
102 | ||
103 | encoder = obj_to_encoder(obj); | |
104 | ||
105 | if ((encoder == best_encoder) && (status == connector_status_connected)) | |
106 | connected = true; | |
107 | else | |
108 | connected = false; | |
109 | ||
110 | if (rdev->is_atom_bios) | |
111 | radeon_atombios_connected_scratch_regs(connector, encoder, connected); | |
112 | else | |
113 | radeon_combios_connected_scratch_regs(connector, encoder, connected); | |
114 | ||
115 | } | |
116 | } | |
117 | ||
445282db DA |
118 | struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type) |
119 | { | |
120 | struct drm_mode_object *obj; | |
121 | struct drm_encoder *encoder; | |
122 | int i; | |
123 | ||
124 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
125 | if (connector->encoder_ids[i] == 0) | |
126 | break; | |
127 | ||
128 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
129 | if (!obj) | |
130 | continue; | |
131 | ||
132 | encoder = obj_to_encoder(obj); | |
133 | if (encoder->encoder_type == encoder_type) | |
134 | return encoder; | |
135 | } | |
136 | return NULL; | |
137 | } | |
138 | ||
771fe6b9 JG |
139 | struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector) |
140 | { | |
141 | int enc_id = connector->encoder_ids[0]; | |
142 | struct drm_mode_object *obj; | |
143 | struct drm_encoder *encoder; | |
144 | ||
145 | /* pick the encoder ids */ | |
146 | if (enc_id) { | |
147 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
148 | if (!obj) | |
149 | return NULL; | |
150 | encoder = obj_to_encoder(obj); | |
151 | return encoder; | |
152 | } | |
153 | return NULL; | |
154 | } | |
155 | ||
4ce001ab DA |
156 | /* |
157 | * radeon_connector_analog_encoder_conflict_solve | |
158 | * - search for other connectors sharing this encoder | |
159 | * if priority is true, then set them disconnected if this is connected | |
160 | * if priority is false, set us disconnected if they are connected | |
161 | */ | |
162 | static enum drm_connector_status | |
163 | radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, | |
164 | struct drm_encoder *encoder, | |
165 | enum drm_connector_status current_status, | |
166 | bool priority) | |
167 | { | |
168 | struct drm_device *dev = connector->dev; | |
169 | struct drm_connector *conflict; | |
08d07511 | 170 | struct radeon_connector *radeon_conflict; |
4ce001ab DA |
171 | int i; |
172 | ||
173 | list_for_each_entry(conflict, &dev->mode_config.connector_list, head) { | |
174 | if (conflict == connector) | |
175 | continue; | |
176 | ||
08d07511 | 177 | radeon_conflict = to_radeon_connector(conflict); |
4ce001ab DA |
178 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { |
179 | if (conflict->encoder_ids[i] == 0) | |
180 | break; | |
181 | ||
182 | /* if the IDs match */ | |
183 | if (conflict->encoder_ids[i] == encoder->base.id) { | |
184 | if (conflict->status != connector_status_connected) | |
185 | continue; | |
08d07511 AD |
186 | |
187 | if (radeon_conflict->use_digital) | |
188 | continue; | |
4ce001ab DA |
189 | |
190 | if (priority == true) { | |
c5d46b4e AD |
191 | DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict)); |
192 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(connector)); | |
4ce001ab DA |
193 | conflict->status = connector_status_disconnected; |
194 | radeon_connector_update_scratch_regs(conflict, connector_status_disconnected); | |
195 | } else { | |
c5d46b4e AD |
196 | DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector)); |
197 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(conflict)); | |
4ce001ab DA |
198 | current_status = connector_status_disconnected; |
199 | } | |
200 | break; | |
201 | } | |
202 | } | |
203 | } | |
204 | return current_status; | |
205 | ||
206 | } | |
207 | ||
771fe6b9 JG |
208 | static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder) |
209 | { | |
210 | struct drm_device *dev = encoder->dev; | |
211 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
212 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 213 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
771fe6b9 | 214 | |
de2103e4 AD |
215 | if (native_mode->hdisplay != 0 && |
216 | native_mode->vdisplay != 0 && | |
217 | native_mode->clock != 0) { | |
fb06ca8f | 218 | mode = drm_mode_duplicate(dev, native_mode); |
771fe6b9 JG |
219 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; |
220 | drm_mode_set_name(mode); | |
221 | ||
d9fdaafb | 222 | DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name); |
d2efdf6d AD |
223 | } else if (native_mode->hdisplay != 0 && |
224 | native_mode->vdisplay != 0) { | |
225 | /* mac laptops without an edid */ | |
226 | /* Note that this is not necessarily the exact panel mode, | |
227 | * but an approximation based on the cvt formula. For these | |
228 | * systems we should ideally read the mode info out of the | |
229 | * registers or add a mode table, but this works and is much | |
230 | * simpler. | |
231 | */ | |
232 | mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); | |
233 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | |
d9fdaafb | 234 | DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name); |
771fe6b9 JG |
235 | } |
236 | return mode; | |
237 | } | |
238 | ||
923f6848 AD |
239 | static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector) |
240 | { | |
241 | struct drm_device *dev = encoder->dev; | |
242 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
243 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 244 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
923f6848 AD |
245 | int i; |
246 | struct mode_size { | |
247 | int w; | |
248 | int h; | |
249 | } common_modes[17] = { | |
250 | { 640, 480}, | |
251 | { 720, 480}, | |
252 | { 800, 600}, | |
253 | { 848, 480}, | |
254 | {1024, 768}, | |
255 | {1152, 768}, | |
256 | {1280, 720}, | |
257 | {1280, 800}, | |
258 | {1280, 854}, | |
259 | {1280, 960}, | |
260 | {1280, 1024}, | |
261 | {1440, 900}, | |
262 | {1400, 1050}, | |
263 | {1680, 1050}, | |
264 | {1600, 1200}, | |
265 | {1920, 1080}, | |
266 | {1920, 1200} | |
267 | }; | |
268 | ||
269 | for (i = 0; i < 17; i++) { | |
dfdd6467 AD |
270 | if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) { |
271 | if (common_modes[i].w > 1024 || | |
272 | common_modes[i].h > 768) | |
273 | continue; | |
274 | } | |
923f6848 | 275 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
de2103e4 AD |
276 | if (common_modes[i].w > native_mode->hdisplay || |
277 | common_modes[i].h > native_mode->vdisplay || | |
278 | (common_modes[i].w == native_mode->hdisplay && | |
279 | common_modes[i].h == native_mode->vdisplay)) | |
923f6848 AD |
280 | continue; |
281 | } | |
282 | if (common_modes[i].w < 320 || common_modes[i].h < 200) | |
283 | continue; | |
284 | ||
d50ba256 | 285 | mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false); |
923f6848 AD |
286 | drm_mode_probed_add(connector, mode); |
287 | } | |
288 | } | |
289 | ||
771fe6b9 JG |
290 | int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property, |
291 | uint64_t val) | |
292 | { | |
445282db DA |
293 | struct drm_device *dev = connector->dev; |
294 | struct radeon_device *rdev = dev->dev_private; | |
295 | struct drm_encoder *encoder; | |
296 | struct radeon_encoder *radeon_encoder; | |
297 | ||
298 | if (property == rdev->mode_info.coherent_mode_property) { | |
299 | struct radeon_encoder_atom_dig *dig; | |
ce227c41 | 300 | bool new_coherent_mode; |
445282db DA |
301 | |
302 | /* need to find digital encoder on connector */ | |
303 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
304 | if (!encoder) | |
305 | return 0; | |
306 | ||
307 | radeon_encoder = to_radeon_encoder(encoder); | |
308 | ||
309 | if (!radeon_encoder->enc_priv) | |
310 | return 0; | |
311 | ||
312 | dig = radeon_encoder->enc_priv; | |
ce227c41 DA |
313 | new_coherent_mode = val ? true : false; |
314 | if (dig->coherent_mode != new_coherent_mode) { | |
315 | dig->coherent_mode = new_coherent_mode; | |
316 | radeon_property_change_mode(&radeon_encoder->base); | |
317 | } | |
445282db DA |
318 | } |
319 | ||
5b1714d3 AD |
320 | if (property == rdev->mode_info.underscan_property) { |
321 | /* need to find digital encoder on connector */ | |
322 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
323 | if (!encoder) | |
324 | return 0; | |
325 | ||
326 | radeon_encoder = to_radeon_encoder(encoder); | |
327 | ||
328 | if (radeon_encoder->underscan_type != val) { | |
329 | radeon_encoder->underscan_type = val; | |
330 | radeon_property_change_mode(&radeon_encoder->base); | |
331 | } | |
332 | } | |
333 | ||
5bccf5e3 MG |
334 | if (property == rdev->mode_info.underscan_hborder_property) { |
335 | /* need to find digital encoder on connector */ | |
336 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
337 | if (!encoder) | |
338 | return 0; | |
339 | ||
340 | radeon_encoder = to_radeon_encoder(encoder); | |
341 | ||
342 | if (radeon_encoder->underscan_hborder != val) { | |
343 | radeon_encoder->underscan_hborder = val; | |
344 | radeon_property_change_mode(&radeon_encoder->base); | |
345 | } | |
346 | } | |
347 | ||
348 | if (property == rdev->mode_info.underscan_vborder_property) { | |
349 | /* need to find digital encoder on connector */ | |
350 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
351 | if (!encoder) | |
352 | return 0; | |
353 | ||
354 | radeon_encoder = to_radeon_encoder(encoder); | |
355 | ||
356 | if (radeon_encoder->underscan_vborder != val) { | |
357 | radeon_encoder->underscan_vborder = val; | |
358 | radeon_property_change_mode(&radeon_encoder->base); | |
359 | } | |
360 | } | |
361 | ||
445282db DA |
362 | if (property == rdev->mode_info.tv_std_property) { |
363 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC); | |
364 | if (!encoder) { | |
365 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC); | |
366 | } | |
367 | ||
368 | if (!encoder) | |
369 | return 0; | |
370 | ||
371 | radeon_encoder = to_radeon_encoder(encoder); | |
372 | if (!radeon_encoder->enc_priv) | |
373 | return 0; | |
643acacf | 374 | if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) { |
445282db DA |
375 | struct radeon_encoder_atom_dac *dac_int; |
376 | dac_int = radeon_encoder->enc_priv; | |
377 | dac_int->tv_std = val; | |
378 | } else { | |
379 | struct radeon_encoder_tv_dac *dac_int; | |
380 | dac_int = radeon_encoder->enc_priv; | |
381 | dac_int->tv_std = val; | |
382 | } | |
383 | radeon_property_change_mode(&radeon_encoder->base); | |
384 | } | |
385 | ||
386 | if (property == rdev->mode_info.load_detect_property) { | |
387 | struct radeon_connector *radeon_connector = | |
388 | to_radeon_connector(connector); | |
389 | ||
390 | if (val == 0) | |
391 | radeon_connector->dac_load_detect = false; | |
392 | else | |
393 | radeon_connector->dac_load_detect = true; | |
394 | } | |
395 | ||
396 | if (property == rdev->mode_info.tmds_pll_property) { | |
397 | struct radeon_encoder_int_tmds *tmds = NULL; | |
398 | bool ret = false; | |
399 | /* need to find digital encoder on connector */ | |
400 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
401 | if (!encoder) | |
402 | return 0; | |
403 | ||
404 | radeon_encoder = to_radeon_encoder(encoder); | |
405 | ||
406 | tmds = radeon_encoder->enc_priv; | |
407 | if (!tmds) | |
408 | return 0; | |
409 | ||
410 | if (val == 0) { | |
411 | if (rdev->is_atom_bios) | |
412 | ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds); | |
413 | else | |
414 | ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds); | |
415 | } | |
416 | if (val == 1 || ret == false) { | |
417 | radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds); | |
418 | } | |
419 | radeon_property_change_mode(&radeon_encoder->base); | |
420 | } | |
421 | ||
771fe6b9 JG |
422 | return 0; |
423 | } | |
424 | ||
8dfaa8a7 MD |
425 | static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder, |
426 | struct drm_connector *connector) | |
427 | { | |
428 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 429 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
8dfaa8a7 MD |
430 | |
431 | /* Try to get native mode details from EDID if necessary */ | |
de2103e4 | 432 | if (!native_mode->clock) { |
8dfaa8a7 MD |
433 | struct drm_display_mode *t, *mode; |
434 | ||
435 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { | |
de2103e4 AD |
436 | if (mode->hdisplay == native_mode->hdisplay && |
437 | mode->vdisplay == native_mode->vdisplay) { | |
438 | *native_mode = *mode; | |
439 | drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); | |
c5d46b4e | 440 | DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n"); |
8dfaa8a7 MD |
441 | break; |
442 | } | |
443 | } | |
444 | } | |
de2103e4 | 445 | if (!native_mode->clock) { |
c5d46b4e | 446 | DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n"); |
8dfaa8a7 MD |
447 | radeon_encoder->rmx_type = RMX_OFF; |
448 | } | |
449 | } | |
771fe6b9 JG |
450 | |
451 | static int radeon_lvds_get_modes(struct drm_connector *connector) | |
452 | { | |
453 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
454 | struct drm_encoder *encoder; | |
455 | int ret = 0; | |
456 | struct drm_display_mode *mode; | |
457 | ||
458 | if (radeon_connector->ddc_bus) { | |
459 | ret = radeon_ddc_get_modes(radeon_connector); | |
460 | if (ret > 0) { | |
7747b713 | 461 | encoder = radeon_best_single_encoder(connector); |
8dfaa8a7 MD |
462 | if (encoder) { |
463 | radeon_fixup_lvds_native_mode(encoder, connector); | |
7747b713 AD |
464 | /* add scaled modes */ |
465 | radeon_add_common_modes(encoder, connector); | |
8dfaa8a7 | 466 | } |
771fe6b9 JG |
467 | return ret; |
468 | } | |
469 | } | |
470 | ||
471 | encoder = radeon_best_single_encoder(connector); | |
472 | if (!encoder) | |
473 | return 0; | |
474 | ||
475 | /* we have no EDID modes */ | |
476 | mode = radeon_fp_native_mode(encoder); | |
477 | if (mode) { | |
478 | ret = 1; | |
479 | drm_mode_probed_add(connector, mode); | |
7a868e18 AD |
480 | /* add the width/height from vbios tables if available */ |
481 | connector->display_info.width_mm = mode->width_mm; | |
482 | connector->display_info.height_mm = mode->height_mm; | |
7747b713 AD |
483 | /* add scaled modes */ |
484 | radeon_add_common_modes(encoder, connector); | |
771fe6b9 | 485 | } |
923f6848 | 486 | |
771fe6b9 JG |
487 | return ret; |
488 | } | |
489 | ||
490 | static int radeon_lvds_mode_valid(struct drm_connector *connector, | |
491 | struct drm_display_mode *mode) | |
492 | { | |
a3fa6320 AD |
493 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
494 | ||
495 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
496 | return MODE_PANEL; | |
497 | ||
498 | if (encoder) { | |
499 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
500 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
501 | ||
502 | /* AVIVO hardware supports downscaling modes larger than the panel | |
503 | * to the panel size, but I'm not sure this is desirable. | |
504 | */ | |
505 | if ((mode->hdisplay > native_mode->hdisplay) || | |
506 | (mode->vdisplay > native_mode->vdisplay)) | |
507 | return MODE_PANEL; | |
508 | ||
509 | /* if scaling is disabled, block non-native modes */ | |
510 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
511 | if ((mode->hdisplay != native_mode->hdisplay) || | |
512 | (mode->vdisplay != native_mode->vdisplay)) | |
513 | return MODE_PANEL; | |
514 | } | |
515 | } | |
516 | ||
771fe6b9 JG |
517 | return MODE_OK; |
518 | } | |
519 | ||
7b334fcb | 520 | static enum drm_connector_status |
930a9e28 | 521 | radeon_lvds_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 522 | { |
0549a061 | 523 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
2ffb8429 | 524 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
0549a061 | 525 | enum drm_connector_status ret = connector_status_disconnected; |
2ffb8429 AD |
526 | |
527 | if (encoder) { | |
528 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 529 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
2ffb8429 AD |
530 | |
531 | /* check if panel is valid */ | |
de2103e4 | 532 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) |
2ffb8429 AD |
533 | ret = connector_status_connected; |
534 | ||
535 | } | |
0549a061 AD |
536 | |
537 | /* check for edid as well */ | |
0294cf4f AD |
538 | if (radeon_connector->edid) |
539 | ret = connector_status_connected; | |
540 | else { | |
541 | if (radeon_connector->ddc_bus) { | |
0294cf4f AD |
542 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
543 | &radeon_connector->ddc_bus->adapter); | |
0294cf4f AD |
544 | if (radeon_connector->edid) |
545 | ret = connector_status_connected; | |
546 | } | |
0549a061 | 547 | } |
771fe6b9 | 548 | /* check acpi lid status ??? */ |
2ffb8429 | 549 | |
771fe6b9 JG |
550 | radeon_connector_update_scratch_regs(connector, ret); |
551 | return ret; | |
552 | } | |
553 | ||
554 | static void radeon_connector_destroy(struct drm_connector *connector) | |
555 | { | |
556 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
557 | ||
0294cf4f AD |
558 | if (radeon_connector->edid) |
559 | kfree(radeon_connector->edid); | |
771fe6b9 JG |
560 | kfree(radeon_connector->con_priv); |
561 | drm_sysfs_connector_remove(connector); | |
562 | drm_connector_cleanup(connector); | |
563 | kfree(connector); | |
564 | } | |
565 | ||
445282db DA |
566 | static int radeon_lvds_set_property(struct drm_connector *connector, |
567 | struct drm_property *property, | |
568 | uint64_t value) | |
569 | { | |
570 | struct drm_device *dev = connector->dev; | |
571 | struct radeon_encoder *radeon_encoder; | |
572 | enum radeon_rmx_type rmx_type; | |
573 | ||
d9fdaafb | 574 | DRM_DEBUG_KMS("\n"); |
445282db DA |
575 | if (property != dev->mode_config.scaling_mode_property) |
576 | return 0; | |
577 | ||
578 | if (connector->encoder) | |
579 | radeon_encoder = to_radeon_encoder(connector->encoder); | |
580 | else { | |
581 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
582 | radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector)); | |
583 | } | |
584 | ||
585 | switch (value) { | |
586 | case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break; | |
587 | case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break; | |
588 | case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break; | |
589 | default: | |
590 | case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break; | |
591 | } | |
592 | if (radeon_encoder->rmx_type == rmx_type) | |
593 | return 0; | |
594 | ||
595 | radeon_encoder->rmx_type = rmx_type; | |
596 | ||
597 | radeon_property_change_mode(&radeon_encoder->base); | |
598 | return 0; | |
599 | } | |
600 | ||
601 | ||
771fe6b9 JG |
602 | struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = { |
603 | .get_modes = radeon_lvds_get_modes, | |
604 | .mode_valid = radeon_lvds_mode_valid, | |
605 | .best_encoder = radeon_best_single_encoder, | |
606 | }; | |
607 | ||
608 | struct drm_connector_funcs radeon_lvds_connector_funcs = { | |
609 | .dpms = drm_helper_connector_dpms, | |
610 | .detect = radeon_lvds_detect, | |
611 | .fill_modes = drm_helper_probe_single_connector_modes, | |
612 | .destroy = radeon_connector_destroy, | |
445282db | 613 | .set_property = radeon_lvds_set_property, |
771fe6b9 JG |
614 | }; |
615 | ||
616 | static int radeon_vga_get_modes(struct drm_connector *connector) | |
617 | { | |
618 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
619 | int ret; | |
620 | ||
621 | ret = radeon_ddc_get_modes(radeon_connector); | |
622 | ||
623 | return ret; | |
624 | } | |
625 | ||
626 | static int radeon_vga_mode_valid(struct drm_connector *connector, | |
627 | struct drm_display_mode *mode) | |
628 | { | |
a3fa6320 AD |
629 | /* XXX check mode bandwidth */ |
630 | /* XXX verify against max DAC output frequency */ | |
771fe6b9 JG |
631 | return MODE_OK; |
632 | } | |
633 | ||
7b334fcb | 634 | static enum drm_connector_status |
930a9e28 | 635 | radeon_vga_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 636 | { |
fafcf94e AD |
637 | struct drm_device *dev = connector->dev; |
638 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 JG |
639 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
640 | struct drm_encoder *encoder; | |
641 | struct drm_encoder_helper_funcs *encoder_funcs; | |
4b9d2a21 | 642 | bool dret = false; |
771fe6b9 JG |
643 | enum drm_connector_status ret = connector_status_disconnected; |
644 | ||
4ce001ab DA |
645 | encoder = radeon_best_single_encoder(connector); |
646 | if (!encoder) | |
647 | ret = connector_status_disconnected; | |
648 | ||
eb6b6d7c | 649 | if (radeon_connector->ddc_bus) |
4b9d2a21 | 650 | dret = radeon_ddc_probe(radeon_connector); |
0294cf4f AD |
651 | if (dret) { |
652 | if (radeon_connector->edid) { | |
653 | kfree(radeon_connector->edid); | |
654 | radeon_connector->edid = NULL; | |
655 | } | |
0294cf4f | 656 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
0294cf4f AD |
657 | |
658 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
659 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
660 | drm_get_connector_name(connector)); | |
661 | ret = connector_status_connected; | |
0294cf4f AD |
662 | } else { |
663 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
664 | ||
665 | /* some oems have boards with separate digital and analog connectors | |
666 | * with a shared ddc line (often vga + hdmi) | |
667 | */ | |
668 | if (radeon_connector->use_digital && radeon_connector->shared_ddc) { | |
669 | kfree(radeon_connector->edid); | |
670 | radeon_connector->edid = NULL; | |
671 | ret = connector_status_disconnected; | |
672 | } else | |
673 | ret = connector_status_connected; | |
674 | } | |
675 | } else { | |
c3cceedd DA |
676 | |
677 | /* if we aren't forcing don't do destructive polling */ | |
678 | if (!force) | |
679 | return connector->status; | |
680 | ||
d8a7f792 | 681 | if (radeon_connector->dac_load_detect && encoder) { |
445282db DA |
682 | encoder_funcs = encoder->helper_private; |
683 | ret = encoder_funcs->detect(encoder, connector); | |
684 | } | |
771fe6b9 JG |
685 | } |
686 | ||
4ce001ab DA |
687 | if (ret == connector_status_connected) |
688 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
fafcf94e AD |
689 | |
690 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the | |
691 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
692 | * by other means, assume the CRT is connected and use that EDID. | |
693 | */ | |
694 | if ((!rdev->is_atom_bios) && | |
695 | (ret == connector_status_disconnected) && | |
696 | rdev->mode_info.bios_hardcoded_edid_size) { | |
697 | ret = connector_status_connected; | |
698 | } | |
699 | ||
771fe6b9 JG |
700 | radeon_connector_update_scratch_regs(connector, ret); |
701 | return ret; | |
702 | } | |
703 | ||
704 | struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = { | |
705 | .get_modes = radeon_vga_get_modes, | |
706 | .mode_valid = radeon_vga_mode_valid, | |
707 | .best_encoder = radeon_best_single_encoder, | |
708 | }; | |
709 | ||
710 | struct drm_connector_funcs radeon_vga_connector_funcs = { | |
711 | .dpms = drm_helper_connector_dpms, | |
712 | .detect = radeon_vga_detect, | |
713 | .fill_modes = drm_helper_probe_single_connector_modes, | |
714 | .destroy = radeon_connector_destroy, | |
715 | .set_property = radeon_connector_set_property, | |
716 | }; | |
717 | ||
4ce001ab DA |
718 | static int radeon_tv_get_modes(struct drm_connector *connector) |
719 | { | |
720 | struct drm_device *dev = connector->dev; | |
923f6848 | 721 | struct radeon_device *rdev = dev->dev_private; |
4ce001ab | 722 | struct drm_display_mode *tv_mode; |
923f6848 | 723 | struct drm_encoder *encoder; |
4ce001ab | 724 | |
923f6848 AD |
725 | encoder = radeon_best_single_encoder(connector); |
726 | if (!encoder) | |
727 | return 0; | |
4ce001ab | 728 | |
923f6848 AD |
729 | /* avivo chips can scale any mode */ |
730 | if (rdev->family >= CHIP_RS600) | |
731 | /* add scaled modes */ | |
732 | radeon_add_common_modes(encoder, connector); | |
733 | else { | |
734 | /* only 800x600 is supported right now on pre-avivo chips */ | |
d50ba256 | 735 | tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false); |
923f6848 AD |
736 | tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; |
737 | drm_mode_probed_add(connector, tv_mode); | |
738 | } | |
4ce001ab DA |
739 | return 1; |
740 | } | |
741 | ||
742 | static int radeon_tv_mode_valid(struct drm_connector *connector, | |
743 | struct drm_display_mode *mode) | |
744 | { | |
a3fa6320 AD |
745 | if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) |
746 | return MODE_CLOCK_RANGE; | |
4ce001ab DA |
747 | return MODE_OK; |
748 | } | |
749 | ||
7b334fcb | 750 | static enum drm_connector_status |
930a9e28 | 751 | radeon_tv_detect(struct drm_connector *connector, bool force) |
4ce001ab DA |
752 | { |
753 | struct drm_encoder *encoder; | |
754 | struct drm_encoder_helper_funcs *encoder_funcs; | |
445282db DA |
755 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
756 | enum drm_connector_status ret = connector_status_disconnected; | |
757 | ||
758 | if (!radeon_connector->dac_load_detect) | |
759 | return ret; | |
4ce001ab DA |
760 | |
761 | encoder = radeon_best_single_encoder(connector); | |
762 | if (!encoder) | |
763 | ret = connector_status_disconnected; | |
764 | else { | |
765 | encoder_funcs = encoder->helper_private; | |
766 | ret = encoder_funcs->detect(encoder, connector); | |
767 | } | |
768 | if (ret == connector_status_connected) | |
769 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false); | |
770 | radeon_connector_update_scratch_regs(connector, ret); | |
771 | return ret; | |
772 | } | |
773 | ||
774 | struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = { | |
775 | .get_modes = radeon_tv_get_modes, | |
776 | .mode_valid = radeon_tv_mode_valid, | |
777 | .best_encoder = radeon_best_single_encoder, | |
778 | }; | |
779 | ||
780 | struct drm_connector_funcs radeon_tv_connector_funcs = { | |
781 | .dpms = drm_helper_connector_dpms, | |
782 | .detect = radeon_tv_detect, | |
783 | .fill_modes = drm_helper_probe_single_connector_modes, | |
784 | .destroy = radeon_connector_destroy, | |
785 | .set_property = radeon_connector_set_property, | |
786 | }; | |
787 | ||
771fe6b9 JG |
788 | static int radeon_dvi_get_modes(struct drm_connector *connector) |
789 | { | |
790 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
791 | int ret; | |
792 | ||
793 | ret = radeon_ddc_get_modes(radeon_connector); | |
771fe6b9 JG |
794 | return ret; |
795 | } | |
796 | ||
4ce001ab DA |
797 | /* |
798 | * DVI is complicated | |
799 | * Do a DDC probe, if DDC probe passes, get the full EDID so | |
800 | * we can do analog/digital monitor detection at this point. | |
801 | * If the monitor is an analog monitor or we got no DDC, | |
802 | * we need to find the DAC encoder object for this connector. | |
803 | * If we got no DDC, we do load detection on the DAC encoder object. | |
804 | * If we got analog DDC or load detection passes on the DAC encoder | |
805 | * we have to check if this analog encoder is shared with anyone else (TV) | |
806 | * if its shared we have to set the other connector to disconnected. | |
807 | */ | |
7b334fcb | 808 | static enum drm_connector_status |
930a9e28 | 809 | radeon_dvi_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 810 | { |
fafcf94e AD |
811 | struct drm_device *dev = connector->dev; |
812 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 | 813 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
4ce001ab | 814 | struct drm_encoder *encoder = NULL; |
771fe6b9 JG |
815 | struct drm_encoder_helper_funcs *encoder_funcs; |
816 | struct drm_mode_object *obj; | |
817 | int i; | |
818 | enum drm_connector_status ret = connector_status_disconnected; | |
4b9d2a21 | 819 | bool dret = false; |
771fe6b9 | 820 | |
eb6b6d7c | 821 | if (radeon_connector->ddc_bus) |
4b9d2a21 | 822 | dret = radeon_ddc_probe(radeon_connector); |
4ce001ab | 823 | if (dret) { |
0294cf4f AD |
824 | if (radeon_connector->edid) { |
825 | kfree(radeon_connector->edid); | |
826 | radeon_connector->edid = NULL; | |
827 | } | |
4ce001ab | 828 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
4ce001ab DA |
829 | |
830 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
831 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
832 | drm_get_connector_name(connector)); | |
4ce001ab DA |
833 | } else { |
834 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
835 | ||
0294cf4f AD |
836 | /* some oems have boards with separate digital and analog connectors |
837 | * with a shared ddc line (often vga + hdmi) | |
838 | */ | |
839 | if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) { | |
840 | kfree(radeon_connector->edid); | |
841 | radeon_connector->edid = NULL; | |
842 | ret = connector_status_disconnected; | |
843 | } else | |
844 | ret = connector_status_connected; | |
71407c46 | 845 | |
42f14c4b AD |
846 | /* This gets complicated. We have boards with VGA + HDMI with a |
847 | * shared DDC line and we have boards with DVI-D + HDMI with a shared | |
848 | * DDC line. The latter is more complex because with DVI<->HDMI adapters | |
849 | * you don't really know what's connected to which port as both are digital. | |
71407c46 | 850 | */ |
d3932d6c | 851 | if (radeon_connector->shared_ddc && (ret == connector_status_connected)) { |
71407c46 AD |
852 | struct drm_connector *list_connector; |
853 | struct radeon_connector *list_radeon_connector; | |
854 | list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) { | |
855 | if (connector == list_connector) | |
856 | continue; | |
857 | list_radeon_connector = to_radeon_connector(list_connector); | |
b2ea4aa6 AD |
858 | if (list_radeon_connector->shared_ddc && |
859 | (list_radeon_connector->ddc_bus->rec.i2c_id == | |
860 | radeon_connector->ddc_bus->rec.i2c_id)) { | |
42f14c4b AD |
861 | /* cases where both connectors are digital */ |
862 | if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) { | |
863 | /* hpd is our only option in this case */ | |
864 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { | |
71407c46 AD |
865 | kfree(radeon_connector->edid); |
866 | radeon_connector->edid = NULL; | |
867 | ret = connector_status_disconnected; | |
868 | } | |
869 | } | |
870 | } | |
871 | } | |
872 | } | |
4ce001ab DA |
873 | } |
874 | } | |
875 | ||
876 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == true)) | |
877 | goto out; | |
878 | ||
c3cceedd DA |
879 | if (!force) { |
880 | ret = connector->status; | |
881 | goto out; | |
882 | } | |
883 | ||
4ce001ab | 884 | /* find analog encoder */ |
445282db DA |
885 | if (radeon_connector->dac_load_detect) { |
886 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
887 | if (connector->encoder_ids[i] == 0) | |
888 | break; | |
771fe6b9 | 889 | |
445282db DA |
890 | obj = drm_mode_object_find(connector->dev, |
891 | connector->encoder_ids[i], | |
892 | DRM_MODE_OBJECT_ENCODER); | |
893 | if (!obj) | |
894 | continue; | |
771fe6b9 | 895 | |
445282db | 896 | encoder = obj_to_encoder(obj); |
771fe6b9 | 897 | |
445282db DA |
898 | encoder_funcs = encoder->helper_private; |
899 | if (encoder_funcs->detect) { | |
900 | if (ret != connector_status_connected) { | |
901 | ret = encoder_funcs->detect(encoder, connector); | |
902 | if (ret == connector_status_connected) { | |
903 | radeon_connector->use_digital = false; | |
904 | } | |
771fe6b9 | 905 | } |
445282db | 906 | break; |
771fe6b9 JG |
907 | } |
908 | } | |
909 | } | |
910 | ||
4ce001ab DA |
911 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) && |
912 | encoder) { | |
913 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
914 | } | |
915 | ||
fafcf94e AD |
916 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the |
917 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
918 | * by other means, assume the DFP is connected and use that EDID. In most | |
919 | * cases the DVI port is actually a virtual KVM port connected to the service | |
920 | * processor. | |
921 | */ | |
922 | if ((!rdev->is_atom_bios) && | |
923 | (ret == connector_status_disconnected) && | |
924 | rdev->mode_info.bios_hardcoded_edid_size) { | |
925 | radeon_connector->use_digital = true; | |
926 | ret = connector_status_connected; | |
927 | } | |
928 | ||
4ce001ab | 929 | out: |
771fe6b9 JG |
930 | /* updated in get modes as well since we need to know if it's analog or digital */ |
931 | radeon_connector_update_scratch_regs(connector, ret); | |
932 | return ret; | |
933 | } | |
934 | ||
935 | /* okay need to be smart in here about which encoder to pick */ | |
936 | struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector) | |
937 | { | |
938 | int enc_id = connector->encoder_ids[0]; | |
939 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
940 | struct drm_mode_object *obj; | |
941 | struct drm_encoder *encoder; | |
942 | int i; | |
943 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
944 | if (connector->encoder_ids[i] == 0) | |
945 | break; | |
946 | ||
947 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
948 | if (!obj) | |
949 | continue; | |
950 | ||
951 | encoder = obj_to_encoder(obj); | |
952 | ||
4ce001ab | 953 | if (radeon_connector->use_digital == true) { |
771fe6b9 JG |
954 | if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) |
955 | return encoder; | |
956 | } else { | |
957 | if (encoder->encoder_type == DRM_MODE_ENCODER_DAC || | |
958 | encoder->encoder_type == DRM_MODE_ENCODER_TVDAC) | |
959 | return encoder; | |
960 | } | |
961 | } | |
962 | ||
963 | /* see if we have a default encoder TODO */ | |
964 | ||
965 | /* then check use digitial */ | |
966 | /* pick the first one */ | |
967 | if (enc_id) { | |
968 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
969 | if (!obj) | |
970 | return NULL; | |
971 | encoder = obj_to_encoder(obj); | |
972 | return encoder; | |
973 | } | |
974 | return NULL; | |
975 | } | |
976 | ||
d50ba256 DA |
977 | static void radeon_dvi_force(struct drm_connector *connector) |
978 | { | |
979 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
980 | if (connector->force == DRM_FORCE_ON) | |
981 | radeon_connector->use_digital = false; | |
982 | if (connector->force == DRM_FORCE_ON_DIGITAL) | |
983 | radeon_connector->use_digital = true; | |
984 | } | |
985 | ||
a3fa6320 AD |
986 | static int radeon_dvi_mode_valid(struct drm_connector *connector, |
987 | struct drm_display_mode *mode) | |
988 | { | |
1b24203e AD |
989 | struct drm_device *dev = connector->dev; |
990 | struct radeon_device *rdev = dev->dev_private; | |
a3fa6320 AD |
991 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
992 | ||
993 | /* XXX check mode bandwidth */ | |
994 | ||
1b24203e AD |
995 | /* clocks over 135 MHz have heat issues with DVI on RV100 */ |
996 | if (radeon_connector->use_digital && | |
997 | (rdev->family == CHIP_RV100) && | |
998 | (mode->clock > 135000)) | |
999 | return MODE_CLOCK_HIGH; | |
1000 | ||
a3fa6320 AD |
1001 | if (radeon_connector->use_digital && (mode->clock > 165000)) { |
1002 | if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || | |
1003 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || | |
1004 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) | |
1005 | return MODE_OK; | |
e1e84017 AD |
1006 | else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) { |
1007 | if (ASIC_IS_DCE3(rdev)) { | |
1008 | /* HDMI 1.3+ supports max clock of 340 Mhz */ | |
1009 | if (mode->clock > 340000) | |
1010 | return MODE_CLOCK_HIGH; | |
1011 | else | |
1012 | return MODE_OK; | |
1013 | } else | |
1014 | return MODE_CLOCK_HIGH; | |
1015 | } else | |
a3fa6320 AD |
1016 | return MODE_CLOCK_HIGH; |
1017 | } | |
1018 | return MODE_OK; | |
1019 | } | |
1020 | ||
771fe6b9 JG |
1021 | struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { |
1022 | .get_modes = radeon_dvi_get_modes, | |
a3fa6320 | 1023 | .mode_valid = radeon_dvi_mode_valid, |
771fe6b9 JG |
1024 | .best_encoder = radeon_dvi_encoder, |
1025 | }; | |
1026 | ||
1027 | struct drm_connector_funcs radeon_dvi_connector_funcs = { | |
1028 | .dpms = drm_helper_connector_dpms, | |
1029 | .detect = radeon_dvi_detect, | |
1030 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1031 | .set_property = radeon_connector_set_property, | |
1032 | .destroy = radeon_connector_destroy, | |
d50ba256 | 1033 | .force = radeon_dvi_force, |
771fe6b9 JG |
1034 | }; |
1035 | ||
ffd09c64 AD |
1036 | static void radeon_dp_connector_destroy(struct drm_connector *connector) |
1037 | { | |
1038 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1039 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1040 | ||
ffd09c64 AD |
1041 | if (radeon_connector->edid) |
1042 | kfree(radeon_connector->edid); | |
1043 | if (radeon_dig_connector->dp_i2c_bus) | |
ac1aade6 | 1044 | radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus); |
ffd09c64 AD |
1045 | kfree(radeon_connector->con_priv); |
1046 | drm_sysfs_connector_remove(connector); | |
1047 | drm_connector_cleanup(connector); | |
1048 | kfree(connector); | |
1049 | } | |
1050 | ||
746c1aa4 DA |
1051 | static int radeon_dp_get_modes(struct drm_connector *connector) |
1052 | { | |
1053 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
8b834852 | 1054 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
746c1aa4 DA |
1055 | int ret; |
1056 | ||
8b834852 AD |
1057 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
1058 | if (!radeon_dig_connector->edp_on) | |
1059 | atombios_set_edp_panel_power(connector, | |
1060 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
1061 | } | |
746c1aa4 | 1062 | ret = radeon_ddc_get_modes(radeon_connector); |
8b834852 AD |
1063 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
1064 | if (!radeon_dig_connector->edp_on) | |
1065 | atombios_set_edp_panel_power(connector, | |
1066 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
1067 | } | |
1068 | ||
746c1aa4 DA |
1069 | return ret; |
1070 | } | |
1071 | ||
d7fa8bb3 AD |
1072 | bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector) |
1073 | { | |
1074 | struct drm_mode_object *obj; | |
1075 | struct drm_encoder *encoder; | |
1076 | struct radeon_encoder *radeon_encoder; | |
1077 | int i; | |
1078 | bool found = false; | |
1079 | ||
1080 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1081 | if (connector->encoder_ids[i] == 0) | |
1082 | break; | |
1083 | ||
1084 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1085 | if (!obj) | |
1086 | continue; | |
1087 | ||
1088 | encoder = obj_to_encoder(obj); | |
1089 | radeon_encoder = to_radeon_encoder(encoder); | |
1090 | ||
1091 | switch (radeon_encoder->encoder_id) { | |
1092 | case ENCODER_OBJECT_ID_TRAVIS: | |
1093 | case ENCODER_OBJECT_ID_NUTMEG: | |
1094 | found = true; | |
1095 | break; | |
1096 | default: | |
1097 | break; | |
1098 | } | |
1099 | } | |
1100 | ||
1101 | return found; | |
1102 | } | |
1103 | ||
1104 | bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector) | |
1105 | { | |
1106 | struct drm_mode_object *obj; | |
1107 | struct drm_encoder *encoder; | |
1108 | struct radeon_encoder *radeon_encoder; | |
1109 | int i; | |
1110 | bool found = false; | |
1111 | ||
1112 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1113 | if (connector->encoder_ids[i] == 0) | |
1114 | break; | |
1115 | ||
1116 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1117 | if (!obj) | |
1118 | continue; | |
1119 | ||
1120 | encoder = obj_to_encoder(obj); | |
1121 | radeon_encoder = to_radeon_encoder(encoder); | |
1122 | if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2) | |
1123 | found = true; | |
1124 | } | |
1125 | ||
1126 | return found; | |
1127 | } | |
1128 | ||
1129 | bool radeon_connector_is_dp12_capable(struct drm_connector *connector) | |
1130 | { | |
1131 | struct drm_device *dev = connector->dev; | |
1132 | struct radeon_device *rdev = dev->dev_private; | |
1133 | ||
1134 | if (ASIC_IS_DCE5(rdev) && | |
1135 | (rdev->clock.dp_extclk >= 53900) && | |
1136 | radeon_connector_encoder_is_hbr2(connector)) { | |
1137 | return true; | |
1138 | } | |
1139 | ||
1140 | return false; | |
1141 | } | |
1142 | ||
7b334fcb | 1143 | static enum drm_connector_status |
930a9e28 | 1144 | radeon_dp_detect(struct drm_connector *connector, bool force) |
746c1aa4 | 1145 | { |
f8d0edde AD |
1146 | struct drm_device *dev = connector->dev; |
1147 | struct radeon_device *rdev = dev->dev_private; | |
746c1aa4 | 1148 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
746c1aa4 | 1149 | enum drm_connector_status ret = connector_status_disconnected; |
4143e919 | 1150 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
746c1aa4 DA |
1151 | |
1152 | if (radeon_connector->edid) { | |
1153 | kfree(radeon_connector->edid); | |
1154 | radeon_connector->edid = NULL; | |
1155 | } | |
1156 | ||
6f50eae7 AD |
1157 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
1158 | /* eDP is always DP */ | |
1159 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
8b834852 AD |
1160 | if (!radeon_dig_connector->edp_on) |
1161 | atombios_set_edp_panel_power(connector, | |
1162 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
6f50eae7 | 1163 | if (radeon_dp_getdpcd(radeon_connector)) |
9fa05c98 | 1164 | ret = connector_status_connected; |
8b834852 AD |
1165 | if (!radeon_dig_connector->edp_on) |
1166 | atombios_set_edp_panel_power(connector, | |
1167 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
4143e919 | 1168 | } else { |
6f50eae7 | 1169 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
f8d0edde AD |
1170 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { |
1171 | ret = connector_status_connected; | |
1172 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) | |
1173 | radeon_dp_getdpcd(radeon_connector); | |
6f50eae7 | 1174 | } else { |
f8d0edde AD |
1175 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { |
1176 | if (radeon_dp_getdpcd(radeon_connector)) | |
1177 | ret = connector_status_connected; | |
1178 | } else { | |
1179 | if (radeon_ddc_probe(radeon_connector)) | |
1180 | ret = connector_status_connected; | |
1181 | } | |
4143e919 | 1182 | } |
746c1aa4 | 1183 | } |
4143e919 | 1184 | |
30f44372 | 1185 | radeon_connector_update_scratch_regs(connector, ret); |
746c1aa4 DA |
1186 | return ret; |
1187 | } | |
1188 | ||
5801ead6 AD |
1189 | static int radeon_dp_mode_valid(struct drm_connector *connector, |
1190 | struct drm_display_mode *mode) | |
1191 | { | |
1192 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1193 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1194 | ||
1195 | /* XXX check mode bandwidth */ | |
1196 | ||
196c58d2 AD |
1197 | if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || |
1198 | (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) | |
224d94b1 | 1199 | return radeon_dp_mode_valid_helper(connector, mode); |
5801ead6 AD |
1200 | else |
1201 | return MODE_OK; | |
1202 | } | |
1203 | ||
746c1aa4 DA |
1204 | struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = { |
1205 | .get_modes = radeon_dp_get_modes, | |
5801ead6 | 1206 | .mode_valid = radeon_dp_mode_valid, |
746c1aa4 DA |
1207 | .best_encoder = radeon_dvi_encoder, |
1208 | }; | |
1209 | ||
1210 | struct drm_connector_funcs radeon_dp_connector_funcs = { | |
1211 | .dpms = drm_helper_connector_dpms, | |
1212 | .detect = radeon_dp_detect, | |
1213 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1214 | .set_property = radeon_connector_set_property, | |
ffd09c64 | 1215 | .destroy = radeon_dp_connector_destroy, |
746c1aa4 DA |
1216 | .force = radeon_dvi_force, |
1217 | }; | |
1218 | ||
771fe6b9 JG |
1219 | void |
1220 | radeon_add_atom_connector(struct drm_device *dev, | |
1221 | uint32_t connector_id, | |
1222 | uint32_t supported_device, | |
1223 | int connector_type, | |
1224 | struct radeon_i2c_bus_rec *i2c_bus, | |
b75fad06 | 1225 | uint32_t igp_lane_info, |
eed45b30 | 1226 | uint16_t connector_object_id, |
26b5bc98 AD |
1227 | struct radeon_hpd *hpd, |
1228 | struct radeon_router *router) | |
771fe6b9 | 1229 | { |
445282db | 1230 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1231 | struct drm_connector *connector; |
1232 | struct radeon_connector *radeon_connector; | |
1233 | struct radeon_connector_atom_dig *radeon_dig_connector; | |
eac4dff6 AD |
1234 | struct drm_encoder *encoder; |
1235 | struct radeon_encoder *radeon_encoder; | |
771fe6b9 | 1236 | uint32_t subpixel_order = SubPixelNone; |
0294cf4f | 1237 | bool shared_ddc = false; |
eac4dff6 | 1238 | bool is_dp_bridge = false; |
771fe6b9 | 1239 | |
4ce001ab | 1240 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1241 | return; |
1242 | ||
cf4c12f9 AD |
1243 | /* if the user selected tv=0 don't try and add the connector */ |
1244 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1245 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1246 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1247 | (radeon_tv == 0)) | |
1248 | return; | |
1249 | ||
771fe6b9 JG |
1250 | /* see if we already added it */ |
1251 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1252 | radeon_connector = to_radeon_connector(connector); | |
1253 | if (radeon_connector->connector_id == connector_id) { | |
1254 | radeon_connector->devices |= supported_device; | |
1255 | return; | |
1256 | } | |
0294cf4f | 1257 | if (radeon_connector->ddc_bus && i2c_bus->valid) { |
d3932d6c | 1258 | if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) { |
0294cf4f AD |
1259 | radeon_connector->shared_ddc = true; |
1260 | shared_ddc = true; | |
1261 | } | |
fb939dfc | 1262 | if (radeon_connector->router_bus && router->ddc_valid && |
26b5bc98 AD |
1263 | (radeon_connector->router.router_id == router->router_id)) { |
1264 | radeon_connector->shared_ddc = false; | |
1265 | shared_ddc = false; | |
1266 | } | |
0294cf4f | 1267 | } |
771fe6b9 JG |
1268 | } |
1269 | ||
eac4dff6 AD |
1270 | /* check if it's a dp bridge */ |
1271 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | |
1272 | radeon_encoder = to_radeon_encoder(encoder); | |
1273 | if (radeon_encoder->devices & supported_device) { | |
1274 | switch (radeon_encoder->encoder_id) { | |
1275 | case ENCODER_OBJECT_ID_TRAVIS: | |
1276 | case ENCODER_OBJECT_ID_NUTMEG: | |
1277 | is_dp_bridge = true; | |
1278 | break; | |
1279 | default: | |
1280 | break; | |
1281 | } | |
1282 | } | |
1283 | } | |
1284 | ||
771fe6b9 JG |
1285 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); |
1286 | if (!radeon_connector) | |
1287 | return; | |
1288 | ||
1289 | connector = &radeon_connector->base; | |
1290 | ||
1291 | radeon_connector->connector_id = connector_id; | |
1292 | radeon_connector->devices = supported_device; | |
0294cf4f | 1293 | radeon_connector->shared_ddc = shared_ddc; |
b75fad06 | 1294 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1295 | radeon_connector->hpd = *hpd; |
26b5bc98 | 1296 | radeon_connector->router = *router; |
fb939dfc | 1297 | if (router->ddc_valid || router->cd_valid) { |
26b5bc98 AD |
1298 | radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info); |
1299 | if (!radeon_connector->router_bus) | |
a70882aa | 1300 | DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n"); |
26b5bc98 | 1301 | } |
eac4dff6 AD |
1302 | |
1303 | if (is_dp_bridge) { | |
771fe6b9 JG |
1304 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); |
1305 | if (!radeon_dig_connector) | |
1306 | goto failed; | |
771fe6b9 JG |
1307 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1308 | radeon_connector->con_priv = radeon_dig_connector; | |
eac4dff6 AD |
1309 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); |
1310 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
771fe6b9 | 1311 | if (i2c_bus->valid) { |
eac4dff6 AD |
1312 | /* add DP i2c bus */ |
1313 | if (connector_type == DRM_MODE_CONNECTOR_eDP) | |
1314 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1315 | else | |
1316 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1317 | if (!radeon_dig_connector->dp_i2c_bus) | |
1318 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
f376b94f | 1319 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1320 | if (!radeon_connector->ddc_bus) |
eac4dff6 | 1321 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1322 | } |
eac4dff6 AD |
1323 | switch (connector_type) { |
1324 | case DRM_MODE_CONNECTOR_VGA: | |
1325 | case DRM_MODE_CONNECTOR_DVIA: | |
1326 | default: | |
1327 | connector->interlace_allowed = true; | |
1328 | connector->doublescan_allowed = true; | |
1329 | break; | |
1330 | case DRM_MODE_CONNECTOR_DVII: | |
1331 | case DRM_MODE_CONNECTOR_DVID: | |
1332 | case DRM_MODE_CONNECTOR_HDMIA: | |
1333 | case DRM_MODE_CONNECTOR_HDMIB: | |
1334 | case DRM_MODE_CONNECTOR_DisplayPort: | |
430f70d5 AD |
1335 | drm_connector_attach_property(&radeon_connector->base, |
1336 | rdev->mode_info.underscan_property, | |
56bec7c0 | 1337 | UNDERSCAN_OFF); |
5bccf5e3 MG |
1338 | drm_connector_attach_property(&radeon_connector->base, |
1339 | rdev->mode_info.underscan_hborder_property, | |
1340 | 0); | |
1341 | drm_connector_attach_property(&radeon_connector->base, | |
1342 | rdev->mode_info.underscan_vborder_property, | |
1343 | 0); | |
eac4dff6 AD |
1344 | subpixel_order = SubPixelHorizontalRGB; |
1345 | connector->interlace_allowed = true; | |
1346 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1347 | connector->doublescan_allowed = true; | |
1348 | else | |
1349 | connector->doublescan_allowed = false; | |
1350 | break; | |
1351 | case DRM_MODE_CONNECTOR_LVDS: | |
1352 | case DRM_MODE_CONNECTOR_eDP: | |
1353 | drm_connector_attach_property(&radeon_connector->base, | |
1354 | dev->mode_config.scaling_mode_property, | |
1355 | DRM_MODE_SCALE_FULLSCREEN); | |
1356 | subpixel_order = SubPixelHorizontalRGB; | |
1357 | connector->interlace_allowed = false; | |
1358 | connector->doublescan_allowed = false; | |
1359 | break; | |
5bccf5e3 | 1360 | } |
eac4dff6 AD |
1361 | } else { |
1362 | switch (connector_type) { | |
1363 | case DRM_MODE_CONNECTOR_VGA: | |
1364 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1365 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1366 | if (i2c_bus->valid) { | |
1367 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1368 | if (!radeon_connector->ddc_bus) | |
1369 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1370 | } | |
390d0bbe AD |
1371 | radeon_connector->dac_load_detect = true; |
1372 | drm_connector_attach_property(&radeon_connector->base, | |
1373 | rdev->mode_info.load_detect_property, | |
1374 | 1); | |
eac4dff6 AD |
1375 | /* no HPD on analog connectors */ |
1376 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1377 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1378 | connector->interlace_allowed = true; | |
c49948f4 | 1379 | connector->doublescan_allowed = true; |
eac4dff6 AD |
1380 | break; |
1381 | case DRM_MODE_CONNECTOR_DVIA: | |
1382 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1383 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1384 | if (i2c_bus->valid) { | |
1385 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1386 | if (!radeon_connector->ddc_bus) | |
1387 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1388 | } | |
1389 | radeon_connector->dac_load_detect = true; | |
430f70d5 | 1390 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1391 | rdev->mode_info.load_detect_property, |
1392 | 1); | |
1393 | /* no HPD on analog connectors */ | |
1394 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1395 | connector->interlace_allowed = true; | |
1396 | connector->doublescan_allowed = true; | |
1397 | break; | |
1398 | case DRM_MODE_CONNECTOR_DVII: | |
1399 | case DRM_MODE_CONNECTOR_DVID: | |
1400 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1401 | if (!radeon_dig_connector) | |
1402 | goto failed; | |
1403 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1404 | radeon_connector->con_priv = radeon_dig_connector; | |
1405 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1406 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1407 | if (i2c_bus->valid) { | |
1408 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1409 | if (!radeon_connector->ddc_bus) | |
1410 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1411 | } | |
1412 | subpixel_order = SubPixelHorizontalRGB; | |
5bccf5e3 | 1413 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1414 | rdev->mode_info.coherent_mode_property, |
1415 | 1); | |
1416 | if (ASIC_IS_AVIVO(rdev)) { | |
1417 | drm_connector_attach_property(&radeon_connector->base, | |
1418 | rdev->mode_info.underscan_property, | |
1419 | UNDERSCAN_OFF); | |
1420 | drm_connector_attach_property(&radeon_connector->base, | |
1421 | rdev->mode_info.underscan_hborder_property, | |
1422 | 0); | |
1423 | drm_connector_attach_property(&radeon_connector->base, | |
1424 | rdev->mode_info.underscan_vborder_property, | |
1425 | 0); | |
1426 | } | |
1427 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
1428 | radeon_connector->dac_load_detect = true; | |
1429 | drm_connector_attach_property(&radeon_connector->base, | |
1430 | rdev->mode_info.load_detect_property, | |
1431 | 1); | |
1432 | } | |
1433 | connector->interlace_allowed = true; | |
1434 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
1435 | connector->doublescan_allowed = true; | |
1436 | else | |
1437 | connector->doublescan_allowed = false; | |
1438 | break; | |
1439 | case DRM_MODE_CONNECTOR_HDMIA: | |
1440 | case DRM_MODE_CONNECTOR_HDMIB: | |
1441 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1442 | if (!radeon_dig_connector) | |
1443 | goto failed; | |
1444 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1445 | radeon_connector->con_priv = radeon_dig_connector; | |
1446 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1447 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1448 | if (i2c_bus->valid) { | |
1449 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1450 | if (!radeon_connector->ddc_bus) | |
1451 | DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1452 | } | |
5bccf5e3 | 1453 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1454 | rdev->mode_info.coherent_mode_property, |
1455 | 1); | |
1456 | if (ASIC_IS_AVIVO(rdev)) { | |
1457 | drm_connector_attach_property(&radeon_connector->base, | |
1458 | rdev->mode_info.underscan_property, | |
1459 | UNDERSCAN_OFF); | |
1460 | drm_connector_attach_property(&radeon_connector->base, | |
1461 | rdev->mode_info.underscan_hborder_property, | |
1462 | 0); | |
1463 | drm_connector_attach_property(&radeon_connector->base, | |
1464 | rdev->mode_info.underscan_vborder_property, | |
1465 | 0); | |
1466 | } | |
1467 | subpixel_order = SubPixelHorizontalRGB; | |
1468 | connector->interlace_allowed = true; | |
1469 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1470 | connector->doublescan_allowed = true; | |
1471 | else | |
1472 | connector->doublescan_allowed = false; | |
1473 | break; | |
1474 | case DRM_MODE_CONNECTOR_DisplayPort: | |
1475 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1476 | if (!radeon_dig_connector) | |
1477 | goto failed; | |
1478 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1479 | radeon_connector->con_priv = radeon_dig_connector; | |
1480 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | |
1481 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
1482 | if (i2c_bus->valid) { | |
1483 | /* add DP i2c bus */ | |
1484 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1485 | if (!radeon_dig_connector->dp_i2c_bus) | |
1486 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1487 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1488 | if (!radeon_connector->ddc_bus) | |
1489 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1490 | } | |
1491 | subpixel_order = SubPixelHorizontalRGB; | |
1492 | drm_connector_attach_property(&radeon_connector->base, | |
1493 | rdev->mode_info.coherent_mode_property, | |
1494 | 1); | |
1495 | if (ASIC_IS_AVIVO(rdev)) { | |
1496 | drm_connector_attach_property(&radeon_connector->base, | |
1497 | rdev->mode_info.underscan_property, | |
1498 | UNDERSCAN_OFF); | |
1499 | drm_connector_attach_property(&radeon_connector->base, | |
1500 | rdev->mode_info.underscan_hborder_property, | |
1501 | 0); | |
1502 | drm_connector_attach_property(&radeon_connector->base, | |
1503 | rdev->mode_info.underscan_vborder_property, | |
1504 | 0); | |
1505 | } | |
1506 | connector->interlace_allowed = true; | |
1507 | /* in theory with a DP to VGA converter... */ | |
c49948f4 | 1508 | connector->doublescan_allowed = false; |
eac4dff6 AD |
1509 | break; |
1510 | case DRM_MODE_CONNECTOR_eDP: | |
1511 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1512 | if (!radeon_dig_connector) | |
1513 | goto failed; | |
1514 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1515 | radeon_connector->con_priv = radeon_dig_connector; | |
1516 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | |
1517 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
1518 | if (i2c_bus->valid) { | |
1519 | /* add DP i2c bus */ | |
1520 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1521 | if (!radeon_dig_connector->dp_i2c_bus) | |
1522 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1523 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1524 | if (!radeon_connector->ddc_bus) | |
1525 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1526 | } | |
430f70d5 | 1527 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1528 | dev->mode_config.scaling_mode_property, |
1529 | DRM_MODE_SCALE_FULLSCREEN); | |
1530 | subpixel_order = SubPixelHorizontalRGB; | |
1531 | connector->interlace_allowed = false; | |
1532 | connector->doublescan_allowed = false; | |
1533 | break; | |
1534 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1535 | case DRM_MODE_CONNECTOR_Composite: | |
1536 | case DRM_MODE_CONNECTOR_9PinDIN: | |
1537 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); | |
1538 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1539 | radeon_connector->dac_load_detect = true; | |
5bccf5e3 | 1540 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1541 | rdev->mode_info.load_detect_property, |
1542 | 1); | |
5bccf5e3 | 1543 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1544 | rdev->mode_info.tv_std_property, |
1545 | radeon_atombios_get_tv_info(rdev)); | |
1546 | /* no HPD on analog connectors */ | |
1547 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1548 | connector->interlace_allowed = false; | |
1549 | connector->doublescan_allowed = false; | |
1550 | break; | |
1551 | case DRM_MODE_CONNECTOR_LVDS: | |
1552 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1553 | if (!radeon_dig_connector) | |
1554 | goto failed; | |
1555 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1556 | radeon_connector->con_priv = radeon_dig_connector; | |
1557 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
1558 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); | |
1559 | if (i2c_bus->valid) { | |
1560 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1561 | if (!radeon_connector->ddc_bus) | |
1562 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1563 | } | |
1564 | drm_connector_attach_property(&radeon_connector->base, | |
1565 | dev->mode_config.scaling_mode_property, | |
1566 | DRM_MODE_SCALE_FULLSCREEN); | |
1567 | subpixel_order = SubPixelHorizontalRGB; | |
1568 | connector->interlace_allowed = false; | |
1569 | connector->doublescan_allowed = false; | |
1570 | break; | |
771fe6b9 | 1571 | } |
771fe6b9 JG |
1572 | } |
1573 | ||
2581afcc | 1574 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1575 | if (i2c_bus->valid) |
1576 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1577 | } else | |
1578 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
1579 | ||
771fe6b9 JG |
1580 | connector->display_info.subpixel_order = subpixel_order; |
1581 | drm_sysfs_connector_add(connector); | |
1582 | return; | |
1583 | ||
1584 | failed: | |
771fe6b9 JG |
1585 | drm_connector_cleanup(connector); |
1586 | kfree(connector); | |
1587 | } | |
1588 | ||
1589 | void | |
1590 | radeon_add_legacy_connector(struct drm_device *dev, | |
1591 | uint32_t connector_id, | |
1592 | uint32_t supported_device, | |
1593 | int connector_type, | |
b75fad06 | 1594 | struct radeon_i2c_bus_rec *i2c_bus, |
eed45b30 AD |
1595 | uint16_t connector_object_id, |
1596 | struct radeon_hpd *hpd) | |
771fe6b9 | 1597 | { |
445282db | 1598 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1599 | struct drm_connector *connector; |
1600 | struct radeon_connector *radeon_connector; | |
1601 | uint32_t subpixel_order = SubPixelNone; | |
1602 | ||
4ce001ab | 1603 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1604 | return; |
1605 | ||
cf4c12f9 AD |
1606 | /* if the user selected tv=0 don't try and add the connector */ |
1607 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1608 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1609 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1610 | (radeon_tv == 0)) | |
1611 | return; | |
1612 | ||
771fe6b9 JG |
1613 | /* see if we already added it */ |
1614 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1615 | radeon_connector = to_radeon_connector(connector); | |
1616 | if (radeon_connector->connector_id == connector_id) { | |
1617 | radeon_connector->devices |= supported_device; | |
1618 | return; | |
1619 | } | |
1620 | } | |
1621 | ||
1622 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); | |
1623 | if (!radeon_connector) | |
1624 | return; | |
1625 | ||
1626 | connector = &radeon_connector->base; | |
1627 | ||
1628 | radeon_connector->connector_id = connector_id; | |
1629 | radeon_connector->devices = supported_device; | |
b75fad06 | 1630 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1631 | radeon_connector->hpd = *hpd; |
771fe6b9 JG |
1632 | switch (connector_type) { |
1633 | case DRM_MODE_CONNECTOR_VGA: | |
1634 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1635 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1636 | if (i2c_bus->valid) { |
f376b94f | 1637 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1638 | if (!radeon_connector->ddc_bus) |
a70882aa | 1639 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1640 | } |
35e4b7af | 1641 | radeon_connector->dac_load_detect = true; |
445282db DA |
1642 | drm_connector_attach_property(&radeon_connector->base, |
1643 | rdev->mode_info.load_detect_property, | |
1644 | 1); | |
2581afcc AD |
1645 | /* no HPD on analog connectors */ |
1646 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
eb1f8e4f | 1647 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
c49948f4 AD |
1648 | connector->interlace_allowed = true; |
1649 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1650 | break; |
1651 | case DRM_MODE_CONNECTOR_DVIA: | |
1652 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1653 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1654 | if (i2c_bus->valid) { |
f376b94f | 1655 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1656 | if (!radeon_connector->ddc_bus) |
a70882aa | 1657 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1658 | } |
35e4b7af | 1659 | radeon_connector->dac_load_detect = true; |
445282db DA |
1660 | drm_connector_attach_property(&radeon_connector->base, |
1661 | rdev->mode_info.load_detect_property, | |
1662 | 1); | |
2581afcc AD |
1663 | /* no HPD on analog connectors */ |
1664 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1665 | connector->interlace_allowed = true; |
1666 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1667 | break; |
1668 | case DRM_MODE_CONNECTOR_DVII: | |
1669 | case DRM_MODE_CONNECTOR_DVID: | |
1670 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 1671 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 1672 | if (i2c_bus->valid) { |
f376b94f | 1673 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1674 | if (!radeon_connector->ddc_bus) |
a70882aa | 1675 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
68b3adb4 AD |
1676 | } |
1677 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
35e4b7af | 1678 | radeon_connector->dac_load_detect = true; |
445282db DA |
1679 | drm_connector_attach_property(&radeon_connector->base, |
1680 | rdev->mode_info.load_detect_property, | |
1681 | 1); | |
771fe6b9 JG |
1682 | } |
1683 | subpixel_order = SubPixelHorizontalRGB; | |
c49948f4 AD |
1684 | connector->interlace_allowed = true; |
1685 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
1686 | connector->doublescan_allowed = true; | |
1687 | else | |
1688 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1689 | break; |
1690 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1691 | case DRM_MODE_CONNECTOR_Composite: | |
1692 | case DRM_MODE_CONNECTOR_9PinDIN: | |
cf4c12f9 AD |
1693 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); |
1694 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1695 | radeon_connector->dac_load_detect = true; | |
1696 | /* RS400,RC410,RS480 chipset seems to report a lot | |
1697 | * of false positive on load detect, we haven't yet | |
1698 | * found a way to make load detect reliable on those | |
1699 | * chipset, thus just disable it for TV. | |
1700 | */ | |
1701 | if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) | |
1702 | radeon_connector->dac_load_detect = false; | |
1703 | drm_connector_attach_property(&radeon_connector->base, | |
1704 | rdev->mode_info.load_detect_property, | |
1705 | radeon_connector->dac_load_detect); | |
1706 | drm_connector_attach_property(&radeon_connector->base, | |
1707 | rdev->mode_info.tv_std_property, | |
1708 | radeon_combios_get_tv_info(rdev)); | |
1709 | /* no HPD on analog connectors */ | |
1710 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1711 | connector->interlace_allowed = false; |
1712 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1713 | break; |
1714 | case DRM_MODE_CONNECTOR_LVDS: | |
1715 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
0b4c0f3f | 1716 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
771fe6b9 | 1717 | if (i2c_bus->valid) { |
f376b94f | 1718 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1719 | if (!radeon_connector->ddc_bus) |
a70882aa | 1720 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1721 | } |
445282db DA |
1722 | drm_connector_attach_property(&radeon_connector->base, |
1723 | dev->mode_config.scaling_mode_property, | |
1724 | DRM_MODE_SCALE_FULLSCREEN); | |
771fe6b9 | 1725 | subpixel_order = SubPixelHorizontalRGB; |
c49948f4 AD |
1726 | connector->interlace_allowed = false; |
1727 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1728 | break; |
1729 | } | |
1730 | ||
2581afcc | 1731 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1732 | if (i2c_bus->valid) |
1733 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1734 | } else | |
1735 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
771fe6b9 JG |
1736 | connector->display_info.subpixel_order = subpixel_order; |
1737 | drm_sysfs_connector_add(connector); | |
63ec0119 MD |
1738 | if (connector_type == DRM_MODE_CONNECTOR_LVDS) { |
1739 | struct drm_encoder *drm_encoder; | |
1740 | ||
1741 | list_for_each_entry(drm_encoder, &dev->mode_config.encoder_list, head) { | |
1742 | struct radeon_encoder *radeon_encoder; | |
1743 | ||
1744 | radeon_encoder = to_radeon_encoder(drm_encoder); | |
1745 | if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_LVDS) | |
1746 | radeon_legacy_backlight_init(radeon_encoder, connector); | |
1747 | } | |
1748 | } | |
771fe6b9 | 1749 | } |