drm: spiff out FB refcnting traces
[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_connectors.c
CommitLineData
771fe6b9
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1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
760285e7
DH
26#include <drm/drmP.h>
27#include <drm/drm_edid.h>
28#include <drm/drm_crtc_helper.h>
29#include <drm/drm_fb_helper.h>
30#include <drm/radeon_drm.h>
771fe6b9 31#include "radeon.h"
923f6848 32#include "atom.h"
771fe6b9 33
10ebc0bc
DA
34#include <linux/pm_runtime.h>
35
d4877cf2
AD
36void radeon_connector_hotplug(struct drm_connector *connector)
37{
38 struct drm_device *dev = connector->dev;
39 struct radeon_device *rdev = dev->dev_private;
40 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
41
cbac9543
AD
42 /* bail if the connector does not have hpd pin, e.g.,
43 * VGA, TV, etc.
44 */
45 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE)
46 return;
47
1e85e1d0 48 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
d4877cf2 49
73104b5c
AD
50 /* if the connector is already off, don't turn it back on */
51 if (connector->dpms != DRM_MODE_DPMS_ON)
52 return;
53
d5811e87
AD
54 /* just deal with DP (not eDP) here. */
55 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
266dcba5
JG
56 struct radeon_connector_atom_dig *dig_connector =
57 radeon_connector->con_priv;
7c3ed0fd 58
266dcba5
JG
59 /* if existing sink type was not DP no need to retrain */
60 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT)
61 return;
62
63 /* first get sink type as it may be reset after (un)plug */
64 dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
65 /* don't do anything if sink is not display port, i.e.,
66 * passive dp->(dvi|hdmi) adaptor
67 */
68 if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
69 int saved_dpms = connector->dpms;
70 /* Only turn off the display if it's physically disconnected */
ca2ccde5 71 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
266dcba5 72 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
ca2ccde5
JG
73 } else if (radeon_dp_needs_link_train(radeon_connector)) {
74 /* set it to OFF so that drm_helper_connector_dpms()
75 * won't return immediately since the current state
76 * is ON at this point.
77 */
78 connector->dpms = DRM_MODE_DPMS_OFF;
266dcba5 79 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
ca2ccde5 80 }
266dcba5
JG
81 connector->dpms = saved_dpms;
82 }
d4877cf2 83 }
d4877cf2
AD
84}
85
445282db
DA
86static void radeon_property_change_mode(struct drm_encoder *encoder)
87{
88 struct drm_crtc *crtc = encoder->crtc;
89
90 if (crtc && crtc->enabled) {
91 drm_crtc_helper_set_mode(crtc, &crtc->mode,
f4510a27 92 crtc->x, crtc->y, crtc->primary->fb);
445282db
DA
93 }
94}
eccea792
AD
95
96int radeon_get_monitor_bpc(struct drm_connector *connector)
97{
98 struct drm_device *dev = connector->dev;
99 struct radeon_device *rdev = dev->dev_private;
100 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
101 struct radeon_connector_atom_dig *dig_connector;
102 int bpc = 8;
103
104 switch (connector->connector_type) {
105 case DRM_MODE_CONNECTOR_DVII:
106 case DRM_MODE_CONNECTOR_HDMIB:
107 if (radeon_connector->use_digital) {
108 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
109 if (connector->display_info.bpc)
110 bpc = connector->display_info.bpc;
111 }
112 }
113 break;
114 case DRM_MODE_CONNECTOR_DVID:
115 case DRM_MODE_CONNECTOR_HDMIA:
116 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
117 if (connector->display_info.bpc)
118 bpc = connector->display_info.bpc;
119 }
120 break;
121 case DRM_MODE_CONNECTOR_DisplayPort:
122 dig_connector = radeon_connector->con_priv;
123 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
124 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) ||
125 drm_detect_hdmi_monitor(radeon_connector->edid)) {
126 if (connector->display_info.bpc)
127 bpc = connector->display_info.bpc;
128 }
129 break;
130 case DRM_MODE_CONNECTOR_eDP:
131 case DRM_MODE_CONNECTOR_LVDS:
132 if (connector->display_info.bpc)
133 bpc = connector->display_info.bpc;
134 else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) {
135 struct drm_connector_helper_funcs *connector_funcs =
136 connector->helper_private;
137 struct drm_encoder *encoder = connector_funcs->best_encoder(connector);
138 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
139 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
140
141 if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR)
142 bpc = 6;
143 else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR)
144 bpc = 8;
145 }
146 break;
147 }
89b92339
MK
148
149 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
150 /* hdmi deep color only implemented on DCE4+ */
151 if ((bpc > 8) && !ASIC_IS_DCE4(rdev)) {
152 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n",
72082093 153 connector->name, bpc);
89b92339
MK
154 bpc = 8;
155 }
156
157 /*
158 * Pre DCE-8 hw can't handle > 12 bpc, and more than 12 bpc doesn't make
159 * much sense without support for > 12 bpc framebuffers. RGB 4:4:4 at
160 * 12 bpc is always supported on hdmi deep color sinks, as this is
161 * required by the HDMI-1.3 spec. Clamp to a safe 12 bpc maximum.
162 */
163 if (bpc > 12) {
164 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",
72082093 165 connector->name, bpc);
89b92339
MK
166 bpc = 12;
167 }
168 }
169
170 DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",
72082093 171 connector->name, connector->display_info.bpc, bpc);
89b92339 172
eccea792
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173 return bpc;
174}
175
771fe6b9
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176static void
177radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
178{
179 struct drm_device *dev = connector->dev;
180 struct radeon_device *rdev = dev->dev_private;
181 struct drm_encoder *best_encoder = NULL;
182 struct drm_encoder *encoder = NULL;
183 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
184 struct drm_mode_object *obj;
185 bool connected;
186 int i;
187
188 best_encoder = connector_funcs->best_encoder(connector);
189
190 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
191 if (connector->encoder_ids[i] == 0)
192 break;
193
194 obj = drm_mode_object_find(connector->dev,
195 connector->encoder_ids[i],
196 DRM_MODE_OBJECT_ENCODER);
197 if (!obj)
198 continue;
199
200 encoder = obj_to_encoder(obj);
201
202 if ((encoder == best_encoder) && (status == connector_status_connected))
203 connected = true;
204 else
205 connected = false;
206
207 if (rdev->is_atom_bios)
208 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
209 else
210 radeon_combios_connected_scratch_regs(connector, encoder, connected);
211
212 }
213}
214
1109ca09 215static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
445282db
DA
216{
217 struct drm_mode_object *obj;
218 struct drm_encoder *encoder;
219 int i;
220
221 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
222 if (connector->encoder_ids[i] == 0)
223 break;
224
225 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
226 if (!obj)
227 continue;
228
229 encoder = obj_to_encoder(obj);
230 if (encoder->encoder_type == encoder_type)
231 return encoder;
232 }
233 return NULL;
234}
235
1109ca09 236static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
771fe6b9
JG
237{
238 int enc_id = connector->encoder_ids[0];
239 struct drm_mode_object *obj;
240 struct drm_encoder *encoder;
241
242 /* pick the encoder ids */
243 if (enc_id) {
244 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
245 if (!obj)
246 return NULL;
247 encoder = obj_to_encoder(obj);
248 return encoder;
249 }
250 return NULL;
251}
252
4ce001ab
DA
253/*
254 * radeon_connector_analog_encoder_conflict_solve
255 * - search for other connectors sharing this encoder
256 * if priority is true, then set them disconnected if this is connected
257 * if priority is false, set us disconnected if they are connected
258 */
259static enum drm_connector_status
260radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
261 struct drm_encoder *encoder,
262 enum drm_connector_status current_status,
263 bool priority)
264{
265 struct drm_device *dev = connector->dev;
266 struct drm_connector *conflict;
08d07511 267 struct radeon_connector *radeon_conflict;
4ce001ab
DA
268 int i;
269
270 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
271 if (conflict == connector)
272 continue;
273
08d07511 274 radeon_conflict = to_radeon_connector(conflict);
4ce001ab
DA
275 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
276 if (conflict->encoder_ids[i] == 0)
277 break;
278
279 /* if the IDs match */
280 if (conflict->encoder_ids[i] == encoder->base.id) {
281 if (conflict->status != connector_status_connected)
282 continue;
08d07511
AD
283
284 if (radeon_conflict->use_digital)
285 continue;
4ce001ab
DA
286
287 if (priority == true) {
72082093
JN
288 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n",
289 conflict->name);
290 DRM_DEBUG_KMS("in favor of %s\n",
291 connector->name);
4ce001ab
DA
292 conflict->status = connector_status_disconnected;
293 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
294 } else {
72082093
JN
295 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n",
296 connector->name);
297 DRM_DEBUG_KMS("in favor of %s\n",
298 conflict->name);
4ce001ab
DA
299 current_status = connector_status_disconnected;
300 }
301 break;
302 }
303 }
304 }
305 return current_status;
306
307}
308
771fe6b9
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309static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
310{
311 struct drm_device *dev = encoder->dev;
312 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
313 struct drm_display_mode *mode = NULL;
de2103e4 314 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
771fe6b9 315
de2103e4
AD
316 if (native_mode->hdisplay != 0 &&
317 native_mode->vdisplay != 0 &&
318 native_mode->clock != 0) {
fb06ca8f 319 mode = drm_mode_duplicate(dev, native_mode);
771fe6b9
JG
320 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
321 drm_mode_set_name(mode);
322
d9fdaafb 323 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
d2efdf6d
AD
324 } else if (native_mode->hdisplay != 0 &&
325 native_mode->vdisplay != 0) {
326 /* mac laptops without an edid */
327 /* Note that this is not necessarily the exact panel mode,
328 * but an approximation based on the cvt formula. For these
329 * systems we should ideally read the mode info out of the
330 * registers or add a mode table, but this works and is much
331 * simpler.
332 */
333 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
334 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
d9fdaafb 335 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
771fe6b9
JG
336 }
337 return mode;
338}
339
923f6848
AD
340static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
341{
342 struct drm_device *dev = encoder->dev;
343 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
344 struct drm_display_mode *mode = NULL;
de2103e4 345 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
923f6848
AD
346 int i;
347 struct mode_size {
348 int w;
349 int h;
350 } common_modes[17] = {
351 { 640, 480},
352 { 720, 480},
353 { 800, 600},
354 { 848, 480},
355 {1024, 768},
356 {1152, 768},
357 {1280, 720},
358 {1280, 800},
359 {1280, 854},
360 {1280, 960},
361 {1280, 1024},
362 {1440, 900},
363 {1400, 1050},
364 {1680, 1050},
365 {1600, 1200},
366 {1920, 1080},
367 {1920, 1200}
368 };
369
370 for (i = 0; i < 17; i++) {
dfdd6467
AD
371 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
372 if (common_modes[i].w > 1024 ||
373 common_modes[i].h > 768)
374 continue;
375 }
923f6848 376 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
de2103e4
AD
377 if (common_modes[i].w > native_mode->hdisplay ||
378 common_modes[i].h > native_mode->vdisplay ||
379 (common_modes[i].w == native_mode->hdisplay &&
380 common_modes[i].h == native_mode->vdisplay))
923f6848
AD
381 continue;
382 }
383 if (common_modes[i].w < 320 || common_modes[i].h < 200)
384 continue;
385
d50ba256 386 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
923f6848
AD
387 drm_mode_probed_add(connector, mode);
388 }
389}
390
1109ca09 391static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
771fe6b9
JG
392 uint64_t val)
393{
445282db
DA
394 struct drm_device *dev = connector->dev;
395 struct radeon_device *rdev = dev->dev_private;
396 struct drm_encoder *encoder;
397 struct radeon_encoder *radeon_encoder;
398
399 if (property == rdev->mode_info.coherent_mode_property) {
400 struct radeon_encoder_atom_dig *dig;
ce227c41 401 bool new_coherent_mode;
445282db
DA
402
403 /* need to find digital encoder on connector */
404 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
405 if (!encoder)
406 return 0;
407
408 radeon_encoder = to_radeon_encoder(encoder);
409
410 if (!radeon_encoder->enc_priv)
411 return 0;
412
413 dig = radeon_encoder->enc_priv;
ce227c41
DA
414 new_coherent_mode = val ? true : false;
415 if (dig->coherent_mode != new_coherent_mode) {
416 dig->coherent_mode = new_coherent_mode;
417 radeon_property_change_mode(&radeon_encoder->base);
418 }
445282db
DA
419 }
420
8666c076
AD
421 if (property == rdev->mode_info.audio_property) {
422 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
423 /* need to find digital encoder on connector */
424 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
425 if (!encoder)
426 return 0;
427
428 radeon_encoder = to_radeon_encoder(encoder);
429
430 if (radeon_connector->audio != val) {
431 radeon_connector->audio = val;
432 radeon_property_change_mode(&radeon_encoder->base);
433 }
434 }
435
6214bb74
AD
436 if (property == rdev->mode_info.dither_property) {
437 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
438 /* need to find digital encoder on connector */
439 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
440 if (!encoder)
441 return 0;
442
443 radeon_encoder = to_radeon_encoder(encoder);
444
445 if (radeon_connector->dither != val) {
446 radeon_connector->dither = val;
447 radeon_property_change_mode(&radeon_encoder->base);
448 }
449 }
450
5b1714d3
AD
451 if (property == rdev->mode_info.underscan_property) {
452 /* need to find digital encoder on connector */
453 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
454 if (!encoder)
455 return 0;
456
457 radeon_encoder = to_radeon_encoder(encoder);
458
459 if (radeon_encoder->underscan_type != val) {
460 radeon_encoder->underscan_type = val;
461 radeon_property_change_mode(&radeon_encoder->base);
462 }
463 }
464
5bccf5e3
MG
465 if (property == rdev->mode_info.underscan_hborder_property) {
466 /* need to find digital encoder on connector */
467 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
468 if (!encoder)
469 return 0;
470
471 radeon_encoder = to_radeon_encoder(encoder);
472
473 if (radeon_encoder->underscan_hborder != val) {
474 radeon_encoder->underscan_hborder = val;
475 radeon_property_change_mode(&radeon_encoder->base);
476 }
477 }
478
479 if (property == rdev->mode_info.underscan_vborder_property) {
480 /* need to find digital encoder on connector */
481 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
482 if (!encoder)
483 return 0;
484
485 radeon_encoder = to_radeon_encoder(encoder);
486
487 if (radeon_encoder->underscan_vborder != val) {
488 radeon_encoder->underscan_vborder = val;
489 radeon_property_change_mode(&radeon_encoder->base);
490 }
491 }
492
445282db
DA
493 if (property == rdev->mode_info.tv_std_property) {
494 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
495 if (!encoder) {
496 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
497 }
498
499 if (!encoder)
500 return 0;
501
502 radeon_encoder = to_radeon_encoder(encoder);
503 if (!radeon_encoder->enc_priv)
504 return 0;
643acacf 505 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
445282db
DA
506 struct radeon_encoder_atom_dac *dac_int;
507 dac_int = radeon_encoder->enc_priv;
508 dac_int->tv_std = val;
509 } else {
510 struct radeon_encoder_tv_dac *dac_int;
511 dac_int = radeon_encoder->enc_priv;
512 dac_int->tv_std = val;
513 }
514 radeon_property_change_mode(&radeon_encoder->base);
515 }
516
517 if (property == rdev->mode_info.load_detect_property) {
518 struct radeon_connector *radeon_connector =
519 to_radeon_connector(connector);
520
521 if (val == 0)
522 radeon_connector->dac_load_detect = false;
523 else
524 radeon_connector->dac_load_detect = true;
525 }
526
527 if (property == rdev->mode_info.tmds_pll_property) {
528 struct radeon_encoder_int_tmds *tmds = NULL;
529 bool ret = false;
530 /* need to find digital encoder on connector */
531 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
532 if (!encoder)
533 return 0;
534
535 radeon_encoder = to_radeon_encoder(encoder);
536
537 tmds = radeon_encoder->enc_priv;
538 if (!tmds)
539 return 0;
540
541 if (val == 0) {
542 if (rdev->is_atom_bios)
543 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
544 else
545 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
546 }
547 if (val == 1 || ret == false) {
548 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
549 }
550 radeon_property_change_mode(&radeon_encoder->base);
551 }
552
771fe6b9
JG
553 return 0;
554}
555
8dfaa8a7
MD
556static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
557 struct drm_connector *connector)
558{
559 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 560 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
13bb9430
MG
561 struct drm_display_mode *t, *mode;
562
563 /* If the EDID preferred mode doesn't match the native mode, use it */
564 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
565 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
566 if (mode->hdisplay != native_mode->hdisplay ||
567 mode->vdisplay != native_mode->vdisplay)
568 memcpy(native_mode, mode, sizeof(*mode));
569 }
570 }
8dfaa8a7
MD
571
572 /* Try to get native mode details from EDID if necessary */
de2103e4 573 if (!native_mode->clock) {
8dfaa8a7 574 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
de2103e4
AD
575 if (mode->hdisplay == native_mode->hdisplay &&
576 mode->vdisplay == native_mode->vdisplay) {
577 *native_mode = *mode;
578 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
c5d46b4e 579 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
8dfaa8a7
MD
580 break;
581 }
582 }
583 }
13bb9430 584
de2103e4 585 if (!native_mode->clock) {
c5d46b4e 586 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
8dfaa8a7
MD
587 radeon_encoder->rmx_type = RMX_OFF;
588 }
589}
771fe6b9
JG
590
591static int radeon_lvds_get_modes(struct drm_connector *connector)
592{
593 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
594 struct drm_encoder *encoder;
595 int ret = 0;
596 struct drm_display_mode *mode;
597
598 if (radeon_connector->ddc_bus) {
599 ret = radeon_ddc_get_modes(radeon_connector);
600 if (ret > 0) {
7747b713 601 encoder = radeon_best_single_encoder(connector);
8dfaa8a7
MD
602 if (encoder) {
603 radeon_fixup_lvds_native_mode(encoder, connector);
7747b713
AD
604 /* add scaled modes */
605 radeon_add_common_modes(encoder, connector);
8dfaa8a7 606 }
771fe6b9
JG
607 return ret;
608 }
609 }
610
611 encoder = radeon_best_single_encoder(connector);
612 if (!encoder)
613 return 0;
614
615 /* we have no EDID modes */
616 mode = radeon_fp_native_mode(encoder);
617 if (mode) {
618 ret = 1;
619 drm_mode_probed_add(connector, mode);
7a868e18
AD
620 /* add the width/height from vbios tables if available */
621 connector->display_info.width_mm = mode->width_mm;
622 connector->display_info.height_mm = mode->height_mm;
7747b713
AD
623 /* add scaled modes */
624 radeon_add_common_modes(encoder, connector);
771fe6b9 625 }
923f6848 626
771fe6b9
JG
627 return ret;
628}
629
630static int radeon_lvds_mode_valid(struct drm_connector *connector,
631 struct drm_display_mode *mode)
632{
a3fa6320
AD
633 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
634
635 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
636 return MODE_PANEL;
637
638 if (encoder) {
639 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
640 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
641
642 /* AVIVO hardware supports downscaling modes larger than the panel
643 * to the panel size, but I'm not sure this is desirable.
644 */
645 if ((mode->hdisplay > native_mode->hdisplay) ||
646 (mode->vdisplay > native_mode->vdisplay))
647 return MODE_PANEL;
648
649 /* if scaling is disabled, block non-native modes */
650 if (radeon_encoder->rmx_type == RMX_OFF) {
651 if ((mode->hdisplay != native_mode->hdisplay) ||
652 (mode->vdisplay != native_mode->vdisplay))
653 return MODE_PANEL;
654 }
655 }
656
771fe6b9
JG
657 return MODE_OK;
658}
659
7b334fcb 660static enum drm_connector_status
930a9e28 661radeon_lvds_detect(struct drm_connector *connector, bool force)
771fe6b9 662{
0549a061 663 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2ffb8429 664 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0549a061 665 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA
666 int r;
667
668 r = pm_runtime_get_sync(connector->dev->dev);
669 if (r < 0)
670 return connector_status_disconnected;
2ffb8429
AD
671
672 if (encoder) {
673 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 674 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2ffb8429
AD
675
676 /* check if panel is valid */
de2103e4 677 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
2ffb8429
AD
678 ret = connector_status_connected;
679
680 }
0549a061
AD
681
682 /* check for edid as well */
0294cf4f
AD
683 if (radeon_connector->edid)
684 ret = connector_status_connected;
685 else {
686 if (radeon_connector->ddc_bus) {
0294cf4f
AD
687 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
688 &radeon_connector->ddc_bus->adapter);
0294cf4f
AD
689 if (radeon_connector->edid)
690 ret = connector_status_connected;
691 }
0549a061 692 }
771fe6b9 693 /* check acpi lid status ??? */
2ffb8429 694
771fe6b9 695 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
696 pm_runtime_mark_last_busy(connector->dev->dev);
697 pm_runtime_put_autosuspend(connector->dev->dev);
771fe6b9
JG
698 return ret;
699}
700
701static void radeon_connector_destroy(struct drm_connector *connector)
702{
703 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
704
0294cf4f
AD
705 if (radeon_connector->edid)
706 kfree(radeon_connector->edid);
771fe6b9
JG
707 kfree(radeon_connector->con_priv);
708 drm_sysfs_connector_remove(connector);
709 drm_connector_cleanup(connector);
710 kfree(connector);
711}
712
445282db
DA
713static int radeon_lvds_set_property(struct drm_connector *connector,
714 struct drm_property *property,
715 uint64_t value)
716{
717 struct drm_device *dev = connector->dev;
718 struct radeon_encoder *radeon_encoder;
719 enum radeon_rmx_type rmx_type;
720
d9fdaafb 721 DRM_DEBUG_KMS("\n");
445282db
DA
722 if (property != dev->mode_config.scaling_mode_property)
723 return 0;
724
725 if (connector->encoder)
726 radeon_encoder = to_radeon_encoder(connector->encoder);
727 else {
728 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
729 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
730 }
731
732 switch (value) {
733 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
734 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
735 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
736 default:
737 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
738 }
739 if (radeon_encoder->rmx_type == rmx_type)
740 return 0;
741
742 radeon_encoder->rmx_type = rmx_type;
743
744 radeon_property_change_mode(&radeon_encoder->base);
745 return 0;
746}
747
748
1109ca09 749static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
771fe6b9
JG
750 .get_modes = radeon_lvds_get_modes,
751 .mode_valid = radeon_lvds_mode_valid,
752 .best_encoder = radeon_best_single_encoder,
753};
754
1109ca09 755static const struct drm_connector_funcs radeon_lvds_connector_funcs = {
771fe6b9
JG
756 .dpms = drm_helper_connector_dpms,
757 .detect = radeon_lvds_detect,
758 .fill_modes = drm_helper_probe_single_connector_modes,
759 .destroy = radeon_connector_destroy,
445282db 760 .set_property = radeon_lvds_set_property,
771fe6b9
JG
761};
762
763static int radeon_vga_get_modes(struct drm_connector *connector)
764{
765 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
766 int ret;
767
768 ret = radeon_ddc_get_modes(radeon_connector);
769
770 return ret;
771}
772
773static int radeon_vga_mode_valid(struct drm_connector *connector,
774 struct drm_display_mode *mode)
775{
b20f9bef
AD
776 struct drm_device *dev = connector->dev;
777 struct radeon_device *rdev = dev->dev_private;
778
a3fa6320 779 /* XXX check mode bandwidth */
b20f9bef
AD
780
781 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
782 return MODE_CLOCK_HIGH;
783
771fe6b9
JG
784 return MODE_OK;
785}
786
7b334fcb 787static enum drm_connector_status
930a9e28 788radeon_vga_detect(struct drm_connector *connector, bool force)
771fe6b9 789{
fafcf94e
AD
790 struct drm_device *dev = connector->dev;
791 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
792 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
793 struct drm_encoder *encoder;
794 struct drm_encoder_helper_funcs *encoder_funcs;
4b9d2a21 795 bool dret = false;
771fe6b9 796 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA
797 int r;
798
799 r = pm_runtime_get_sync(connector->dev->dev);
800 if (r < 0)
801 return connector_status_disconnected;
771fe6b9 802
4ce001ab
DA
803 encoder = radeon_best_single_encoder(connector);
804 if (!encoder)
805 ret = connector_status_disconnected;
806
eb6b6d7c 807 if (radeon_connector->ddc_bus)
0a9069d3 808 dret = radeon_ddc_probe(radeon_connector, false);
0294cf4f 809 if (dret) {
d0d0a225 810 radeon_connector->detected_by_load = false;
0294cf4f
AD
811 if (radeon_connector->edid) {
812 kfree(radeon_connector->edid);
813 radeon_connector->edid = NULL;
814 }
0294cf4f 815 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
0294cf4f
AD
816
817 if (!radeon_connector->edid) {
f82f5f3a 818 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 819 connector->name);
f82f5f3a 820 ret = connector_status_connected;
0294cf4f
AD
821 } else {
822 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
823
824 /* some oems have boards with separate digital and analog connectors
825 * with a shared ddc line (often vga + hdmi)
826 */
827 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
828 kfree(radeon_connector->edid);
829 radeon_connector->edid = NULL;
830 ret = connector_status_disconnected;
831 } else
832 ret = connector_status_connected;
833 }
834 } else {
c3cceedd
DA
835
836 /* if we aren't forcing don't do destructive polling */
d0d0a225
AD
837 if (!force) {
838 /* only return the previous status if we last
839 * detected a monitor via load.
840 */
841 if (radeon_connector->detected_by_load)
10ebc0bc
DA
842 ret = connector->status;
843 goto out;
d0d0a225 844 }
c3cceedd 845
d8a7f792 846 if (radeon_connector->dac_load_detect && encoder) {
445282db
DA
847 encoder_funcs = encoder->helper_private;
848 ret = encoder_funcs->detect(encoder, connector);
34076446 849 if (ret != connector_status_disconnected)
d0d0a225 850 radeon_connector->detected_by_load = true;
445282db 851 }
771fe6b9
JG
852 }
853
4ce001ab
DA
854 if (ret == connector_status_connected)
855 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
fafcf94e
AD
856
857 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
858 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
859 * by other means, assume the CRT is connected and use that EDID.
860 */
861 if ((!rdev->is_atom_bios) &&
862 (ret == connector_status_disconnected) &&
863 rdev->mode_info.bios_hardcoded_edid_size) {
864 ret = connector_status_connected;
865 }
866
771fe6b9 867 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
868
869out:
870 pm_runtime_mark_last_busy(connector->dev->dev);
871 pm_runtime_put_autosuspend(connector->dev->dev);
872
771fe6b9
JG
873 return ret;
874}
875
1109ca09 876static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
771fe6b9
JG
877 .get_modes = radeon_vga_get_modes,
878 .mode_valid = radeon_vga_mode_valid,
879 .best_encoder = radeon_best_single_encoder,
880};
881
1109ca09 882static const struct drm_connector_funcs radeon_vga_connector_funcs = {
771fe6b9
JG
883 .dpms = drm_helper_connector_dpms,
884 .detect = radeon_vga_detect,
885 .fill_modes = drm_helper_probe_single_connector_modes,
886 .destroy = radeon_connector_destroy,
887 .set_property = radeon_connector_set_property,
888};
889
4ce001ab
DA
890static int radeon_tv_get_modes(struct drm_connector *connector)
891{
892 struct drm_device *dev = connector->dev;
923f6848 893 struct radeon_device *rdev = dev->dev_private;
4ce001ab 894 struct drm_display_mode *tv_mode;
923f6848 895 struct drm_encoder *encoder;
4ce001ab 896
923f6848
AD
897 encoder = radeon_best_single_encoder(connector);
898 if (!encoder)
899 return 0;
4ce001ab 900
923f6848
AD
901 /* avivo chips can scale any mode */
902 if (rdev->family >= CHIP_RS600)
903 /* add scaled modes */
904 radeon_add_common_modes(encoder, connector);
905 else {
906 /* only 800x600 is supported right now on pre-avivo chips */
d50ba256 907 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
923f6848
AD
908 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
909 drm_mode_probed_add(connector, tv_mode);
910 }
4ce001ab
DA
911 return 1;
912}
913
914static int radeon_tv_mode_valid(struct drm_connector *connector,
915 struct drm_display_mode *mode)
916{
a3fa6320
AD
917 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
918 return MODE_CLOCK_RANGE;
4ce001ab
DA
919 return MODE_OK;
920}
921
7b334fcb 922static enum drm_connector_status
930a9e28 923radeon_tv_detect(struct drm_connector *connector, bool force)
4ce001ab
DA
924{
925 struct drm_encoder *encoder;
926 struct drm_encoder_helper_funcs *encoder_funcs;
445282db
DA
927 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
928 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc 929 int r;
445282db
DA
930
931 if (!radeon_connector->dac_load_detect)
932 return ret;
4ce001ab 933
10ebc0bc
DA
934 r = pm_runtime_get_sync(connector->dev->dev);
935 if (r < 0)
936 return connector_status_disconnected;
937
4ce001ab
DA
938 encoder = radeon_best_single_encoder(connector);
939 if (!encoder)
940 ret = connector_status_disconnected;
941 else {
942 encoder_funcs = encoder->helper_private;
943 ret = encoder_funcs->detect(encoder, connector);
944 }
945 if (ret == connector_status_connected)
946 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
947 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
948 pm_runtime_mark_last_busy(connector->dev->dev);
949 pm_runtime_put_autosuspend(connector->dev->dev);
4ce001ab
DA
950 return ret;
951}
952
1109ca09 953static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
4ce001ab
DA
954 .get_modes = radeon_tv_get_modes,
955 .mode_valid = radeon_tv_mode_valid,
956 .best_encoder = radeon_best_single_encoder,
957};
958
1109ca09 959static const struct drm_connector_funcs radeon_tv_connector_funcs = {
4ce001ab
DA
960 .dpms = drm_helper_connector_dpms,
961 .detect = radeon_tv_detect,
962 .fill_modes = drm_helper_probe_single_connector_modes,
963 .destroy = radeon_connector_destroy,
964 .set_property = radeon_connector_set_property,
965};
966
771fe6b9
JG
967static int radeon_dvi_get_modes(struct drm_connector *connector)
968{
969 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
970 int ret;
971
972 ret = radeon_ddc_get_modes(radeon_connector);
771fe6b9
JG
973 return ret;
974}
975
11fe1266
TU
976static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector)
977{
978 struct drm_device *dev = connector->dev;
979 struct radeon_device *rdev = dev->dev_private;
980 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
981 enum drm_connector_status status;
982
983 /* We only trust HPD on R600 and newer ASICS. */
984 if (rdev->family >= CHIP_R600
985 && radeon_connector->hpd.hpd != RADEON_HPD_NONE) {
986 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
987 status = connector_status_connected;
988 else
989 status = connector_status_disconnected;
990 if (connector->status == status)
991 return true;
992 }
993
994 return false;
995}
996
4ce001ab
DA
997/*
998 * DVI is complicated
999 * Do a DDC probe, if DDC probe passes, get the full EDID so
1000 * we can do analog/digital monitor detection at this point.
1001 * If the monitor is an analog monitor or we got no DDC,
1002 * we need to find the DAC encoder object for this connector.
1003 * If we got no DDC, we do load detection on the DAC encoder object.
1004 * If we got analog DDC or load detection passes on the DAC encoder
1005 * we have to check if this analog encoder is shared with anyone else (TV)
1006 * if its shared we have to set the other connector to disconnected.
1007 */
7b334fcb 1008static enum drm_connector_status
930a9e28 1009radeon_dvi_detect(struct drm_connector *connector, bool force)
771fe6b9 1010{
fafcf94e
AD
1011 struct drm_device *dev = connector->dev;
1012 struct radeon_device *rdev = dev->dev_private;
771fe6b9 1013 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
4ce001ab 1014 struct drm_encoder *encoder = NULL;
771fe6b9
JG
1015 struct drm_encoder_helper_funcs *encoder_funcs;
1016 struct drm_mode_object *obj;
10ebc0bc 1017 int i, r;
771fe6b9 1018 enum drm_connector_status ret = connector_status_disconnected;
fc87f13b 1019 bool dret = false, broken_edid = false;
771fe6b9 1020
10ebc0bc
DA
1021 r = pm_runtime_get_sync(connector->dev->dev);
1022 if (r < 0)
1023 return connector_status_disconnected;
1024
1025 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1026 ret = connector->status;
1027 goto exit;
1028 }
11fe1266 1029
eb6b6d7c 1030 if (radeon_connector->ddc_bus)
0a9069d3 1031 dret = radeon_ddc_probe(radeon_connector, false);
4ce001ab 1032 if (dret) {
d0d0a225 1033 radeon_connector->detected_by_load = false;
0294cf4f
AD
1034 if (radeon_connector->edid) {
1035 kfree(radeon_connector->edid);
1036 radeon_connector->edid = NULL;
1037 }
4ce001ab 1038 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
4ce001ab
DA
1039
1040 if (!radeon_connector->edid) {
f82f5f3a 1041 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 1042 connector->name);
4a9a8b71
DA
1043 /* rs690 seems to have a problem with connectors not existing and always
1044 * return a block of 0's. If we see this just stop polling on this output */
1045 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) {
1046 ret = connector_status_disconnected;
72082093
JN
1047 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n",
1048 connector->name);
4a9a8b71 1049 radeon_connector->ddc_bus = NULL;
fc87f13b
EE
1050 } else {
1051 ret = connector_status_connected;
1052 broken_edid = true; /* defer use_digital to later */
4a9a8b71 1053 }
4ce001ab
DA
1054 } else {
1055 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
1056
0294cf4f
AD
1057 /* some oems have boards with separate digital and analog connectors
1058 * with a shared ddc line (often vga + hdmi)
1059 */
1060 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
1061 kfree(radeon_connector->edid);
1062 radeon_connector->edid = NULL;
1063 ret = connector_status_disconnected;
1064 } else
1065 ret = connector_status_connected;
71407c46 1066
42f14c4b
AD
1067 /* This gets complicated. We have boards with VGA + HDMI with a
1068 * shared DDC line and we have boards with DVI-D + HDMI with a shared
1069 * DDC line. The latter is more complex because with DVI<->HDMI adapters
1070 * you don't really know what's connected to which port as both are digital.
71407c46 1071 */
d3932d6c 1072 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
71407c46
AD
1073 struct drm_connector *list_connector;
1074 struct radeon_connector *list_radeon_connector;
1075 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
1076 if (connector == list_connector)
1077 continue;
1078 list_radeon_connector = to_radeon_connector(list_connector);
b2ea4aa6
AD
1079 if (list_radeon_connector->shared_ddc &&
1080 (list_radeon_connector->ddc_bus->rec.i2c_id ==
1081 radeon_connector->ddc_bus->rec.i2c_id)) {
42f14c4b
AD
1082 /* cases where both connectors are digital */
1083 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
1084 /* hpd is our only option in this case */
1085 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
71407c46
AD
1086 kfree(radeon_connector->edid);
1087 radeon_connector->edid = NULL;
1088 ret = connector_status_disconnected;
1089 }
1090 }
1091 }
1092 }
1093 }
4ce001ab
DA
1094 }
1095 }
1096
1097 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
1098 goto out;
1099
5f0a2612
AD
1100 /* DVI-D and HDMI-A are digital only */
1101 if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) ||
1102 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
1103 goto out;
1104
d0d0a225 1105 /* if we aren't forcing don't do destructive polling */
c3cceedd 1106 if (!force) {
d0d0a225
AD
1107 /* only return the previous status if we last
1108 * detected a monitor via load.
1109 */
1110 if (radeon_connector->detected_by_load)
1111 ret = connector->status;
c3cceedd
DA
1112 goto out;
1113 }
1114
4ce001ab 1115 /* find analog encoder */
445282db
DA
1116 if (radeon_connector->dac_load_detect) {
1117 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1118 if (connector->encoder_ids[i] == 0)
1119 break;
771fe6b9 1120
445282db
DA
1121 obj = drm_mode_object_find(connector->dev,
1122 connector->encoder_ids[i],
1123 DRM_MODE_OBJECT_ENCODER);
1124 if (!obj)
1125 continue;
771fe6b9 1126
445282db 1127 encoder = obj_to_encoder(obj);
771fe6b9 1128
e3632507 1129 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC &&
e00e8b5e
AD
1130 encoder->encoder_type != DRM_MODE_ENCODER_TVDAC)
1131 continue;
1132
445282db
DA
1133 encoder_funcs = encoder->helper_private;
1134 if (encoder_funcs->detect) {
fc87f13b
EE
1135 if (!broken_edid) {
1136 if (ret != connector_status_connected) {
1137 /* deal with analog monitors without DDC */
1138 ret = encoder_funcs->detect(encoder, connector);
1139 if (ret == connector_status_connected) {
1140 radeon_connector->use_digital = false;
1141 }
1142 if (ret != connector_status_disconnected)
1143 radeon_connector->detected_by_load = true;
445282db 1144 }
fc87f13b
EE
1145 } else {
1146 enum drm_connector_status lret;
1147 /* assume digital unless load detected otherwise */
1148 radeon_connector->use_digital = true;
1149 lret = encoder_funcs->detect(encoder, connector);
1150 DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret);
1151 if (lret == connector_status_connected)
1152 radeon_connector->use_digital = false;
771fe6b9 1153 }
445282db 1154 break;
771fe6b9
JG
1155 }
1156 }
1157 }
1158
4ce001ab
DA
1159 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
1160 encoder) {
1161 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
1162 }
1163
fafcf94e
AD
1164 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1165 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1166 * by other means, assume the DFP is connected and use that EDID. In most
1167 * cases the DVI port is actually a virtual KVM port connected to the service
1168 * processor.
1169 */
a09d431f 1170out:
fafcf94e
AD
1171 if ((!rdev->is_atom_bios) &&
1172 (ret == connector_status_disconnected) &&
1173 rdev->mode_info.bios_hardcoded_edid_size) {
1174 radeon_connector->use_digital = true;
1175 ret = connector_status_connected;
1176 }
1177
771fe6b9
JG
1178 /* updated in get modes as well since we need to know if it's analog or digital */
1179 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
1180
1181exit:
1182 pm_runtime_mark_last_busy(connector->dev->dev);
1183 pm_runtime_put_autosuspend(connector->dev->dev);
1184
771fe6b9
JG
1185 return ret;
1186}
1187
1188/* okay need to be smart in here about which encoder to pick */
1109ca09 1189static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
771fe6b9
JG
1190{
1191 int enc_id = connector->encoder_ids[0];
1192 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1193 struct drm_mode_object *obj;
1194 struct drm_encoder *encoder;
1195 int i;
1196 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1197 if (connector->encoder_ids[i] == 0)
1198 break;
1199
1200 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1201 if (!obj)
1202 continue;
1203
1204 encoder = obj_to_encoder(obj);
1205
4ce001ab 1206 if (radeon_connector->use_digital == true) {
771fe6b9
JG
1207 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1208 return encoder;
1209 } else {
1210 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
1211 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
1212 return encoder;
1213 }
1214 }
1215
1216 /* see if we have a default encoder TODO */
1217
1218 /* then check use digitial */
1219 /* pick the first one */
1220 if (enc_id) {
1221 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
1222 if (!obj)
1223 return NULL;
1224 encoder = obj_to_encoder(obj);
1225 return encoder;
1226 }
1227 return NULL;
1228}
1229
d50ba256
DA
1230static void radeon_dvi_force(struct drm_connector *connector)
1231{
1232 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1233 if (connector->force == DRM_FORCE_ON)
1234 radeon_connector->use_digital = false;
1235 if (connector->force == DRM_FORCE_ON_DIGITAL)
1236 radeon_connector->use_digital = true;
1237}
1238
a3fa6320
AD
1239static int radeon_dvi_mode_valid(struct drm_connector *connector,
1240 struct drm_display_mode *mode)
1241{
1b24203e
AD
1242 struct drm_device *dev = connector->dev;
1243 struct radeon_device *rdev = dev->dev_private;
a3fa6320
AD
1244 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1245
1246 /* XXX check mode bandwidth */
1247
1b24203e
AD
1248 /* clocks over 135 MHz have heat issues with DVI on RV100 */
1249 if (radeon_connector->use_digital &&
1250 (rdev->family == CHIP_RV100) &&
1251 (mode->clock > 135000))
1252 return MODE_CLOCK_HIGH;
1253
a3fa6320
AD
1254 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1255 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1256 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1257 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1258 return MODE_OK;
e1e84017 1259 else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) {
1b2681ba 1260 if (ASIC_IS_DCE6(rdev)) {
e1e84017
AD
1261 /* HDMI 1.3+ supports max clock of 340 Mhz */
1262 if (mode->clock > 340000)
1263 return MODE_CLOCK_HIGH;
1264 else
1265 return MODE_OK;
1266 } else
1267 return MODE_CLOCK_HIGH;
1268 } else
a3fa6320
AD
1269 return MODE_CLOCK_HIGH;
1270 }
b20f9bef
AD
1271
1272 /* check against the max pixel clock */
1273 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1274 return MODE_CLOCK_HIGH;
1275
a3fa6320
AD
1276 return MODE_OK;
1277}
1278
1109ca09 1279static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
771fe6b9 1280 .get_modes = radeon_dvi_get_modes,
a3fa6320 1281 .mode_valid = radeon_dvi_mode_valid,
771fe6b9
JG
1282 .best_encoder = radeon_dvi_encoder,
1283};
1284
1109ca09 1285static const struct drm_connector_funcs radeon_dvi_connector_funcs = {
771fe6b9
JG
1286 .dpms = drm_helper_connector_dpms,
1287 .detect = radeon_dvi_detect,
1288 .fill_modes = drm_helper_probe_single_connector_modes,
1289 .set_property = radeon_connector_set_property,
1290 .destroy = radeon_connector_destroy,
d50ba256 1291 .force = radeon_dvi_force,
771fe6b9
JG
1292};
1293
746c1aa4
DA
1294static int radeon_dp_get_modes(struct drm_connector *connector)
1295{
1296 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
8b834852 1297 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1298 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA
1299 int ret;
1300
f89931f3
AD
1301 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1302 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1303 struct drm_display_mode *mode;
1304
2b69ffb9
AD
1305 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1306 if (!radeon_dig_connector->edp_on)
1307 atombios_set_edp_panel_power(connector,
1308 ATOM_TRANSMITTER_ACTION_POWER_ON);
1309 ret = radeon_ddc_get_modes(radeon_connector);
1310 if (!radeon_dig_connector->edp_on)
1311 atombios_set_edp_panel_power(connector,
1312 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1313 } else {
1314 /* need to setup ddc on the bridge */
1315 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1316 ENCODER_OBJECT_ID_NONE) {
1317 if (encoder)
1318 radeon_atom_ext_encoder_setup_ddc(encoder);
1319 }
1320 ret = radeon_ddc_get_modes(radeon_connector);
1321 }
d291767b
AD
1322
1323 if (ret > 0) {
d291767b
AD
1324 if (encoder) {
1325 radeon_fixup_lvds_native_mode(encoder, connector);
1326 /* add scaled modes */
1327 radeon_add_common_modes(encoder, connector);
1328 }
1329 return ret;
1330 }
1331
d291767b
AD
1332 if (!encoder)
1333 return 0;
1334
1335 /* we have no EDID modes */
1336 mode = radeon_fp_native_mode(encoder);
1337 if (mode) {
1338 ret = 1;
1339 drm_mode_probed_add(connector, mode);
1340 /* add the width/height from vbios tables if available */
1341 connector->display_info.width_mm = mode->width_mm;
1342 connector->display_info.height_mm = mode->height_mm;
1343 /* add scaled modes */
1344 radeon_add_common_modes(encoder, connector);
1345 }
591a10e1
AD
1346 } else {
1347 /* need to setup ddc on the bridge */
1d33e1fc
AD
1348 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1349 ENCODER_OBJECT_ID_NONE) {
591a10e1
AD
1350 if (encoder)
1351 radeon_atom_ext_encoder_setup_ddc(encoder);
1352 }
d291767b 1353 ret = radeon_ddc_get_modes(radeon_connector);
591a10e1 1354 }
8b834852 1355
746c1aa4
DA
1356 return ret;
1357}
1358
1d33e1fc 1359u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
d7fa8bb3
AD
1360{
1361 struct drm_mode_object *obj;
1362 struct drm_encoder *encoder;
1363 struct radeon_encoder *radeon_encoder;
1364 int i;
d7fa8bb3
AD
1365
1366 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1367 if (connector->encoder_ids[i] == 0)
1368 break;
1369
1370 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1371 if (!obj)
1372 continue;
1373
1374 encoder = obj_to_encoder(obj);
1375 radeon_encoder = to_radeon_encoder(encoder);
1376
1377 switch (radeon_encoder->encoder_id) {
1378 case ENCODER_OBJECT_ID_TRAVIS:
1379 case ENCODER_OBJECT_ID_NUTMEG:
1d33e1fc 1380 return radeon_encoder->encoder_id;
d7fa8bb3
AD
1381 default:
1382 break;
1383 }
1384 }
1385
1d33e1fc 1386 return ENCODER_OBJECT_ID_NONE;
d7fa8bb3
AD
1387}
1388
1389bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
1390{
1391 struct drm_mode_object *obj;
1392 struct drm_encoder *encoder;
1393 struct radeon_encoder *radeon_encoder;
1394 int i;
1395 bool found = false;
1396
1397 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1398 if (connector->encoder_ids[i] == 0)
1399 break;
1400
1401 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1402 if (!obj)
1403 continue;
1404
1405 encoder = obj_to_encoder(obj);
1406 radeon_encoder = to_radeon_encoder(encoder);
1407 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1408 found = true;
1409 }
1410
1411 return found;
1412}
1413
1414bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1415{
1416 struct drm_device *dev = connector->dev;
1417 struct radeon_device *rdev = dev->dev_private;
1418
1419 if (ASIC_IS_DCE5(rdev) &&
af5d3653 1420 (rdev->clock.default_dispclk >= 53900) &&
d7fa8bb3
AD
1421 radeon_connector_encoder_is_hbr2(connector)) {
1422 return true;
1423 }
1424
1425 return false;
1426}
1427
7b334fcb 1428static enum drm_connector_status
930a9e28 1429radeon_dp_detect(struct drm_connector *connector, bool force)
746c1aa4 1430{
f8d0edde
AD
1431 struct drm_device *dev = connector->dev;
1432 struct radeon_device *rdev = dev->dev_private;
746c1aa4 1433 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
746c1aa4 1434 enum drm_connector_status ret = connector_status_disconnected;
4143e919 1435 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1436 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
10ebc0bc 1437 int r;
746c1aa4 1438
10ebc0bc
DA
1439 r = pm_runtime_get_sync(connector->dev->dev);
1440 if (r < 0)
1441 return connector_status_disconnected;
1442
1443 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1444 ret = connector->status;
1445 goto out;
1446 }
11fe1266 1447
746c1aa4
DA
1448 if (radeon_connector->edid) {
1449 kfree(radeon_connector->edid);
1450 radeon_connector->edid = NULL;
1451 }
1452
f89931f3
AD
1453 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1454 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1455 if (encoder) {
1456 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1457 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1458
1459 /* check if panel is valid */
1460 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1461 ret = connector_status_connected;
1462 }
6f50eae7
AD
1463 /* eDP is always DP */
1464 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
8b834852
AD
1465 if (!radeon_dig_connector->edp_on)
1466 atombios_set_edp_panel_power(connector,
1467 ATOM_TRANSMITTER_ACTION_POWER_ON);
6f50eae7 1468 if (radeon_dp_getdpcd(radeon_connector))
9fa05c98 1469 ret = connector_status_connected;
8b834852
AD
1470 if (!radeon_dig_connector->edp_on)
1471 atombios_set_edp_panel_power(connector,
1472 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1d33e1fc
AD
1473 } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1474 ENCODER_OBJECT_ID_NONE) {
b06947b5
AD
1475 /* DP bridges are always DP */
1476 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1477 /* get the DPCD from the bridge */
1478 radeon_dp_getdpcd(radeon_connector);
1479
6777a4f6
AD
1480 if (encoder) {
1481 /* setup ddc on the bridge */
1482 radeon_atom_ext_encoder_setup_ddc(encoder);
0a9069d3
NOS
1483 /* bridge chips are always aux */
1484 if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */
b06947b5 1485 ret = connector_status_connected;
6777a4f6
AD
1486 else if (radeon_connector->dac_load_detect) { /* try load detection */
1487 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
b06947b5
AD
1488 ret = encoder_funcs->detect(encoder, connector);
1489 }
591a10e1 1490 }
b06947b5 1491 } else {
6f50eae7 1492 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
f8d0edde
AD
1493 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1494 ret = connector_status_connected;
1495 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
1496 radeon_dp_getdpcd(radeon_connector);
6f50eae7 1497 } else {
f8d0edde
AD
1498 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1499 if (radeon_dp_getdpcd(radeon_connector))
1500 ret = connector_status_connected;
1501 } else {
d592fca9 1502 /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */
0a9069d3 1503 if (radeon_ddc_probe(radeon_connector, false))
f8d0edde
AD
1504 ret = connector_status_connected;
1505 }
4143e919 1506 }
746c1aa4 1507 }
4143e919 1508
30f44372 1509 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
1510out:
1511 pm_runtime_mark_last_busy(connector->dev->dev);
1512 pm_runtime_put_autosuspend(connector->dev->dev);
1513
746c1aa4
DA
1514 return ret;
1515}
1516
5801ead6
AD
1517static int radeon_dp_mode_valid(struct drm_connector *connector,
1518 struct drm_display_mode *mode)
1519{
1520 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1521 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1522
1523 /* XXX check mode bandwidth */
1524
f89931f3
AD
1525 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1526 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1527 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1528
1529 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1530 return MODE_PANEL;
1531
1532 if (encoder) {
1533 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1534 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1535
f89931f3 1536 /* AVIVO hardware supports downscaling modes larger than the panel
d291767b
AD
1537 * to the panel size, but I'm not sure this is desirable.
1538 */
1539 if ((mode->hdisplay > native_mode->hdisplay) ||
1540 (mode->vdisplay > native_mode->vdisplay))
1541 return MODE_PANEL;
1542
1543 /* if scaling is disabled, block non-native modes */
1544 if (radeon_encoder->rmx_type == RMX_OFF) {
1545 if ((mode->hdisplay != native_mode->hdisplay) ||
1546 (mode->vdisplay != native_mode->vdisplay))
1547 return MODE_PANEL;
1548 }
1549 }
5801ead6 1550 return MODE_OK;
d291767b
AD
1551 } else {
1552 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
1553 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
1554 return radeon_dp_mode_valid_helper(connector, mode);
1555 else
1556 return MODE_OK;
1557 }
5801ead6
AD
1558}
1559
1109ca09 1560static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
746c1aa4 1561 .get_modes = radeon_dp_get_modes,
5801ead6 1562 .mode_valid = radeon_dp_mode_valid,
746c1aa4
DA
1563 .best_encoder = radeon_dvi_encoder,
1564};
1565
1109ca09 1566static const struct drm_connector_funcs radeon_dp_connector_funcs = {
746c1aa4
DA
1567 .dpms = drm_helper_connector_dpms,
1568 .detect = radeon_dp_detect,
1569 .fill_modes = drm_helper_probe_single_connector_modes,
1570 .set_property = radeon_connector_set_property,
379dfc25 1571 .destroy = radeon_connector_destroy,
746c1aa4
DA
1572 .force = radeon_dvi_force,
1573};
1574
855f5f1d
AD
1575static const struct drm_connector_funcs radeon_edp_connector_funcs = {
1576 .dpms = drm_helper_connector_dpms,
1577 .detect = radeon_dp_detect,
1578 .fill_modes = drm_helper_probe_single_connector_modes,
1579 .set_property = radeon_lvds_set_property,
379dfc25 1580 .destroy = radeon_connector_destroy,
855f5f1d
AD
1581 .force = radeon_dvi_force,
1582};
1583
1584static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = {
1585 .dpms = drm_helper_connector_dpms,
1586 .detect = radeon_dp_detect,
1587 .fill_modes = drm_helper_probe_single_connector_modes,
1588 .set_property = radeon_lvds_set_property,
379dfc25 1589 .destroy = radeon_connector_destroy,
855f5f1d
AD
1590 .force = radeon_dvi_force,
1591};
1592
771fe6b9
JG
1593void
1594radeon_add_atom_connector(struct drm_device *dev,
1595 uint32_t connector_id,
1596 uint32_t supported_device,
1597 int connector_type,
1598 struct radeon_i2c_bus_rec *i2c_bus,
b75fad06 1599 uint32_t igp_lane_info,
eed45b30 1600 uint16_t connector_object_id,
26b5bc98
AD
1601 struct radeon_hpd *hpd,
1602 struct radeon_router *router)
771fe6b9 1603{
445282db 1604 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
1605 struct drm_connector *connector;
1606 struct radeon_connector *radeon_connector;
1607 struct radeon_connector_atom_dig *radeon_dig_connector;
eac4dff6
AD
1608 struct drm_encoder *encoder;
1609 struct radeon_encoder *radeon_encoder;
771fe6b9 1610 uint32_t subpixel_order = SubPixelNone;
0294cf4f 1611 bool shared_ddc = false;
eac4dff6 1612 bool is_dp_bridge = false;
496263bf 1613 bool has_aux = false;
771fe6b9 1614
4ce001ab 1615 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG
1616 return;
1617
cf4c12f9
AD
1618 /* if the user selected tv=0 don't try and add the connector */
1619 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1620 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1621 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1622 (radeon_tv == 0))
1623 return;
1624
771fe6b9
JG
1625 /* see if we already added it */
1626 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1627 radeon_connector = to_radeon_connector(connector);
1628 if (radeon_connector->connector_id == connector_id) {
1629 radeon_connector->devices |= supported_device;
1630 return;
1631 }
0294cf4f 1632 if (radeon_connector->ddc_bus && i2c_bus->valid) {
d3932d6c 1633 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
0294cf4f
AD
1634 radeon_connector->shared_ddc = true;
1635 shared_ddc = true;
1636 }
fb939dfc 1637 if (radeon_connector->router_bus && router->ddc_valid &&
26b5bc98
AD
1638 (radeon_connector->router.router_id == router->router_id)) {
1639 radeon_connector->shared_ddc = false;
1640 shared_ddc = false;
1641 }
0294cf4f 1642 }
771fe6b9
JG
1643 }
1644
eac4dff6
AD
1645 /* check if it's a dp bridge */
1646 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1647 radeon_encoder = to_radeon_encoder(encoder);
1648 if (radeon_encoder->devices & supported_device) {
1649 switch (radeon_encoder->encoder_id) {
1650 case ENCODER_OBJECT_ID_TRAVIS:
1651 case ENCODER_OBJECT_ID_NUTMEG:
1652 is_dp_bridge = true;
1653 break;
1654 default:
1655 break;
1656 }
1657 }
1658 }
1659
771fe6b9
JG
1660 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1661 if (!radeon_connector)
1662 return;
1663
1664 connector = &radeon_connector->base;
1665
1666 radeon_connector->connector_id = connector_id;
1667 radeon_connector->devices = supported_device;
0294cf4f 1668 radeon_connector->shared_ddc = shared_ddc;
b75fad06 1669 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1670 radeon_connector->hpd = *hpd;
bc1c4dc3 1671
26b5bc98 1672 radeon_connector->router = *router;
fb939dfc 1673 if (router->ddc_valid || router->cd_valid) {
26b5bc98
AD
1674 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1675 if (!radeon_connector->router_bus)
a70882aa 1676 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
26b5bc98 1677 }
eac4dff6
AD
1678
1679 if (is_dp_bridge) {
771fe6b9
JG
1680 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1681 if (!radeon_dig_connector)
1682 goto failed;
771fe6b9
JG
1683 radeon_dig_connector->igp_lane_info = igp_lane_info;
1684 radeon_connector->con_priv = radeon_dig_connector;
771fe6b9 1685 if (i2c_bus->valid) {
379dfc25
AD
1686 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1687 if (radeon_connector->ddc_bus)
496263bf
AD
1688 has_aux = true;
1689 else
eac4dff6 1690 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1691 }
eac4dff6
AD
1692 switch (connector_type) {
1693 case DRM_MODE_CONNECTOR_VGA:
1694 case DRM_MODE_CONNECTOR_DVIA:
1695 default:
855f5f1d
AD
1696 drm_connector_init(dev, &radeon_connector->base,
1697 &radeon_dp_connector_funcs, connector_type);
1698 drm_connector_helper_add(&radeon_connector->base,
1699 &radeon_dp_connector_helper_funcs);
eac4dff6
AD
1700 connector->interlace_allowed = true;
1701 connector->doublescan_allowed = true;
d629a3ce 1702 radeon_connector->dac_load_detect = true;
e35755fa 1703 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD
1704 rdev->mode_info.load_detect_property,
1705 1);
eac4dff6
AD
1706 break;
1707 case DRM_MODE_CONNECTOR_DVII:
1708 case DRM_MODE_CONNECTOR_DVID:
1709 case DRM_MODE_CONNECTOR_HDMIA:
1710 case DRM_MODE_CONNECTOR_HDMIB:
1711 case DRM_MODE_CONNECTOR_DisplayPort:
855f5f1d
AD
1712 drm_connector_init(dev, &radeon_connector->base,
1713 &radeon_dp_connector_funcs, connector_type);
1714 drm_connector_helper_add(&radeon_connector->base,
1715 &radeon_dp_connector_helper_funcs);
e35755fa 1716 drm_object_attach_property(&radeon_connector->base.base,
430f70d5 1717 rdev->mode_info.underscan_property,
56bec7c0 1718 UNDERSCAN_OFF);
e35755fa 1719 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG
1720 rdev->mode_info.underscan_hborder_property,
1721 0);
e35755fa 1722 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG
1723 rdev->mode_info.underscan_vborder_property,
1724 0);
91915260 1725
6214bb74
AD
1726 drm_object_attach_property(&radeon_connector->base.base,
1727 rdev->mode_info.dither_property,
1728 RADEON_FMT_DITHER_DISABLE);
91915260 1729
108dc8e8
AD
1730 if (radeon_audio != 0)
1731 drm_object_attach_property(&radeon_connector->base.base,
1732 rdev->mode_info.audio_property,
e31fadd3 1733 RADEON_AUDIO_AUTO);
91915260 1734
eac4dff6
AD
1735 subpixel_order = SubPixelHorizontalRGB;
1736 connector->interlace_allowed = true;
1737 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1738 connector->doublescan_allowed = true;
1739 else
1740 connector->doublescan_allowed = false;
d629a3ce
AD
1741 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1742 radeon_connector->dac_load_detect = true;
e35755fa 1743 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD
1744 rdev->mode_info.load_detect_property,
1745 1);
1746 }
eac4dff6
AD
1747 break;
1748 case DRM_MODE_CONNECTOR_LVDS:
1749 case DRM_MODE_CONNECTOR_eDP:
855f5f1d
AD
1750 drm_connector_init(dev, &radeon_connector->base,
1751 &radeon_lvds_bridge_connector_funcs, connector_type);
1752 drm_connector_helper_add(&radeon_connector->base,
1753 &radeon_dp_connector_helper_funcs);
e35755fa 1754 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1755 dev->mode_config.scaling_mode_property,
1756 DRM_MODE_SCALE_FULLSCREEN);
1757 subpixel_order = SubPixelHorizontalRGB;
1758 connector->interlace_allowed = false;
1759 connector->doublescan_allowed = false;
1760 break;
5bccf5e3 1761 }
eac4dff6
AD
1762 } else {
1763 switch (connector_type) {
1764 case DRM_MODE_CONNECTOR_VGA:
1765 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1766 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1767 if (i2c_bus->valid) {
1768 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1769 if (!radeon_connector->ddc_bus)
1770 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1771 }
390d0bbe 1772 radeon_connector->dac_load_detect = true;
e35755fa 1773 drm_object_attach_property(&radeon_connector->base.base,
390d0bbe
AD
1774 rdev->mode_info.load_detect_property,
1775 1);
eac4dff6
AD
1776 /* no HPD on analog connectors */
1777 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1778 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1779 connector->interlace_allowed = true;
c49948f4 1780 connector->doublescan_allowed = true;
eac4dff6
AD
1781 break;
1782 case DRM_MODE_CONNECTOR_DVIA:
1783 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1784 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1785 if (i2c_bus->valid) {
1786 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1787 if (!radeon_connector->ddc_bus)
1788 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1789 }
1790 radeon_connector->dac_load_detect = true;
e35755fa 1791 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1792 rdev->mode_info.load_detect_property,
1793 1);
1794 /* no HPD on analog connectors */
1795 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1796 connector->interlace_allowed = true;
1797 connector->doublescan_allowed = true;
1798 break;
1799 case DRM_MODE_CONNECTOR_DVII:
1800 case DRM_MODE_CONNECTOR_DVID:
1801 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1802 if (!radeon_dig_connector)
1803 goto failed;
1804 radeon_dig_connector->igp_lane_info = igp_lane_info;
1805 radeon_connector->con_priv = radeon_dig_connector;
1806 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1807 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1808 if (i2c_bus->valid) {
1809 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1810 if (!radeon_connector->ddc_bus)
1811 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1812 }
1813 subpixel_order = SubPixelHorizontalRGB;
e35755fa 1814 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1815 rdev->mode_info.coherent_mode_property,
1816 1);
1817 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1818 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1819 rdev->mode_info.underscan_property,
1820 UNDERSCAN_OFF);
e35755fa 1821 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1822 rdev->mode_info.underscan_hborder_property,
1823 0);
e35755fa 1824 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1825 rdev->mode_info.underscan_vborder_property,
1826 0);
1827 }
108dc8e8 1828 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1829 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1830 rdev->mode_info.audio_property,
e31fadd3 1831 RADEON_AUDIO_AUTO);
8666c076 1832 }
6214bb74
AD
1833 if (ASIC_IS_AVIVO(rdev)) {
1834 drm_object_attach_property(&radeon_connector->base.base,
1835 rdev->mode_info.dither_property,
1836 RADEON_FMT_DITHER_DISABLE);
1837 }
eac4dff6
AD
1838 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1839 radeon_connector->dac_load_detect = true;
e35755fa 1840 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1841 rdev->mode_info.load_detect_property,
1842 1);
1843 }
1844 connector->interlace_allowed = true;
1845 if (connector_type == DRM_MODE_CONNECTOR_DVII)
1846 connector->doublescan_allowed = true;
1847 else
1848 connector->doublescan_allowed = false;
1849 break;
1850 case DRM_MODE_CONNECTOR_HDMIA:
1851 case DRM_MODE_CONNECTOR_HDMIB:
1852 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1853 if (!radeon_dig_connector)
1854 goto failed;
1855 radeon_dig_connector->igp_lane_info = igp_lane_info;
1856 radeon_connector->con_priv = radeon_dig_connector;
1857 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1858 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1859 if (i2c_bus->valid) {
1860 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1861 if (!radeon_connector->ddc_bus)
1862 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1863 }
e35755fa 1864 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1865 rdev->mode_info.coherent_mode_property,
1866 1);
1867 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1868 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1869 rdev->mode_info.underscan_property,
1870 UNDERSCAN_OFF);
e35755fa 1871 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1872 rdev->mode_info.underscan_hborder_property,
1873 0);
e35755fa 1874 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1875 rdev->mode_info.underscan_vborder_property,
1876 0);
1877 }
108dc8e8 1878 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1879 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1880 rdev->mode_info.audio_property,
e31fadd3 1881 RADEON_AUDIO_AUTO);
8666c076 1882 }
6214bb74
AD
1883 if (ASIC_IS_AVIVO(rdev)) {
1884 drm_object_attach_property(&radeon_connector->base.base,
1885 rdev->mode_info.dither_property,
1886 RADEON_FMT_DITHER_DISABLE);
1887 }
eac4dff6
AD
1888 subpixel_order = SubPixelHorizontalRGB;
1889 connector->interlace_allowed = true;
1890 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1891 connector->doublescan_allowed = true;
1892 else
1893 connector->doublescan_allowed = false;
1894 break;
1895 case DRM_MODE_CONNECTOR_DisplayPort:
1896 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1897 if (!radeon_dig_connector)
1898 goto failed;
1899 radeon_dig_connector->igp_lane_info = igp_lane_info;
1900 radeon_connector->con_priv = radeon_dig_connector;
1901 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1902 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1903 if (i2c_bus->valid) {
eac4dff6 1904 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
496263bf
AD
1905 if (radeon_connector->ddc_bus)
1906 has_aux = true;
1907 else
eac4dff6
AD
1908 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1909 }
1910 subpixel_order = SubPixelHorizontalRGB;
e35755fa 1911 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1912 rdev->mode_info.coherent_mode_property,
1913 1);
1914 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1915 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1916 rdev->mode_info.underscan_property,
1917 UNDERSCAN_OFF);
e35755fa 1918 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1919 rdev->mode_info.underscan_hborder_property,
1920 0);
e35755fa 1921 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1922 rdev->mode_info.underscan_vborder_property,
1923 0);
1924 }
108dc8e8 1925 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1926 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1927 rdev->mode_info.audio_property,
e31fadd3 1928 RADEON_AUDIO_AUTO);
8666c076 1929 }
6214bb74
AD
1930 if (ASIC_IS_AVIVO(rdev)) {
1931 drm_object_attach_property(&radeon_connector->base.base,
1932 rdev->mode_info.dither_property,
1933 RADEON_FMT_DITHER_DISABLE);
91915260 1934
6214bb74 1935 }
eac4dff6
AD
1936 connector->interlace_allowed = true;
1937 /* in theory with a DP to VGA converter... */
c49948f4 1938 connector->doublescan_allowed = false;
eac4dff6
AD
1939 break;
1940 case DRM_MODE_CONNECTOR_eDP:
1941 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1942 if (!radeon_dig_connector)
1943 goto failed;
1944 radeon_dig_connector->igp_lane_info = igp_lane_info;
1945 radeon_connector->con_priv = radeon_dig_connector;
855f5f1d 1946 drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type);
eac4dff6
AD
1947 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1948 if (i2c_bus->valid) {
379dfc25
AD
1949 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1950 if (radeon_connector->ddc_bus)
496263bf
AD
1951 has_aux = true;
1952 else
eac4dff6
AD
1953 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1954 }
e35755fa 1955 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1956 dev->mode_config.scaling_mode_property,
1957 DRM_MODE_SCALE_FULLSCREEN);
1958 subpixel_order = SubPixelHorizontalRGB;
1959 connector->interlace_allowed = false;
1960 connector->doublescan_allowed = false;
1961 break;
1962 case DRM_MODE_CONNECTOR_SVIDEO:
1963 case DRM_MODE_CONNECTOR_Composite:
1964 case DRM_MODE_CONNECTOR_9PinDIN:
1965 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
1966 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
1967 radeon_connector->dac_load_detect = true;
e35755fa 1968 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1969 rdev->mode_info.load_detect_property,
1970 1);
e35755fa 1971 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1972 rdev->mode_info.tv_std_property,
1973 radeon_atombios_get_tv_info(rdev));
1974 /* no HPD on analog connectors */
1975 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1976 connector->interlace_allowed = false;
1977 connector->doublescan_allowed = false;
1978 break;
1979 case DRM_MODE_CONNECTOR_LVDS:
1980 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1981 if (!radeon_dig_connector)
1982 goto failed;
1983 radeon_dig_connector->igp_lane_info = igp_lane_info;
1984 radeon_connector->con_priv = radeon_dig_connector;
1985 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
1986 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
1987 if (i2c_bus->valid) {
1988 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1989 if (!radeon_connector->ddc_bus)
1990 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1991 }
e35755fa 1992 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1993 dev->mode_config.scaling_mode_property,
1994 DRM_MODE_SCALE_FULLSCREEN);
1995 subpixel_order = SubPixelHorizontalRGB;
1996 connector->interlace_allowed = false;
1997 connector->doublescan_allowed = false;
1998 break;
771fe6b9 1999 }
771fe6b9
JG
2000 }
2001
2581afcc 2002 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA
2003 if (i2c_bus->valid)
2004 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2005 } else
2006 connector->polled = DRM_CONNECTOR_POLL_HPD;
2007
771fe6b9
JG
2008 connector->display_info.subpixel_order = subpixel_order;
2009 drm_sysfs_connector_add(connector);
496263bf
AD
2010
2011 if (has_aux)
2012 radeon_dp_aux_init(radeon_connector);
2013
771fe6b9
JG
2014 return;
2015
2016failed:
771fe6b9
JG
2017 drm_connector_cleanup(connector);
2018 kfree(connector);
2019}
2020
2021void
2022radeon_add_legacy_connector(struct drm_device *dev,
2023 uint32_t connector_id,
2024 uint32_t supported_device,
2025 int connector_type,
b75fad06 2026 struct radeon_i2c_bus_rec *i2c_bus,
eed45b30
AD
2027 uint16_t connector_object_id,
2028 struct radeon_hpd *hpd)
771fe6b9 2029{
445282db 2030 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
2031 struct drm_connector *connector;
2032 struct radeon_connector *radeon_connector;
2033 uint32_t subpixel_order = SubPixelNone;
2034
4ce001ab 2035 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG
2036 return;
2037
cf4c12f9
AD
2038 /* if the user selected tv=0 don't try and add the connector */
2039 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
2040 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
2041 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
2042 (radeon_tv == 0))
2043 return;
2044
771fe6b9
JG
2045 /* see if we already added it */
2046 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2047 radeon_connector = to_radeon_connector(connector);
2048 if (radeon_connector->connector_id == connector_id) {
2049 radeon_connector->devices |= supported_device;
2050 return;
2051 }
2052 }
2053
2054 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
2055 if (!radeon_connector)
2056 return;
2057
2058 connector = &radeon_connector->base;
2059
2060 radeon_connector->connector_id = connector_id;
2061 radeon_connector->devices = supported_device;
b75fad06 2062 radeon_connector->connector_object_id = connector_object_id;
eed45b30 2063 radeon_connector->hpd = *hpd;
bc1c4dc3 2064
771fe6b9
JG
2065 switch (connector_type) {
2066 case DRM_MODE_CONNECTOR_VGA:
2067 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2068 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2069 if (i2c_bus->valid) {
f376b94f 2070 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2071 if (!radeon_connector->ddc_bus)
a70882aa 2072 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2073 }
35e4b7af 2074 radeon_connector->dac_load_detect = true;
e35755fa 2075 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA
2076 rdev->mode_info.load_detect_property,
2077 1);
2581afcc
AD
2078 /* no HPD on analog connectors */
2079 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
eb1f8e4f 2080 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
c49948f4
AD
2081 connector->interlace_allowed = true;
2082 connector->doublescan_allowed = true;
771fe6b9
JG
2083 break;
2084 case DRM_MODE_CONNECTOR_DVIA:
2085 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2086 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2087 if (i2c_bus->valid) {
f376b94f 2088 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2089 if (!radeon_connector->ddc_bus)
a70882aa 2090 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2091 }
35e4b7af 2092 radeon_connector->dac_load_detect = true;
e35755fa 2093 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA
2094 rdev->mode_info.load_detect_property,
2095 1);
2581afcc
AD
2096 /* no HPD on analog connectors */
2097 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD
2098 connector->interlace_allowed = true;
2099 connector->doublescan_allowed = true;
771fe6b9
JG
2100 break;
2101 case DRM_MODE_CONNECTOR_DVII:
2102 case DRM_MODE_CONNECTOR_DVID:
2103 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
0b4c0f3f 2104 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
771fe6b9 2105 if (i2c_bus->valid) {
f376b94f 2106 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2107 if (!radeon_connector->ddc_bus)
a70882aa 2108 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
68b3adb4
AD
2109 }
2110 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
35e4b7af 2111 radeon_connector->dac_load_detect = true;
e35755fa 2112 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA
2113 rdev->mode_info.load_detect_property,
2114 1);
771fe6b9
JG
2115 }
2116 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD
2117 connector->interlace_allowed = true;
2118 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2119 connector->doublescan_allowed = true;
2120 else
2121 connector->doublescan_allowed = false;
771fe6b9
JG
2122 break;
2123 case DRM_MODE_CONNECTOR_SVIDEO:
2124 case DRM_MODE_CONNECTOR_Composite:
2125 case DRM_MODE_CONNECTOR_9PinDIN:
cf4c12f9
AD
2126 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2127 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2128 radeon_connector->dac_load_detect = true;
2129 /* RS400,RC410,RS480 chipset seems to report a lot
2130 * of false positive on load detect, we haven't yet
2131 * found a way to make load detect reliable on those
2132 * chipset, thus just disable it for TV.
2133 */
2134 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
2135 radeon_connector->dac_load_detect = false;
e35755fa 2136 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD
2137 rdev->mode_info.load_detect_property,
2138 radeon_connector->dac_load_detect);
e35755fa 2139 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD
2140 rdev->mode_info.tv_std_property,
2141 radeon_combios_get_tv_info(rdev));
2142 /* no HPD on analog connectors */
2143 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD
2144 connector->interlace_allowed = false;
2145 connector->doublescan_allowed = false;
771fe6b9
JG
2146 break;
2147 case DRM_MODE_CONNECTOR_LVDS:
2148 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
0b4c0f3f 2149 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
771fe6b9 2150 if (i2c_bus->valid) {
f376b94f 2151 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2152 if (!radeon_connector->ddc_bus)
a70882aa 2153 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2154 }
e35755fa 2155 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA
2156 dev->mode_config.scaling_mode_property,
2157 DRM_MODE_SCALE_FULLSCREEN);
771fe6b9 2158 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD
2159 connector->interlace_allowed = false;
2160 connector->doublescan_allowed = false;
771fe6b9
JG
2161 break;
2162 }
2163
2581afcc 2164 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA
2165 if (i2c_bus->valid)
2166 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2167 } else
2168 connector->polled = DRM_CONNECTOR_POLL_HPD;
771fe6b9
JG
2169 connector->display_info.subpixel_order = subpixel_order;
2170 drm_sysfs_connector_add(connector);
771fe6b9 2171}
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