Commit | Line | Data |
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771fe6b9 JG |
1 | /* |
2 | * Copyright 2007-8 Advanced Micro Devices, Inc. | |
3 | * Copyright 2008 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice shall be included in | |
13 | * all copies or substantial portions of the Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
21 | * OTHER DEALINGS IN THE SOFTWARE. | |
22 | * | |
23 | * Authors: Dave Airlie | |
24 | * Alex Deucher | |
25 | */ | |
760285e7 DH |
26 | #include <drm/drmP.h> |
27 | #include <drm/drm_edid.h> | |
28 | #include <drm/drm_crtc_helper.h> | |
29 | #include <drm/drm_fb_helper.h> | |
30 | #include <drm/radeon_drm.h> | |
771fe6b9 | 31 | #include "radeon.h" |
923f6848 | 32 | #include "atom.h" |
771fe6b9 | 33 | |
10ebc0bc DA |
34 | #include <linux/pm_runtime.h> |
35 | ||
771fe6b9 JG |
36 | extern void |
37 | radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |
38 | struct drm_encoder *encoder, | |
39 | bool connected); | |
40 | extern void | |
41 | radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |
42 | struct drm_encoder *encoder, | |
43 | bool connected); | |
44 | ||
d4877cf2 AD |
45 | void radeon_connector_hotplug(struct drm_connector *connector) |
46 | { | |
47 | struct drm_device *dev = connector->dev; | |
48 | struct radeon_device *rdev = dev->dev_private; | |
49 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
50 | ||
cbac9543 AD |
51 | /* bail if the connector does not have hpd pin, e.g., |
52 | * VGA, TV, etc. | |
53 | */ | |
54 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) | |
55 | return; | |
56 | ||
1e85e1d0 | 57 | radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); |
d4877cf2 | 58 | |
73104b5c AD |
59 | /* if the connector is already off, don't turn it back on */ |
60 | if (connector->dpms != DRM_MODE_DPMS_ON) | |
61 | return; | |
62 | ||
d5811e87 AD |
63 | /* just deal with DP (not eDP) here. */ |
64 | if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { | |
266dcba5 JG |
65 | struct radeon_connector_atom_dig *dig_connector = |
66 | radeon_connector->con_priv; | |
7c3ed0fd | 67 | |
266dcba5 JG |
68 | /* if existing sink type was not DP no need to retrain */ |
69 | if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT) | |
70 | return; | |
71 | ||
72 | /* first get sink type as it may be reset after (un)plug */ | |
73 | dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); | |
74 | /* don't do anything if sink is not display port, i.e., | |
75 | * passive dp->(dvi|hdmi) adaptor | |
76 | */ | |
77 | if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { | |
78 | int saved_dpms = connector->dpms; | |
79 | /* Only turn off the display if it's physically disconnected */ | |
ca2ccde5 | 80 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { |
266dcba5 | 81 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF); |
ca2ccde5 JG |
82 | } else if (radeon_dp_needs_link_train(radeon_connector)) { |
83 | /* set it to OFF so that drm_helper_connector_dpms() | |
84 | * won't return immediately since the current state | |
85 | * is ON at this point. | |
86 | */ | |
87 | connector->dpms = DRM_MODE_DPMS_OFF; | |
266dcba5 | 88 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON); |
ca2ccde5 | 89 | } |
266dcba5 JG |
90 | connector->dpms = saved_dpms; |
91 | } | |
d4877cf2 | 92 | } |
d4877cf2 AD |
93 | } |
94 | ||
445282db DA |
95 | static void radeon_property_change_mode(struct drm_encoder *encoder) |
96 | { | |
97 | struct drm_crtc *crtc = encoder->crtc; | |
98 | ||
99 | if (crtc && crtc->enabled) { | |
100 | drm_crtc_helper_set_mode(crtc, &crtc->mode, | |
101 | crtc->x, crtc->y, crtc->fb); | |
102 | } | |
103 | } | |
eccea792 AD |
104 | |
105 | int radeon_get_monitor_bpc(struct drm_connector *connector) | |
106 | { | |
107 | struct drm_device *dev = connector->dev; | |
108 | struct radeon_device *rdev = dev->dev_private; | |
109 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
110 | struct radeon_connector_atom_dig *dig_connector; | |
111 | int bpc = 8; | |
112 | ||
113 | switch (connector->connector_type) { | |
114 | case DRM_MODE_CONNECTOR_DVII: | |
115 | case DRM_MODE_CONNECTOR_HDMIB: | |
116 | if (radeon_connector->use_digital) { | |
117 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) { | |
118 | if (connector->display_info.bpc) | |
119 | bpc = connector->display_info.bpc; | |
120 | } | |
121 | } | |
122 | break; | |
123 | case DRM_MODE_CONNECTOR_DVID: | |
124 | case DRM_MODE_CONNECTOR_HDMIA: | |
125 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) { | |
126 | if (connector->display_info.bpc) | |
127 | bpc = connector->display_info.bpc; | |
128 | } | |
129 | break; | |
130 | case DRM_MODE_CONNECTOR_DisplayPort: | |
131 | dig_connector = radeon_connector->con_priv; | |
132 | if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | |
133 | (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) || | |
134 | drm_detect_hdmi_monitor(radeon_connector->edid)) { | |
135 | if (connector->display_info.bpc) | |
136 | bpc = connector->display_info.bpc; | |
137 | } | |
138 | break; | |
139 | case DRM_MODE_CONNECTOR_eDP: | |
140 | case DRM_MODE_CONNECTOR_LVDS: | |
141 | if (connector->display_info.bpc) | |
142 | bpc = connector->display_info.bpc; | |
143 | else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) { | |
144 | struct drm_connector_helper_funcs *connector_funcs = | |
145 | connector->helper_private; | |
146 | struct drm_encoder *encoder = connector_funcs->best_encoder(connector); | |
147 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
148 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; | |
149 | ||
150 | if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR) | |
151 | bpc = 6; | |
152 | else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR) | |
153 | bpc = 8; | |
154 | } | |
155 | break; | |
156 | } | |
157 | return bpc; | |
158 | } | |
159 | ||
771fe6b9 JG |
160 | static void |
161 | radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status) | |
162 | { | |
163 | struct drm_device *dev = connector->dev; | |
164 | struct radeon_device *rdev = dev->dev_private; | |
165 | struct drm_encoder *best_encoder = NULL; | |
166 | struct drm_encoder *encoder = NULL; | |
167 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
168 | struct drm_mode_object *obj; | |
169 | bool connected; | |
170 | int i; | |
171 | ||
172 | best_encoder = connector_funcs->best_encoder(connector); | |
173 | ||
174 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
175 | if (connector->encoder_ids[i] == 0) | |
176 | break; | |
177 | ||
178 | obj = drm_mode_object_find(connector->dev, | |
179 | connector->encoder_ids[i], | |
180 | DRM_MODE_OBJECT_ENCODER); | |
181 | if (!obj) | |
182 | continue; | |
183 | ||
184 | encoder = obj_to_encoder(obj); | |
185 | ||
186 | if ((encoder == best_encoder) && (status == connector_status_connected)) | |
187 | connected = true; | |
188 | else | |
189 | connected = false; | |
190 | ||
191 | if (rdev->is_atom_bios) | |
192 | radeon_atombios_connected_scratch_regs(connector, encoder, connected); | |
193 | else | |
194 | radeon_combios_connected_scratch_regs(connector, encoder, connected); | |
195 | ||
196 | } | |
197 | } | |
198 | ||
1109ca09 | 199 | static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type) |
445282db DA |
200 | { |
201 | struct drm_mode_object *obj; | |
202 | struct drm_encoder *encoder; | |
203 | int i; | |
204 | ||
205 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
206 | if (connector->encoder_ids[i] == 0) | |
207 | break; | |
208 | ||
209 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
210 | if (!obj) | |
211 | continue; | |
212 | ||
213 | encoder = obj_to_encoder(obj); | |
214 | if (encoder->encoder_type == encoder_type) | |
215 | return encoder; | |
216 | } | |
217 | return NULL; | |
218 | } | |
219 | ||
1109ca09 | 220 | static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector) |
771fe6b9 JG |
221 | { |
222 | int enc_id = connector->encoder_ids[0]; | |
223 | struct drm_mode_object *obj; | |
224 | struct drm_encoder *encoder; | |
225 | ||
226 | /* pick the encoder ids */ | |
227 | if (enc_id) { | |
228 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
229 | if (!obj) | |
230 | return NULL; | |
231 | encoder = obj_to_encoder(obj); | |
232 | return encoder; | |
233 | } | |
234 | return NULL; | |
235 | } | |
236 | ||
4ce001ab DA |
237 | /* |
238 | * radeon_connector_analog_encoder_conflict_solve | |
239 | * - search for other connectors sharing this encoder | |
240 | * if priority is true, then set them disconnected if this is connected | |
241 | * if priority is false, set us disconnected if they are connected | |
242 | */ | |
243 | static enum drm_connector_status | |
244 | radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, | |
245 | struct drm_encoder *encoder, | |
246 | enum drm_connector_status current_status, | |
247 | bool priority) | |
248 | { | |
249 | struct drm_device *dev = connector->dev; | |
250 | struct drm_connector *conflict; | |
08d07511 | 251 | struct radeon_connector *radeon_conflict; |
4ce001ab DA |
252 | int i; |
253 | ||
254 | list_for_each_entry(conflict, &dev->mode_config.connector_list, head) { | |
255 | if (conflict == connector) | |
256 | continue; | |
257 | ||
08d07511 | 258 | radeon_conflict = to_radeon_connector(conflict); |
4ce001ab DA |
259 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { |
260 | if (conflict->encoder_ids[i] == 0) | |
261 | break; | |
262 | ||
263 | /* if the IDs match */ | |
264 | if (conflict->encoder_ids[i] == encoder->base.id) { | |
265 | if (conflict->status != connector_status_connected) | |
266 | continue; | |
08d07511 AD |
267 | |
268 | if (radeon_conflict->use_digital) | |
269 | continue; | |
4ce001ab DA |
270 | |
271 | if (priority == true) { | |
c5d46b4e AD |
272 | DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict)); |
273 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(connector)); | |
4ce001ab DA |
274 | conflict->status = connector_status_disconnected; |
275 | radeon_connector_update_scratch_regs(conflict, connector_status_disconnected); | |
276 | } else { | |
c5d46b4e AD |
277 | DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector)); |
278 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(conflict)); | |
4ce001ab DA |
279 | current_status = connector_status_disconnected; |
280 | } | |
281 | break; | |
282 | } | |
283 | } | |
284 | } | |
285 | return current_status; | |
286 | ||
287 | } | |
288 | ||
771fe6b9 JG |
289 | static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder) |
290 | { | |
291 | struct drm_device *dev = encoder->dev; | |
292 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
293 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 294 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
771fe6b9 | 295 | |
de2103e4 AD |
296 | if (native_mode->hdisplay != 0 && |
297 | native_mode->vdisplay != 0 && | |
298 | native_mode->clock != 0) { | |
fb06ca8f | 299 | mode = drm_mode_duplicate(dev, native_mode); |
771fe6b9 JG |
300 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; |
301 | drm_mode_set_name(mode); | |
302 | ||
d9fdaafb | 303 | DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name); |
d2efdf6d AD |
304 | } else if (native_mode->hdisplay != 0 && |
305 | native_mode->vdisplay != 0) { | |
306 | /* mac laptops without an edid */ | |
307 | /* Note that this is not necessarily the exact panel mode, | |
308 | * but an approximation based on the cvt formula. For these | |
309 | * systems we should ideally read the mode info out of the | |
310 | * registers or add a mode table, but this works and is much | |
311 | * simpler. | |
312 | */ | |
313 | mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); | |
314 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | |
d9fdaafb | 315 | DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name); |
771fe6b9 JG |
316 | } |
317 | return mode; | |
318 | } | |
319 | ||
923f6848 AD |
320 | static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector) |
321 | { | |
322 | struct drm_device *dev = encoder->dev; | |
323 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
324 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 325 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
923f6848 AD |
326 | int i; |
327 | struct mode_size { | |
328 | int w; | |
329 | int h; | |
330 | } common_modes[17] = { | |
331 | { 640, 480}, | |
332 | { 720, 480}, | |
333 | { 800, 600}, | |
334 | { 848, 480}, | |
335 | {1024, 768}, | |
336 | {1152, 768}, | |
337 | {1280, 720}, | |
338 | {1280, 800}, | |
339 | {1280, 854}, | |
340 | {1280, 960}, | |
341 | {1280, 1024}, | |
342 | {1440, 900}, | |
343 | {1400, 1050}, | |
344 | {1680, 1050}, | |
345 | {1600, 1200}, | |
346 | {1920, 1080}, | |
347 | {1920, 1200} | |
348 | }; | |
349 | ||
350 | for (i = 0; i < 17; i++) { | |
dfdd6467 AD |
351 | if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) { |
352 | if (common_modes[i].w > 1024 || | |
353 | common_modes[i].h > 768) | |
354 | continue; | |
355 | } | |
923f6848 | 356 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
de2103e4 AD |
357 | if (common_modes[i].w > native_mode->hdisplay || |
358 | common_modes[i].h > native_mode->vdisplay || | |
359 | (common_modes[i].w == native_mode->hdisplay && | |
360 | common_modes[i].h == native_mode->vdisplay)) | |
923f6848 AD |
361 | continue; |
362 | } | |
363 | if (common_modes[i].w < 320 || common_modes[i].h < 200) | |
364 | continue; | |
365 | ||
d50ba256 | 366 | mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false); |
923f6848 AD |
367 | drm_mode_probed_add(connector, mode); |
368 | } | |
369 | } | |
370 | ||
1109ca09 | 371 | static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property, |
771fe6b9 JG |
372 | uint64_t val) |
373 | { | |
445282db DA |
374 | struct drm_device *dev = connector->dev; |
375 | struct radeon_device *rdev = dev->dev_private; | |
376 | struct drm_encoder *encoder; | |
377 | struct radeon_encoder *radeon_encoder; | |
378 | ||
379 | if (property == rdev->mode_info.coherent_mode_property) { | |
380 | struct radeon_encoder_atom_dig *dig; | |
ce227c41 | 381 | bool new_coherent_mode; |
445282db DA |
382 | |
383 | /* need to find digital encoder on connector */ | |
384 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
385 | if (!encoder) | |
386 | return 0; | |
387 | ||
388 | radeon_encoder = to_radeon_encoder(encoder); | |
389 | ||
390 | if (!radeon_encoder->enc_priv) | |
391 | return 0; | |
392 | ||
393 | dig = radeon_encoder->enc_priv; | |
ce227c41 DA |
394 | new_coherent_mode = val ? true : false; |
395 | if (dig->coherent_mode != new_coherent_mode) { | |
396 | dig->coherent_mode = new_coherent_mode; | |
397 | radeon_property_change_mode(&radeon_encoder->base); | |
398 | } | |
445282db DA |
399 | } |
400 | ||
8666c076 AD |
401 | if (property == rdev->mode_info.audio_property) { |
402 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
403 | /* need to find digital encoder on connector */ | |
404 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
405 | if (!encoder) | |
406 | return 0; | |
407 | ||
408 | radeon_encoder = to_radeon_encoder(encoder); | |
409 | ||
410 | if (radeon_connector->audio != val) { | |
411 | radeon_connector->audio = val; | |
412 | radeon_property_change_mode(&radeon_encoder->base); | |
413 | } | |
414 | } | |
415 | ||
6214bb74 AD |
416 | if (property == rdev->mode_info.dither_property) { |
417 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
418 | /* need to find digital encoder on connector */ | |
419 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
420 | if (!encoder) | |
421 | return 0; | |
422 | ||
423 | radeon_encoder = to_radeon_encoder(encoder); | |
424 | ||
425 | if (radeon_connector->dither != val) { | |
426 | radeon_connector->dither = val; | |
427 | radeon_property_change_mode(&radeon_encoder->base); | |
428 | } | |
429 | } | |
430 | ||
5b1714d3 AD |
431 | if (property == rdev->mode_info.underscan_property) { |
432 | /* need to find digital encoder on connector */ | |
433 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
434 | if (!encoder) | |
435 | return 0; | |
436 | ||
437 | radeon_encoder = to_radeon_encoder(encoder); | |
438 | ||
439 | if (radeon_encoder->underscan_type != val) { | |
440 | radeon_encoder->underscan_type = val; | |
441 | radeon_property_change_mode(&radeon_encoder->base); | |
442 | } | |
443 | } | |
444 | ||
5bccf5e3 MG |
445 | if (property == rdev->mode_info.underscan_hborder_property) { |
446 | /* need to find digital encoder on connector */ | |
447 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
448 | if (!encoder) | |
449 | return 0; | |
450 | ||
451 | radeon_encoder = to_radeon_encoder(encoder); | |
452 | ||
453 | if (radeon_encoder->underscan_hborder != val) { | |
454 | radeon_encoder->underscan_hborder = val; | |
455 | radeon_property_change_mode(&radeon_encoder->base); | |
456 | } | |
457 | } | |
458 | ||
459 | if (property == rdev->mode_info.underscan_vborder_property) { | |
460 | /* need to find digital encoder on connector */ | |
461 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
462 | if (!encoder) | |
463 | return 0; | |
464 | ||
465 | radeon_encoder = to_radeon_encoder(encoder); | |
466 | ||
467 | if (radeon_encoder->underscan_vborder != val) { | |
468 | radeon_encoder->underscan_vborder = val; | |
469 | radeon_property_change_mode(&radeon_encoder->base); | |
470 | } | |
471 | } | |
472 | ||
445282db DA |
473 | if (property == rdev->mode_info.tv_std_property) { |
474 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC); | |
475 | if (!encoder) { | |
476 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC); | |
477 | } | |
478 | ||
479 | if (!encoder) | |
480 | return 0; | |
481 | ||
482 | radeon_encoder = to_radeon_encoder(encoder); | |
483 | if (!radeon_encoder->enc_priv) | |
484 | return 0; | |
643acacf | 485 | if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) { |
445282db DA |
486 | struct radeon_encoder_atom_dac *dac_int; |
487 | dac_int = radeon_encoder->enc_priv; | |
488 | dac_int->tv_std = val; | |
489 | } else { | |
490 | struct radeon_encoder_tv_dac *dac_int; | |
491 | dac_int = radeon_encoder->enc_priv; | |
492 | dac_int->tv_std = val; | |
493 | } | |
494 | radeon_property_change_mode(&radeon_encoder->base); | |
495 | } | |
496 | ||
497 | if (property == rdev->mode_info.load_detect_property) { | |
498 | struct radeon_connector *radeon_connector = | |
499 | to_radeon_connector(connector); | |
500 | ||
501 | if (val == 0) | |
502 | radeon_connector->dac_load_detect = false; | |
503 | else | |
504 | radeon_connector->dac_load_detect = true; | |
505 | } | |
506 | ||
507 | if (property == rdev->mode_info.tmds_pll_property) { | |
508 | struct radeon_encoder_int_tmds *tmds = NULL; | |
509 | bool ret = false; | |
510 | /* need to find digital encoder on connector */ | |
511 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
512 | if (!encoder) | |
513 | return 0; | |
514 | ||
515 | radeon_encoder = to_radeon_encoder(encoder); | |
516 | ||
517 | tmds = radeon_encoder->enc_priv; | |
518 | if (!tmds) | |
519 | return 0; | |
520 | ||
521 | if (val == 0) { | |
522 | if (rdev->is_atom_bios) | |
523 | ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds); | |
524 | else | |
525 | ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds); | |
526 | } | |
527 | if (val == 1 || ret == false) { | |
528 | radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds); | |
529 | } | |
530 | radeon_property_change_mode(&radeon_encoder->base); | |
531 | } | |
532 | ||
771fe6b9 JG |
533 | return 0; |
534 | } | |
535 | ||
8dfaa8a7 MD |
536 | static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder, |
537 | struct drm_connector *connector) | |
538 | { | |
539 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 540 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
13bb9430 MG |
541 | struct drm_display_mode *t, *mode; |
542 | ||
543 | /* If the EDID preferred mode doesn't match the native mode, use it */ | |
544 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { | |
545 | if (mode->type & DRM_MODE_TYPE_PREFERRED) { | |
546 | if (mode->hdisplay != native_mode->hdisplay || | |
547 | mode->vdisplay != native_mode->vdisplay) | |
548 | memcpy(native_mode, mode, sizeof(*mode)); | |
549 | } | |
550 | } | |
8dfaa8a7 MD |
551 | |
552 | /* Try to get native mode details from EDID if necessary */ | |
de2103e4 | 553 | if (!native_mode->clock) { |
8dfaa8a7 | 554 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { |
de2103e4 AD |
555 | if (mode->hdisplay == native_mode->hdisplay && |
556 | mode->vdisplay == native_mode->vdisplay) { | |
557 | *native_mode = *mode; | |
558 | drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); | |
c5d46b4e | 559 | DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n"); |
8dfaa8a7 MD |
560 | break; |
561 | } | |
562 | } | |
563 | } | |
13bb9430 | 564 | |
de2103e4 | 565 | if (!native_mode->clock) { |
c5d46b4e | 566 | DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n"); |
8dfaa8a7 MD |
567 | radeon_encoder->rmx_type = RMX_OFF; |
568 | } | |
569 | } | |
771fe6b9 JG |
570 | |
571 | static int radeon_lvds_get_modes(struct drm_connector *connector) | |
572 | { | |
573 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
574 | struct drm_encoder *encoder; | |
575 | int ret = 0; | |
576 | struct drm_display_mode *mode; | |
577 | ||
578 | if (radeon_connector->ddc_bus) { | |
579 | ret = radeon_ddc_get_modes(radeon_connector); | |
580 | if (ret > 0) { | |
7747b713 | 581 | encoder = radeon_best_single_encoder(connector); |
8dfaa8a7 MD |
582 | if (encoder) { |
583 | radeon_fixup_lvds_native_mode(encoder, connector); | |
7747b713 AD |
584 | /* add scaled modes */ |
585 | radeon_add_common_modes(encoder, connector); | |
8dfaa8a7 | 586 | } |
771fe6b9 JG |
587 | return ret; |
588 | } | |
589 | } | |
590 | ||
591 | encoder = radeon_best_single_encoder(connector); | |
592 | if (!encoder) | |
593 | return 0; | |
594 | ||
595 | /* we have no EDID modes */ | |
596 | mode = radeon_fp_native_mode(encoder); | |
597 | if (mode) { | |
598 | ret = 1; | |
599 | drm_mode_probed_add(connector, mode); | |
7a868e18 AD |
600 | /* add the width/height from vbios tables if available */ |
601 | connector->display_info.width_mm = mode->width_mm; | |
602 | connector->display_info.height_mm = mode->height_mm; | |
7747b713 AD |
603 | /* add scaled modes */ |
604 | radeon_add_common_modes(encoder, connector); | |
771fe6b9 | 605 | } |
923f6848 | 606 | |
771fe6b9 JG |
607 | return ret; |
608 | } | |
609 | ||
610 | static int radeon_lvds_mode_valid(struct drm_connector *connector, | |
611 | struct drm_display_mode *mode) | |
612 | { | |
a3fa6320 AD |
613 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
614 | ||
615 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
616 | return MODE_PANEL; | |
617 | ||
618 | if (encoder) { | |
619 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
620 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
621 | ||
622 | /* AVIVO hardware supports downscaling modes larger than the panel | |
623 | * to the panel size, but I'm not sure this is desirable. | |
624 | */ | |
625 | if ((mode->hdisplay > native_mode->hdisplay) || | |
626 | (mode->vdisplay > native_mode->vdisplay)) | |
627 | return MODE_PANEL; | |
628 | ||
629 | /* if scaling is disabled, block non-native modes */ | |
630 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
631 | if ((mode->hdisplay != native_mode->hdisplay) || | |
632 | (mode->vdisplay != native_mode->vdisplay)) | |
633 | return MODE_PANEL; | |
634 | } | |
635 | } | |
636 | ||
771fe6b9 JG |
637 | return MODE_OK; |
638 | } | |
639 | ||
7b334fcb | 640 | static enum drm_connector_status |
930a9e28 | 641 | radeon_lvds_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 642 | { |
0549a061 | 643 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
2ffb8429 | 644 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
0549a061 | 645 | enum drm_connector_status ret = connector_status_disconnected; |
10ebc0bc DA |
646 | int r; |
647 | ||
648 | r = pm_runtime_get_sync(connector->dev->dev); | |
649 | if (r < 0) | |
650 | return connector_status_disconnected; | |
2ffb8429 AD |
651 | |
652 | if (encoder) { | |
653 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 654 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
2ffb8429 AD |
655 | |
656 | /* check if panel is valid */ | |
de2103e4 | 657 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) |
2ffb8429 AD |
658 | ret = connector_status_connected; |
659 | ||
660 | } | |
0549a061 AD |
661 | |
662 | /* check for edid as well */ | |
0294cf4f AD |
663 | if (radeon_connector->edid) |
664 | ret = connector_status_connected; | |
665 | else { | |
666 | if (radeon_connector->ddc_bus) { | |
0294cf4f AD |
667 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
668 | &radeon_connector->ddc_bus->adapter); | |
0294cf4f AD |
669 | if (radeon_connector->edid) |
670 | ret = connector_status_connected; | |
671 | } | |
0549a061 | 672 | } |
771fe6b9 | 673 | /* check acpi lid status ??? */ |
2ffb8429 | 674 | |
771fe6b9 | 675 | radeon_connector_update_scratch_regs(connector, ret); |
10ebc0bc DA |
676 | pm_runtime_mark_last_busy(connector->dev->dev); |
677 | pm_runtime_put_autosuspend(connector->dev->dev); | |
771fe6b9 JG |
678 | return ret; |
679 | } | |
680 | ||
681 | static void radeon_connector_destroy(struct drm_connector *connector) | |
682 | { | |
683 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
684 | ||
0294cf4f AD |
685 | if (radeon_connector->edid) |
686 | kfree(radeon_connector->edid); | |
771fe6b9 JG |
687 | kfree(radeon_connector->con_priv); |
688 | drm_sysfs_connector_remove(connector); | |
689 | drm_connector_cleanup(connector); | |
690 | kfree(connector); | |
691 | } | |
692 | ||
445282db DA |
693 | static int radeon_lvds_set_property(struct drm_connector *connector, |
694 | struct drm_property *property, | |
695 | uint64_t value) | |
696 | { | |
697 | struct drm_device *dev = connector->dev; | |
698 | struct radeon_encoder *radeon_encoder; | |
699 | enum radeon_rmx_type rmx_type; | |
700 | ||
d9fdaafb | 701 | DRM_DEBUG_KMS("\n"); |
445282db DA |
702 | if (property != dev->mode_config.scaling_mode_property) |
703 | return 0; | |
704 | ||
705 | if (connector->encoder) | |
706 | radeon_encoder = to_radeon_encoder(connector->encoder); | |
707 | else { | |
708 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
709 | radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector)); | |
710 | } | |
711 | ||
712 | switch (value) { | |
713 | case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break; | |
714 | case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break; | |
715 | case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break; | |
716 | default: | |
717 | case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break; | |
718 | } | |
719 | if (radeon_encoder->rmx_type == rmx_type) | |
720 | return 0; | |
721 | ||
722 | radeon_encoder->rmx_type = rmx_type; | |
723 | ||
724 | radeon_property_change_mode(&radeon_encoder->base); | |
725 | return 0; | |
726 | } | |
727 | ||
728 | ||
1109ca09 | 729 | static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = { |
771fe6b9 JG |
730 | .get_modes = radeon_lvds_get_modes, |
731 | .mode_valid = radeon_lvds_mode_valid, | |
732 | .best_encoder = radeon_best_single_encoder, | |
733 | }; | |
734 | ||
1109ca09 | 735 | static const struct drm_connector_funcs radeon_lvds_connector_funcs = { |
771fe6b9 JG |
736 | .dpms = drm_helper_connector_dpms, |
737 | .detect = radeon_lvds_detect, | |
738 | .fill_modes = drm_helper_probe_single_connector_modes, | |
739 | .destroy = radeon_connector_destroy, | |
445282db | 740 | .set_property = radeon_lvds_set_property, |
771fe6b9 JG |
741 | }; |
742 | ||
743 | static int radeon_vga_get_modes(struct drm_connector *connector) | |
744 | { | |
745 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
746 | int ret; | |
747 | ||
748 | ret = radeon_ddc_get_modes(radeon_connector); | |
749 | ||
750 | return ret; | |
751 | } | |
752 | ||
753 | static int radeon_vga_mode_valid(struct drm_connector *connector, | |
754 | struct drm_display_mode *mode) | |
755 | { | |
b20f9bef AD |
756 | struct drm_device *dev = connector->dev; |
757 | struct radeon_device *rdev = dev->dev_private; | |
758 | ||
a3fa6320 | 759 | /* XXX check mode bandwidth */ |
b20f9bef AD |
760 | |
761 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | |
762 | return MODE_CLOCK_HIGH; | |
763 | ||
771fe6b9 JG |
764 | return MODE_OK; |
765 | } | |
766 | ||
7b334fcb | 767 | static enum drm_connector_status |
930a9e28 | 768 | radeon_vga_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 769 | { |
fafcf94e AD |
770 | struct drm_device *dev = connector->dev; |
771 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 JG |
772 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
773 | struct drm_encoder *encoder; | |
774 | struct drm_encoder_helper_funcs *encoder_funcs; | |
4b9d2a21 | 775 | bool dret = false; |
771fe6b9 | 776 | enum drm_connector_status ret = connector_status_disconnected; |
10ebc0bc DA |
777 | int r; |
778 | ||
779 | r = pm_runtime_get_sync(connector->dev->dev); | |
780 | if (r < 0) | |
781 | return connector_status_disconnected; | |
771fe6b9 | 782 | |
4ce001ab DA |
783 | encoder = radeon_best_single_encoder(connector); |
784 | if (!encoder) | |
785 | ret = connector_status_disconnected; | |
786 | ||
eb6b6d7c | 787 | if (radeon_connector->ddc_bus) |
0a9069d3 | 788 | dret = radeon_ddc_probe(radeon_connector, false); |
0294cf4f | 789 | if (dret) { |
d0d0a225 | 790 | radeon_connector->detected_by_load = false; |
0294cf4f AD |
791 | if (radeon_connector->edid) { |
792 | kfree(radeon_connector->edid); | |
793 | radeon_connector->edid = NULL; | |
794 | } | |
0294cf4f | 795 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
0294cf4f AD |
796 | |
797 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
798 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
799 | drm_get_connector_name(connector)); | |
800 | ret = connector_status_connected; | |
0294cf4f AD |
801 | } else { |
802 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
803 | ||
804 | /* some oems have boards with separate digital and analog connectors | |
805 | * with a shared ddc line (often vga + hdmi) | |
806 | */ | |
807 | if (radeon_connector->use_digital && radeon_connector->shared_ddc) { | |
808 | kfree(radeon_connector->edid); | |
809 | radeon_connector->edid = NULL; | |
810 | ret = connector_status_disconnected; | |
811 | } else | |
812 | ret = connector_status_connected; | |
813 | } | |
814 | } else { | |
c3cceedd DA |
815 | |
816 | /* if we aren't forcing don't do destructive polling */ | |
d0d0a225 AD |
817 | if (!force) { |
818 | /* only return the previous status if we last | |
819 | * detected a monitor via load. | |
820 | */ | |
821 | if (radeon_connector->detected_by_load) | |
10ebc0bc DA |
822 | ret = connector->status; |
823 | goto out; | |
d0d0a225 | 824 | } |
c3cceedd | 825 | |
d8a7f792 | 826 | if (radeon_connector->dac_load_detect && encoder) { |
445282db DA |
827 | encoder_funcs = encoder->helper_private; |
828 | ret = encoder_funcs->detect(encoder, connector); | |
34076446 | 829 | if (ret != connector_status_disconnected) |
d0d0a225 | 830 | radeon_connector->detected_by_load = true; |
445282db | 831 | } |
771fe6b9 JG |
832 | } |
833 | ||
4ce001ab DA |
834 | if (ret == connector_status_connected) |
835 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
fafcf94e AD |
836 | |
837 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the | |
838 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
839 | * by other means, assume the CRT is connected and use that EDID. | |
840 | */ | |
841 | if ((!rdev->is_atom_bios) && | |
842 | (ret == connector_status_disconnected) && | |
843 | rdev->mode_info.bios_hardcoded_edid_size) { | |
844 | ret = connector_status_connected; | |
845 | } | |
846 | ||
771fe6b9 | 847 | radeon_connector_update_scratch_regs(connector, ret); |
10ebc0bc DA |
848 | |
849 | out: | |
850 | pm_runtime_mark_last_busy(connector->dev->dev); | |
851 | pm_runtime_put_autosuspend(connector->dev->dev); | |
852 | ||
771fe6b9 JG |
853 | return ret; |
854 | } | |
855 | ||
1109ca09 | 856 | static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = { |
771fe6b9 JG |
857 | .get_modes = radeon_vga_get_modes, |
858 | .mode_valid = radeon_vga_mode_valid, | |
859 | .best_encoder = radeon_best_single_encoder, | |
860 | }; | |
861 | ||
1109ca09 | 862 | static const struct drm_connector_funcs radeon_vga_connector_funcs = { |
771fe6b9 JG |
863 | .dpms = drm_helper_connector_dpms, |
864 | .detect = radeon_vga_detect, | |
865 | .fill_modes = drm_helper_probe_single_connector_modes, | |
866 | .destroy = radeon_connector_destroy, | |
867 | .set_property = radeon_connector_set_property, | |
868 | }; | |
869 | ||
4ce001ab DA |
870 | static int radeon_tv_get_modes(struct drm_connector *connector) |
871 | { | |
872 | struct drm_device *dev = connector->dev; | |
923f6848 | 873 | struct radeon_device *rdev = dev->dev_private; |
4ce001ab | 874 | struct drm_display_mode *tv_mode; |
923f6848 | 875 | struct drm_encoder *encoder; |
4ce001ab | 876 | |
923f6848 AD |
877 | encoder = radeon_best_single_encoder(connector); |
878 | if (!encoder) | |
879 | return 0; | |
4ce001ab | 880 | |
923f6848 AD |
881 | /* avivo chips can scale any mode */ |
882 | if (rdev->family >= CHIP_RS600) | |
883 | /* add scaled modes */ | |
884 | radeon_add_common_modes(encoder, connector); | |
885 | else { | |
886 | /* only 800x600 is supported right now on pre-avivo chips */ | |
d50ba256 | 887 | tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false); |
923f6848 AD |
888 | tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; |
889 | drm_mode_probed_add(connector, tv_mode); | |
890 | } | |
4ce001ab DA |
891 | return 1; |
892 | } | |
893 | ||
894 | static int radeon_tv_mode_valid(struct drm_connector *connector, | |
895 | struct drm_display_mode *mode) | |
896 | { | |
a3fa6320 AD |
897 | if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) |
898 | return MODE_CLOCK_RANGE; | |
4ce001ab DA |
899 | return MODE_OK; |
900 | } | |
901 | ||
7b334fcb | 902 | static enum drm_connector_status |
930a9e28 | 903 | radeon_tv_detect(struct drm_connector *connector, bool force) |
4ce001ab DA |
904 | { |
905 | struct drm_encoder *encoder; | |
906 | struct drm_encoder_helper_funcs *encoder_funcs; | |
445282db DA |
907 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
908 | enum drm_connector_status ret = connector_status_disconnected; | |
10ebc0bc | 909 | int r; |
445282db DA |
910 | |
911 | if (!radeon_connector->dac_load_detect) | |
912 | return ret; | |
4ce001ab | 913 | |
10ebc0bc DA |
914 | r = pm_runtime_get_sync(connector->dev->dev); |
915 | if (r < 0) | |
916 | return connector_status_disconnected; | |
917 | ||
4ce001ab DA |
918 | encoder = radeon_best_single_encoder(connector); |
919 | if (!encoder) | |
920 | ret = connector_status_disconnected; | |
921 | else { | |
922 | encoder_funcs = encoder->helper_private; | |
923 | ret = encoder_funcs->detect(encoder, connector); | |
924 | } | |
925 | if (ret == connector_status_connected) | |
926 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false); | |
927 | radeon_connector_update_scratch_regs(connector, ret); | |
10ebc0bc DA |
928 | pm_runtime_mark_last_busy(connector->dev->dev); |
929 | pm_runtime_put_autosuspend(connector->dev->dev); | |
4ce001ab DA |
930 | return ret; |
931 | } | |
932 | ||
1109ca09 | 933 | static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = { |
4ce001ab DA |
934 | .get_modes = radeon_tv_get_modes, |
935 | .mode_valid = radeon_tv_mode_valid, | |
936 | .best_encoder = radeon_best_single_encoder, | |
937 | }; | |
938 | ||
1109ca09 | 939 | static const struct drm_connector_funcs radeon_tv_connector_funcs = { |
4ce001ab DA |
940 | .dpms = drm_helper_connector_dpms, |
941 | .detect = radeon_tv_detect, | |
942 | .fill_modes = drm_helper_probe_single_connector_modes, | |
943 | .destroy = radeon_connector_destroy, | |
944 | .set_property = radeon_connector_set_property, | |
945 | }; | |
946 | ||
771fe6b9 JG |
947 | static int radeon_dvi_get_modes(struct drm_connector *connector) |
948 | { | |
949 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
950 | int ret; | |
951 | ||
952 | ret = radeon_ddc_get_modes(radeon_connector); | |
771fe6b9 JG |
953 | return ret; |
954 | } | |
955 | ||
11fe1266 TU |
956 | static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector) |
957 | { | |
958 | struct drm_device *dev = connector->dev; | |
959 | struct radeon_device *rdev = dev->dev_private; | |
960 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
961 | enum drm_connector_status status; | |
962 | ||
963 | /* We only trust HPD on R600 and newer ASICS. */ | |
964 | if (rdev->family >= CHIP_R600 | |
965 | && radeon_connector->hpd.hpd != RADEON_HPD_NONE) { | |
966 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) | |
967 | status = connector_status_connected; | |
968 | else | |
969 | status = connector_status_disconnected; | |
970 | if (connector->status == status) | |
971 | return true; | |
972 | } | |
973 | ||
974 | return false; | |
975 | } | |
976 | ||
4ce001ab DA |
977 | /* |
978 | * DVI is complicated | |
979 | * Do a DDC probe, if DDC probe passes, get the full EDID so | |
980 | * we can do analog/digital monitor detection at this point. | |
981 | * If the monitor is an analog monitor or we got no DDC, | |
982 | * we need to find the DAC encoder object for this connector. | |
983 | * If we got no DDC, we do load detection on the DAC encoder object. | |
984 | * If we got analog DDC or load detection passes on the DAC encoder | |
985 | * we have to check if this analog encoder is shared with anyone else (TV) | |
986 | * if its shared we have to set the other connector to disconnected. | |
987 | */ | |
7b334fcb | 988 | static enum drm_connector_status |
930a9e28 | 989 | radeon_dvi_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 990 | { |
fafcf94e AD |
991 | struct drm_device *dev = connector->dev; |
992 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 | 993 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
4ce001ab | 994 | struct drm_encoder *encoder = NULL; |
771fe6b9 JG |
995 | struct drm_encoder_helper_funcs *encoder_funcs; |
996 | struct drm_mode_object *obj; | |
10ebc0bc | 997 | int i, r; |
771fe6b9 | 998 | enum drm_connector_status ret = connector_status_disconnected; |
fc87f13b | 999 | bool dret = false, broken_edid = false; |
771fe6b9 | 1000 | |
10ebc0bc DA |
1001 | r = pm_runtime_get_sync(connector->dev->dev); |
1002 | if (r < 0) | |
1003 | return connector_status_disconnected; | |
1004 | ||
1005 | if (!force && radeon_check_hpd_status_unchanged(connector)) { | |
1006 | ret = connector->status; | |
1007 | goto exit; | |
1008 | } | |
11fe1266 | 1009 | |
eb6b6d7c | 1010 | if (radeon_connector->ddc_bus) |
0a9069d3 | 1011 | dret = radeon_ddc_probe(radeon_connector, false); |
4ce001ab | 1012 | if (dret) { |
d0d0a225 | 1013 | radeon_connector->detected_by_load = false; |
0294cf4f AD |
1014 | if (radeon_connector->edid) { |
1015 | kfree(radeon_connector->edid); | |
1016 | radeon_connector->edid = NULL; | |
1017 | } | |
4ce001ab | 1018 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
4ce001ab DA |
1019 | |
1020 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
1021 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
1022 | drm_get_connector_name(connector)); | |
4a9a8b71 DA |
1023 | /* rs690 seems to have a problem with connectors not existing and always |
1024 | * return a block of 0's. If we see this just stop polling on this output */ | |
1025 | if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) { | |
1026 | ret = connector_status_disconnected; | |
1027 | DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector)); | |
1028 | radeon_connector->ddc_bus = NULL; | |
fc87f13b EE |
1029 | } else { |
1030 | ret = connector_status_connected; | |
1031 | broken_edid = true; /* defer use_digital to later */ | |
4a9a8b71 | 1032 | } |
4ce001ab DA |
1033 | } else { |
1034 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
1035 | ||
0294cf4f AD |
1036 | /* some oems have boards with separate digital and analog connectors |
1037 | * with a shared ddc line (often vga + hdmi) | |
1038 | */ | |
1039 | if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) { | |
1040 | kfree(radeon_connector->edid); | |
1041 | radeon_connector->edid = NULL; | |
1042 | ret = connector_status_disconnected; | |
1043 | } else | |
1044 | ret = connector_status_connected; | |
71407c46 | 1045 | |
42f14c4b AD |
1046 | /* This gets complicated. We have boards with VGA + HDMI with a |
1047 | * shared DDC line and we have boards with DVI-D + HDMI with a shared | |
1048 | * DDC line. The latter is more complex because with DVI<->HDMI adapters | |
1049 | * you don't really know what's connected to which port as both are digital. | |
71407c46 | 1050 | */ |
d3932d6c | 1051 | if (radeon_connector->shared_ddc && (ret == connector_status_connected)) { |
71407c46 AD |
1052 | struct drm_connector *list_connector; |
1053 | struct radeon_connector *list_radeon_connector; | |
1054 | list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) { | |
1055 | if (connector == list_connector) | |
1056 | continue; | |
1057 | list_radeon_connector = to_radeon_connector(list_connector); | |
b2ea4aa6 AD |
1058 | if (list_radeon_connector->shared_ddc && |
1059 | (list_radeon_connector->ddc_bus->rec.i2c_id == | |
1060 | radeon_connector->ddc_bus->rec.i2c_id)) { | |
42f14c4b AD |
1061 | /* cases where both connectors are digital */ |
1062 | if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) { | |
1063 | /* hpd is our only option in this case */ | |
1064 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { | |
71407c46 AD |
1065 | kfree(radeon_connector->edid); |
1066 | radeon_connector->edid = NULL; | |
1067 | ret = connector_status_disconnected; | |
1068 | } | |
1069 | } | |
1070 | } | |
1071 | } | |
1072 | } | |
4ce001ab DA |
1073 | } |
1074 | } | |
1075 | ||
1076 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == true)) | |
1077 | goto out; | |
1078 | ||
5f0a2612 AD |
1079 | /* DVI-D and HDMI-A are digital only */ |
1080 | if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) || | |
1081 | (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA)) | |
1082 | goto out; | |
1083 | ||
d0d0a225 | 1084 | /* if we aren't forcing don't do destructive polling */ |
c3cceedd | 1085 | if (!force) { |
d0d0a225 AD |
1086 | /* only return the previous status if we last |
1087 | * detected a monitor via load. | |
1088 | */ | |
1089 | if (radeon_connector->detected_by_load) | |
1090 | ret = connector->status; | |
c3cceedd DA |
1091 | goto out; |
1092 | } | |
1093 | ||
4ce001ab | 1094 | /* find analog encoder */ |
445282db DA |
1095 | if (radeon_connector->dac_load_detect) { |
1096 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1097 | if (connector->encoder_ids[i] == 0) | |
1098 | break; | |
771fe6b9 | 1099 | |
445282db DA |
1100 | obj = drm_mode_object_find(connector->dev, |
1101 | connector->encoder_ids[i], | |
1102 | DRM_MODE_OBJECT_ENCODER); | |
1103 | if (!obj) | |
1104 | continue; | |
771fe6b9 | 1105 | |
445282db | 1106 | encoder = obj_to_encoder(obj); |
771fe6b9 | 1107 | |
e3632507 | 1108 | if (encoder->encoder_type != DRM_MODE_ENCODER_DAC && |
e00e8b5e AD |
1109 | encoder->encoder_type != DRM_MODE_ENCODER_TVDAC) |
1110 | continue; | |
1111 | ||
445282db DA |
1112 | encoder_funcs = encoder->helper_private; |
1113 | if (encoder_funcs->detect) { | |
fc87f13b EE |
1114 | if (!broken_edid) { |
1115 | if (ret != connector_status_connected) { | |
1116 | /* deal with analog monitors without DDC */ | |
1117 | ret = encoder_funcs->detect(encoder, connector); | |
1118 | if (ret == connector_status_connected) { | |
1119 | radeon_connector->use_digital = false; | |
1120 | } | |
1121 | if (ret != connector_status_disconnected) | |
1122 | radeon_connector->detected_by_load = true; | |
445282db | 1123 | } |
fc87f13b EE |
1124 | } else { |
1125 | enum drm_connector_status lret; | |
1126 | /* assume digital unless load detected otherwise */ | |
1127 | radeon_connector->use_digital = true; | |
1128 | lret = encoder_funcs->detect(encoder, connector); | |
1129 | DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret); | |
1130 | if (lret == connector_status_connected) | |
1131 | radeon_connector->use_digital = false; | |
771fe6b9 | 1132 | } |
445282db | 1133 | break; |
771fe6b9 JG |
1134 | } |
1135 | } | |
1136 | } | |
1137 | ||
4ce001ab DA |
1138 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) && |
1139 | encoder) { | |
1140 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
1141 | } | |
1142 | ||
fafcf94e AD |
1143 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the |
1144 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
1145 | * by other means, assume the DFP is connected and use that EDID. In most | |
1146 | * cases the DVI port is actually a virtual KVM port connected to the service | |
1147 | * processor. | |
1148 | */ | |
a09d431f | 1149 | out: |
fafcf94e AD |
1150 | if ((!rdev->is_atom_bios) && |
1151 | (ret == connector_status_disconnected) && | |
1152 | rdev->mode_info.bios_hardcoded_edid_size) { | |
1153 | radeon_connector->use_digital = true; | |
1154 | ret = connector_status_connected; | |
1155 | } | |
1156 | ||
771fe6b9 JG |
1157 | /* updated in get modes as well since we need to know if it's analog or digital */ |
1158 | radeon_connector_update_scratch_regs(connector, ret); | |
10ebc0bc DA |
1159 | |
1160 | exit: | |
1161 | pm_runtime_mark_last_busy(connector->dev->dev); | |
1162 | pm_runtime_put_autosuspend(connector->dev->dev); | |
1163 | ||
771fe6b9 JG |
1164 | return ret; |
1165 | } | |
1166 | ||
1167 | /* okay need to be smart in here about which encoder to pick */ | |
1109ca09 | 1168 | static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector) |
771fe6b9 JG |
1169 | { |
1170 | int enc_id = connector->encoder_ids[0]; | |
1171 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1172 | struct drm_mode_object *obj; | |
1173 | struct drm_encoder *encoder; | |
1174 | int i; | |
1175 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1176 | if (connector->encoder_ids[i] == 0) | |
1177 | break; | |
1178 | ||
1179 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1180 | if (!obj) | |
1181 | continue; | |
1182 | ||
1183 | encoder = obj_to_encoder(obj); | |
1184 | ||
4ce001ab | 1185 | if (radeon_connector->use_digital == true) { |
771fe6b9 JG |
1186 | if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) |
1187 | return encoder; | |
1188 | } else { | |
1189 | if (encoder->encoder_type == DRM_MODE_ENCODER_DAC || | |
1190 | encoder->encoder_type == DRM_MODE_ENCODER_TVDAC) | |
1191 | return encoder; | |
1192 | } | |
1193 | } | |
1194 | ||
1195 | /* see if we have a default encoder TODO */ | |
1196 | ||
1197 | /* then check use digitial */ | |
1198 | /* pick the first one */ | |
1199 | if (enc_id) { | |
1200 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
1201 | if (!obj) | |
1202 | return NULL; | |
1203 | encoder = obj_to_encoder(obj); | |
1204 | return encoder; | |
1205 | } | |
1206 | return NULL; | |
1207 | } | |
1208 | ||
d50ba256 DA |
1209 | static void radeon_dvi_force(struct drm_connector *connector) |
1210 | { | |
1211 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1212 | if (connector->force == DRM_FORCE_ON) | |
1213 | radeon_connector->use_digital = false; | |
1214 | if (connector->force == DRM_FORCE_ON_DIGITAL) | |
1215 | radeon_connector->use_digital = true; | |
1216 | } | |
1217 | ||
a3fa6320 AD |
1218 | static int radeon_dvi_mode_valid(struct drm_connector *connector, |
1219 | struct drm_display_mode *mode) | |
1220 | { | |
1b24203e AD |
1221 | struct drm_device *dev = connector->dev; |
1222 | struct radeon_device *rdev = dev->dev_private; | |
a3fa6320 AD |
1223 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
1224 | ||
1225 | /* XXX check mode bandwidth */ | |
1226 | ||
1b24203e AD |
1227 | /* clocks over 135 MHz have heat issues with DVI on RV100 */ |
1228 | if (radeon_connector->use_digital && | |
1229 | (rdev->family == CHIP_RV100) && | |
1230 | (mode->clock > 135000)) | |
1231 | return MODE_CLOCK_HIGH; | |
1232 | ||
a3fa6320 AD |
1233 | if (radeon_connector->use_digital && (mode->clock > 165000)) { |
1234 | if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || | |
1235 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || | |
1236 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) | |
1237 | return MODE_OK; | |
e1e84017 | 1238 | else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) { |
1b2681ba | 1239 | if (ASIC_IS_DCE6(rdev)) { |
e1e84017 AD |
1240 | /* HDMI 1.3+ supports max clock of 340 Mhz */ |
1241 | if (mode->clock > 340000) | |
1242 | return MODE_CLOCK_HIGH; | |
1243 | else | |
1244 | return MODE_OK; | |
1245 | } else | |
1246 | return MODE_CLOCK_HIGH; | |
1247 | } else | |
a3fa6320 AD |
1248 | return MODE_CLOCK_HIGH; |
1249 | } | |
b20f9bef AD |
1250 | |
1251 | /* check against the max pixel clock */ | |
1252 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | |
1253 | return MODE_CLOCK_HIGH; | |
1254 | ||
a3fa6320 AD |
1255 | return MODE_OK; |
1256 | } | |
1257 | ||
1109ca09 | 1258 | static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { |
771fe6b9 | 1259 | .get_modes = radeon_dvi_get_modes, |
a3fa6320 | 1260 | .mode_valid = radeon_dvi_mode_valid, |
771fe6b9 JG |
1261 | .best_encoder = radeon_dvi_encoder, |
1262 | }; | |
1263 | ||
1109ca09 | 1264 | static const struct drm_connector_funcs radeon_dvi_connector_funcs = { |
771fe6b9 JG |
1265 | .dpms = drm_helper_connector_dpms, |
1266 | .detect = radeon_dvi_detect, | |
1267 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1268 | .set_property = radeon_connector_set_property, | |
1269 | .destroy = radeon_connector_destroy, | |
d50ba256 | 1270 | .force = radeon_dvi_force, |
771fe6b9 JG |
1271 | }; |
1272 | ||
ffd09c64 AD |
1273 | static void radeon_dp_connector_destroy(struct drm_connector *connector) |
1274 | { | |
1275 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1276 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1277 | ||
ffd09c64 AD |
1278 | if (radeon_connector->edid) |
1279 | kfree(radeon_connector->edid); | |
1280 | if (radeon_dig_connector->dp_i2c_bus) | |
ac1aade6 | 1281 | radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus); |
ffd09c64 AD |
1282 | kfree(radeon_connector->con_priv); |
1283 | drm_sysfs_connector_remove(connector); | |
1284 | drm_connector_cleanup(connector); | |
1285 | kfree(connector); | |
1286 | } | |
1287 | ||
746c1aa4 DA |
1288 | static int radeon_dp_get_modes(struct drm_connector *connector) |
1289 | { | |
1290 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
8b834852 | 1291 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
591a10e1 | 1292 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
746c1aa4 DA |
1293 | int ret; |
1294 | ||
f89931f3 AD |
1295 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1296 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1297 | struct drm_display_mode *mode; |
1298 | ||
2b69ffb9 AD |
1299 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
1300 | if (!radeon_dig_connector->edp_on) | |
1301 | atombios_set_edp_panel_power(connector, | |
1302 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
1303 | ret = radeon_ddc_get_modes(radeon_connector); | |
1304 | if (!radeon_dig_connector->edp_on) | |
1305 | atombios_set_edp_panel_power(connector, | |
1306 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
1307 | } else { | |
1308 | /* need to setup ddc on the bridge */ | |
1309 | if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != | |
1310 | ENCODER_OBJECT_ID_NONE) { | |
1311 | if (encoder) | |
1312 | radeon_atom_ext_encoder_setup_ddc(encoder); | |
1313 | } | |
1314 | ret = radeon_ddc_get_modes(radeon_connector); | |
1315 | } | |
d291767b AD |
1316 | |
1317 | if (ret > 0) { | |
d291767b AD |
1318 | if (encoder) { |
1319 | radeon_fixup_lvds_native_mode(encoder, connector); | |
1320 | /* add scaled modes */ | |
1321 | radeon_add_common_modes(encoder, connector); | |
1322 | } | |
1323 | return ret; | |
1324 | } | |
1325 | ||
d291767b AD |
1326 | if (!encoder) |
1327 | return 0; | |
1328 | ||
1329 | /* we have no EDID modes */ | |
1330 | mode = radeon_fp_native_mode(encoder); | |
1331 | if (mode) { | |
1332 | ret = 1; | |
1333 | drm_mode_probed_add(connector, mode); | |
1334 | /* add the width/height from vbios tables if available */ | |
1335 | connector->display_info.width_mm = mode->width_mm; | |
1336 | connector->display_info.height_mm = mode->height_mm; | |
1337 | /* add scaled modes */ | |
1338 | radeon_add_common_modes(encoder, connector); | |
1339 | } | |
591a10e1 AD |
1340 | } else { |
1341 | /* need to setup ddc on the bridge */ | |
1d33e1fc AD |
1342 | if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != |
1343 | ENCODER_OBJECT_ID_NONE) { | |
591a10e1 AD |
1344 | if (encoder) |
1345 | radeon_atom_ext_encoder_setup_ddc(encoder); | |
1346 | } | |
d291767b | 1347 | ret = radeon_ddc_get_modes(radeon_connector); |
591a10e1 | 1348 | } |
8b834852 | 1349 | |
746c1aa4 DA |
1350 | return ret; |
1351 | } | |
1352 | ||
1d33e1fc | 1353 | u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector) |
d7fa8bb3 AD |
1354 | { |
1355 | struct drm_mode_object *obj; | |
1356 | struct drm_encoder *encoder; | |
1357 | struct radeon_encoder *radeon_encoder; | |
1358 | int i; | |
d7fa8bb3 AD |
1359 | |
1360 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1361 | if (connector->encoder_ids[i] == 0) | |
1362 | break; | |
1363 | ||
1364 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1365 | if (!obj) | |
1366 | continue; | |
1367 | ||
1368 | encoder = obj_to_encoder(obj); | |
1369 | radeon_encoder = to_radeon_encoder(encoder); | |
1370 | ||
1371 | switch (radeon_encoder->encoder_id) { | |
1372 | case ENCODER_OBJECT_ID_TRAVIS: | |
1373 | case ENCODER_OBJECT_ID_NUTMEG: | |
1d33e1fc | 1374 | return radeon_encoder->encoder_id; |
d7fa8bb3 AD |
1375 | default: |
1376 | break; | |
1377 | } | |
1378 | } | |
1379 | ||
1d33e1fc | 1380 | return ENCODER_OBJECT_ID_NONE; |
d7fa8bb3 AD |
1381 | } |
1382 | ||
1383 | bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector) | |
1384 | { | |
1385 | struct drm_mode_object *obj; | |
1386 | struct drm_encoder *encoder; | |
1387 | struct radeon_encoder *radeon_encoder; | |
1388 | int i; | |
1389 | bool found = false; | |
1390 | ||
1391 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1392 | if (connector->encoder_ids[i] == 0) | |
1393 | break; | |
1394 | ||
1395 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1396 | if (!obj) | |
1397 | continue; | |
1398 | ||
1399 | encoder = obj_to_encoder(obj); | |
1400 | radeon_encoder = to_radeon_encoder(encoder); | |
1401 | if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2) | |
1402 | found = true; | |
1403 | } | |
1404 | ||
1405 | return found; | |
1406 | } | |
1407 | ||
1408 | bool radeon_connector_is_dp12_capable(struct drm_connector *connector) | |
1409 | { | |
1410 | struct drm_device *dev = connector->dev; | |
1411 | struct radeon_device *rdev = dev->dev_private; | |
1412 | ||
1413 | if (ASIC_IS_DCE5(rdev) && | |
1414 | (rdev->clock.dp_extclk >= 53900) && | |
1415 | radeon_connector_encoder_is_hbr2(connector)) { | |
1416 | return true; | |
1417 | } | |
1418 | ||
1419 | return false; | |
1420 | } | |
1421 | ||
7b334fcb | 1422 | static enum drm_connector_status |
930a9e28 | 1423 | radeon_dp_detect(struct drm_connector *connector, bool force) |
746c1aa4 | 1424 | { |
f8d0edde AD |
1425 | struct drm_device *dev = connector->dev; |
1426 | struct radeon_device *rdev = dev->dev_private; | |
746c1aa4 | 1427 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
746c1aa4 | 1428 | enum drm_connector_status ret = connector_status_disconnected; |
4143e919 | 1429 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
591a10e1 | 1430 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
10ebc0bc | 1431 | int r; |
746c1aa4 | 1432 | |
10ebc0bc DA |
1433 | r = pm_runtime_get_sync(connector->dev->dev); |
1434 | if (r < 0) | |
1435 | return connector_status_disconnected; | |
1436 | ||
1437 | if (!force && radeon_check_hpd_status_unchanged(connector)) { | |
1438 | ret = connector->status; | |
1439 | goto out; | |
1440 | } | |
11fe1266 | 1441 | |
746c1aa4 DA |
1442 | if (radeon_connector->edid) { |
1443 | kfree(radeon_connector->edid); | |
1444 | radeon_connector->edid = NULL; | |
1445 | } | |
1446 | ||
f89931f3 AD |
1447 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1448 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1449 | if (encoder) { |
1450 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
1451 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
1452 | ||
1453 | /* check if panel is valid */ | |
1454 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) | |
1455 | ret = connector_status_connected; | |
1456 | } | |
6f50eae7 AD |
1457 | /* eDP is always DP */ |
1458 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
8b834852 AD |
1459 | if (!radeon_dig_connector->edp_on) |
1460 | atombios_set_edp_panel_power(connector, | |
1461 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
6f50eae7 | 1462 | if (radeon_dp_getdpcd(radeon_connector)) |
9fa05c98 | 1463 | ret = connector_status_connected; |
8b834852 AD |
1464 | if (!radeon_dig_connector->edp_on) |
1465 | atombios_set_edp_panel_power(connector, | |
1466 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
1d33e1fc AD |
1467 | } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != |
1468 | ENCODER_OBJECT_ID_NONE) { | |
b06947b5 AD |
1469 | /* DP bridges are always DP */ |
1470 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
1471 | /* get the DPCD from the bridge */ | |
1472 | radeon_dp_getdpcd(radeon_connector); | |
1473 | ||
6777a4f6 AD |
1474 | if (encoder) { |
1475 | /* setup ddc on the bridge */ | |
1476 | radeon_atom_ext_encoder_setup_ddc(encoder); | |
0a9069d3 NOS |
1477 | /* bridge chips are always aux */ |
1478 | if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */ | |
b06947b5 | 1479 | ret = connector_status_connected; |
6777a4f6 AD |
1480 | else if (radeon_connector->dac_load_detect) { /* try load detection */ |
1481 | struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; | |
b06947b5 AD |
1482 | ret = encoder_funcs->detect(encoder, connector); |
1483 | } | |
591a10e1 | 1484 | } |
b06947b5 | 1485 | } else { |
6f50eae7 | 1486 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
f8d0edde AD |
1487 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { |
1488 | ret = connector_status_connected; | |
1489 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) | |
1490 | radeon_dp_getdpcd(radeon_connector); | |
6f50eae7 | 1491 | } else { |
f8d0edde AD |
1492 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { |
1493 | if (radeon_dp_getdpcd(radeon_connector)) | |
1494 | ret = connector_status_connected; | |
1495 | } else { | |
d592fca9 | 1496 | /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */ |
0a9069d3 | 1497 | if (radeon_ddc_probe(radeon_connector, false)) |
f8d0edde AD |
1498 | ret = connector_status_connected; |
1499 | } | |
4143e919 | 1500 | } |
746c1aa4 | 1501 | } |
4143e919 | 1502 | |
30f44372 | 1503 | radeon_connector_update_scratch_regs(connector, ret); |
10ebc0bc DA |
1504 | out: |
1505 | pm_runtime_mark_last_busy(connector->dev->dev); | |
1506 | pm_runtime_put_autosuspend(connector->dev->dev); | |
1507 | ||
746c1aa4 DA |
1508 | return ret; |
1509 | } | |
1510 | ||
5801ead6 AD |
1511 | static int radeon_dp_mode_valid(struct drm_connector *connector, |
1512 | struct drm_display_mode *mode) | |
1513 | { | |
1514 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1515 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1516 | ||
1517 | /* XXX check mode bandwidth */ | |
1518 | ||
f89931f3 AD |
1519 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1520 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1521 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
1522 | ||
1523 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
1524 | return MODE_PANEL; | |
1525 | ||
1526 | if (encoder) { | |
1527 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
1528 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
1529 | ||
f89931f3 | 1530 | /* AVIVO hardware supports downscaling modes larger than the panel |
d291767b AD |
1531 | * to the panel size, but I'm not sure this is desirable. |
1532 | */ | |
1533 | if ((mode->hdisplay > native_mode->hdisplay) || | |
1534 | (mode->vdisplay > native_mode->vdisplay)) | |
1535 | return MODE_PANEL; | |
1536 | ||
1537 | /* if scaling is disabled, block non-native modes */ | |
1538 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
1539 | if ((mode->hdisplay != native_mode->hdisplay) || | |
1540 | (mode->vdisplay != native_mode->vdisplay)) | |
1541 | return MODE_PANEL; | |
1542 | } | |
1543 | } | |
5801ead6 | 1544 | return MODE_OK; |
d291767b AD |
1545 | } else { |
1546 | if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | |
1547 | (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) | |
1548 | return radeon_dp_mode_valid_helper(connector, mode); | |
1549 | else | |
1550 | return MODE_OK; | |
1551 | } | |
5801ead6 AD |
1552 | } |
1553 | ||
1109ca09 | 1554 | static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = { |
746c1aa4 | 1555 | .get_modes = radeon_dp_get_modes, |
5801ead6 | 1556 | .mode_valid = radeon_dp_mode_valid, |
746c1aa4 DA |
1557 | .best_encoder = radeon_dvi_encoder, |
1558 | }; | |
1559 | ||
1109ca09 | 1560 | static const struct drm_connector_funcs radeon_dp_connector_funcs = { |
746c1aa4 DA |
1561 | .dpms = drm_helper_connector_dpms, |
1562 | .detect = radeon_dp_detect, | |
1563 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1564 | .set_property = radeon_connector_set_property, | |
ffd09c64 | 1565 | .destroy = radeon_dp_connector_destroy, |
746c1aa4 DA |
1566 | .force = radeon_dvi_force, |
1567 | }; | |
1568 | ||
855f5f1d AD |
1569 | static const struct drm_connector_funcs radeon_edp_connector_funcs = { |
1570 | .dpms = drm_helper_connector_dpms, | |
1571 | .detect = radeon_dp_detect, | |
1572 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1573 | .set_property = radeon_lvds_set_property, | |
1574 | .destroy = radeon_dp_connector_destroy, | |
1575 | .force = radeon_dvi_force, | |
1576 | }; | |
1577 | ||
1578 | static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = { | |
1579 | .dpms = drm_helper_connector_dpms, | |
1580 | .detect = radeon_dp_detect, | |
1581 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1582 | .set_property = radeon_lvds_set_property, | |
1583 | .destroy = radeon_dp_connector_destroy, | |
1584 | .force = radeon_dvi_force, | |
1585 | }; | |
1586 | ||
771fe6b9 JG |
1587 | void |
1588 | radeon_add_atom_connector(struct drm_device *dev, | |
1589 | uint32_t connector_id, | |
1590 | uint32_t supported_device, | |
1591 | int connector_type, | |
1592 | struct radeon_i2c_bus_rec *i2c_bus, | |
b75fad06 | 1593 | uint32_t igp_lane_info, |
eed45b30 | 1594 | uint16_t connector_object_id, |
26b5bc98 AD |
1595 | struct radeon_hpd *hpd, |
1596 | struct radeon_router *router) | |
771fe6b9 | 1597 | { |
445282db | 1598 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1599 | struct drm_connector *connector; |
1600 | struct radeon_connector *radeon_connector; | |
1601 | struct radeon_connector_atom_dig *radeon_dig_connector; | |
eac4dff6 AD |
1602 | struct drm_encoder *encoder; |
1603 | struct radeon_encoder *radeon_encoder; | |
771fe6b9 | 1604 | uint32_t subpixel_order = SubPixelNone; |
0294cf4f | 1605 | bool shared_ddc = false; |
eac4dff6 | 1606 | bool is_dp_bridge = false; |
771fe6b9 | 1607 | |
4ce001ab | 1608 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1609 | return; |
1610 | ||
cf4c12f9 AD |
1611 | /* if the user selected tv=0 don't try and add the connector */ |
1612 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1613 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1614 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1615 | (radeon_tv == 0)) | |
1616 | return; | |
1617 | ||
771fe6b9 JG |
1618 | /* see if we already added it */ |
1619 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1620 | radeon_connector = to_radeon_connector(connector); | |
1621 | if (radeon_connector->connector_id == connector_id) { | |
1622 | radeon_connector->devices |= supported_device; | |
1623 | return; | |
1624 | } | |
0294cf4f | 1625 | if (radeon_connector->ddc_bus && i2c_bus->valid) { |
d3932d6c | 1626 | if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) { |
0294cf4f AD |
1627 | radeon_connector->shared_ddc = true; |
1628 | shared_ddc = true; | |
1629 | } | |
fb939dfc | 1630 | if (radeon_connector->router_bus && router->ddc_valid && |
26b5bc98 AD |
1631 | (radeon_connector->router.router_id == router->router_id)) { |
1632 | radeon_connector->shared_ddc = false; | |
1633 | shared_ddc = false; | |
1634 | } | |
0294cf4f | 1635 | } |
771fe6b9 JG |
1636 | } |
1637 | ||
eac4dff6 AD |
1638 | /* check if it's a dp bridge */ |
1639 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | |
1640 | radeon_encoder = to_radeon_encoder(encoder); | |
1641 | if (radeon_encoder->devices & supported_device) { | |
1642 | switch (radeon_encoder->encoder_id) { | |
1643 | case ENCODER_OBJECT_ID_TRAVIS: | |
1644 | case ENCODER_OBJECT_ID_NUTMEG: | |
1645 | is_dp_bridge = true; | |
1646 | break; | |
1647 | default: | |
1648 | break; | |
1649 | } | |
1650 | } | |
1651 | } | |
1652 | ||
771fe6b9 JG |
1653 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); |
1654 | if (!radeon_connector) | |
1655 | return; | |
1656 | ||
1657 | connector = &radeon_connector->base; | |
1658 | ||
1659 | radeon_connector->connector_id = connector_id; | |
1660 | radeon_connector->devices = supported_device; | |
0294cf4f | 1661 | radeon_connector->shared_ddc = shared_ddc; |
b75fad06 | 1662 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1663 | radeon_connector->hpd = *hpd; |
bc1c4dc3 | 1664 | |
26b5bc98 | 1665 | radeon_connector->router = *router; |
fb939dfc | 1666 | if (router->ddc_valid || router->cd_valid) { |
26b5bc98 AD |
1667 | radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info); |
1668 | if (!radeon_connector->router_bus) | |
a70882aa | 1669 | DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n"); |
26b5bc98 | 1670 | } |
eac4dff6 AD |
1671 | |
1672 | if (is_dp_bridge) { | |
771fe6b9 JG |
1673 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); |
1674 | if (!radeon_dig_connector) | |
1675 | goto failed; | |
771fe6b9 JG |
1676 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1677 | radeon_connector->con_priv = radeon_dig_connector; | |
771fe6b9 | 1678 | if (i2c_bus->valid) { |
eac4dff6 AD |
1679 | /* add DP i2c bus */ |
1680 | if (connector_type == DRM_MODE_CONNECTOR_eDP) | |
1681 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1682 | else | |
1683 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1684 | if (!radeon_dig_connector->dp_i2c_bus) | |
1685 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
f376b94f | 1686 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1687 | if (!radeon_connector->ddc_bus) |
eac4dff6 | 1688 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1689 | } |
eac4dff6 AD |
1690 | switch (connector_type) { |
1691 | case DRM_MODE_CONNECTOR_VGA: | |
1692 | case DRM_MODE_CONNECTOR_DVIA: | |
1693 | default: | |
855f5f1d AD |
1694 | drm_connector_init(dev, &radeon_connector->base, |
1695 | &radeon_dp_connector_funcs, connector_type); | |
1696 | drm_connector_helper_add(&radeon_connector->base, | |
1697 | &radeon_dp_connector_helper_funcs); | |
eac4dff6 AD |
1698 | connector->interlace_allowed = true; |
1699 | connector->doublescan_allowed = true; | |
d629a3ce | 1700 | radeon_connector->dac_load_detect = true; |
e35755fa | 1701 | drm_object_attach_property(&radeon_connector->base.base, |
d629a3ce AD |
1702 | rdev->mode_info.load_detect_property, |
1703 | 1); | |
eac4dff6 AD |
1704 | break; |
1705 | case DRM_MODE_CONNECTOR_DVII: | |
1706 | case DRM_MODE_CONNECTOR_DVID: | |
1707 | case DRM_MODE_CONNECTOR_HDMIA: | |
1708 | case DRM_MODE_CONNECTOR_HDMIB: | |
1709 | case DRM_MODE_CONNECTOR_DisplayPort: | |
855f5f1d AD |
1710 | drm_connector_init(dev, &radeon_connector->base, |
1711 | &radeon_dp_connector_funcs, connector_type); | |
1712 | drm_connector_helper_add(&radeon_connector->base, | |
1713 | &radeon_dp_connector_helper_funcs); | |
e35755fa | 1714 | drm_object_attach_property(&radeon_connector->base.base, |
430f70d5 | 1715 | rdev->mode_info.underscan_property, |
56bec7c0 | 1716 | UNDERSCAN_OFF); |
e35755fa | 1717 | drm_object_attach_property(&radeon_connector->base.base, |
5bccf5e3 MG |
1718 | rdev->mode_info.underscan_hborder_property, |
1719 | 0); | |
e35755fa | 1720 | drm_object_attach_property(&radeon_connector->base.base, |
5bccf5e3 MG |
1721 | rdev->mode_info.underscan_vborder_property, |
1722 | 0); | |
8666c076 AD |
1723 | drm_object_attach_property(&radeon_connector->base.base, |
1724 | rdev->mode_info.audio_property, | |
ad415506 | 1725 | RADEON_AUDIO_AUTO); |
6214bb74 AD |
1726 | drm_object_attach_property(&radeon_connector->base.base, |
1727 | rdev->mode_info.dither_property, | |
1728 | RADEON_FMT_DITHER_DISABLE); | |
eac4dff6 AD |
1729 | subpixel_order = SubPixelHorizontalRGB; |
1730 | connector->interlace_allowed = true; | |
1731 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1732 | connector->doublescan_allowed = true; | |
1733 | else | |
1734 | connector->doublescan_allowed = false; | |
d629a3ce AD |
1735 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { |
1736 | radeon_connector->dac_load_detect = true; | |
e35755fa | 1737 | drm_object_attach_property(&radeon_connector->base.base, |
d629a3ce AD |
1738 | rdev->mode_info.load_detect_property, |
1739 | 1); | |
1740 | } | |
eac4dff6 AD |
1741 | break; |
1742 | case DRM_MODE_CONNECTOR_LVDS: | |
1743 | case DRM_MODE_CONNECTOR_eDP: | |
855f5f1d AD |
1744 | drm_connector_init(dev, &radeon_connector->base, |
1745 | &radeon_lvds_bridge_connector_funcs, connector_type); | |
1746 | drm_connector_helper_add(&radeon_connector->base, | |
1747 | &radeon_dp_connector_helper_funcs); | |
e35755fa | 1748 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1749 | dev->mode_config.scaling_mode_property, |
1750 | DRM_MODE_SCALE_FULLSCREEN); | |
1751 | subpixel_order = SubPixelHorizontalRGB; | |
1752 | connector->interlace_allowed = false; | |
1753 | connector->doublescan_allowed = false; | |
1754 | break; | |
5bccf5e3 | 1755 | } |
eac4dff6 AD |
1756 | } else { |
1757 | switch (connector_type) { | |
1758 | case DRM_MODE_CONNECTOR_VGA: | |
1759 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1760 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1761 | if (i2c_bus->valid) { | |
1762 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1763 | if (!radeon_connector->ddc_bus) | |
1764 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1765 | } | |
390d0bbe | 1766 | radeon_connector->dac_load_detect = true; |
e35755fa | 1767 | drm_object_attach_property(&radeon_connector->base.base, |
390d0bbe AD |
1768 | rdev->mode_info.load_detect_property, |
1769 | 1); | |
eac4dff6 AD |
1770 | /* no HPD on analog connectors */ |
1771 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1772 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1773 | connector->interlace_allowed = true; | |
c49948f4 | 1774 | connector->doublescan_allowed = true; |
eac4dff6 AD |
1775 | break; |
1776 | case DRM_MODE_CONNECTOR_DVIA: | |
1777 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1778 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1779 | if (i2c_bus->valid) { | |
1780 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1781 | if (!radeon_connector->ddc_bus) | |
1782 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1783 | } | |
1784 | radeon_connector->dac_load_detect = true; | |
e35755fa | 1785 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1786 | rdev->mode_info.load_detect_property, |
1787 | 1); | |
1788 | /* no HPD on analog connectors */ | |
1789 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1790 | connector->interlace_allowed = true; | |
1791 | connector->doublescan_allowed = true; | |
1792 | break; | |
1793 | case DRM_MODE_CONNECTOR_DVII: | |
1794 | case DRM_MODE_CONNECTOR_DVID: | |
1795 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1796 | if (!radeon_dig_connector) | |
1797 | goto failed; | |
1798 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1799 | radeon_connector->con_priv = radeon_dig_connector; | |
1800 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1801 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1802 | if (i2c_bus->valid) { | |
1803 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1804 | if (!radeon_connector->ddc_bus) | |
1805 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1806 | } | |
1807 | subpixel_order = SubPixelHorizontalRGB; | |
e35755fa | 1808 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1809 | rdev->mode_info.coherent_mode_property, |
1810 | 1); | |
1811 | if (ASIC_IS_AVIVO(rdev)) { | |
e35755fa | 1812 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1813 | rdev->mode_info.underscan_property, |
1814 | UNDERSCAN_OFF); | |
e35755fa | 1815 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1816 | rdev->mode_info.underscan_hborder_property, |
1817 | 0); | |
e35755fa | 1818 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1819 | rdev->mode_info.underscan_vborder_property, |
1820 | 0); | |
1821 | } | |
8666c076 AD |
1822 | if (ASIC_IS_DCE2(rdev)) { |
1823 | drm_object_attach_property(&radeon_connector->base.base, | |
1824 | rdev->mode_info.audio_property, | |
ad415506 | 1825 | RADEON_AUDIO_AUTO); |
8666c076 | 1826 | } |
6214bb74 AD |
1827 | if (ASIC_IS_AVIVO(rdev)) { |
1828 | drm_object_attach_property(&radeon_connector->base.base, | |
1829 | rdev->mode_info.dither_property, | |
1830 | RADEON_FMT_DITHER_DISABLE); | |
1831 | } | |
eac4dff6 AD |
1832 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { |
1833 | radeon_connector->dac_load_detect = true; | |
e35755fa | 1834 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1835 | rdev->mode_info.load_detect_property, |
1836 | 1); | |
1837 | } | |
1838 | connector->interlace_allowed = true; | |
1839 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
1840 | connector->doublescan_allowed = true; | |
1841 | else | |
1842 | connector->doublescan_allowed = false; | |
1843 | break; | |
1844 | case DRM_MODE_CONNECTOR_HDMIA: | |
1845 | case DRM_MODE_CONNECTOR_HDMIB: | |
1846 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1847 | if (!radeon_dig_connector) | |
1848 | goto failed; | |
1849 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1850 | radeon_connector->con_priv = radeon_dig_connector; | |
1851 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1852 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1853 | if (i2c_bus->valid) { | |
1854 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1855 | if (!radeon_connector->ddc_bus) | |
1856 | DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1857 | } | |
e35755fa | 1858 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1859 | rdev->mode_info.coherent_mode_property, |
1860 | 1); | |
1861 | if (ASIC_IS_AVIVO(rdev)) { | |
e35755fa | 1862 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1863 | rdev->mode_info.underscan_property, |
1864 | UNDERSCAN_OFF); | |
e35755fa | 1865 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1866 | rdev->mode_info.underscan_hborder_property, |
1867 | 0); | |
e35755fa | 1868 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1869 | rdev->mode_info.underscan_vborder_property, |
1870 | 0); | |
1871 | } | |
8666c076 AD |
1872 | if (ASIC_IS_DCE2(rdev)) { |
1873 | drm_object_attach_property(&radeon_connector->base.base, | |
1874 | rdev->mode_info.audio_property, | |
ad415506 | 1875 | RADEON_AUDIO_AUTO); |
8666c076 | 1876 | } |
6214bb74 AD |
1877 | if (ASIC_IS_AVIVO(rdev)) { |
1878 | drm_object_attach_property(&radeon_connector->base.base, | |
1879 | rdev->mode_info.dither_property, | |
1880 | RADEON_FMT_DITHER_DISABLE); | |
1881 | } | |
eac4dff6 AD |
1882 | subpixel_order = SubPixelHorizontalRGB; |
1883 | connector->interlace_allowed = true; | |
1884 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1885 | connector->doublescan_allowed = true; | |
1886 | else | |
1887 | connector->doublescan_allowed = false; | |
1888 | break; | |
1889 | case DRM_MODE_CONNECTOR_DisplayPort: | |
1890 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1891 | if (!radeon_dig_connector) | |
1892 | goto failed; | |
1893 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1894 | radeon_connector->con_priv = radeon_dig_connector; | |
1895 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | |
1896 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
1897 | if (i2c_bus->valid) { | |
1898 | /* add DP i2c bus */ | |
1899 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1900 | if (!radeon_dig_connector->dp_i2c_bus) | |
1901 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1902 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1903 | if (!radeon_connector->ddc_bus) | |
1904 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1905 | } | |
1906 | subpixel_order = SubPixelHorizontalRGB; | |
e35755fa | 1907 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1908 | rdev->mode_info.coherent_mode_property, |
1909 | 1); | |
1910 | if (ASIC_IS_AVIVO(rdev)) { | |
e35755fa | 1911 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1912 | rdev->mode_info.underscan_property, |
1913 | UNDERSCAN_OFF); | |
e35755fa | 1914 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1915 | rdev->mode_info.underscan_hborder_property, |
1916 | 0); | |
e35755fa | 1917 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1918 | rdev->mode_info.underscan_vborder_property, |
1919 | 0); | |
1920 | } | |
8666c076 AD |
1921 | if (ASIC_IS_DCE2(rdev)) { |
1922 | drm_object_attach_property(&radeon_connector->base.base, | |
1923 | rdev->mode_info.audio_property, | |
ad415506 | 1924 | RADEON_AUDIO_AUTO); |
8666c076 | 1925 | } |
6214bb74 AD |
1926 | if (ASIC_IS_AVIVO(rdev)) { |
1927 | drm_object_attach_property(&radeon_connector->base.base, | |
1928 | rdev->mode_info.dither_property, | |
1929 | RADEON_FMT_DITHER_DISABLE); | |
1930 | } | |
eac4dff6 AD |
1931 | connector->interlace_allowed = true; |
1932 | /* in theory with a DP to VGA converter... */ | |
c49948f4 | 1933 | connector->doublescan_allowed = false; |
eac4dff6 AD |
1934 | break; |
1935 | case DRM_MODE_CONNECTOR_eDP: | |
1936 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1937 | if (!radeon_dig_connector) | |
1938 | goto failed; | |
1939 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1940 | radeon_connector->con_priv = radeon_dig_connector; | |
855f5f1d | 1941 | drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type); |
eac4dff6 AD |
1942 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); |
1943 | if (i2c_bus->valid) { | |
1944 | /* add DP i2c bus */ | |
1945 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1946 | if (!radeon_dig_connector->dp_i2c_bus) | |
1947 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1948 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1949 | if (!radeon_connector->ddc_bus) | |
1950 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1951 | } | |
e35755fa | 1952 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1953 | dev->mode_config.scaling_mode_property, |
1954 | DRM_MODE_SCALE_FULLSCREEN); | |
1955 | subpixel_order = SubPixelHorizontalRGB; | |
1956 | connector->interlace_allowed = false; | |
1957 | connector->doublescan_allowed = false; | |
1958 | break; | |
1959 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1960 | case DRM_MODE_CONNECTOR_Composite: | |
1961 | case DRM_MODE_CONNECTOR_9PinDIN: | |
1962 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); | |
1963 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1964 | radeon_connector->dac_load_detect = true; | |
e35755fa | 1965 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1966 | rdev->mode_info.load_detect_property, |
1967 | 1); | |
e35755fa | 1968 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1969 | rdev->mode_info.tv_std_property, |
1970 | radeon_atombios_get_tv_info(rdev)); | |
1971 | /* no HPD on analog connectors */ | |
1972 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1973 | connector->interlace_allowed = false; | |
1974 | connector->doublescan_allowed = false; | |
1975 | break; | |
1976 | case DRM_MODE_CONNECTOR_LVDS: | |
1977 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1978 | if (!radeon_dig_connector) | |
1979 | goto failed; | |
1980 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1981 | radeon_connector->con_priv = radeon_dig_connector; | |
1982 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
1983 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); | |
1984 | if (i2c_bus->valid) { | |
1985 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1986 | if (!radeon_connector->ddc_bus) | |
1987 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1988 | } | |
e35755fa | 1989 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1990 | dev->mode_config.scaling_mode_property, |
1991 | DRM_MODE_SCALE_FULLSCREEN); | |
1992 | subpixel_order = SubPixelHorizontalRGB; | |
1993 | connector->interlace_allowed = false; | |
1994 | connector->doublescan_allowed = false; | |
1995 | break; | |
771fe6b9 | 1996 | } |
771fe6b9 JG |
1997 | } |
1998 | ||
2581afcc | 1999 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
2000 | if (i2c_bus->valid) |
2001 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
2002 | } else | |
2003 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
2004 | ||
771fe6b9 JG |
2005 | connector->display_info.subpixel_order = subpixel_order; |
2006 | drm_sysfs_connector_add(connector); | |
2007 | return; | |
2008 | ||
2009 | failed: | |
771fe6b9 JG |
2010 | drm_connector_cleanup(connector); |
2011 | kfree(connector); | |
2012 | } | |
2013 | ||
2014 | void | |
2015 | radeon_add_legacy_connector(struct drm_device *dev, | |
2016 | uint32_t connector_id, | |
2017 | uint32_t supported_device, | |
2018 | int connector_type, | |
b75fad06 | 2019 | struct radeon_i2c_bus_rec *i2c_bus, |
eed45b30 AD |
2020 | uint16_t connector_object_id, |
2021 | struct radeon_hpd *hpd) | |
771fe6b9 | 2022 | { |
445282db | 2023 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
2024 | struct drm_connector *connector; |
2025 | struct radeon_connector *radeon_connector; | |
2026 | uint32_t subpixel_order = SubPixelNone; | |
2027 | ||
4ce001ab | 2028 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
2029 | return; |
2030 | ||
cf4c12f9 AD |
2031 | /* if the user selected tv=0 don't try and add the connector */ |
2032 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
2033 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
2034 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
2035 | (radeon_tv == 0)) | |
2036 | return; | |
2037 | ||
771fe6b9 JG |
2038 | /* see if we already added it */ |
2039 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
2040 | radeon_connector = to_radeon_connector(connector); | |
2041 | if (radeon_connector->connector_id == connector_id) { | |
2042 | radeon_connector->devices |= supported_device; | |
2043 | return; | |
2044 | } | |
2045 | } | |
2046 | ||
2047 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); | |
2048 | if (!radeon_connector) | |
2049 | return; | |
2050 | ||
2051 | connector = &radeon_connector->base; | |
2052 | ||
2053 | radeon_connector->connector_id = connector_id; | |
2054 | radeon_connector->devices = supported_device; | |
b75fad06 | 2055 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 2056 | radeon_connector->hpd = *hpd; |
bc1c4dc3 | 2057 | |
771fe6b9 JG |
2058 | switch (connector_type) { |
2059 | case DRM_MODE_CONNECTOR_VGA: | |
2060 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 2061 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 2062 | if (i2c_bus->valid) { |
f376b94f | 2063 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 2064 | if (!radeon_connector->ddc_bus) |
a70882aa | 2065 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 2066 | } |
35e4b7af | 2067 | radeon_connector->dac_load_detect = true; |
e35755fa | 2068 | drm_object_attach_property(&radeon_connector->base.base, |
445282db DA |
2069 | rdev->mode_info.load_detect_property, |
2070 | 1); | |
2581afcc AD |
2071 | /* no HPD on analog connectors */ |
2072 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
eb1f8e4f | 2073 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
c49948f4 AD |
2074 | connector->interlace_allowed = true; |
2075 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
2076 | break; |
2077 | case DRM_MODE_CONNECTOR_DVIA: | |
2078 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 2079 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 2080 | if (i2c_bus->valid) { |
f376b94f | 2081 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 2082 | if (!radeon_connector->ddc_bus) |
a70882aa | 2083 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 2084 | } |
35e4b7af | 2085 | radeon_connector->dac_load_detect = true; |
e35755fa | 2086 | drm_object_attach_property(&radeon_connector->base.base, |
445282db DA |
2087 | rdev->mode_info.load_detect_property, |
2088 | 1); | |
2581afcc AD |
2089 | /* no HPD on analog connectors */ |
2090 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
2091 | connector->interlace_allowed = true; |
2092 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
2093 | break; |
2094 | case DRM_MODE_CONNECTOR_DVII: | |
2095 | case DRM_MODE_CONNECTOR_DVID: | |
2096 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 2097 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 2098 | if (i2c_bus->valid) { |
f376b94f | 2099 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 2100 | if (!radeon_connector->ddc_bus) |
a70882aa | 2101 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
68b3adb4 AD |
2102 | } |
2103 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
35e4b7af | 2104 | radeon_connector->dac_load_detect = true; |
e35755fa | 2105 | drm_object_attach_property(&radeon_connector->base.base, |
445282db DA |
2106 | rdev->mode_info.load_detect_property, |
2107 | 1); | |
771fe6b9 JG |
2108 | } |
2109 | subpixel_order = SubPixelHorizontalRGB; | |
c49948f4 AD |
2110 | connector->interlace_allowed = true; |
2111 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
2112 | connector->doublescan_allowed = true; | |
2113 | else | |
2114 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
2115 | break; |
2116 | case DRM_MODE_CONNECTOR_SVIDEO: | |
2117 | case DRM_MODE_CONNECTOR_Composite: | |
2118 | case DRM_MODE_CONNECTOR_9PinDIN: | |
cf4c12f9 AD |
2119 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); |
2120 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
2121 | radeon_connector->dac_load_detect = true; | |
2122 | /* RS400,RC410,RS480 chipset seems to report a lot | |
2123 | * of false positive on load detect, we haven't yet | |
2124 | * found a way to make load detect reliable on those | |
2125 | * chipset, thus just disable it for TV. | |
2126 | */ | |
2127 | if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) | |
2128 | radeon_connector->dac_load_detect = false; | |
e35755fa | 2129 | drm_object_attach_property(&radeon_connector->base.base, |
cf4c12f9 AD |
2130 | rdev->mode_info.load_detect_property, |
2131 | radeon_connector->dac_load_detect); | |
e35755fa | 2132 | drm_object_attach_property(&radeon_connector->base.base, |
cf4c12f9 AD |
2133 | rdev->mode_info.tv_std_property, |
2134 | radeon_combios_get_tv_info(rdev)); | |
2135 | /* no HPD on analog connectors */ | |
2136 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
2137 | connector->interlace_allowed = false; |
2138 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
2139 | break; |
2140 | case DRM_MODE_CONNECTOR_LVDS: | |
2141 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
0b4c0f3f | 2142 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
771fe6b9 | 2143 | if (i2c_bus->valid) { |
f376b94f | 2144 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 2145 | if (!radeon_connector->ddc_bus) |
a70882aa | 2146 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 2147 | } |
e35755fa | 2148 | drm_object_attach_property(&radeon_connector->base.base, |
445282db DA |
2149 | dev->mode_config.scaling_mode_property, |
2150 | DRM_MODE_SCALE_FULLSCREEN); | |
771fe6b9 | 2151 | subpixel_order = SubPixelHorizontalRGB; |
c49948f4 AD |
2152 | connector->interlace_allowed = false; |
2153 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
2154 | break; |
2155 | } | |
2156 | ||
2581afcc | 2157 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
2158 | if (i2c_bus->valid) |
2159 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
2160 | } else | |
2161 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
771fe6b9 JG |
2162 | connector->display_info.subpixel_order = subpixel_order; |
2163 | drm_sysfs_connector_add(connector); | |
771fe6b9 | 2164 | } |