drm/radeon/kms: add support for load detection on dp bridges
[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_connectors.c
CommitLineData
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1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
26#include "drmP.h"
27#include "drm_edid.h"
28#include "drm_crtc_helper.h"
d50ba256 29#include "drm_fb_helper.h"
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30#include "radeon_drm.h"
31#include "radeon.h"
923f6848 32#include "atom.h"
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33
34extern void
35radeon_combios_connected_scratch_regs(struct drm_connector *connector,
36 struct drm_encoder *encoder,
37 bool connected);
38extern void
39radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
40 struct drm_encoder *encoder,
41 bool connected);
42
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43extern void
44radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder,
45 struct drm_connector *drm_connector);
46
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47void radeon_connector_hotplug(struct drm_connector *connector)
48{
49 struct drm_device *dev = connector->dev;
50 struct radeon_device *rdev = dev->dev_private;
51 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
52
1e85e1d0 53 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
d4877cf2 54
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AD
55 /* powering up/down the eDP panel generates hpd events which
56 * can interfere with modesetting.
57 */
58 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP)
59 return;
60
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61 /* pre-r600 did not always have the hpd pins mapped accurately to connectors */
62 if (rdev->family >= CHIP_R600) {
63 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
64 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
65 else
66 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
d4877cf2 67 }
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68}
69
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70static void radeon_property_change_mode(struct drm_encoder *encoder)
71{
72 struct drm_crtc *crtc = encoder->crtc;
73
74 if (crtc && crtc->enabled) {
75 drm_crtc_helper_set_mode(crtc, &crtc->mode,
76 crtc->x, crtc->y, crtc->fb);
77 }
78}
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79static void
80radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
81{
82 struct drm_device *dev = connector->dev;
83 struct radeon_device *rdev = dev->dev_private;
84 struct drm_encoder *best_encoder = NULL;
85 struct drm_encoder *encoder = NULL;
86 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
87 struct drm_mode_object *obj;
88 bool connected;
89 int i;
90
91 best_encoder = connector_funcs->best_encoder(connector);
92
93 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
94 if (connector->encoder_ids[i] == 0)
95 break;
96
97 obj = drm_mode_object_find(connector->dev,
98 connector->encoder_ids[i],
99 DRM_MODE_OBJECT_ENCODER);
100 if (!obj)
101 continue;
102
103 encoder = obj_to_encoder(obj);
104
105 if ((encoder == best_encoder) && (status == connector_status_connected))
106 connected = true;
107 else
108 connected = false;
109
110 if (rdev->is_atom_bios)
111 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
112 else
113 radeon_combios_connected_scratch_regs(connector, encoder, connected);
114
115 }
116}
117
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118struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
119{
120 struct drm_mode_object *obj;
121 struct drm_encoder *encoder;
122 int i;
123
124 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
125 if (connector->encoder_ids[i] == 0)
126 break;
127
128 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
129 if (!obj)
130 continue;
131
132 encoder = obj_to_encoder(obj);
133 if (encoder->encoder_type == encoder_type)
134 return encoder;
135 }
136 return NULL;
137}
138
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139struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
140{
141 int enc_id = connector->encoder_ids[0];
142 struct drm_mode_object *obj;
143 struct drm_encoder *encoder;
144
145 /* pick the encoder ids */
146 if (enc_id) {
147 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
148 if (!obj)
149 return NULL;
150 encoder = obj_to_encoder(obj);
151 return encoder;
152 }
153 return NULL;
154}
155
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156/*
157 * radeon_connector_analog_encoder_conflict_solve
158 * - search for other connectors sharing this encoder
159 * if priority is true, then set them disconnected if this is connected
160 * if priority is false, set us disconnected if they are connected
161 */
162static enum drm_connector_status
163radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
164 struct drm_encoder *encoder,
165 enum drm_connector_status current_status,
166 bool priority)
167{
168 struct drm_device *dev = connector->dev;
169 struct drm_connector *conflict;
08d07511 170 struct radeon_connector *radeon_conflict;
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171 int i;
172
173 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
174 if (conflict == connector)
175 continue;
176
08d07511 177 radeon_conflict = to_radeon_connector(conflict);
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178 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
179 if (conflict->encoder_ids[i] == 0)
180 break;
181
182 /* if the IDs match */
183 if (conflict->encoder_ids[i] == encoder->base.id) {
184 if (conflict->status != connector_status_connected)
185 continue;
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186
187 if (radeon_conflict->use_digital)
188 continue;
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189
190 if (priority == true) {
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191 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict));
192 DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(connector));
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193 conflict->status = connector_status_disconnected;
194 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
195 } else {
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196 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector));
197 DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(conflict));
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198 current_status = connector_status_disconnected;
199 }
200 break;
201 }
202 }
203 }
204 return current_status;
205
206}
207
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208static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
209{
210 struct drm_device *dev = encoder->dev;
211 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
212 struct drm_display_mode *mode = NULL;
de2103e4 213 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
771fe6b9 214
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215 if (native_mode->hdisplay != 0 &&
216 native_mode->vdisplay != 0 &&
217 native_mode->clock != 0) {
fb06ca8f 218 mode = drm_mode_duplicate(dev, native_mode);
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219 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
220 drm_mode_set_name(mode);
221
d9fdaafb 222 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
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223 } else if (native_mode->hdisplay != 0 &&
224 native_mode->vdisplay != 0) {
225 /* mac laptops without an edid */
226 /* Note that this is not necessarily the exact panel mode,
227 * but an approximation based on the cvt formula. For these
228 * systems we should ideally read the mode info out of the
229 * registers or add a mode table, but this works and is much
230 * simpler.
231 */
232 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
233 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
d9fdaafb 234 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
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235 }
236 return mode;
237}
238
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239static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
240{
241 struct drm_device *dev = encoder->dev;
242 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
243 struct drm_display_mode *mode = NULL;
de2103e4 244 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
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245 int i;
246 struct mode_size {
247 int w;
248 int h;
249 } common_modes[17] = {
250 { 640, 480},
251 { 720, 480},
252 { 800, 600},
253 { 848, 480},
254 {1024, 768},
255 {1152, 768},
256 {1280, 720},
257 {1280, 800},
258 {1280, 854},
259 {1280, 960},
260 {1280, 1024},
261 {1440, 900},
262 {1400, 1050},
263 {1680, 1050},
264 {1600, 1200},
265 {1920, 1080},
266 {1920, 1200}
267 };
268
269 for (i = 0; i < 17; i++) {
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270 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
271 if (common_modes[i].w > 1024 ||
272 common_modes[i].h > 768)
273 continue;
274 }
923f6848 275 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
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276 if (common_modes[i].w > native_mode->hdisplay ||
277 common_modes[i].h > native_mode->vdisplay ||
278 (common_modes[i].w == native_mode->hdisplay &&
279 common_modes[i].h == native_mode->vdisplay))
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280 continue;
281 }
282 if (common_modes[i].w < 320 || common_modes[i].h < 200)
283 continue;
284
d50ba256 285 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
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286 drm_mode_probed_add(connector, mode);
287 }
288}
289
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290int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
291 uint64_t val)
292{
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293 struct drm_device *dev = connector->dev;
294 struct radeon_device *rdev = dev->dev_private;
295 struct drm_encoder *encoder;
296 struct radeon_encoder *radeon_encoder;
297
298 if (property == rdev->mode_info.coherent_mode_property) {
299 struct radeon_encoder_atom_dig *dig;
ce227c41 300 bool new_coherent_mode;
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301
302 /* need to find digital encoder on connector */
303 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
304 if (!encoder)
305 return 0;
306
307 radeon_encoder = to_radeon_encoder(encoder);
308
309 if (!radeon_encoder->enc_priv)
310 return 0;
311
312 dig = radeon_encoder->enc_priv;
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313 new_coherent_mode = val ? true : false;
314 if (dig->coherent_mode != new_coherent_mode) {
315 dig->coherent_mode = new_coherent_mode;
316 radeon_property_change_mode(&radeon_encoder->base);
317 }
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318 }
319
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320 if (property == rdev->mode_info.underscan_property) {
321 /* need to find digital encoder on connector */
322 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
323 if (!encoder)
324 return 0;
325
326 radeon_encoder = to_radeon_encoder(encoder);
327
328 if (radeon_encoder->underscan_type != val) {
329 radeon_encoder->underscan_type = val;
330 radeon_property_change_mode(&radeon_encoder->base);
331 }
332 }
333
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MG
334 if (property == rdev->mode_info.underscan_hborder_property) {
335 /* need to find digital encoder on connector */
336 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
337 if (!encoder)
338 return 0;
339
340 radeon_encoder = to_radeon_encoder(encoder);
341
342 if (radeon_encoder->underscan_hborder != val) {
343 radeon_encoder->underscan_hborder = val;
344 radeon_property_change_mode(&radeon_encoder->base);
345 }
346 }
347
348 if (property == rdev->mode_info.underscan_vborder_property) {
349 /* need to find digital encoder on connector */
350 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
351 if (!encoder)
352 return 0;
353
354 radeon_encoder = to_radeon_encoder(encoder);
355
356 if (radeon_encoder->underscan_vborder != val) {
357 radeon_encoder->underscan_vborder = val;
358 radeon_property_change_mode(&radeon_encoder->base);
359 }
360 }
361
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362 if (property == rdev->mode_info.tv_std_property) {
363 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
364 if (!encoder) {
365 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
366 }
367
368 if (!encoder)
369 return 0;
370
371 radeon_encoder = to_radeon_encoder(encoder);
372 if (!radeon_encoder->enc_priv)
373 return 0;
643acacf 374 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
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DA
375 struct radeon_encoder_atom_dac *dac_int;
376 dac_int = radeon_encoder->enc_priv;
377 dac_int->tv_std = val;
378 } else {
379 struct radeon_encoder_tv_dac *dac_int;
380 dac_int = radeon_encoder->enc_priv;
381 dac_int->tv_std = val;
382 }
383 radeon_property_change_mode(&radeon_encoder->base);
384 }
385
386 if (property == rdev->mode_info.load_detect_property) {
387 struct radeon_connector *radeon_connector =
388 to_radeon_connector(connector);
389
390 if (val == 0)
391 radeon_connector->dac_load_detect = false;
392 else
393 radeon_connector->dac_load_detect = true;
394 }
395
396 if (property == rdev->mode_info.tmds_pll_property) {
397 struct radeon_encoder_int_tmds *tmds = NULL;
398 bool ret = false;
399 /* need to find digital encoder on connector */
400 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
401 if (!encoder)
402 return 0;
403
404 radeon_encoder = to_radeon_encoder(encoder);
405
406 tmds = radeon_encoder->enc_priv;
407 if (!tmds)
408 return 0;
409
410 if (val == 0) {
411 if (rdev->is_atom_bios)
412 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
413 else
414 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
415 }
416 if (val == 1 || ret == false) {
417 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
418 }
419 radeon_property_change_mode(&radeon_encoder->base);
420 }
421
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422 return 0;
423}
424
8dfaa8a7
MD
425static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
426 struct drm_connector *connector)
427{
428 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 429 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
8dfaa8a7
MD
430
431 /* Try to get native mode details from EDID if necessary */
de2103e4 432 if (!native_mode->clock) {
8dfaa8a7
MD
433 struct drm_display_mode *t, *mode;
434
435 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
de2103e4
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436 if (mode->hdisplay == native_mode->hdisplay &&
437 mode->vdisplay == native_mode->vdisplay) {
438 *native_mode = *mode;
439 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
c5d46b4e 440 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
8dfaa8a7
MD
441 break;
442 }
443 }
444 }
de2103e4 445 if (!native_mode->clock) {
c5d46b4e 446 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
8dfaa8a7
MD
447 radeon_encoder->rmx_type = RMX_OFF;
448 }
449}
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450
451static int radeon_lvds_get_modes(struct drm_connector *connector)
452{
453 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
454 struct drm_encoder *encoder;
455 int ret = 0;
456 struct drm_display_mode *mode;
457
458 if (radeon_connector->ddc_bus) {
459 ret = radeon_ddc_get_modes(radeon_connector);
460 if (ret > 0) {
7747b713 461 encoder = radeon_best_single_encoder(connector);
8dfaa8a7
MD
462 if (encoder) {
463 radeon_fixup_lvds_native_mode(encoder, connector);
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AD
464 /* add scaled modes */
465 radeon_add_common_modes(encoder, connector);
8dfaa8a7 466 }
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467 return ret;
468 }
469 }
470
471 encoder = radeon_best_single_encoder(connector);
472 if (!encoder)
473 return 0;
474
475 /* we have no EDID modes */
476 mode = radeon_fp_native_mode(encoder);
477 if (mode) {
478 ret = 1;
479 drm_mode_probed_add(connector, mode);
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480 /* add the width/height from vbios tables if available */
481 connector->display_info.width_mm = mode->width_mm;
482 connector->display_info.height_mm = mode->height_mm;
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483 /* add scaled modes */
484 radeon_add_common_modes(encoder, connector);
771fe6b9 485 }
923f6848 486
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487 return ret;
488}
489
490static int radeon_lvds_mode_valid(struct drm_connector *connector,
491 struct drm_display_mode *mode)
492{
a3fa6320
AD
493 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
494
495 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
496 return MODE_PANEL;
497
498 if (encoder) {
499 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
500 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
501
502 /* AVIVO hardware supports downscaling modes larger than the panel
503 * to the panel size, but I'm not sure this is desirable.
504 */
505 if ((mode->hdisplay > native_mode->hdisplay) ||
506 (mode->vdisplay > native_mode->vdisplay))
507 return MODE_PANEL;
508
509 /* if scaling is disabled, block non-native modes */
510 if (radeon_encoder->rmx_type == RMX_OFF) {
511 if ((mode->hdisplay != native_mode->hdisplay) ||
512 (mode->vdisplay != native_mode->vdisplay))
513 return MODE_PANEL;
514 }
515 }
516
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517 return MODE_OK;
518}
519
7b334fcb 520static enum drm_connector_status
930a9e28 521radeon_lvds_detect(struct drm_connector *connector, bool force)
771fe6b9 522{
0549a061 523 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2ffb8429 524 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0549a061 525 enum drm_connector_status ret = connector_status_disconnected;
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AD
526
527 if (encoder) {
528 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 529 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2ffb8429
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530
531 /* check if panel is valid */
de2103e4 532 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
2ffb8429
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533 ret = connector_status_connected;
534
535 }
0549a061
AD
536
537 /* check for edid as well */
0294cf4f
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538 if (radeon_connector->edid)
539 ret = connector_status_connected;
540 else {
541 if (radeon_connector->ddc_bus) {
0294cf4f
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542 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
543 &radeon_connector->ddc_bus->adapter);
0294cf4f
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544 if (radeon_connector->edid)
545 ret = connector_status_connected;
546 }
0549a061 547 }
771fe6b9 548 /* check acpi lid status ??? */
2ffb8429 549
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550 radeon_connector_update_scratch_regs(connector, ret);
551 return ret;
552}
553
554static void radeon_connector_destroy(struct drm_connector *connector)
555{
556 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
557
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558 if (radeon_connector->edid)
559 kfree(radeon_connector->edid);
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560 kfree(radeon_connector->con_priv);
561 drm_sysfs_connector_remove(connector);
562 drm_connector_cleanup(connector);
563 kfree(connector);
564}
565
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566static int radeon_lvds_set_property(struct drm_connector *connector,
567 struct drm_property *property,
568 uint64_t value)
569{
570 struct drm_device *dev = connector->dev;
571 struct radeon_encoder *radeon_encoder;
572 enum radeon_rmx_type rmx_type;
573
d9fdaafb 574 DRM_DEBUG_KMS("\n");
445282db
DA
575 if (property != dev->mode_config.scaling_mode_property)
576 return 0;
577
578 if (connector->encoder)
579 radeon_encoder = to_radeon_encoder(connector->encoder);
580 else {
581 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
582 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
583 }
584
585 switch (value) {
586 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
587 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
588 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
589 default:
590 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
591 }
592 if (radeon_encoder->rmx_type == rmx_type)
593 return 0;
594
595 radeon_encoder->rmx_type = rmx_type;
596
597 radeon_property_change_mode(&radeon_encoder->base);
598 return 0;
599}
600
601
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602struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
603 .get_modes = radeon_lvds_get_modes,
604 .mode_valid = radeon_lvds_mode_valid,
605 .best_encoder = radeon_best_single_encoder,
606};
607
608struct drm_connector_funcs radeon_lvds_connector_funcs = {
609 .dpms = drm_helper_connector_dpms,
610 .detect = radeon_lvds_detect,
611 .fill_modes = drm_helper_probe_single_connector_modes,
612 .destroy = radeon_connector_destroy,
445282db 613 .set_property = radeon_lvds_set_property,
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614};
615
616static int radeon_vga_get_modes(struct drm_connector *connector)
617{
618 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
619 int ret;
620
621 ret = radeon_ddc_get_modes(radeon_connector);
622
623 return ret;
624}
625
626static int radeon_vga_mode_valid(struct drm_connector *connector,
627 struct drm_display_mode *mode)
628{
b20f9bef
AD
629 struct drm_device *dev = connector->dev;
630 struct radeon_device *rdev = dev->dev_private;
631
a3fa6320 632 /* XXX check mode bandwidth */
b20f9bef
AD
633
634 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
635 return MODE_CLOCK_HIGH;
636
771fe6b9
JG
637 return MODE_OK;
638}
639
7b334fcb 640static enum drm_connector_status
930a9e28 641radeon_vga_detect(struct drm_connector *connector, bool force)
771fe6b9 642{
fafcf94e
AD
643 struct drm_device *dev = connector->dev;
644 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
645 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
646 struct drm_encoder *encoder;
647 struct drm_encoder_helper_funcs *encoder_funcs;
4b9d2a21 648 bool dret = false;
771fe6b9
JG
649 enum drm_connector_status ret = connector_status_disconnected;
650
4ce001ab
DA
651 encoder = radeon_best_single_encoder(connector);
652 if (!encoder)
653 ret = connector_status_disconnected;
654
eb6b6d7c 655 if (radeon_connector->ddc_bus)
4b9d2a21 656 dret = radeon_ddc_probe(radeon_connector);
0294cf4f
AD
657 if (dret) {
658 if (radeon_connector->edid) {
659 kfree(radeon_connector->edid);
660 radeon_connector->edid = NULL;
661 }
0294cf4f 662 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
0294cf4f
AD
663
664 if (!radeon_connector->edid) {
f82f5f3a
JG
665 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
666 drm_get_connector_name(connector));
667 ret = connector_status_connected;
0294cf4f
AD
668 } else {
669 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
670
671 /* some oems have boards with separate digital and analog connectors
672 * with a shared ddc line (often vga + hdmi)
673 */
674 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
675 kfree(radeon_connector->edid);
676 radeon_connector->edid = NULL;
677 ret = connector_status_disconnected;
678 } else
679 ret = connector_status_connected;
680 }
681 } else {
c3cceedd
DA
682
683 /* if we aren't forcing don't do destructive polling */
684 if (!force)
685 return connector->status;
686
d8a7f792 687 if (radeon_connector->dac_load_detect && encoder) {
445282db
DA
688 encoder_funcs = encoder->helper_private;
689 ret = encoder_funcs->detect(encoder, connector);
690 }
771fe6b9
JG
691 }
692
4ce001ab
DA
693 if (ret == connector_status_connected)
694 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
fafcf94e
AD
695
696 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
697 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
698 * by other means, assume the CRT is connected and use that EDID.
699 */
700 if ((!rdev->is_atom_bios) &&
701 (ret == connector_status_disconnected) &&
702 rdev->mode_info.bios_hardcoded_edid_size) {
703 ret = connector_status_connected;
704 }
705
771fe6b9
JG
706 radeon_connector_update_scratch_regs(connector, ret);
707 return ret;
708}
709
710struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
711 .get_modes = radeon_vga_get_modes,
712 .mode_valid = radeon_vga_mode_valid,
713 .best_encoder = radeon_best_single_encoder,
714};
715
716struct drm_connector_funcs radeon_vga_connector_funcs = {
717 .dpms = drm_helper_connector_dpms,
718 .detect = radeon_vga_detect,
719 .fill_modes = drm_helper_probe_single_connector_modes,
720 .destroy = radeon_connector_destroy,
721 .set_property = radeon_connector_set_property,
722};
723
4ce001ab
DA
724static int radeon_tv_get_modes(struct drm_connector *connector)
725{
726 struct drm_device *dev = connector->dev;
923f6848 727 struct radeon_device *rdev = dev->dev_private;
4ce001ab 728 struct drm_display_mode *tv_mode;
923f6848 729 struct drm_encoder *encoder;
4ce001ab 730
923f6848
AD
731 encoder = radeon_best_single_encoder(connector);
732 if (!encoder)
733 return 0;
4ce001ab 734
923f6848
AD
735 /* avivo chips can scale any mode */
736 if (rdev->family >= CHIP_RS600)
737 /* add scaled modes */
738 radeon_add_common_modes(encoder, connector);
739 else {
740 /* only 800x600 is supported right now on pre-avivo chips */
d50ba256 741 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
923f6848
AD
742 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
743 drm_mode_probed_add(connector, tv_mode);
744 }
4ce001ab
DA
745 return 1;
746}
747
748static int radeon_tv_mode_valid(struct drm_connector *connector,
749 struct drm_display_mode *mode)
750{
a3fa6320
AD
751 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
752 return MODE_CLOCK_RANGE;
4ce001ab
DA
753 return MODE_OK;
754}
755
7b334fcb 756static enum drm_connector_status
930a9e28 757radeon_tv_detect(struct drm_connector *connector, bool force)
4ce001ab
DA
758{
759 struct drm_encoder *encoder;
760 struct drm_encoder_helper_funcs *encoder_funcs;
445282db
DA
761 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
762 enum drm_connector_status ret = connector_status_disconnected;
763
764 if (!radeon_connector->dac_load_detect)
765 return ret;
4ce001ab
DA
766
767 encoder = radeon_best_single_encoder(connector);
768 if (!encoder)
769 ret = connector_status_disconnected;
770 else {
771 encoder_funcs = encoder->helper_private;
772 ret = encoder_funcs->detect(encoder, connector);
773 }
774 if (ret == connector_status_connected)
775 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
776 radeon_connector_update_scratch_regs(connector, ret);
777 return ret;
778}
779
780struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
781 .get_modes = radeon_tv_get_modes,
782 .mode_valid = radeon_tv_mode_valid,
783 .best_encoder = radeon_best_single_encoder,
784};
785
786struct drm_connector_funcs radeon_tv_connector_funcs = {
787 .dpms = drm_helper_connector_dpms,
788 .detect = radeon_tv_detect,
789 .fill_modes = drm_helper_probe_single_connector_modes,
790 .destroy = radeon_connector_destroy,
791 .set_property = radeon_connector_set_property,
792};
793
771fe6b9
JG
794static int radeon_dvi_get_modes(struct drm_connector *connector)
795{
796 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
797 int ret;
798
799 ret = radeon_ddc_get_modes(radeon_connector);
771fe6b9
JG
800 return ret;
801}
802
4ce001ab
DA
803/*
804 * DVI is complicated
805 * Do a DDC probe, if DDC probe passes, get the full EDID so
806 * we can do analog/digital monitor detection at this point.
807 * If the monitor is an analog monitor or we got no DDC,
808 * we need to find the DAC encoder object for this connector.
809 * If we got no DDC, we do load detection on the DAC encoder object.
810 * If we got analog DDC or load detection passes on the DAC encoder
811 * we have to check if this analog encoder is shared with anyone else (TV)
812 * if its shared we have to set the other connector to disconnected.
813 */
7b334fcb 814static enum drm_connector_status
930a9e28 815radeon_dvi_detect(struct drm_connector *connector, bool force)
771fe6b9 816{
fafcf94e
AD
817 struct drm_device *dev = connector->dev;
818 struct radeon_device *rdev = dev->dev_private;
771fe6b9 819 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
4ce001ab 820 struct drm_encoder *encoder = NULL;
771fe6b9
JG
821 struct drm_encoder_helper_funcs *encoder_funcs;
822 struct drm_mode_object *obj;
823 int i;
824 enum drm_connector_status ret = connector_status_disconnected;
4b9d2a21 825 bool dret = false;
771fe6b9 826
eb6b6d7c 827 if (radeon_connector->ddc_bus)
4b9d2a21 828 dret = radeon_ddc_probe(radeon_connector);
4ce001ab 829 if (dret) {
0294cf4f
AD
830 if (radeon_connector->edid) {
831 kfree(radeon_connector->edid);
832 radeon_connector->edid = NULL;
833 }
4ce001ab 834 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
4ce001ab
DA
835
836 if (!radeon_connector->edid) {
f82f5f3a
JG
837 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
838 drm_get_connector_name(connector));
4a9a8b71
DA
839 /* rs690 seems to have a problem with connectors not existing and always
840 * return a block of 0's. If we see this just stop polling on this output */
841 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) {
842 ret = connector_status_disconnected;
843 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector));
844 radeon_connector->ddc_bus = NULL;
845 }
4ce001ab
DA
846 } else {
847 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
848
0294cf4f
AD
849 /* some oems have boards with separate digital and analog connectors
850 * with a shared ddc line (often vga + hdmi)
851 */
852 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
853 kfree(radeon_connector->edid);
854 radeon_connector->edid = NULL;
855 ret = connector_status_disconnected;
856 } else
857 ret = connector_status_connected;
71407c46 858
42f14c4b
AD
859 /* This gets complicated. We have boards with VGA + HDMI with a
860 * shared DDC line and we have boards with DVI-D + HDMI with a shared
861 * DDC line. The latter is more complex because with DVI<->HDMI adapters
862 * you don't really know what's connected to which port as both are digital.
71407c46 863 */
d3932d6c 864 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
71407c46
AD
865 struct drm_connector *list_connector;
866 struct radeon_connector *list_radeon_connector;
867 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
868 if (connector == list_connector)
869 continue;
870 list_radeon_connector = to_radeon_connector(list_connector);
b2ea4aa6
AD
871 if (list_radeon_connector->shared_ddc &&
872 (list_radeon_connector->ddc_bus->rec.i2c_id ==
873 radeon_connector->ddc_bus->rec.i2c_id)) {
42f14c4b
AD
874 /* cases where both connectors are digital */
875 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
876 /* hpd is our only option in this case */
877 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
71407c46
AD
878 kfree(radeon_connector->edid);
879 radeon_connector->edid = NULL;
880 ret = connector_status_disconnected;
881 }
882 }
883 }
884 }
885 }
4ce001ab
DA
886 }
887 }
888
889 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
890 goto out;
891
c3cceedd
DA
892 if (!force) {
893 ret = connector->status;
894 goto out;
895 }
896
4ce001ab 897 /* find analog encoder */
445282db
DA
898 if (radeon_connector->dac_load_detect) {
899 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
900 if (connector->encoder_ids[i] == 0)
901 break;
771fe6b9 902
445282db
DA
903 obj = drm_mode_object_find(connector->dev,
904 connector->encoder_ids[i],
905 DRM_MODE_OBJECT_ENCODER);
906 if (!obj)
907 continue;
771fe6b9 908
445282db 909 encoder = obj_to_encoder(obj);
771fe6b9 910
445282db
DA
911 encoder_funcs = encoder->helper_private;
912 if (encoder_funcs->detect) {
913 if (ret != connector_status_connected) {
914 ret = encoder_funcs->detect(encoder, connector);
915 if (ret == connector_status_connected) {
916 radeon_connector->use_digital = false;
917 }
771fe6b9 918 }
445282db 919 break;
771fe6b9
JG
920 }
921 }
922 }
923
4ce001ab
DA
924 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
925 encoder) {
926 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
927 }
928
fafcf94e
AD
929 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
930 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
931 * by other means, assume the DFP is connected and use that EDID. In most
932 * cases the DVI port is actually a virtual KVM port connected to the service
933 * processor.
934 */
935 if ((!rdev->is_atom_bios) &&
936 (ret == connector_status_disconnected) &&
937 rdev->mode_info.bios_hardcoded_edid_size) {
938 radeon_connector->use_digital = true;
939 ret = connector_status_connected;
940 }
941
4ce001ab 942out:
771fe6b9
JG
943 /* updated in get modes as well since we need to know if it's analog or digital */
944 radeon_connector_update_scratch_regs(connector, ret);
945 return ret;
946}
947
948/* okay need to be smart in here about which encoder to pick */
949struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
950{
951 int enc_id = connector->encoder_ids[0];
952 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
953 struct drm_mode_object *obj;
954 struct drm_encoder *encoder;
955 int i;
956 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
957 if (connector->encoder_ids[i] == 0)
958 break;
959
960 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
961 if (!obj)
962 continue;
963
964 encoder = obj_to_encoder(obj);
965
4ce001ab 966 if (radeon_connector->use_digital == true) {
771fe6b9
JG
967 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
968 return encoder;
969 } else {
970 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
971 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
972 return encoder;
973 }
974 }
975
976 /* see if we have a default encoder TODO */
977
978 /* then check use digitial */
979 /* pick the first one */
980 if (enc_id) {
981 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
982 if (!obj)
983 return NULL;
984 encoder = obj_to_encoder(obj);
985 return encoder;
986 }
987 return NULL;
988}
989
d50ba256
DA
990static void radeon_dvi_force(struct drm_connector *connector)
991{
992 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
993 if (connector->force == DRM_FORCE_ON)
994 radeon_connector->use_digital = false;
995 if (connector->force == DRM_FORCE_ON_DIGITAL)
996 radeon_connector->use_digital = true;
997}
998
a3fa6320
AD
999static int radeon_dvi_mode_valid(struct drm_connector *connector,
1000 struct drm_display_mode *mode)
1001{
1b24203e
AD
1002 struct drm_device *dev = connector->dev;
1003 struct radeon_device *rdev = dev->dev_private;
a3fa6320
AD
1004 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1005
1006 /* XXX check mode bandwidth */
1007
1b24203e
AD
1008 /* clocks over 135 MHz have heat issues with DVI on RV100 */
1009 if (radeon_connector->use_digital &&
1010 (rdev->family == CHIP_RV100) &&
1011 (mode->clock > 135000))
1012 return MODE_CLOCK_HIGH;
1013
a3fa6320
AD
1014 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1015 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1016 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1017 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1018 return MODE_OK;
e1e84017
AD
1019 else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) {
1020 if (ASIC_IS_DCE3(rdev)) {
1021 /* HDMI 1.3+ supports max clock of 340 Mhz */
1022 if (mode->clock > 340000)
1023 return MODE_CLOCK_HIGH;
1024 else
1025 return MODE_OK;
1026 } else
1027 return MODE_CLOCK_HIGH;
1028 } else
a3fa6320
AD
1029 return MODE_CLOCK_HIGH;
1030 }
b20f9bef
AD
1031
1032 /* check against the max pixel clock */
1033 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1034 return MODE_CLOCK_HIGH;
1035
a3fa6320
AD
1036 return MODE_OK;
1037}
1038
771fe6b9
JG
1039struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
1040 .get_modes = radeon_dvi_get_modes,
a3fa6320 1041 .mode_valid = radeon_dvi_mode_valid,
771fe6b9
JG
1042 .best_encoder = radeon_dvi_encoder,
1043};
1044
1045struct drm_connector_funcs radeon_dvi_connector_funcs = {
1046 .dpms = drm_helper_connector_dpms,
1047 .detect = radeon_dvi_detect,
1048 .fill_modes = drm_helper_probe_single_connector_modes,
1049 .set_property = radeon_connector_set_property,
1050 .destroy = radeon_connector_destroy,
d50ba256 1051 .force = radeon_dvi_force,
771fe6b9
JG
1052};
1053
ffd09c64
AD
1054static void radeon_dp_connector_destroy(struct drm_connector *connector)
1055{
1056 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1057 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1058
ffd09c64
AD
1059 if (radeon_connector->edid)
1060 kfree(radeon_connector->edid);
1061 if (radeon_dig_connector->dp_i2c_bus)
ac1aade6 1062 radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus);
ffd09c64
AD
1063 kfree(radeon_connector->con_priv);
1064 drm_sysfs_connector_remove(connector);
1065 drm_connector_cleanup(connector);
1066 kfree(connector);
1067}
1068
746c1aa4
DA
1069static int radeon_dp_get_modes(struct drm_connector *connector)
1070{
1071 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
8b834852 1072 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
746c1aa4
DA
1073 int ret;
1074
8b834852 1075 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
d291767b
AD
1076 struct drm_encoder *encoder;
1077 struct drm_display_mode *mode;
1078
8b834852
AD
1079 if (!radeon_dig_connector->edp_on)
1080 atombios_set_edp_panel_power(connector,
1081 ATOM_TRANSMITTER_ACTION_POWER_ON);
d291767b 1082 ret = radeon_ddc_get_modes(radeon_connector);
8b834852
AD
1083 if (!radeon_dig_connector->edp_on)
1084 atombios_set_edp_panel_power(connector,
1085 ATOM_TRANSMITTER_ACTION_POWER_OFF);
d291767b
AD
1086
1087 if (ret > 0) {
1088 encoder = radeon_best_single_encoder(connector);
1089 if (encoder) {
1090 radeon_fixup_lvds_native_mode(encoder, connector);
1091 /* add scaled modes */
1092 radeon_add_common_modes(encoder, connector);
1093 }
1094 return ret;
1095 }
1096
1097 encoder = radeon_best_single_encoder(connector);
1098 if (!encoder)
1099 return 0;
1100
1101 /* we have no EDID modes */
1102 mode = radeon_fp_native_mode(encoder);
1103 if (mode) {
1104 ret = 1;
1105 drm_mode_probed_add(connector, mode);
1106 /* add the width/height from vbios tables if available */
1107 connector->display_info.width_mm = mode->width_mm;
1108 connector->display_info.height_mm = mode->height_mm;
1109 /* add scaled modes */
1110 radeon_add_common_modes(encoder, connector);
1111 }
1112 } else
1113 ret = radeon_ddc_get_modes(radeon_connector);
8b834852 1114
746c1aa4
DA
1115 return ret;
1116}
1117
d7fa8bb3
AD
1118bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector)
1119{
1120 struct drm_mode_object *obj;
1121 struct drm_encoder *encoder;
1122 struct radeon_encoder *radeon_encoder;
1123 int i;
1124 bool found = false;
1125
1126 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1127 if (connector->encoder_ids[i] == 0)
1128 break;
1129
1130 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1131 if (!obj)
1132 continue;
1133
1134 encoder = obj_to_encoder(obj);
1135 radeon_encoder = to_radeon_encoder(encoder);
1136
1137 switch (radeon_encoder->encoder_id) {
1138 case ENCODER_OBJECT_ID_TRAVIS:
1139 case ENCODER_OBJECT_ID_NUTMEG:
1140 found = true;
1141 break;
1142 default:
1143 break;
1144 }
1145 }
1146
1147 return found;
1148}
1149
1150bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
1151{
1152 struct drm_mode_object *obj;
1153 struct drm_encoder *encoder;
1154 struct radeon_encoder *radeon_encoder;
1155 int i;
1156 bool found = false;
1157
1158 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1159 if (connector->encoder_ids[i] == 0)
1160 break;
1161
1162 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1163 if (!obj)
1164 continue;
1165
1166 encoder = obj_to_encoder(obj);
1167 radeon_encoder = to_radeon_encoder(encoder);
1168 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1169 found = true;
1170 }
1171
1172 return found;
1173}
1174
1175bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1176{
1177 struct drm_device *dev = connector->dev;
1178 struct radeon_device *rdev = dev->dev_private;
1179
1180 if (ASIC_IS_DCE5(rdev) &&
1181 (rdev->clock.dp_extclk >= 53900) &&
1182 radeon_connector_encoder_is_hbr2(connector)) {
1183 return true;
1184 }
1185
1186 return false;
1187}
1188
7b334fcb 1189static enum drm_connector_status
930a9e28 1190radeon_dp_detect(struct drm_connector *connector, bool force)
746c1aa4 1191{
f8d0edde
AD
1192 struct drm_device *dev = connector->dev;
1193 struct radeon_device *rdev = dev->dev_private;
746c1aa4 1194 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
746c1aa4 1195 enum drm_connector_status ret = connector_status_disconnected;
4143e919 1196 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
746c1aa4
DA
1197
1198 if (radeon_connector->edid) {
1199 kfree(radeon_connector->edid);
1200 radeon_connector->edid = NULL;
1201 }
1202
6f50eae7 1203 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
d291767b
AD
1204 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1205 if (encoder) {
1206 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1207 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1208
1209 /* check if panel is valid */
1210 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1211 ret = connector_status_connected;
1212 }
6f50eae7
AD
1213 /* eDP is always DP */
1214 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
8b834852
AD
1215 if (!radeon_dig_connector->edp_on)
1216 atombios_set_edp_panel_power(connector,
1217 ATOM_TRANSMITTER_ACTION_POWER_ON);
6f50eae7 1218 if (radeon_dp_getdpcd(radeon_connector))
9fa05c98 1219 ret = connector_status_connected;
8b834852
AD
1220 if (!radeon_dig_connector->edp_on)
1221 atombios_set_edp_panel_power(connector,
1222 ATOM_TRANSMITTER_ACTION_POWER_OFF);
4143e919 1223 } else {
6f50eae7 1224 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
f8d0edde
AD
1225 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1226 ret = connector_status_connected;
1227 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
1228 radeon_dp_getdpcd(radeon_connector);
6f50eae7 1229 } else {
f8d0edde
AD
1230 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1231 if (radeon_dp_getdpcd(radeon_connector))
1232 ret = connector_status_connected;
1233 } else {
1234 if (radeon_ddc_probe(radeon_connector))
1235 ret = connector_status_connected;
1236 }
4143e919 1237 }
d629a3ce
AD
1238
1239 if ((ret == connector_status_disconnected) &&
1240 radeon_connector->dac_load_detect) {
1241 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1242 struct drm_encoder_helper_funcs *encoder_funcs;
1243 if (encoder) {
1244 encoder_funcs = encoder->helper_private;
1245 ret = encoder_funcs->detect(encoder, connector);
1246 }
1247 }
746c1aa4 1248 }
4143e919 1249
30f44372 1250 radeon_connector_update_scratch_regs(connector, ret);
746c1aa4
DA
1251 return ret;
1252}
1253
5801ead6
AD
1254static int radeon_dp_mode_valid(struct drm_connector *connector,
1255 struct drm_display_mode *mode)
1256{
1257 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1258 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1259
1260 /* XXX check mode bandwidth */
1261
d291767b
AD
1262 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1263 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1264
1265 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1266 return MODE_PANEL;
1267
1268 if (encoder) {
1269 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1270 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1271
1272 /* AVIVO hardware supports downscaling modes larger than the panel
1273 * to the panel size, but I'm not sure this is desirable.
1274 */
1275 if ((mode->hdisplay > native_mode->hdisplay) ||
1276 (mode->vdisplay > native_mode->vdisplay))
1277 return MODE_PANEL;
1278
1279 /* if scaling is disabled, block non-native modes */
1280 if (radeon_encoder->rmx_type == RMX_OFF) {
1281 if ((mode->hdisplay != native_mode->hdisplay) ||
1282 (mode->vdisplay != native_mode->vdisplay))
1283 return MODE_PANEL;
1284 }
1285 }
5801ead6 1286 return MODE_OK;
d291767b
AD
1287 } else {
1288 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
1289 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
1290 return radeon_dp_mode_valid_helper(connector, mode);
1291 else
1292 return MODE_OK;
1293 }
5801ead6
AD
1294}
1295
746c1aa4
DA
1296struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
1297 .get_modes = radeon_dp_get_modes,
5801ead6 1298 .mode_valid = radeon_dp_mode_valid,
746c1aa4
DA
1299 .best_encoder = radeon_dvi_encoder,
1300};
1301
1302struct drm_connector_funcs radeon_dp_connector_funcs = {
1303 .dpms = drm_helper_connector_dpms,
1304 .detect = radeon_dp_detect,
1305 .fill_modes = drm_helper_probe_single_connector_modes,
1306 .set_property = radeon_connector_set_property,
ffd09c64 1307 .destroy = radeon_dp_connector_destroy,
746c1aa4
DA
1308 .force = radeon_dvi_force,
1309};
1310
771fe6b9
JG
1311void
1312radeon_add_atom_connector(struct drm_device *dev,
1313 uint32_t connector_id,
1314 uint32_t supported_device,
1315 int connector_type,
1316 struct radeon_i2c_bus_rec *i2c_bus,
b75fad06 1317 uint32_t igp_lane_info,
eed45b30 1318 uint16_t connector_object_id,
26b5bc98
AD
1319 struct radeon_hpd *hpd,
1320 struct radeon_router *router)
771fe6b9 1321{
445282db 1322 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
1323 struct drm_connector *connector;
1324 struct radeon_connector *radeon_connector;
1325 struct radeon_connector_atom_dig *radeon_dig_connector;
eac4dff6
AD
1326 struct drm_encoder *encoder;
1327 struct radeon_encoder *radeon_encoder;
771fe6b9 1328 uint32_t subpixel_order = SubPixelNone;
0294cf4f 1329 bool shared_ddc = false;
eac4dff6 1330 bool is_dp_bridge = false;
771fe6b9 1331
4ce001ab 1332 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG
1333 return;
1334
cf4c12f9
AD
1335 /* if the user selected tv=0 don't try and add the connector */
1336 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1337 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1338 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1339 (radeon_tv == 0))
1340 return;
1341
771fe6b9
JG
1342 /* see if we already added it */
1343 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1344 radeon_connector = to_radeon_connector(connector);
1345 if (radeon_connector->connector_id == connector_id) {
1346 radeon_connector->devices |= supported_device;
1347 return;
1348 }
0294cf4f 1349 if (radeon_connector->ddc_bus && i2c_bus->valid) {
d3932d6c 1350 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
0294cf4f
AD
1351 radeon_connector->shared_ddc = true;
1352 shared_ddc = true;
1353 }
fb939dfc 1354 if (radeon_connector->router_bus && router->ddc_valid &&
26b5bc98
AD
1355 (radeon_connector->router.router_id == router->router_id)) {
1356 radeon_connector->shared_ddc = false;
1357 shared_ddc = false;
1358 }
0294cf4f 1359 }
771fe6b9
JG
1360 }
1361
eac4dff6
AD
1362 /* check if it's a dp bridge */
1363 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1364 radeon_encoder = to_radeon_encoder(encoder);
1365 if (radeon_encoder->devices & supported_device) {
1366 switch (radeon_encoder->encoder_id) {
1367 case ENCODER_OBJECT_ID_TRAVIS:
1368 case ENCODER_OBJECT_ID_NUTMEG:
1369 is_dp_bridge = true;
1370 break;
1371 default:
1372 break;
1373 }
1374 }
1375 }
1376
771fe6b9
JG
1377 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1378 if (!radeon_connector)
1379 return;
1380
1381 connector = &radeon_connector->base;
1382
1383 radeon_connector->connector_id = connector_id;
1384 radeon_connector->devices = supported_device;
0294cf4f 1385 radeon_connector->shared_ddc = shared_ddc;
b75fad06 1386 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1387 radeon_connector->hpd = *hpd;
26b5bc98 1388 radeon_connector->router = *router;
fb939dfc 1389 if (router->ddc_valid || router->cd_valid) {
26b5bc98
AD
1390 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1391 if (!radeon_connector->router_bus)
a70882aa 1392 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
26b5bc98 1393 }
eac4dff6
AD
1394
1395 if (is_dp_bridge) {
771fe6b9
JG
1396 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1397 if (!radeon_dig_connector)
1398 goto failed;
771fe6b9
JG
1399 radeon_dig_connector->igp_lane_info = igp_lane_info;
1400 radeon_connector->con_priv = radeon_dig_connector;
eac4dff6
AD
1401 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1402 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
771fe6b9 1403 if (i2c_bus->valid) {
eac4dff6
AD
1404 /* add DP i2c bus */
1405 if (connector_type == DRM_MODE_CONNECTOR_eDP)
1406 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
1407 else
1408 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
1409 if (!radeon_dig_connector->dp_i2c_bus)
1410 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
f376b94f 1411 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1412 if (!radeon_connector->ddc_bus)
eac4dff6 1413 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1414 }
eac4dff6
AD
1415 switch (connector_type) {
1416 case DRM_MODE_CONNECTOR_VGA:
1417 case DRM_MODE_CONNECTOR_DVIA:
1418 default:
1419 connector->interlace_allowed = true;
1420 connector->doublescan_allowed = true;
d629a3ce
AD
1421 radeon_connector->dac_load_detect = true;
1422 drm_connector_attach_property(&radeon_connector->base,
1423 rdev->mode_info.load_detect_property,
1424 1);
eac4dff6
AD
1425 break;
1426 case DRM_MODE_CONNECTOR_DVII:
1427 case DRM_MODE_CONNECTOR_DVID:
1428 case DRM_MODE_CONNECTOR_HDMIA:
1429 case DRM_MODE_CONNECTOR_HDMIB:
1430 case DRM_MODE_CONNECTOR_DisplayPort:
430f70d5
AD
1431 drm_connector_attach_property(&radeon_connector->base,
1432 rdev->mode_info.underscan_property,
56bec7c0 1433 UNDERSCAN_OFF);
5bccf5e3
MG
1434 drm_connector_attach_property(&radeon_connector->base,
1435 rdev->mode_info.underscan_hborder_property,
1436 0);
1437 drm_connector_attach_property(&radeon_connector->base,
1438 rdev->mode_info.underscan_vborder_property,
1439 0);
eac4dff6
AD
1440 subpixel_order = SubPixelHorizontalRGB;
1441 connector->interlace_allowed = true;
1442 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1443 connector->doublescan_allowed = true;
1444 else
1445 connector->doublescan_allowed = false;
d629a3ce
AD
1446 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1447 radeon_connector->dac_load_detect = true;
1448 drm_connector_attach_property(&radeon_connector->base,
1449 rdev->mode_info.load_detect_property,
1450 1);
1451 }
eac4dff6
AD
1452 break;
1453 case DRM_MODE_CONNECTOR_LVDS:
1454 case DRM_MODE_CONNECTOR_eDP:
1455 drm_connector_attach_property(&radeon_connector->base,
1456 dev->mode_config.scaling_mode_property,
1457 DRM_MODE_SCALE_FULLSCREEN);
1458 subpixel_order = SubPixelHorizontalRGB;
1459 connector->interlace_allowed = false;
1460 connector->doublescan_allowed = false;
1461 break;
5bccf5e3 1462 }
eac4dff6
AD
1463 } else {
1464 switch (connector_type) {
1465 case DRM_MODE_CONNECTOR_VGA:
1466 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1467 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1468 if (i2c_bus->valid) {
1469 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1470 if (!radeon_connector->ddc_bus)
1471 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1472 }
390d0bbe
AD
1473 radeon_connector->dac_load_detect = true;
1474 drm_connector_attach_property(&radeon_connector->base,
1475 rdev->mode_info.load_detect_property,
1476 1);
eac4dff6
AD
1477 /* no HPD on analog connectors */
1478 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1479 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1480 connector->interlace_allowed = true;
c49948f4 1481 connector->doublescan_allowed = true;
eac4dff6
AD
1482 break;
1483 case DRM_MODE_CONNECTOR_DVIA:
1484 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1485 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1486 if (i2c_bus->valid) {
1487 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1488 if (!radeon_connector->ddc_bus)
1489 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1490 }
1491 radeon_connector->dac_load_detect = true;
430f70d5 1492 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1493 rdev->mode_info.load_detect_property,
1494 1);
1495 /* no HPD on analog connectors */
1496 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1497 connector->interlace_allowed = true;
1498 connector->doublescan_allowed = true;
1499 break;
1500 case DRM_MODE_CONNECTOR_DVII:
1501 case DRM_MODE_CONNECTOR_DVID:
1502 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1503 if (!radeon_dig_connector)
1504 goto failed;
1505 radeon_dig_connector->igp_lane_info = igp_lane_info;
1506 radeon_connector->con_priv = radeon_dig_connector;
1507 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1508 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1509 if (i2c_bus->valid) {
1510 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1511 if (!radeon_connector->ddc_bus)
1512 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1513 }
1514 subpixel_order = SubPixelHorizontalRGB;
5bccf5e3 1515 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1516 rdev->mode_info.coherent_mode_property,
1517 1);
1518 if (ASIC_IS_AVIVO(rdev)) {
1519 drm_connector_attach_property(&radeon_connector->base,
1520 rdev->mode_info.underscan_property,
1521 UNDERSCAN_OFF);
1522 drm_connector_attach_property(&radeon_connector->base,
1523 rdev->mode_info.underscan_hborder_property,
1524 0);
1525 drm_connector_attach_property(&radeon_connector->base,
1526 rdev->mode_info.underscan_vborder_property,
1527 0);
1528 }
1529 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1530 radeon_connector->dac_load_detect = true;
1531 drm_connector_attach_property(&radeon_connector->base,
1532 rdev->mode_info.load_detect_property,
1533 1);
1534 }
1535 connector->interlace_allowed = true;
1536 if (connector_type == DRM_MODE_CONNECTOR_DVII)
1537 connector->doublescan_allowed = true;
1538 else
1539 connector->doublescan_allowed = false;
1540 break;
1541 case DRM_MODE_CONNECTOR_HDMIA:
1542 case DRM_MODE_CONNECTOR_HDMIB:
1543 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1544 if (!radeon_dig_connector)
1545 goto failed;
1546 radeon_dig_connector->igp_lane_info = igp_lane_info;
1547 radeon_connector->con_priv = radeon_dig_connector;
1548 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1549 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1550 if (i2c_bus->valid) {
1551 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1552 if (!radeon_connector->ddc_bus)
1553 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1554 }
5bccf5e3 1555 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1556 rdev->mode_info.coherent_mode_property,
1557 1);
1558 if (ASIC_IS_AVIVO(rdev)) {
1559 drm_connector_attach_property(&radeon_connector->base,
1560 rdev->mode_info.underscan_property,
1561 UNDERSCAN_OFF);
1562 drm_connector_attach_property(&radeon_connector->base,
1563 rdev->mode_info.underscan_hborder_property,
1564 0);
1565 drm_connector_attach_property(&radeon_connector->base,
1566 rdev->mode_info.underscan_vborder_property,
1567 0);
1568 }
1569 subpixel_order = SubPixelHorizontalRGB;
1570 connector->interlace_allowed = true;
1571 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1572 connector->doublescan_allowed = true;
1573 else
1574 connector->doublescan_allowed = false;
1575 break;
1576 case DRM_MODE_CONNECTOR_DisplayPort:
1577 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1578 if (!radeon_dig_connector)
1579 goto failed;
1580 radeon_dig_connector->igp_lane_info = igp_lane_info;
1581 radeon_connector->con_priv = radeon_dig_connector;
1582 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1583 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1584 if (i2c_bus->valid) {
1585 /* add DP i2c bus */
1586 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
1587 if (!radeon_dig_connector->dp_i2c_bus)
1588 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
1589 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1590 if (!radeon_connector->ddc_bus)
1591 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1592 }
1593 subpixel_order = SubPixelHorizontalRGB;
1594 drm_connector_attach_property(&radeon_connector->base,
1595 rdev->mode_info.coherent_mode_property,
1596 1);
1597 if (ASIC_IS_AVIVO(rdev)) {
1598 drm_connector_attach_property(&radeon_connector->base,
1599 rdev->mode_info.underscan_property,
1600 UNDERSCAN_OFF);
1601 drm_connector_attach_property(&radeon_connector->base,
1602 rdev->mode_info.underscan_hborder_property,
1603 0);
1604 drm_connector_attach_property(&radeon_connector->base,
1605 rdev->mode_info.underscan_vborder_property,
1606 0);
1607 }
1608 connector->interlace_allowed = true;
1609 /* in theory with a DP to VGA converter... */
c49948f4 1610 connector->doublescan_allowed = false;
eac4dff6
AD
1611 break;
1612 case DRM_MODE_CONNECTOR_eDP:
1613 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1614 if (!radeon_dig_connector)
1615 goto failed;
1616 radeon_dig_connector->igp_lane_info = igp_lane_info;
1617 radeon_connector->con_priv = radeon_dig_connector;
1618 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1619 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1620 if (i2c_bus->valid) {
1621 /* add DP i2c bus */
1622 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
1623 if (!radeon_dig_connector->dp_i2c_bus)
1624 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
1625 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1626 if (!radeon_connector->ddc_bus)
1627 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1628 }
430f70d5 1629 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1630 dev->mode_config.scaling_mode_property,
1631 DRM_MODE_SCALE_FULLSCREEN);
1632 subpixel_order = SubPixelHorizontalRGB;
1633 connector->interlace_allowed = false;
1634 connector->doublescan_allowed = false;
1635 break;
1636 case DRM_MODE_CONNECTOR_SVIDEO:
1637 case DRM_MODE_CONNECTOR_Composite:
1638 case DRM_MODE_CONNECTOR_9PinDIN:
1639 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
1640 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
1641 radeon_connector->dac_load_detect = true;
5bccf5e3 1642 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1643 rdev->mode_info.load_detect_property,
1644 1);
5bccf5e3 1645 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1646 rdev->mode_info.tv_std_property,
1647 radeon_atombios_get_tv_info(rdev));
1648 /* no HPD on analog connectors */
1649 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1650 connector->interlace_allowed = false;
1651 connector->doublescan_allowed = false;
1652 break;
1653 case DRM_MODE_CONNECTOR_LVDS:
1654 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1655 if (!radeon_dig_connector)
1656 goto failed;
1657 radeon_dig_connector->igp_lane_info = igp_lane_info;
1658 radeon_connector->con_priv = radeon_dig_connector;
1659 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
1660 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
1661 if (i2c_bus->valid) {
1662 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1663 if (!radeon_connector->ddc_bus)
1664 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1665 }
1666 drm_connector_attach_property(&radeon_connector->base,
1667 dev->mode_config.scaling_mode_property,
1668 DRM_MODE_SCALE_FULLSCREEN);
1669 subpixel_order = SubPixelHorizontalRGB;
1670 connector->interlace_allowed = false;
1671 connector->doublescan_allowed = false;
1672 break;
771fe6b9 1673 }
771fe6b9
JG
1674 }
1675
2581afcc 1676 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA
1677 if (i2c_bus->valid)
1678 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1679 } else
1680 connector->polled = DRM_CONNECTOR_POLL_HPD;
1681
771fe6b9
JG
1682 connector->display_info.subpixel_order = subpixel_order;
1683 drm_sysfs_connector_add(connector);
1684 return;
1685
1686failed:
771fe6b9
JG
1687 drm_connector_cleanup(connector);
1688 kfree(connector);
1689}
1690
1691void
1692radeon_add_legacy_connector(struct drm_device *dev,
1693 uint32_t connector_id,
1694 uint32_t supported_device,
1695 int connector_type,
b75fad06 1696 struct radeon_i2c_bus_rec *i2c_bus,
eed45b30
AD
1697 uint16_t connector_object_id,
1698 struct radeon_hpd *hpd)
771fe6b9 1699{
445282db 1700 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
1701 struct drm_connector *connector;
1702 struct radeon_connector *radeon_connector;
1703 uint32_t subpixel_order = SubPixelNone;
1704
4ce001ab 1705 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG
1706 return;
1707
cf4c12f9
AD
1708 /* if the user selected tv=0 don't try and add the connector */
1709 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1710 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1711 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1712 (radeon_tv == 0))
1713 return;
1714
771fe6b9
JG
1715 /* see if we already added it */
1716 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1717 radeon_connector = to_radeon_connector(connector);
1718 if (radeon_connector->connector_id == connector_id) {
1719 radeon_connector->devices |= supported_device;
1720 return;
1721 }
1722 }
1723
1724 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1725 if (!radeon_connector)
1726 return;
1727
1728 connector = &radeon_connector->base;
1729
1730 radeon_connector->connector_id = connector_id;
1731 radeon_connector->devices = supported_device;
b75fad06 1732 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1733 radeon_connector->hpd = *hpd;
771fe6b9
JG
1734 switch (connector_type) {
1735 case DRM_MODE_CONNECTOR_VGA:
1736 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 1737 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 1738 if (i2c_bus->valid) {
f376b94f 1739 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1740 if (!radeon_connector->ddc_bus)
a70882aa 1741 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1742 }
35e4b7af 1743 radeon_connector->dac_load_detect = true;
445282db
DA
1744 drm_connector_attach_property(&radeon_connector->base,
1745 rdev->mode_info.load_detect_property,
1746 1);
2581afcc
AD
1747 /* no HPD on analog connectors */
1748 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
eb1f8e4f 1749 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
c49948f4
AD
1750 connector->interlace_allowed = true;
1751 connector->doublescan_allowed = true;
771fe6b9
JG
1752 break;
1753 case DRM_MODE_CONNECTOR_DVIA:
1754 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 1755 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 1756 if (i2c_bus->valid) {
f376b94f 1757 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1758 if (!radeon_connector->ddc_bus)
a70882aa 1759 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1760 }
35e4b7af 1761 radeon_connector->dac_load_detect = true;
445282db
DA
1762 drm_connector_attach_property(&radeon_connector->base,
1763 rdev->mode_info.load_detect_property,
1764 1);
2581afcc
AD
1765 /* no HPD on analog connectors */
1766 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD
1767 connector->interlace_allowed = true;
1768 connector->doublescan_allowed = true;
771fe6b9
JG
1769 break;
1770 case DRM_MODE_CONNECTOR_DVII:
1771 case DRM_MODE_CONNECTOR_DVID:
1772 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
0b4c0f3f 1773 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
771fe6b9 1774 if (i2c_bus->valid) {
f376b94f 1775 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1776 if (!radeon_connector->ddc_bus)
a70882aa 1777 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
68b3adb4
AD
1778 }
1779 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
35e4b7af 1780 radeon_connector->dac_load_detect = true;
445282db
DA
1781 drm_connector_attach_property(&radeon_connector->base,
1782 rdev->mode_info.load_detect_property,
1783 1);
771fe6b9
JG
1784 }
1785 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD
1786 connector->interlace_allowed = true;
1787 if (connector_type == DRM_MODE_CONNECTOR_DVII)
1788 connector->doublescan_allowed = true;
1789 else
1790 connector->doublescan_allowed = false;
771fe6b9
JG
1791 break;
1792 case DRM_MODE_CONNECTOR_SVIDEO:
1793 case DRM_MODE_CONNECTOR_Composite:
1794 case DRM_MODE_CONNECTOR_9PinDIN:
cf4c12f9
AD
1795 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
1796 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
1797 radeon_connector->dac_load_detect = true;
1798 /* RS400,RC410,RS480 chipset seems to report a lot
1799 * of false positive on load detect, we haven't yet
1800 * found a way to make load detect reliable on those
1801 * chipset, thus just disable it for TV.
1802 */
1803 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
1804 radeon_connector->dac_load_detect = false;
1805 drm_connector_attach_property(&radeon_connector->base,
1806 rdev->mode_info.load_detect_property,
1807 radeon_connector->dac_load_detect);
1808 drm_connector_attach_property(&radeon_connector->base,
1809 rdev->mode_info.tv_std_property,
1810 radeon_combios_get_tv_info(rdev));
1811 /* no HPD on analog connectors */
1812 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD
1813 connector->interlace_allowed = false;
1814 connector->doublescan_allowed = false;
771fe6b9
JG
1815 break;
1816 case DRM_MODE_CONNECTOR_LVDS:
1817 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
0b4c0f3f 1818 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
771fe6b9 1819 if (i2c_bus->valid) {
f376b94f 1820 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1821 if (!radeon_connector->ddc_bus)
a70882aa 1822 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1823 }
445282db
DA
1824 drm_connector_attach_property(&radeon_connector->base,
1825 dev->mode_config.scaling_mode_property,
1826 DRM_MODE_SCALE_FULLSCREEN);
771fe6b9 1827 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD
1828 connector->interlace_allowed = false;
1829 connector->doublescan_allowed = false;
771fe6b9
JG
1830 break;
1831 }
1832
2581afcc 1833 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA
1834 if (i2c_bus->valid)
1835 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1836 } else
1837 connector->polled = DRM_CONNECTOR_POLL_HPD;
771fe6b9
JG
1838 connector->display_info.subpixel_order = subpixel_order;
1839 drm_sysfs_connector_add(connector);
63ec0119
MD
1840 if (connector_type == DRM_MODE_CONNECTOR_LVDS) {
1841 struct drm_encoder *drm_encoder;
1842
1843 list_for_each_entry(drm_encoder, &dev->mode_config.encoder_list, head) {
1844 struct radeon_encoder *radeon_encoder;
1845
1846 radeon_encoder = to_radeon_encoder(drm_encoder);
1847 if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_LVDS)
1848 radeon_legacy_backlight_init(radeon_encoder, connector);
1849 }
1850 }
771fe6b9 1851}
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