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drm/radeon/kms: issue blank/unblank commands for ext encoders
[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_connectors.c
CommitLineData
771fe6b9
JG		 1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
26#include "drmP.h"
27#include "drm_edid.h"
28#include "drm_crtc_helper.h"
d50ba256 29#include "drm_fb_helper.h"
771fe6b9
JG		 30#include "radeon_drm.h"
31#include "radeon.h"
923f6848 32#include "atom.h"
771fe6b9
JG		 33
34extern void
35radeon_combios_connected_scratch_regs(struct drm_connector *connector,
36 struct drm_encoder *encoder,
37 bool connected);
38extern void
39radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
40 struct drm_encoder *encoder,
41 bool connected);
42
63ec0119
MD		 43extern void
44radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder,
45 struct drm_connector *drm_connector);
46
591a10e1
AD		 47bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector);
48
d4877cf2
AD		 49void radeon_connector_hotplug(struct drm_connector *connector)
50{
51 struct drm_device *dev = connector->dev;
52 struct radeon_device *rdev = dev->dev_private;
53 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
54
1e85e1d0 55 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
d4877cf2 56
7c3ed0fd
AD		 57 /* powering up/down the eDP panel generates hpd events which
58 * can interfere with modesetting.
59 */
60 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP)
61 return;
62
1e85e1d0
AD		 63 /* pre-r600 did not always have the hpd pins mapped accurately to connectors */
64 if (rdev->family >= CHIP_R600) {
65 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
66 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
67 else
68 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
d4877cf2 69 }
d4877cf2
AD		 70}
71
445282db
DA		 72static void radeon_property_change_mode(struct drm_encoder *encoder)
73{
74 struct drm_crtc *crtc = encoder->crtc;
75
76 if (crtc && crtc->enabled) {
77 drm_crtc_helper_set_mode(crtc, &crtc->mode,
78 crtc->x, crtc->y, crtc->fb);
79 }
80}
771fe6b9
JG		 81static void
82radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
83{
84 struct drm_device *dev = connector->dev;
85 struct radeon_device *rdev = dev->dev_private;
86 struct drm_encoder *best_encoder = NULL;
87 struct drm_encoder *encoder = NULL;
88 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
89 struct drm_mode_object *obj;
90 bool connected;
91 int i;
92
93 best_encoder = connector_funcs->best_encoder(connector);
94
95 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
96 if (connector->encoder_ids[i] == 0)
97 break;
98
99 obj = drm_mode_object_find(connector->dev,
100 connector->encoder_ids[i],
101 DRM_MODE_OBJECT_ENCODER);
102 if (!obj)
103 continue;
104
105 encoder = obj_to_encoder(obj);
106
107 if ((encoder == best_encoder) && (status == connector_status_connected))
108 connected = true;
109 else
110 connected = false;
111
112 if (rdev->is_atom_bios)
113 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
114 else
115 radeon_combios_connected_scratch_regs(connector, encoder, connected);
116
117 }
118}
119
445282db
DA		 120struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
121{
122 struct drm_mode_object *obj;
123 struct drm_encoder *encoder;
124 int i;
125
126 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
127 if (connector->encoder_ids[i] == 0)
128 break;
129
130 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
131 if (!obj)
132 continue;
133
134 encoder = obj_to_encoder(obj);
135 if (encoder->encoder_type == encoder_type)
136 return encoder;
137 }
138 return NULL;
139}
140
771fe6b9
JG		 141struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
142{
143 int enc_id = connector->encoder_ids[0];
144 struct drm_mode_object *obj;
145 struct drm_encoder *encoder;
146
147 /* pick the encoder ids */
148 if (enc_id) {
149 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
150 if (!obj)
151 return NULL;
152 encoder = obj_to_encoder(obj);
153 return encoder;
154 }
155 return NULL;
156}
157
4ce001ab
DA		 158/*
159 * radeon_connector_analog_encoder_conflict_solve
160 * - search for other connectors sharing this encoder
161 * if priority is true, then set them disconnected if this is connected
162 * if priority is false, set us disconnected if they are connected
163 */
164static enum drm_connector_status
165radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
166 struct drm_encoder *encoder,
167 enum drm_connector_status current_status,
168 bool priority)
169{
170 struct drm_device *dev = connector->dev;
171 struct drm_connector *conflict;
08d07511 172 struct radeon_connector *radeon_conflict;
4ce001ab
DA		 173 int i;
174
175 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
176 if (conflict == connector)
177 continue;
178
08d07511 179 radeon_conflict = to_radeon_connector(conflict);
4ce001ab
DA		 180 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
181 if (conflict->encoder_ids[i] == 0)
182 break;
183
184 /* if the IDs match */
185 if (conflict->encoder_ids[i] == encoder->base.id) {
186 if (conflict->status != connector_status_connected)
187 continue;
08d07511
AD		 188
189 if (radeon_conflict->use_digital)
190 continue;
4ce001ab
DA		 191
192 if (priority == true) {
c5d46b4e
AD		 193 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict));
194 DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(connector));
4ce001ab
DA		 195 conflict->status = connector_status_disconnected;
196 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
197 } else {
c5d46b4e
AD		 198 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector));
199 DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(conflict));
4ce001ab
DA		 200 current_status = connector_status_disconnected;
201 }
202 break;
203 }
204 }
205 }
206 return current_status;
207
208}
209
771fe6b9
JG		 210static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
211{
212 struct drm_device *dev = encoder->dev;
213 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
214 struct drm_display_mode *mode = NULL;
de2103e4 215 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
771fe6b9 216
de2103e4
AD		 217 if (native_mode->hdisplay != 0 &&
218 native_mode->vdisplay != 0 &&
219 native_mode->clock != 0) {
fb06ca8f 220 mode = drm_mode_duplicate(dev, native_mode);
771fe6b9
JG		 221 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
222 drm_mode_set_name(mode);
223
d9fdaafb 224 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
d2efdf6d
AD		 225 } else if (native_mode->hdisplay != 0 &&
226 native_mode->vdisplay != 0) {
227 /* mac laptops without an edid */
228 /* Note that this is not necessarily the exact panel mode,
229 * but an approximation based on the cvt formula. For these
230 * systems we should ideally read the mode info out of the
231 * registers or add a mode table, but this works and is much
232 * simpler.
233 */
234 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
235 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
d9fdaafb 236 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
771fe6b9
JG		 237 }
238 return mode;
239}
240
923f6848
AD		 241static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
242{
243 struct drm_device *dev = encoder->dev;
244 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
245 struct drm_display_mode *mode = NULL;
de2103e4 246 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
923f6848
AD		 247 int i;
248 struct mode_size {
249 int w;
250 int h;
251 } common_modes[17] = {
252 { 640, 480},
253 { 720, 480},
254 { 800, 600},
255 { 848, 480},
256 {1024, 768},
257 {1152, 768},
258 {1280, 720},
259 {1280, 800},
260 {1280, 854},
261 {1280, 960},
262 {1280, 1024},
263 {1440, 900},
264 {1400, 1050},
265 {1680, 1050},
266 {1600, 1200},
267 {1920, 1080},
268 {1920, 1200}
269 };
270
271 for (i = 0; i < 17; i++) {
dfdd6467
AD		 272 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
273 if (common_modes[i].w > 1024 ||
274 common_modes[i].h > 768)
275 continue;
276 }
923f6848 277 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
de2103e4
AD		 278 if (common_modes[i].w > native_mode->hdisplay ||
279 common_modes[i].h > native_mode->vdisplay ||
280 (common_modes[i].w == native_mode->hdisplay &&
281 common_modes[i].h == native_mode->vdisplay))
923f6848
AD		 282 continue;
283 }
284 if (common_modes[i].w < 320 || common_modes[i].h < 200)
285 continue;
286
d50ba256 287 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
923f6848
AD		 288 drm_mode_probed_add(connector, mode);
289 }
290}
291
771fe6b9
JG		 292int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
293 uint64_t val)
294{
445282db
DA		 295 struct drm_device *dev = connector->dev;
296 struct radeon_device *rdev = dev->dev_private;
297 struct drm_encoder *encoder;
298 struct radeon_encoder *radeon_encoder;
299
300 if (property == rdev->mode_info.coherent_mode_property) {
301 struct radeon_encoder_atom_dig *dig;
ce227c41 302 bool new_coherent_mode;
445282db
DA		 303
304 /* need to find digital encoder on connector */
305 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
306 if (!encoder)
307 return 0;
308
309 radeon_encoder = to_radeon_encoder(encoder);
310
311 if (!radeon_encoder->enc_priv)
312 return 0;
313
314 dig = radeon_encoder->enc_priv;
ce227c41
DA		 315 new_coherent_mode = val ? true : false;
316 if (dig->coherent_mode != new_coherent_mode) {
317 dig->coherent_mode = new_coherent_mode;
318 radeon_property_change_mode(&radeon_encoder->base);
319 }
445282db
DA		 320 }
321
5b1714d3
AD		 322 if (property == rdev->mode_info.underscan_property) {
323 /* need to find digital encoder on connector */
324 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
325 if (!encoder)
326 return 0;
327
328 radeon_encoder = to_radeon_encoder(encoder);
329
330 if (radeon_encoder->underscan_type != val) {
331 radeon_encoder->underscan_type = val;
332 radeon_property_change_mode(&radeon_encoder->base);
333 }
334 }
335
5bccf5e3
MG		 336 if (property == rdev->mode_info.underscan_hborder_property) {
337 /* need to find digital encoder on connector */
338 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
339 if (!encoder)
340 return 0;
341
342 radeon_encoder = to_radeon_encoder(encoder);
343
344 if (radeon_encoder->underscan_hborder != val) {
345 radeon_encoder->underscan_hborder = val;
346 radeon_property_change_mode(&radeon_encoder->base);
347 }
348 }
349
350 if (property == rdev->mode_info.underscan_vborder_property) {
351 /* need to find digital encoder on connector */
352 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
353 if (!encoder)
354 return 0;
355
356 radeon_encoder = to_radeon_encoder(encoder);
357
358 if (radeon_encoder->underscan_vborder != val) {
359 radeon_encoder->underscan_vborder = val;
360 radeon_property_change_mode(&radeon_encoder->base);
361 }
362 }
363
445282db
DA		 364 if (property == rdev->mode_info.tv_std_property) {
365 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
366 if (!encoder) {
367 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
368 }
369
370 if (!encoder)
371 return 0;
372
373 radeon_encoder = to_radeon_encoder(encoder);
374 if (!radeon_encoder->enc_priv)
375 return 0;
643acacf 376 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
445282db
DA		 377 struct radeon_encoder_atom_dac *dac_int;
378 dac_int = radeon_encoder->enc_priv;
379 dac_int->tv_std = val;
380 } else {
381 struct radeon_encoder_tv_dac *dac_int;
382 dac_int = radeon_encoder->enc_priv;
383 dac_int->tv_std = val;
384 }
385 radeon_property_change_mode(&radeon_encoder->base);
386 }
387
388 if (property == rdev->mode_info.load_detect_property) {
389 struct radeon_connector *radeon_connector =
390 to_radeon_connector(connector);
391
392 if (val == 0)
393 radeon_connector->dac_load_detect = false;
394 else
395 radeon_connector->dac_load_detect = true;
396 }
397
398 if (property == rdev->mode_info.tmds_pll_property) {
399 struct radeon_encoder_int_tmds *tmds = NULL;
400 bool ret = false;
401 /* need to find digital encoder on connector */
402 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
403 if (!encoder)
404 return 0;
405
406 radeon_encoder = to_radeon_encoder(encoder);
407
408 tmds = radeon_encoder->enc_priv;
409 if (!tmds)
410 return 0;
411
412 if (val == 0) {
413 if (rdev->is_atom_bios)
414 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
415 else
416 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
417 }
418 if (val == 1 || ret == false) {
419 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
420 }
421 radeon_property_change_mode(&radeon_encoder->base);
422 }
423
771fe6b9
JG		 424 return 0;
425}
426
8dfaa8a7
MD		 427static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
428 struct drm_connector *connector)
429{
430 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 431 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
8dfaa8a7
MD		 432
433 /* Try to get native mode details from EDID if necessary */
de2103e4 434 if (!native_mode->clock) {
8dfaa8a7
MD		 435 struct drm_display_mode *t, *mode;
436
437 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
de2103e4
AD		 438 if (mode->hdisplay == native_mode->hdisplay &&
439 mode->vdisplay == native_mode->vdisplay) {
440 *native_mode = *mode;
441 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
c5d46b4e 442 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
8dfaa8a7
MD		 443 break;
444 }
445 }
446 }
de2103e4 447 if (!native_mode->clock) {
c5d46b4e 448 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
8dfaa8a7
MD		 449 radeon_encoder->rmx_type = RMX_OFF;
450 }
451}
771fe6b9
JG		 452
453static int radeon_lvds_get_modes(struct drm_connector *connector)
454{
455 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
456 struct drm_encoder *encoder;
457 int ret = 0;
458 struct drm_display_mode *mode;
459
460 if (radeon_connector->ddc_bus) {
461 ret = radeon_ddc_get_modes(radeon_connector);
462 if (ret > 0) {
7747b713 463 encoder = radeon_best_single_encoder(connector);
8dfaa8a7
MD		 464 if (encoder) {
465 radeon_fixup_lvds_native_mode(encoder, connector);
7747b713
AD		 466 /* add scaled modes */
467 radeon_add_common_modes(encoder, connector);
8dfaa8a7 468 }
771fe6b9
JG		 469 return ret;
470 }
471 }
472
473 encoder = radeon_best_single_encoder(connector);
474 if (!encoder)
475 return 0;
476
477 /* we have no EDID modes */
478 mode = radeon_fp_native_mode(encoder);
479 if (mode) {
480 ret = 1;
481 drm_mode_probed_add(connector, mode);
7a868e18
AD		 482 /* add the width/height from vbios tables if available */
483 connector->display_info.width_mm = mode->width_mm;
484 connector->display_info.height_mm = mode->height_mm;
7747b713
AD		 485 /* add scaled modes */
486 radeon_add_common_modes(encoder, connector);
771fe6b9 487 }
923f6848 488
771fe6b9
JG		 489 return ret;
490}
491
492static int radeon_lvds_mode_valid(struct drm_connector *connector,
493 struct drm_display_mode *mode)
494{
a3fa6320
AD		 495 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
496
497 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
498 return MODE_PANEL;
499
500 if (encoder) {
501 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
502 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
503
504 /* AVIVO hardware supports downscaling modes larger than the panel
505 * to the panel size, but I'm not sure this is desirable.
506 */
507 if ((mode->hdisplay > native_mode->hdisplay) ||
508 (mode->vdisplay > native_mode->vdisplay))
509 return MODE_PANEL;
510
511 /* if scaling is disabled, block non-native modes */
512 if (radeon_encoder->rmx_type == RMX_OFF) {
513 if ((mode->hdisplay != native_mode->hdisplay) ||
514 (mode->vdisplay != native_mode->vdisplay))
515 return MODE_PANEL;
516 }
517 }
518
771fe6b9
JG		 519 return MODE_OK;
520}
521
7b334fcb 522static enum drm_connector_status
930a9e28 523radeon_lvds_detect(struct drm_connector *connector, bool force)
771fe6b9 524{
0549a061 525 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2ffb8429 526 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0549a061 527 enum drm_connector_status ret = connector_status_disconnected;
2ffb8429
AD		 528
529 if (encoder) {
530 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 531 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2ffb8429
AD		 532
533 /* check if panel is valid */
de2103e4 534 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
2ffb8429
AD		 535 ret = connector_status_connected;
536
537 }
0549a061
AD		 538
539 /* check for edid as well */
0294cf4f
AD		 540 if (radeon_connector->edid)
541 ret = connector_status_connected;
542 else {
543 if (radeon_connector->ddc_bus) {
0294cf4f
AD		 544 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
545 &radeon_connector->ddc_bus->adapter);
0294cf4f
AD		 546 if (radeon_connector->edid)
547 ret = connector_status_connected;
548 }
0549a061 549 }
771fe6b9 550 /* check acpi lid status ??? */
2ffb8429 551
771fe6b9
JG		 552 radeon_connector_update_scratch_regs(connector, ret);
553 return ret;
554}
555
556static void radeon_connector_destroy(struct drm_connector *connector)
557{
558 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
559
0294cf4f
AD		 560 if (radeon_connector->edid)
561 kfree(radeon_connector->edid);
771fe6b9
JG		 562 kfree(radeon_connector->con_priv);
563 drm_sysfs_connector_remove(connector);
564 drm_connector_cleanup(connector);
565 kfree(connector);
566}
567
445282db
DA		 568static int radeon_lvds_set_property(struct drm_connector *connector,
569 struct drm_property *property,
570 uint64_t value)
571{
572 struct drm_device *dev = connector->dev;
573 struct radeon_encoder *radeon_encoder;
574 enum radeon_rmx_type rmx_type;
575
d9fdaafb 576 DRM_DEBUG_KMS("\n");
445282db
DA		 577 if (property != dev->mode_config.scaling_mode_property)
578 return 0;
579
580 if (connector->encoder)
581 radeon_encoder = to_radeon_encoder(connector->encoder);
582 else {
583 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
584 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
585 }
586
587 switch (value) {
588 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
589 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
590 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
591 default:
592 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
593 }
594 if (radeon_encoder->rmx_type == rmx_type)
595 return 0;
596
597 radeon_encoder->rmx_type = rmx_type;
598
599 radeon_property_change_mode(&radeon_encoder->base);
600 return 0;
601}
602
603
771fe6b9
JG		 604struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
605 .get_modes = radeon_lvds_get_modes,
606 .mode_valid = radeon_lvds_mode_valid,
607 .best_encoder = radeon_best_single_encoder,
608};
609
610struct drm_connector_funcs radeon_lvds_connector_funcs = {
611 .dpms = drm_helper_connector_dpms,
612 .detect = radeon_lvds_detect,
613 .fill_modes = drm_helper_probe_single_connector_modes,
614 .destroy = radeon_connector_destroy,
445282db 615 .set_property = radeon_lvds_set_property,
771fe6b9
JG		 616};
617
618static int radeon_vga_get_modes(struct drm_connector *connector)
619{
620 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
621 int ret;
622
623 ret = radeon_ddc_get_modes(radeon_connector);
624
625 return ret;
626}
627
628static int radeon_vga_mode_valid(struct drm_connector *connector,
629 struct drm_display_mode *mode)
630{
b20f9bef
AD		 631 struct drm_device *dev = connector->dev;
632 struct radeon_device *rdev = dev->dev_private;
633
a3fa6320 634 /* XXX check mode bandwidth */
b20f9bef
AD		 635
636 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
637 return MODE_CLOCK_HIGH;
638
771fe6b9
JG		 639 return MODE_OK;
640}
641
7b334fcb 642static enum drm_connector_status
930a9e28 643radeon_vga_detect(struct drm_connector *connector, bool force)
771fe6b9 644{
fafcf94e
AD		 645 struct drm_device *dev = connector->dev;
646 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 647 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
648 struct drm_encoder *encoder;
649 struct drm_encoder_helper_funcs *encoder_funcs;
4b9d2a21 650 bool dret = false;
771fe6b9
JG		 651 enum drm_connector_status ret = connector_status_disconnected;
652
4ce001ab
DA		 653 encoder = radeon_best_single_encoder(connector);
654 if (!encoder)
655 ret = connector_status_disconnected;
656
eb6b6d7c 657 if (radeon_connector->ddc_bus)
4b9d2a21 658 dret = radeon_ddc_probe(radeon_connector);
0294cf4f
AD		 659 if (dret) {
660 if (radeon_connector->edid) {
661 kfree(radeon_connector->edid);
662 radeon_connector->edid = NULL;
663 }
0294cf4f 664 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
0294cf4f
AD		 665
666 if (!radeon_connector->edid) {
f82f5f3a
JG		 667 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
668 drm_get_connector_name(connector));
669 ret = connector_status_connected;
0294cf4f
AD		 670 } else {
671 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
672
673 /* some oems have boards with separate digital and analog connectors
674 * with a shared ddc line (often vga + hdmi)
675 */
676 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
677 kfree(radeon_connector->edid);
678 radeon_connector->edid = NULL;
679 ret = connector_status_disconnected;
680 } else
681 ret = connector_status_connected;
682 }
683 } else {
c3cceedd
DA		 684
685 /* if we aren't forcing don't do destructive polling */
686 if (!force)
687 return connector->status;
688
d8a7f792 689 if (radeon_connector->dac_load_detect && encoder) {
445282db
DA		 690 encoder_funcs = encoder->helper_private;
691 ret = encoder_funcs->detect(encoder, connector);
692 }
771fe6b9
JG		 693 }
694
4ce001ab
DA		 695 if (ret == connector_status_connected)
696 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
fafcf94e
AD		 697
698 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
699 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
700 * by other means, assume the CRT is connected and use that EDID.
701 */
702 if ((!rdev->is_atom_bios) &&
703 (ret == connector_status_disconnected) &&
704 rdev->mode_info.bios_hardcoded_edid_size) {
705 ret = connector_status_connected;
706 }
707
771fe6b9
JG		 708 radeon_connector_update_scratch_regs(connector, ret);
709 return ret;
710}
711
712struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
713 .get_modes = radeon_vga_get_modes,
714 .mode_valid = radeon_vga_mode_valid,
715 .best_encoder = radeon_best_single_encoder,
716};
717
718struct drm_connector_funcs radeon_vga_connector_funcs = {
719 .dpms = drm_helper_connector_dpms,
720 .detect = radeon_vga_detect,
721 .fill_modes = drm_helper_probe_single_connector_modes,
722 .destroy = radeon_connector_destroy,
723 .set_property = radeon_connector_set_property,
724};
725
4ce001ab
DA		 726static int radeon_tv_get_modes(struct drm_connector *connector)
727{
728 struct drm_device *dev = connector->dev;
923f6848 729 struct radeon_device *rdev = dev->dev_private;
4ce001ab 730 struct drm_display_mode *tv_mode;
923f6848 731 struct drm_encoder *encoder;
4ce001ab 732
923f6848
AD		 733 encoder = radeon_best_single_encoder(connector);
734 if (!encoder)
735 return 0;
4ce001ab 736
923f6848
AD		 737 /* avivo chips can scale any mode */
738 if (rdev->family >= CHIP_RS600)
739 /* add scaled modes */
740 radeon_add_common_modes(encoder, connector);
741 else {
742 /* only 800x600 is supported right now on pre-avivo chips */
d50ba256 743 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
923f6848
AD		 744 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
745 drm_mode_probed_add(connector, tv_mode);
746 }
4ce001ab
DA		 747 return 1;
748}
749
750static int radeon_tv_mode_valid(struct drm_connector *connector,
751 struct drm_display_mode *mode)
752{
a3fa6320
AD		 753 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
754 return MODE_CLOCK_RANGE;
4ce001ab
DA		 755 return MODE_OK;
756}
757
7b334fcb 758static enum drm_connector_status
930a9e28 759radeon_tv_detect(struct drm_connector *connector, bool force)
4ce001ab
DA		 760{
761 struct drm_encoder *encoder;
762 struct drm_encoder_helper_funcs *encoder_funcs;
445282db
DA		 763 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
764 enum drm_connector_status ret = connector_status_disconnected;
765
766 if (!radeon_connector->dac_load_detect)
767 return ret;
4ce001ab
DA		 768
769 encoder = radeon_best_single_encoder(connector);
770 if (!encoder)
771 ret = connector_status_disconnected;
772 else {
773 encoder_funcs = encoder->helper_private;
774 ret = encoder_funcs->detect(encoder, connector);
775 }
776 if (ret == connector_status_connected)
777 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
778 radeon_connector_update_scratch_regs(connector, ret);
779 return ret;
780}
781
782struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
783 .get_modes = radeon_tv_get_modes,
784 .mode_valid = radeon_tv_mode_valid,
785 .best_encoder = radeon_best_single_encoder,
786};
787
788struct drm_connector_funcs radeon_tv_connector_funcs = {
789 .dpms = drm_helper_connector_dpms,
790 .detect = radeon_tv_detect,
791 .fill_modes = drm_helper_probe_single_connector_modes,
792 .destroy = radeon_connector_destroy,
793 .set_property = radeon_connector_set_property,
794};
795
771fe6b9
JG		 796static int radeon_dvi_get_modes(struct drm_connector *connector)
797{
798 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
799 int ret;
800
801 ret = radeon_ddc_get_modes(radeon_connector);
771fe6b9
JG		 802 return ret;
803}
804
4ce001ab
DA		 805/*
806 * DVI is complicated
807 * Do a DDC probe, if DDC probe passes, get the full EDID so
808 * we can do analog/digital monitor detection at this point.
809 * If the monitor is an analog monitor or we got no DDC,
810 * we need to find the DAC encoder object for this connector.
811 * If we got no DDC, we do load detection on the DAC encoder object.
812 * If we got analog DDC or load detection passes on the DAC encoder
813 * we have to check if this analog encoder is shared with anyone else (TV)
814 * if its shared we have to set the other connector to disconnected.
815 */
7b334fcb 816static enum drm_connector_status
930a9e28 817radeon_dvi_detect(struct drm_connector *connector, bool force)
771fe6b9 818{
fafcf94e
AD		 819 struct drm_device *dev = connector->dev;
820 struct radeon_device *rdev = dev->dev_private;
771fe6b9 821 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
4ce001ab 822 struct drm_encoder *encoder = NULL;
771fe6b9
JG		 823 struct drm_encoder_helper_funcs *encoder_funcs;
824 struct drm_mode_object *obj;
825 int i;
826 enum drm_connector_status ret = connector_status_disconnected;
4b9d2a21 827 bool dret = false;
771fe6b9 828
eb6b6d7c 829 if (radeon_connector->ddc_bus)
4b9d2a21 830 dret = radeon_ddc_probe(radeon_connector);
4ce001ab 831 if (dret) {
0294cf4f
AD		 832 if (radeon_connector->edid) {
833 kfree(radeon_connector->edid);
834 radeon_connector->edid = NULL;
835 }
4ce001ab 836 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
4ce001ab
DA		 837
838 if (!radeon_connector->edid) {
f82f5f3a
JG		 839 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
840 drm_get_connector_name(connector));
4a9a8b71
DA		 841 /* rs690 seems to have a problem with connectors not existing and always
842 * return a block of 0's. If we see this just stop polling on this output */
843 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) {
844 ret = connector_status_disconnected;
845 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector));
846 radeon_connector->ddc_bus = NULL;
847 }
4ce001ab
DA		 848 } else {
849 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
850
0294cf4f
AD		 851 /* some oems have boards with separate digital and analog connectors
852 * with a shared ddc line (often vga + hdmi)
853 */
854 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
855 kfree(radeon_connector->edid);
856 radeon_connector->edid = NULL;
857 ret = connector_status_disconnected;
858 } else
859 ret = connector_status_connected;
71407c46 860
42f14c4b
AD		 861 /* This gets complicated. We have boards with VGA + HDMI with a
862 * shared DDC line and we have boards with DVI-D + HDMI with a shared
863 * DDC line. The latter is more complex because with DVI<->HDMI adapters
864 * you don't really know what's connected to which port as both are digital.
71407c46 865 */
d3932d6c 866 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
71407c46
AD		 867 struct drm_connector *list_connector;
868 struct radeon_connector *list_radeon_connector;
869 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
870 if (connector == list_connector)
871 continue;
872 list_radeon_connector = to_radeon_connector(list_connector);
b2ea4aa6
AD		 873 if (list_radeon_connector->shared_ddc &&
874 (list_radeon_connector->ddc_bus->rec.i2c_id ==
875 radeon_connector->ddc_bus->rec.i2c_id)) {
42f14c4b
AD		 876 /* cases where both connectors are digital */
877 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
878 /* hpd is our only option in this case */
879 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
71407c46
AD		 880 kfree(radeon_connector->edid);
881 radeon_connector->edid = NULL;
882 ret = connector_status_disconnected;
883 }
884 }
885 }
886 }
887 }
4ce001ab
DA		 888 }
889 }
890
891 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
892 goto out;
893
c3cceedd
DA		 894 if (!force) {
895 ret = connector->status;
896 goto out;
897 }
898
4ce001ab 899 /* find analog encoder */
445282db
DA		 900 if (radeon_connector->dac_load_detect) {
901 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
902 if (connector->encoder_ids[i] == 0)
903 break;
771fe6b9 904
445282db
DA		 905 obj = drm_mode_object_find(connector->dev,
906 connector->encoder_ids[i],
907 DRM_MODE_OBJECT_ENCODER);
908 if (!obj)
909 continue;
771fe6b9 910
445282db 911 encoder = obj_to_encoder(obj);
771fe6b9 912
445282db
DA		 913 encoder_funcs = encoder->helper_private;
914 if (encoder_funcs->detect) {
915 if (ret != connector_status_connected) {
916 ret = encoder_funcs->detect(encoder, connector);
917 if (ret == connector_status_connected) {
918 radeon_connector->use_digital = false;
919 }
771fe6b9 920 }
445282db 921 break;
771fe6b9
JG		 922 }
923 }
924 }
925
4ce001ab
DA		 926 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
927 encoder) {
928 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
929 }
930
fafcf94e
AD		 931 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
932 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
933 * by other means, assume the DFP is connected and use that EDID. In most
934 * cases the DVI port is actually a virtual KVM port connected to the service
935 * processor.
936 */
937 if ((!rdev->is_atom_bios) &&
938 (ret == connector_status_disconnected) &&
939 rdev->mode_info.bios_hardcoded_edid_size) {
940 radeon_connector->use_digital = true;
941 ret = connector_status_connected;
942 }
943
4ce001ab 944out:
771fe6b9
JG		 945 /* updated in get modes as well since we need to know if it's analog or digital */
946 radeon_connector_update_scratch_regs(connector, ret);
947 return ret;
948}
949
950/* okay need to be smart in here about which encoder to pick */
951struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
952{
953 int enc_id = connector->encoder_ids[0];
954 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
955 struct drm_mode_object *obj;
956 struct drm_encoder *encoder;
957 int i;
958 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
959 if (connector->encoder_ids[i] == 0)
960 break;
961
962 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
963 if (!obj)
964 continue;
965
966 encoder = obj_to_encoder(obj);
967
4ce001ab 968 if (radeon_connector->use_digital == true) {
771fe6b9
JG		 969 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
970 return encoder;
971 } else {
972 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
973 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
974 return encoder;
975 }
976 }
977
978 /* see if we have a default encoder TODO */
979
980 /* then check use digitial */
981 /* pick the first one */
982 if (enc_id) {
983 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
984 if (!obj)
985 return NULL;
986 encoder = obj_to_encoder(obj);
987 return encoder;
988 }
989 return NULL;
990}
991
d50ba256
DA		 992static void radeon_dvi_force(struct drm_connector *connector)
993{
994 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
995 if (connector->force == DRM_FORCE_ON)
996 radeon_connector->use_digital = false;
997 if (connector->force == DRM_FORCE_ON_DIGITAL)
998 radeon_connector->use_digital = true;
999}
1000
a3fa6320
AD		 1001static int radeon_dvi_mode_valid(struct drm_connector *connector,
1002 struct drm_display_mode *mode)
1003{
1b24203e
AD		 1004 struct drm_device *dev = connector->dev;
1005 struct radeon_device *rdev = dev->dev_private;
a3fa6320
AD		 1006 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1007
1008 /* XXX check mode bandwidth */
1009
1b24203e
AD		 1010 /* clocks over 135 MHz have heat issues with DVI on RV100 */
1011 if (radeon_connector->use_digital &&
1012 (rdev->family == CHIP_RV100) &&
1013 (mode->clock > 135000))
1014 return MODE_CLOCK_HIGH;
1015
a3fa6320
AD		 1016 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1017 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1018 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1019 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1020 return MODE_OK;
e1e84017
AD		 1021 else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) {
1022 if (ASIC_IS_DCE3(rdev)) {
1023 /* HDMI 1.3+ supports max clock of 340 Mhz */
1024 if (mode->clock > 340000)
1025 return MODE_CLOCK_HIGH;
1026 else
1027 return MODE_OK;
1028 } else
1029 return MODE_CLOCK_HIGH;
1030 } else
a3fa6320
AD		 1031 return MODE_CLOCK_HIGH;
1032 }
b20f9bef
AD		 1033
1034 /* check against the max pixel clock */
1035 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1036 return MODE_CLOCK_HIGH;
1037
a3fa6320
AD		 1038 return MODE_OK;
1039}
1040
771fe6b9
JG		 1041struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
1042 .get_modes = radeon_dvi_get_modes,
a3fa6320 1043 .mode_valid = radeon_dvi_mode_valid,
771fe6b9
JG		 1044 .best_encoder = radeon_dvi_encoder,
1045};
1046
1047struct drm_connector_funcs radeon_dvi_connector_funcs = {
1048 .dpms = drm_helper_connector_dpms,
1049 .detect = radeon_dvi_detect,
1050 .fill_modes = drm_helper_probe_single_connector_modes,
1051 .set_property = radeon_connector_set_property,
1052 .destroy = radeon_connector_destroy,
d50ba256 1053 .force = radeon_dvi_force,
771fe6b9
JG		 1054};
1055
ffd09c64
AD		 1056static void radeon_dp_connector_destroy(struct drm_connector *connector)
1057{
1058 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1059 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1060
ffd09c64
AD		 1061 if (radeon_connector->edid)
1062 kfree(radeon_connector->edid);
1063 if (radeon_dig_connector->dp_i2c_bus)
ac1aade6 1064 radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus);
ffd09c64
AD		 1065 kfree(radeon_connector->con_priv);
1066 drm_sysfs_connector_remove(connector);
1067 drm_connector_cleanup(connector);
1068 kfree(connector);
1069}
1070
746c1aa4
DA		 1071static int radeon_dp_get_modes(struct drm_connector *connector)
1072{
1073 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
8b834852 1074 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1075 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA		 1076 int ret;
1077
8b834852 1078 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
d291767b
AD		 1079 struct drm_display_mode *mode;
1080
8b834852
AD		 1081 if (!radeon_dig_connector->edp_on)
1082 atombios_set_edp_panel_power(connector,
1083 ATOM_TRANSMITTER_ACTION_POWER_ON);
d291767b 1084 ret = radeon_ddc_get_modes(radeon_connector);
8b834852
AD		 1085 if (!radeon_dig_connector->edp_on)
1086 atombios_set_edp_panel_power(connector,
1087 ATOM_TRANSMITTER_ACTION_POWER_OFF);
d291767b
AD		 1088
1089 if (ret > 0) {
d291767b
AD		 1090 if (encoder) {
1091 radeon_fixup_lvds_native_mode(encoder, connector);
1092 /* add scaled modes */
1093 radeon_add_common_modes(encoder, connector);
1094 }
1095 return ret;
1096 }
1097
1098 encoder = radeon_best_single_encoder(connector);
1099 if (!encoder)
1100 return 0;
1101
1102 /* we have no EDID modes */
1103 mode = radeon_fp_native_mode(encoder);
1104 if (mode) {
1105 ret = 1;
1106 drm_mode_probed_add(connector, mode);
1107 /* add the width/height from vbios tables if available */
1108 connector->display_info.width_mm = mode->width_mm;
1109 connector->display_info.height_mm = mode->height_mm;
1110 /* add scaled modes */
1111 radeon_add_common_modes(encoder, connector);
1112 }
591a10e1
AD		 1113 } else {
1114 /* need to setup ddc on the bridge */
1115 if (radeon_connector_encoder_is_dp_bridge(connector)) {
1116 if (encoder)
1117 radeon_atom_ext_encoder_setup_ddc(encoder);
1118 }
d291767b 1119 ret = radeon_ddc_get_modes(radeon_connector);
591a10e1 1120 }
8b834852 1121
746c1aa4
DA		 1122 return ret;
1123}
1124
d7fa8bb3
AD		 1125bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector)
1126{
1127 struct drm_mode_object *obj;
1128 struct drm_encoder *encoder;
1129 struct radeon_encoder *radeon_encoder;
1130 int i;
1131 bool found = false;
1132
1133 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1134 if (connector->encoder_ids[i] == 0)
1135 break;
1136
1137 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1138 if (!obj)
1139 continue;
1140
1141 encoder = obj_to_encoder(obj);
1142 radeon_encoder = to_radeon_encoder(encoder);
1143
1144 switch (radeon_encoder->encoder_id) {
1145 case ENCODER_OBJECT_ID_TRAVIS:
1146 case ENCODER_OBJECT_ID_NUTMEG:
1147 found = true;
1148 break;
1149 default:
1150 break;
1151 }
1152 }
1153
1154 return found;
1155}
1156
1157bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
1158{
1159 struct drm_mode_object *obj;
1160 struct drm_encoder *encoder;
1161 struct radeon_encoder *radeon_encoder;
1162 int i;
1163 bool found = false;
1164
1165 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1166 if (connector->encoder_ids[i] == 0)
1167 break;
1168
1169 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1170 if (!obj)
1171 continue;
1172
1173 encoder = obj_to_encoder(obj);
1174 radeon_encoder = to_radeon_encoder(encoder);
1175 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1176 found = true;
1177 }
1178
1179 return found;
1180}
1181
1182bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1183{
1184 struct drm_device *dev = connector->dev;
1185 struct radeon_device *rdev = dev->dev_private;
1186
1187 if (ASIC_IS_DCE5(rdev) &&
1188 (rdev->clock.dp_extclk >= 53900) &&
1189 radeon_connector_encoder_is_hbr2(connector)) {
1190 return true;
1191 }
1192
1193 return false;
1194}
1195
7b334fcb 1196static enum drm_connector_status
930a9e28 1197radeon_dp_detect(struct drm_connector *connector, bool force)
746c1aa4 1198{
f8d0edde
AD		 1199 struct drm_device *dev = connector->dev;
1200 struct radeon_device *rdev = dev->dev_private;
746c1aa4 1201 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
746c1aa4 1202 enum drm_connector_status ret = connector_status_disconnected;
4143e919 1203 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1204 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA		 1205
1206 if (radeon_connector->edid) {
1207 kfree(radeon_connector->edid);
1208 radeon_connector->edid = NULL;
1209 }
1210
6f50eae7 1211 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
d291767b
AD		 1212 if (encoder) {
1213 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1214 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1215
1216 /* check if panel is valid */
1217 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1218 ret = connector_status_connected;
1219 }
6f50eae7
AD		 1220 /* eDP is always DP */
1221 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
8b834852
AD		 1222 if (!radeon_dig_connector->edp_on)
1223 atombios_set_edp_panel_power(connector,
1224 ATOM_TRANSMITTER_ACTION_POWER_ON);
6f50eae7 1225 if (radeon_dp_getdpcd(radeon_connector))
9fa05c98 1226 ret = connector_status_connected;
8b834852
AD		 1227 if (!radeon_dig_connector->edp_on)
1228 atombios_set_edp_panel_power(connector,
1229 ATOM_TRANSMITTER_ACTION_POWER_OFF);
4143e919 1230 } else {
591a10e1
AD		 1231 /* need to setup ddc on the bridge */
1232 if (radeon_connector_encoder_is_dp_bridge(connector)) {
1233 if (encoder)
1234 radeon_atom_ext_encoder_setup_ddc(encoder);
1235 }
6f50eae7 1236 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
f8d0edde
AD		 1237 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1238 ret = connector_status_connected;
1239 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
1240 radeon_dp_getdpcd(radeon_connector);
6f50eae7 1241 } else {
f8d0edde
AD		 1242 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1243 if (radeon_dp_getdpcd(radeon_connector))
1244 ret = connector_status_connected;
1245 } else {
1246 if (radeon_ddc_probe(radeon_connector))
1247 ret = connector_status_connected;
1248 }
4143e919 1249 }
d629a3ce
AD		 1250
1251 if ((ret == connector_status_disconnected) &&
1252 radeon_connector->dac_load_detect) {
1253 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1254 struct drm_encoder_helper_funcs *encoder_funcs;
1255 if (encoder) {
1256 encoder_funcs = encoder->helper_private;
1257 ret = encoder_funcs->detect(encoder, connector);
1258 }
1259 }
746c1aa4 1260 }
4143e919 1261
30f44372 1262 radeon_connector_update_scratch_regs(connector, ret);
746c1aa4
DA		 1263 return ret;
1264}
1265
5801ead6
AD		 1266static int radeon_dp_mode_valid(struct drm_connector *connector,
1267 struct drm_display_mode *mode)
1268{
1269 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1270 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1271
1272 /* XXX check mode bandwidth */
1273
d291767b
AD		 1274 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1275 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1276
1277 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1278 return MODE_PANEL;
1279
1280 if (encoder) {
1281 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1282 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1283
1284 /* AVIVO hardware supports downscaling modes larger than the panel
1285 * to the panel size, but I'm not sure this is desirable.
1286 */
1287 if ((mode->hdisplay > native_mode->hdisplay) ||
1288 (mode->vdisplay > native_mode->vdisplay))
1289 return MODE_PANEL;
1290
1291 /* if scaling is disabled, block non-native modes */
1292 if (radeon_encoder->rmx_type == RMX_OFF) {
1293 if ((mode->hdisplay != native_mode->hdisplay) ||
1294 (mode->vdisplay != native_mode->vdisplay))
1295 return MODE_PANEL;
1296 }
1297 }
5801ead6 1298 return MODE_OK;
d291767b
AD		 1299 } else {
1300 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
1301 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
1302 return radeon_dp_mode_valid_helper(connector, mode);
1303 else
1304 return MODE_OK;
1305 }
5801ead6
AD		 1306}
1307
746c1aa4
DA		 1308struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
1309 .get_modes = radeon_dp_get_modes,
5801ead6 1310 .mode_valid = radeon_dp_mode_valid,
746c1aa4
DA		 1311 .best_encoder = radeon_dvi_encoder,
1312};
1313
1314struct drm_connector_funcs radeon_dp_connector_funcs = {
1315 .dpms = drm_helper_connector_dpms,
1316 .detect = radeon_dp_detect,
1317 .fill_modes = drm_helper_probe_single_connector_modes,
1318 .set_property = radeon_connector_set_property,
ffd09c64 1319 .destroy = radeon_dp_connector_destroy,
746c1aa4
DA		 1320 .force = radeon_dvi_force,
1321};
1322
771fe6b9
JG		 1323void
1324radeon_add_atom_connector(struct drm_device *dev,
1325 uint32_t connector_id,
1326 uint32_t supported_device,
1327 int connector_type,
1328 struct radeon_i2c_bus_rec *i2c_bus,
b75fad06 1329 uint32_t igp_lane_info,
eed45b30 1330 uint16_t connector_object_id,
26b5bc98
AD		 1331 struct radeon_hpd *hpd,
1332 struct radeon_router *router)
771fe6b9 1333{
445282db 1334 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 1335 struct drm_connector *connector;
1336 struct radeon_connector *radeon_connector;
1337 struct radeon_connector_atom_dig *radeon_dig_connector;
eac4dff6
AD		 1338 struct drm_encoder *encoder;
1339 struct radeon_encoder *radeon_encoder;
771fe6b9 1340 uint32_t subpixel_order = SubPixelNone;
0294cf4f 1341 bool shared_ddc = false;
eac4dff6 1342 bool is_dp_bridge = false;
771fe6b9 1343
4ce001ab 1344 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 1345 return;
1346
cf4c12f9
AD		 1347 /* if the user selected tv=0 don't try and add the connector */
1348 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1349 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1350 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1351 (radeon_tv == 0))
1352 return;
1353
771fe6b9
JG		 1354 /* see if we already added it */
1355 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1356 radeon_connector = to_radeon_connector(connector);
1357 if (radeon_connector->connector_id == connector_id) {
1358 radeon_connector->devices |= supported_device;
1359 return;
1360 }
0294cf4f 1361 if (radeon_connector->ddc_bus && i2c_bus->valid) {
d3932d6c 1362 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
0294cf4f
AD		 1363 radeon_connector->shared_ddc = true;
1364 shared_ddc = true;
1365 }
fb939dfc 1366 if (radeon_connector->router_bus && router->ddc_valid &&
26b5bc98
AD		 1367 (radeon_connector->router.router_id == router->router_id)) {
1368 radeon_connector->shared_ddc = false;
1369 shared_ddc = false;
1370 }
0294cf4f 1371 }
771fe6b9
JG		 1372 }
1373
eac4dff6
AD		 1374 /* check if it's a dp bridge */
1375 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1376 radeon_encoder = to_radeon_encoder(encoder);
1377 if (radeon_encoder->devices & supported_device) {
1378 switch (radeon_encoder->encoder_id) {
1379 case ENCODER_OBJECT_ID_TRAVIS:
1380 case ENCODER_OBJECT_ID_NUTMEG:
1381 is_dp_bridge = true;
1382 break;
1383 default:
1384 break;
1385 }
1386 }
1387 }
1388
771fe6b9
JG		 1389 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1390 if (!radeon_connector)
1391 return;
1392
1393 connector = &radeon_connector->base;
1394
1395 radeon_connector->connector_id = connector_id;
1396 radeon_connector->devices = supported_device;
0294cf4f 1397 radeon_connector->shared_ddc = shared_ddc;
b75fad06 1398 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1399 radeon_connector->hpd = *hpd;
26b5bc98 1400 radeon_connector->router = *router;
fb939dfc 1401 if (router->ddc_valid || router->cd_valid) {
26b5bc98
AD		 1402 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1403 if (!radeon_connector->router_bus)
a70882aa 1404 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
26b5bc98 1405 }
eac4dff6
AD		 1406
1407 if (is_dp_bridge) {
771fe6b9
JG		 1408 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1409 if (!radeon_dig_connector)
1410 goto failed;
771fe6b9
JG		 1411 radeon_dig_connector->igp_lane_info = igp_lane_info;
1412 radeon_connector->con_priv = radeon_dig_connector;
eac4dff6
AD		 1413 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1414 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
771fe6b9 1415 if (i2c_bus->valid) {
eac4dff6
AD		 1416 /* add DP i2c bus */
1417 if (connector_type == DRM_MODE_CONNECTOR_eDP)
1418 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
1419 else
1420 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
1421 if (!radeon_dig_connector->dp_i2c_bus)
1422 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
f376b94f 1423 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1424 if (!radeon_connector->ddc_bus)
eac4dff6 1425 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1426 }
eac4dff6
AD		 1427 switch (connector_type) {
1428 case DRM_MODE_CONNECTOR_VGA:
1429 case DRM_MODE_CONNECTOR_DVIA:
1430 default:
1431 connector->interlace_allowed = true;
1432 connector->doublescan_allowed = true;
d629a3ce
AD		 1433 radeon_connector->dac_load_detect = true;
1434 drm_connector_attach_property(&radeon_connector->base,
1435 rdev->mode_info.load_detect_property,
1436 1);
eac4dff6
AD		 1437 break;
1438 case DRM_MODE_CONNECTOR_DVII:
1439 case DRM_MODE_CONNECTOR_DVID:
1440 case DRM_MODE_CONNECTOR_HDMIA:
1441 case DRM_MODE_CONNECTOR_HDMIB:
1442 case DRM_MODE_CONNECTOR_DisplayPort:
430f70d5
AD		 1443 drm_connector_attach_property(&radeon_connector->base,
1444 rdev->mode_info.underscan_property,
56bec7c0 1445 UNDERSCAN_OFF);
5bccf5e3
MG		 1446 drm_connector_attach_property(&radeon_connector->base,
1447 rdev->mode_info.underscan_hborder_property,
1448 0);
1449 drm_connector_attach_property(&radeon_connector->base,
1450 rdev->mode_info.underscan_vborder_property,
1451 0);
eac4dff6
AD		 1452 subpixel_order = SubPixelHorizontalRGB;
1453 connector->interlace_allowed = true;
1454 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1455 connector->doublescan_allowed = true;
1456 else
1457 connector->doublescan_allowed = false;
d629a3ce
AD		 1458 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1459 radeon_connector->dac_load_detect = true;
1460 drm_connector_attach_property(&radeon_connector->base,
1461 rdev->mode_info.load_detect_property,
1462 1);
1463 }
eac4dff6
AD		 1464 break;
1465 case DRM_MODE_CONNECTOR_LVDS:
1466 case DRM_MODE_CONNECTOR_eDP:
1467 drm_connector_attach_property(&radeon_connector->base,
1468 dev->mode_config.scaling_mode_property,
1469 DRM_MODE_SCALE_FULLSCREEN);
1470 subpixel_order = SubPixelHorizontalRGB;
1471 connector->interlace_allowed = false;
1472 connector->doublescan_allowed = false;
1473 break;
5bccf5e3 1474 }
eac4dff6
AD		 1475 } else {
1476 switch (connector_type) {
1477 case DRM_MODE_CONNECTOR_VGA:
1478 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1479 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1480 if (i2c_bus->valid) {
1481 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1482 if (!radeon_connector->ddc_bus)
1483 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1484 }
390d0bbe
AD		 1485 radeon_connector->dac_load_detect = true;
1486 drm_connector_attach_property(&radeon_connector->base,
1487 rdev->mode_info.load_detect_property,
1488 1);
eac4dff6
AD		 1489 /* no HPD on analog connectors */
1490 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1491 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1492 connector->interlace_allowed = true;
c49948f4 1493 connector->doublescan_allowed = true;
eac4dff6
AD		 1494 break;
1495 case DRM_MODE_CONNECTOR_DVIA:
1496 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1497 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1498 if (i2c_bus->valid) {
1499 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1500 if (!radeon_connector->ddc_bus)
1501 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1502 }
1503 radeon_connector->dac_load_detect = true;
430f70d5 1504 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD		 1505 rdev->mode_info.load_detect_property,
1506 1);
1507 /* no HPD on analog connectors */
1508 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1509 connector->interlace_allowed = true;
1510 connector->doublescan_allowed = true;
1511 break;
1512 case DRM_MODE_CONNECTOR_DVII:
1513 case DRM_MODE_CONNECTOR_DVID:
1514 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1515 if (!radeon_dig_connector)
1516 goto failed;
1517 radeon_dig_connector->igp_lane_info = igp_lane_info;
1518 radeon_connector->con_priv = radeon_dig_connector;
1519 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1520 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1521 if (i2c_bus->valid) {
1522 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1523 if (!radeon_connector->ddc_bus)
1524 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1525 }
1526 subpixel_order = SubPixelHorizontalRGB;
5bccf5e3 1527 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD		 1528 rdev->mode_info.coherent_mode_property,
1529 1);
1530 if (ASIC_IS_AVIVO(rdev)) {
1531 drm_connector_attach_property(&radeon_connector->base,
1532 rdev->mode_info.underscan_property,
1533 UNDERSCAN_OFF);
1534 drm_connector_attach_property(&radeon_connector->base,
1535 rdev->mode_info.underscan_hborder_property,
1536 0);
1537 drm_connector_attach_property(&radeon_connector->base,
1538 rdev->mode_info.underscan_vborder_property,
1539 0);
1540 }
1541 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1542 radeon_connector->dac_load_detect = true;
1543 drm_connector_attach_property(&radeon_connector->base,
1544 rdev->mode_info.load_detect_property,
1545 1);
1546 }
1547 connector->interlace_allowed = true;
1548 if (connector_type == DRM_MODE_CONNECTOR_DVII)
1549 connector->doublescan_allowed = true;
1550 else
1551 connector->doublescan_allowed = false;
1552 break;
1553 case DRM_MODE_CONNECTOR_HDMIA:
1554 case DRM_MODE_CONNECTOR_HDMIB:
1555 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1556 if (!radeon_dig_connector)
1557 goto failed;
1558 radeon_dig_connector->igp_lane_info = igp_lane_info;
1559 radeon_connector->con_priv = radeon_dig_connector;
1560 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1561 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1562 if (i2c_bus->valid) {
1563 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1564 if (!radeon_connector->ddc_bus)
1565 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1566 }
5bccf5e3 1567 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD		 1568 rdev->mode_info.coherent_mode_property,
1569 1);
1570 if (ASIC_IS_AVIVO(rdev)) {
1571 drm_connector_attach_property(&radeon_connector->base,
1572 rdev->mode_info.underscan_property,
1573 UNDERSCAN_OFF);
1574 drm_connector_attach_property(&radeon_connector->base,
1575 rdev->mode_info.underscan_hborder_property,
1576 0);
1577 drm_connector_attach_property(&radeon_connector->base,
1578 rdev->mode_info.underscan_vborder_property,
1579 0);
1580 }
1581 subpixel_order = SubPixelHorizontalRGB;
1582 connector->interlace_allowed = true;
1583 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1584 connector->doublescan_allowed = true;
1585 else
1586 connector->doublescan_allowed = false;
1587 break;
1588 case DRM_MODE_CONNECTOR_DisplayPort:
1589 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1590 if (!radeon_dig_connector)
1591 goto failed;
1592 radeon_dig_connector->igp_lane_info = igp_lane_info;
1593 radeon_connector->con_priv = radeon_dig_connector;
1594 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1595 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1596 if (i2c_bus->valid) {
1597 /* add DP i2c bus */
1598 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
1599 if (!radeon_dig_connector->dp_i2c_bus)
1600 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
1601 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1602 if (!radeon_connector->ddc_bus)
1603 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1604 }
1605 subpixel_order = SubPixelHorizontalRGB;
1606 drm_connector_attach_property(&radeon_connector->base,
1607 rdev->mode_info.coherent_mode_property,
1608 1);
1609 if (ASIC_IS_AVIVO(rdev)) {
1610 drm_connector_attach_property(&radeon_connector->base,
1611 rdev->mode_info.underscan_property,
1612 UNDERSCAN_OFF);
1613 drm_connector_attach_property(&radeon_connector->base,
1614 rdev->mode_info.underscan_hborder_property,
1615 0);
1616 drm_connector_attach_property(&radeon_connector->base,
1617 rdev->mode_info.underscan_vborder_property,
1618 0);
1619 }
1620 connector->interlace_allowed = true;
1621 /* in theory with a DP to VGA converter... */
c49948f4 1622 connector->doublescan_allowed = false;
eac4dff6
AD		 1623 break;
1624 case DRM_MODE_CONNECTOR_eDP:
1625 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1626 if (!radeon_dig_connector)
1627 goto failed;
1628 radeon_dig_connector->igp_lane_info = igp_lane_info;
1629 radeon_connector->con_priv = radeon_dig_connector;
1630 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1631 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1632 if (i2c_bus->valid) {
1633 /* add DP i2c bus */
1634 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
1635 if (!radeon_dig_connector->dp_i2c_bus)
1636 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
1637 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1638 if (!radeon_connector->ddc_bus)
1639 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1640 }
430f70d5 1641 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD		 1642 dev->mode_config.scaling_mode_property,
1643 DRM_MODE_SCALE_FULLSCREEN);
1644 subpixel_order = SubPixelHorizontalRGB;
1645 connector->interlace_allowed = false;
1646 connector->doublescan_allowed = false;
1647 break;
1648 case DRM_MODE_CONNECTOR_SVIDEO:
1649 case DRM_MODE_CONNECTOR_Composite:
1650 case DRM_MODE_CONNECTOR_9PinDIN:
1651 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
1652 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
1653 radeon_connector->dac_load_detect = true;
5bccf5e3 1654 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD		 1655 rdev->mode_info.load_detect_property,
1656 1);
5bccf5e3 1657 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD		 1658 rdev->mode_info.tv_std_property,
1659 radeon_atombios_get_tv_info(rdev));
1660 /* no HPD on analog connectors */
1661 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1662 connector->interlace_allowed = false;
1663 connector->doublescan_allowed = false;
1664 break;
1665 case DRM_MODE_CONNECTOR_LVDS:
1666 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1667 if (!radeon_dig_connector)
1668 goto failed;
1669 radeon_dig_connector->igp_lane_info = igp_lane_info;
1670 radeon_connector->con_priv = radeon_dig_connector;
1671 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
1672 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
1673 if (i2c_bus->valid) {
1674 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1675 if (!radeon_connector->ddc_bus)
1676 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1677 }
1678 drm_connector_attach_property(&radeon_connector->base,
1679 dev->mode_config.scaling_mode_property,
1680 DRM_MODE_SCALE_FULLSCREEN);
1681 subpixel_order = SubPixelHorizontalRGB;
1682 connector->interlace_allowed = false;
1683 connector->doublescan_allowed = false;
1684 break;
771fe6b9 1685 }
771fe6b9
JG		 1686 }
1687
2581afcc 1688 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 1689 if (i2c_bus->valid)
1690 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1691 } else
1692 connector->polled = DRM_CONNECTOR_POLL_HPD;
1693
771fe6b9
JG		 1694 connector->display_info.subpixel_order = subpixel_order;
1695 drm_sysfs_connector_add(connector);
1696 return;
1697
1698failed:
771fe6b9
JG		 1699 drm_connector_cleanup(connector);
1700 kfree(connector);
1701}
1702
1703void
1704radeon_add_legacy_connector(struct drm_device *dev,
1705 uint32_t connector_id,
1706 uint32_t supported_device,
1707 int connector_type,
b75fad06 1708 struct radeon_i2c_bus_rec *i2c_bus,
eed45b30
AD		 1709 uint16_t connector_object_id,
1710 struct radeon_hpd *hpd)
771fe6b9 1711{
445282db 1712 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 1713 struct drm_connector *connector;
1714 struct radeon_connector *radeon_connector;
1715 uint32_t subpixel_order = SubPixelNone;
1716
4ce001ab 1717 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 1718 return;
1719
cf4c12f9
AD		 1720 /* if the user selected tv=0 don't try and add the connector */
1721 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1722 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1723 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1724 (radeon_tv == 0))
1725 return;
1726
771fe6b9
JG		 1727 /* see if we already added it */
1728 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1729 radeon_connector = to_radeon_connector(connector);
1730 if (radeon_connector->connector_id == connector_id) {
1731 radeon_connector->devices |= supported_device;
1732 return;
1733 }
1734 }
1735
1736 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1737 if (!radeon_connector)
1738 return;
1739
1740 connector = &radeon_connector->base;
1741
1742 radeon_connector->connector_id = connector_id;
1743 radeon_connector->devices = supported_device;
b75fad06 1744 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1745 radeon_connector->hpd = *hpd;
771fe6b9
JG		 1746 switch (connector_type) {
1747 case DRM_MODE_CONNECTOR_VGA:
1748 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 1749 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 1750 if (i2c_bus->valid) {
f376b94f 1751 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1752 if (!radeon_connector->ddc_bus)
a70882aa 1753 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1754 }
35e4b7af 1755 radeon_connector->dac_load_detect = true;
445282db
DA		 1756 drm_connector_attach_property(&radeon_connector->base,
1757 rdev->mode_info.load_detect_property,
1758 1);
2581afcc
AD		 1759 /* no HPD on analog connectors */
1760 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
eb1f8e4f 1761 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
c49948f4
AD		 1762 connector->interlace_allowed = true;
1763 connector->doublescan_allowed = true;
771fe6b9
JG		 1764 break;
1765 case DRM_MODE_CONNECTOR_DVIA:
1766 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 1767 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 1768 if (i2c_bus->valid) {
f376b94f 1769 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1770 if (!radeon_connector->ddc_bus)
a70882aa 1771 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1772 }
35e4b7af 1773 radeon_connector->dac_load_detect = true;
445282db
DA		 1774 drm_connector_attach_property(&radeon_connector->base,
1775 rdev->mode_info.load_detect_property,
1776 1);
2581afcc
AD		 1777 /* no HPD on analog connectors */
1778 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 1779 connector->interlace_allowed = true;
1780 connector->doublescan_allowed = true;
771fe6b9
JG		 1781 break;
1782 case DRM_MODE_CONNECTOR_DVII:
1783 case DRM_MODE_CONNECTOR_DVID:
1784 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
0b4c0f3f 1785 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
771fe6b9 1786 if (i2c_bus->valid) {
f376b94f 1787 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1788 if (!radeon_connector->ddc_bus)
a70882aa 1789 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
68b3adb4
AD		 1790 }
1791 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
35e4b7af 1792 radeon_connector->dac_load_detect = true;
445282db
DA		 1793 drm_connector_attach_property(&radeon_connector->base,
1794 rdev->mode_info.load_detect_property,
1795 1);
771fe6b9
JG		 1796 }
1797 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 1798 connector->interlace_allowed = true;
1799 if (connector_type == DRM_MODE_CONNECTOR_DVII)
1800 connector->doublescan_allowed = true;
1801 else
1802 connector->doublescan_allowed = false;
771fe6b9
JG		 1803 break;
1804 case DRM_MODE_CONNECTOR_SVIDEO:
1805 case DRM_MODE_CONNECTOR_Composite:
1806 case DRM_MODE_CONNECTOR_9PinDIN:
cf4c12f9
AD		 1807 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
1808 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
1809 radeon_connector->dac_load_detect = true;
1810 /* RS400,RC410,RS480 chipset seems to report a lot
1811 * of false positive on load detect, we haven't yet
1812 * found a way to make load detect reliable on those
1813 * chipset, thus just disable it for TV.
1814 */
1815 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
1816 radeon_connector->dac_load_detect = false;
1817 drm_connector_attach_property(&radeon_connector->base,
1818 rdev->mode_info.load_detect_property,
1819 radeon_connector->dac_load_detect);
1820 drm_connector_attach_property(&radeon_connector->base,
1821 rdev->mode_info.tv_std_property,
1822 radeon_combios_get_tv_info(rdev));
1823 /* no HPD on analog connectors */
1824 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 1825 connector->interlace_allowed = false;
1826 connector->doublescan_allowed = false;
771fe6b9
JG		 1827 break;
1828 case DRM_MODE_CONNECTOR_LVDS:
1829 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
0b4c0f3f 1830 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
771fe6b9 1831 if (i2c_bus->valid) {
f376b94f 1832 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1833 if (!radeon_connector->ddc_bus)
a70882aa 1834 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1835 }
445282db
DA		 1836 drm_connector_attach_property(&radeon_connector->base,
1837 dev->mode_config.scaling_mode_property,
1838 DRM_MODE_SCALE_FULLSCREEN);
771fe6b9 1839 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 1840 connector->interlace_allowed = false;
1841 connector->doublescan_allowed = false;
771fe6b9
JG		 1842 break;
1843 }
1844
2581afcc 1845 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 1846 if (i2c_bus->valid)
1847 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1848 } else
1849 connector->polled = DRM_CONNECTOR_POLL_HPD;
771fe6b9
JG		 1850 connector->display_info.subpixel_order = subpixel_order;
1851 drm_sysfs_connector_add(connector);
63ec0119
MD		 1852 if (connector_type == DRM_MODE_CONNECTOR_LVDS) {
1853 struct drm_encoder *drm_encoder;
1854
1855 list_for_each_entry(drm_encoder, &dev->mode_config.encoder_list, head) {
1856 struct radeon_encoder *radeon_encoder;
1857
1858 radeon_encoder = to_radeon_encoder(drm_encoder);
1859 if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_LVDS)
1860 radeon_legacy_backlight_init(radeon_encoder, connector);
1861 }
1862 }
771fe6b9 1863}
Linux kernel - Deliverables
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