Commit | Line | Data |
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771fe6b9 JG |
1 | /* |
2 | * Copyright 2007-8 Advanced Micro Devices, Inc. | |
3 | * Copyright 2008 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice shall be included in | |
13 | * all copies or substantial portions of the Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
21 | * OTHER DEALINGS IN THE SOFTWARE. | |
22 | * | |
23 | * Authors: Dave Airlie | |
24 | * Alex Deucher | |
25 | */ | |
26 | #include "drmP.h" | |
27 | #include "drm_edid.h" | |
28 | #include "drm_crtc_helper.h" | |
d50ba256 | 29 | #include "drm_fb_helper.h" |
771fe6b9 JG |
30 | #include "radeon_drm.h" |
31 | #include "radeon.h" | |
923f6848 | 32 | #include "atom.h" |
771fe6b9 JG |
33 | |
34 | extern void | |
35 | radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |
36 | struct drm_encoder *encoder, | |
37 | bool connected); | |
38 | extern void | |
39 | radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |
40 | struct drm_encoder *encoder, | |
41 | bool connected); | |
42 | ||
d4877cf2 AD |
43 | void radeon_connector_hotplug(struct drm_connector *connector) |
44 | { | |
45 | struct drm_device *dev = connector->dev; | |
46 | struct radeon_device *rdev = dev->dev_private; | |
47 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
48 | ||
49 | if (radeon_connector->hpd.hpd != RADEON_HPD_NONE) | |
50 | radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); | |
51 | ||
196c58d2 AD |
52 | if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) || |
53 | (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) { | |
54 | if ((radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | |
55 | (radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_eDP)) { | |
d4877cf2 AD |
56 | if (radeon_dp_needs_link_train(radeon_connector)) { |
57 | if (connector->encoder) | |
58 | dp_link_train(connector->encoder, connector); | |
59 | } | |
60 | } | |
61 | } | |
62 | ||
63 | } | |
64 | ||
445282db DA |
65 | static void radeon_property_change_mode(struct drm_encoder *encoder) |
66 | { | |
67 | struct drm_crtc *crtc = encoder->crtc; | |
68 | ||
69 | if (crtc && crtc->enabled) { | |
70 | drm_crtc_helper_set_mode(crtc, &crtc->mode, | |
71 | crtc->x, crtc->y, crtc->fb); | |
72 | } | |
73 | } | |
771fe6b9 JG |
74 | static void |
75 | radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status) | |
76 | { | |
77 | struct drm_device *dev = connector->dev; | |
78 | struct radeon_device *rdev = dev->dev_private; | |
79 | struct drm_encoder *best_encoder = NULL; | |
80 | struct drm_encoder *encoder = NULL; | |
81 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
82 | struct drm_mode_object *obj; | |
83 | bool connected; | |
84 | int i; | |
85 | ||
86 | best_encoder = connector_funcs->best_encoder(connector); | |
87 | ||
88 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
89 | if (connector->encoder_ids[i] == 0) | |
90 | break; | |
91 | ||
92 | obj = drm_mode_object_find(connector->dev, | |
93 | connector->encoder_ids[i], | |
94 | DRM_MODE_OBJECT_ENCODER); | |
95 | if (!obj) | |
96 | continue; | |
97 | ||
98 | encoder = obj_to_encoder(obj); | |
99 | ||
100 | if ((encoder == best_encoder) && (status == connector_status_connected)) | |
101 | connected = true; | |
102 | else | |
103 | connected = false; | |
104 | ||
105 | if (rdev->is_atom_bios) | |
106 | radeon_atombios_connected_scratch_regs(connector, encoder, connected); | |
107 | else | |
108 | radeon_combios_connected_scratch_regs(connector, encoder, connected); | |
109 | ||
110 | } | |
111 | } | |
112 | ||
445282db DA |
113 | struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type) |
114 | { | |
115 | struct drm_mode_object *obj; | |
116 | struct drm_encoder *encoder; | |
117 | int i; | |
118 | ||
119 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
120 | if (connector->encoder_ids[i] == 0) | |
121 | break; | |
122 | ||
123 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
124 | if (!obj) | |
125 | continue; | |
126 | ||
127 | encoder = obj_to_encoder(obj); | |
128 | if (encoder->encoder_type == encoder_type) | |
129 | return encoder; | |
130 | } | |
131 | return NULL; | |
132 | } | |
133 | ||
771fe6b9 JG |
134 | struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector) |
135 | { | |
136 | int enc_id = connector->encoder_ids[0]; | |
137 | struct drm_mode_object *obj; | |
138 | struct drm_encoder *encoder; | |
139 | ||
140 | /* pick the encoder ids */ | |
141 | if (enc_id) { | |
142 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
143 | if (!obj) | |
144 | return NULL; | |
145 | encoder = obj_to_encoder(obj); | |
146 | return encoder; | |
147 | } | |
148 | return NULL; | |
149 | } | |
150 | ||
4ce001ab DA |
151 | /* |
152 | * radeon_connector_analog_encoder_conflict_solve | |
153 | * - search for other connectors sharing this encoder | |
154 | * if priority is true, then set them disconnected if this is connected | |
155 | * if priority is false, set us disconnected if they are connected | |
156 | */ | |
157 | static enum drm_connector_status | |
158 | radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, | |
159 | struct drm_encoder *encoder, | |
160 | enum drm_connector_status current_status, | |
161 | bool priority) | |
162 | { | |
163 | struct drm_device *dev = connector->dev; | |
164 | struct drm_connector *conflict; | |
08d07511 | 165 | struct radeon_connector *radeon_conflict; |
4ce001ab DA |
166 | int i; |
167 | ||
168 | list_for_each_entry(conflict, &dev->mode_config.connector_list, head) { | |
169 | if (conflict == connector) | |
170 | continue; | |
171 | ||
08d07511 | 172 | radeon_conflict = to_radeon_connector(conflict); |
4ce001ab DA |
173 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { |
174 | if (conflict->encoder_ids[i] == 0) | |
175 | break; | |
176 | ||
177 | /* if the IDs match */ | |
178 | if (conflict->encoder_ids[i] == encoder->base.id) { | |
179 | if (conflict->status != connector_status_connected) | |
180 | continue; | |
08d07511 AD |
181 | |
182 | if (radeon_conflict->use_digital) | |
183 | continue; | |
4ce001ab DA |
184 | |
185 | if (priority == true) { | |
186 | DRM_INFO("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict)); | |
187 | DRM_INFO("in favor of %s\n", drm_get_connector_name(connector)); | |
188 | conflict->status = connector_status_disconnected; | |
189 | radeon_connector_update_scratch_regs(conflict, connector_status_disconnected); | |
190 | } else { | |
191 | DRM_INFO("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector)); | |
192 | DRM_INFO("in favor of %s\n", drm_get_connector_name(conflict)); | |
193 | current_status = connector_status_disconnected; | |
194 | } | |
195 | break; | |
196 | } | |
197 | } | |
198 | } | |
199 | return current_status; | |
200 | ||
201 | } | |
202 | ||
771fe6b9 JG |
203 | static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder) |
204 | { | |
205 | struct drm_device *dev = encoder->dev; | |
206 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
207 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 208 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
771fe6b9 | 209 | |
de2103e4 AD |
210 | if (native_mode->hdisplay != 0 && |
211 | native_mode->vdisplay != 0 && | |
212 | native_mode->clock != 0) { | |
fb06ca8f | 213 | mode = drm_mode_duplicate(dev, native_mode); |
771fe6b9 JG |
214 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; |
215 | drm_mode_set_name(mode); | |
216 | ||
d9fdaafb | 217 | DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name); |
d2efdf6d AD |
218 | } else if (native_mode->hdisplay != 0 && |
219 | native_mode->vdisplay != 0) { | |
220 | /* mac laptops without an edid */ | |
221 | /* Note that this is not necessarily the exact panel mode, | |
222 | * but an approximation based on the cvt formula. For these | |
223 | * systems we should ideally read the mode info out of the | |
224 | * registers or add a mode table, but this works and is much | |
225 | * simpler. | |
226 | */ | |
227 | mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); | |
228 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | |
d9fdaafb | 229 | DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name); |
771fe6b9 JG |
230 | } |
231 | return mode; | |
232 | } | |
233 | ||
923f6848 AD |
234 | static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector) |
235 | { | |
236 | struct drm_device *dev = encoder->dev; | |
237 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
238 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 239 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
923f6848 AD |
240 | int i; |
241 | struct mode_size { | |
242 | int w; | |
243 | int h; | |
244 | } common_modes[17] = { | |
245 | { 640, 480}, | |
246 | { 720, 480}, | |
247 | { 800, 600}, | |
248 | { 848, 480}, | |
249 | {1024, 768}, | |
250 | {1152, 768}, | |
251 | {1280, 720}, | |
252 | {1280, 800}, | |
253 | {1280, 854}, | |
254 | {1280, 960}, | |
255 | {1280, 1024}, | |
256 | {1440, 900}, | |
257 | {1400, 1050}, | |
258 | {1680, 1050}, | |
259 | {1600, 1200}, | |
260 | {1920, 1080}, | |
261 | {1920, 1200} | |
262 | }; | |
263 | ||
264 | for (i = 0; i < 17; i++) { | |
dfdd6467 AD |
265 | if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) { |
266 | if (common_modes[i].w > 1024 || | |
267 | common_modes[i].h > 768) | |
268 | continue; | |
269 | } | |
923f6848 | 270 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
de2103e4 AD |
271 | if (common_modes[i].w > native_mode->hdisplay || |
272 | common_modes[i].h > native_mode->vdisplay || | |
273 | (common_modes[i].w == native_mode->hdisplay && | |
274 | common_modes[i].h == native_mode->vdisplay)) | |
923f6848 AD |
275 | continue; |
276 | } | |
277 | if (common_modes[i].w < 320 || common_modes[i].h < 200) | |
278 | continue; | |
279 | ||
d50ba256 | 280 | mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false); |
923f6848 AD |
281 | drm_mode_probed_add(connector, mode); |
282 | } | |
283 | } | |
284 | ||
771fe6b9 JG |
285 | int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property, |
286 | uint64_t val) | |
287 | { | |
445282db DA |
288 | struct drm_device *dev = connector->dev; |
289 | struct radeon_device *rdev = dev->dev_private; | |
290 | struct drm_encoder *encoder; | |
291 | struct radeon_encoder *radeon_encoder; | |
292 | ||
293 | if (property == rdev->mode_info.coherent_mode_property) { | |
294 | struct radeon_encoder_atom_dig *dig; | |
ce227c41 | 295 | bool new_coherent_mode; |
445282db DA |
296 | |
297 | /* need to find digital encoder on connector */ | |
298 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
299 | if (!encoder) | |
300 | return 0; | |
301 | ||
302 | radeon_encoder = to_radeon_encoder(encoder); | |
303 | ||
304 | if (!radeon_encoder->enc_priv) | |
305 | return 0; | |
306 | ||
307 | dig = radeon_encoder->enc_priv; | |
ce227c41 DA |
308 | new_coherent_mode = val ? true : false; |
309 | if (dig->coherent_mode != new_coherent_mode) { | |
310 | dig->coherent_mode = new_coherent_mode; | |
311 | radeon_property_change_mode(&radeon_encoder->base); | |
312 | } | |
445282db DA |
313 | } |
314 | ||
5b1714d3 AD |
315 | if (property == rdev->mode_info.underscan_property) { |
316 | /* need to find digital encoder on connector */ | |
317 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
318 | if (!encoder) | |
319 | return 0; | |
320 | ||
321 | radeon_encoder = to_radeon_encoder(encoder); | |
322 | ||
323 | if (radeon_encoder->underscan_type != val) { | |
324 | radeon_encoder->underscan_type = val; | |
325 | radeon_property_change_mode(&radeon_encoder->base); | |
326 | } | |
327 | } | |
328 | ||
5bccf5e3 MG |
329 | if (property == rdev->mode_info.underscan_hborder_property) { |
330 | /* need to find digital encoder on connector */ | |
331 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
332 | if (!encoder) | |
333 | return 0; | |
334 | ||
335 | radeon_encoder = to_radeon_encoder(encoder); | |
336 | ||
337 | if (radeon_encoder->underscan_hborder != val) { | |
338 | radeon_encoder->underscan_hborder = val; | |
339 | radeon_property_change_mode(&radeon_encoder->base); | |
340 | } | |
341 | } | |
342 | ||
343 | if (property == rdev->mode_info.underscan_vborder_property) { | |
344 | /* need to find digital encoder on connector */ | |
345 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
346 | if (!encoder) | |
347 | return 0; | |
348 | ||
349 | radeon_encoder = to_radeon_encoder(encoder); | |
350 | ||
351 | if (radeon_encoder->underscan_vborder != val) { | |
352 | radeon_encoder->underscan_vborder = val; | |
353 | radeon_property_change_mode(&radeon_encoder->base); | |
354 | } | |
355 | } | |
356 | ||
445282db DA |
357 | if (property == rdev->mode_info.tv_std_property) { |
358 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC); | |
359 | if (!encoder) { | |
360 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC); | |
361 | } | |
362 | ||
363 | if (!encoder) | |
364 | return 0; | |
365 | ||
366 | radeon_encoder = to_radeon_encoder(encoder); | |
367 | if (!radeon_encoder->enc_priv) | |
368 | return 0; | |
643acacf | 369 | if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) { |
445282db DA |
370 | struct radeon_encoder_atom_dac *dac_int; |
371 | dac_int = radeon_encoder->enc_priv; | |
372 | dac_int->tv_std = val; | |
373 | } else { | |
374 | struct radeon_encoder_tv_dac *dac_int; | |
375 | dac_int = radeon_encoder->enc_priv; | |
376 | dac_int->tv_std = val; | |
377 | } | |
378 | radeon_property_change_mode(&radeon_encoder->base); | |
379 | } | |
380 | ||
381 | if (property == rdev->mode_info.load_detect_property) { | |
382 | struct radeon_connector *radeon_connector = | |
383 | to_radeon_connector(connector); | |
384 | ||
385 | if (val == 0) | |
386 | radeon_connector->dac_load_detect = false; | |
387 | else | |
388 | radeon_connector->dac_load_detect = true; | |
389 | } | |
390 | ||
391 | if (property == rdev->mode_info.tmds_pll_property) { | |
392 | struct radeon_encoder_int_tmds *tmds = NULL; | |
393 | bool ret = false; | |
394 | /* need to find digital encoder on connector */ | |
395 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
396 | if (!encoder) | |
397 | return 0; | |
398 | ||
399 | radeon_encoder = to_radeon_encoder(encoder); | |
400 | ||
401 | tmds = radeon_encoder->enc_priv; | |
402 | if (!tmds) | |
403 | return 0; | |
404 | ||
405 | if (val == 0) { | |
406 | if (rdev->is_atom_bios) | |
407 | ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds); | |
408 | else | |
409 | ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds); | |
410 | } | |
411 | if (val == 1 || ret == false) { | |
412 | radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds); | |
413 | } | |
414 | radeon_property_change_mode(&radeon_encoder->base); | |
415 | } | |
416 | ||
771fe6b9 JG |
417 | return 0; |
418 | } | |
419 | ||
8dfaa8a7 MD |
420 | static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder, |
421 | struct drm_connector *connector) | |
422 | { | |
423 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 424 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
8dfaa8a7 MD |
425 | |
426 | /* Try to get native mode details from EDID if necessary */ | |
de2103e4 | 427 | if (!native_mode->clock) { |
8dfaa8a7 MD |
428 | struct drm_display_mode *t, *mode; |
429 | ||
430 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { | |
de2103e4 AD |
431 | if (mode->hdisplay == native_mode->hdisplay && |
432 | mode->vdisplay == native_mode->vdisplay) { | |
433 | *native_mode = *mode; | |
434 | drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); | |
8dfaa8a7 MD |
435 | DRM_INFO("Determined LVDS native mode details from EDID\n"); |
436 | break; | |
437 | } | |
438 | } | |
439 | } | |
de2103e4 | 440 | if (!native_mode->clock) { |
8dfaa8a7 MD |
441 | DRM_INFO("No LVDS native mode details, disabling RMX\n"); |
442 | radeon_encoder->rmx_type = RMX_OFF; | |
443 | } | |
444 | } | |
771fe6b9 JG |
445 | |
446 | static int radeon_lvds_get_modes(struct drm_connector *connector) | |
447 | { | |
448 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
449 | struct drm_encoder *encoder; | |
450 | int ret = 0; | |
451 | struct drm_display_mode *mode; | |
452 | ||
453 | if (radeon_connector->ddc_bus) { | |
454 | ret = radeon_ddc_get_modes(radeon_connector); | |
455 | if (ret > 0) { | |
7747b713 | 456 | encoder = radeon_best_single_encoder(connector); |
8dfaa8a7 MD |
457 | if (encoder) { |
458 | radeon_fixup_lvds_native_mode(encoder, connector); | |
7747b713 AD |
459 | /* add scaled modes */ |
460 | radeon_add_common_modes(encoder, connector); | |
8dfaa8a7 | 461 | } |
771fe6b9 JG |
462 | return ret; |
463 | } | |
464 | } | |
465 | ||
466 | encoder = radeon_best_single_encoder(connector); | |
467 | if (!encoder) | |
468 | return 0; | |
469 | ||
470 | /* we have no EDID modes */ | |
471 | mode = radeon_fp_native_mode(encoder); | |
472 | if (mode) { | |
473 | ret = 1; | |
474 | drm_mode_probed_add(connector, mode); | |
7747b713 AD |
475 | /* add scaled modes */ |
476 | radeon_add_common_modes(encoder, connector); | |
771fe6b9 | 477 | } |
923f6848 | 478 | |
771fe6b9 JG |
479 | return ret; |
480 | } | |
481 | ||
482 | static int radeon_lvds_mode_valid(struct drm_connector *connector, | |
483 | struct drm_display_mode *mode) | |
484 | { | |
a3fa6320 AD |
485 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
486 | ||
487 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
488 | return MODE_PANEL; | |
489 | ||
490 | if (encoder) { | |
491 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
492 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
493 | ||
494 | /* AVIVO hardware supports downscaling modes larger than the panel | |
495 | * to the panel size, but I'm not sure this is desirable. | |
496 | */ | |
497 | if ((mode->hdisplay > native_mode->hdisplay) || | |
498 | (mode->vdisplay > native_mode->vdisplay)) | |
499 | return MODE_PANEL; | |
500 | ||
501 | /* if scaling is disabled, block non-native modes */ | |
502 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
503 | if ((mode->hdisplay != native_mode->hdisplay) || | |
504 | (mode->vdisplay != native_mode->vdisplay)) | |
505 | return MODE_PANEL; | |
506 | } | |
507 | } | |
508 | ||
771fe6b9 JG |
509 | return MODE_OK; |
510 | } | |
511 | ||
7b334fcb | 512 | static enum drm_connector_status |
930a9e28 | 513 | radeon_lvds_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 514 | { |
0549a061 | 515 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
2ffb8429 | 516 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
0549a061 | 517 | enum drm_connector_status ret = connector_status_disconnected; |
2ffb8429 AD |
518 | |
519 | if (encoder) { | |
520 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 521 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
2ffb8429 AD |
522 | |
523 | /* check if panel is valid */ | |
de2103e4 | 524 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) |
2ffb8429 AD |
525 | ret = connector_status_connected; |
526 | ||
527 | } | |
0549a061 AD |
528 | |
529 | /* check for edid as well */ | |
0294cf4f AD |
530 | if (radeon_connector->edid) |
531 | ret = connector_status_connected; | |
532 | else { | |
533 | if (radeon_connector->ddc_bus) { | |
0294cf4f AD |
534 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
535 | &radeon_connector->ddc_bus->adapter); | |
0294cf4f AD |
536 | if (radeon_connector->edid) |
537 | ret = connector_status_connected; | |
538 | } | |
0549a061 | 539 | } |
771fe6b9 | 540 | /* check acpi lid status ??? */ |
2ffb8429 | 541 | |
771fe6b9 JG |
542 | radeon_connector_update_scratch_regs(connector, ret); |
543 | return ret; | |
544 | } | |
545 | ||
546 | static void radeon_connector_destroy(struct drm_connector *connector) | |
547 | { | |
548 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
549 | ||
0294cf4f AD |
550 | if (radeon_connector->edid) |
551 | kfree(radeon_connector->edid); | |
771fe6b9 JG |
552 | kfree(radeon_connector->con_priv); |
553 | drm_sysfs_connector_remove(connector); | |
554 | drm_connector_cleanup(connector); | |
555 | kfree(connector); | |
556 | } | |
557 | ||
445282db DA |
558 | static int radeon_lvds_set_property(struct drm_connector *connector, |
559 | struct drm_property *property, | |
560 | uint64_t value) | |
561 | { | |
562 | struct drm_device *dev = connector->dev; | |
563 | struct radeon_encoder *radeon_encoder; | |
564 | enum radeon_rmx_type rmx_type; | |
565 | ||
d9fdaafb | 566 | DRM_DEBUG_KMS("\n"); |
445282db DA |
567 | if (property != dev->mode_config.scaling_mode_property) |
568 | return 0; | |
569 | ||
570 | if (connector->encoder) | |
571 | radeon_encoder = to_radeon_encoder(connector->encoder); | |
572 | else { | |
573 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
574 | radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector)); | |
575 | } | |
576 | ||
577 | switch (value) { | |
578 | case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break; | |
579 | case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break; | |
580 | case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break; | |
581 | default: | |
582 | case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break; | |
583 | } | |
584 | if (radeon_encoder->rmx_type == rmx_type) | |
585 | return 0; | |
586 | ||
587 | radeon_encoder->rmx_type = rmx_type; | |
588 | ||
589 | radeon_property_change_mode(&radeon_encoder->base); | |
590 | return 0; | |
591 | } | |
592 | ||
593 | ||
771fe6b9 JG |
594 | struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = { |
595 | .get_modes = radeon_lvds_get_modes, | |
596 | .mode_valid = radeon_lvds_mode_valid, | |
597 | .best_encoder = radeon_best_single_encoder, | |
598 | }; | |
599 | ||
600 | struct drm_connector_funcs radeon_lvds_connector_funcs = { | |
601 | .dpms = drm_helper_connector_dpms, | |
602 | .detect = radeon_lvds_detect, | |
603 | .fill_modes = drm_helper_probe_single_connector_modes, | |
604 | .destroy = radeon_connector_destroy, | |
445282db | 605 | .set_property = radeon_lvds_set_property, |
771fe6b9 JG |
606 | }; |
607 | ||
608 | static int radeon_vga_get_modes(struct drm_connector *connector) | |
609 | { | |
610 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
611 | int ret; | |
612 | ||
613 | ret = radeon_ddc_get_modes(radeon_connector); | |
614 | ||
615 | return ret; | |
616 | } | |
617 | ||
618 | static int radeon_vga_mode_valid(struct drm_connector *connector, | |
619 | struct drm_display_mode *mode) | |
620 | { | |
a3fa6320 AD |
621 | /* XXX check mode bandwidth */ |
622 | /* XXX verify against max DAC output frequency */ | |
771fe6b9 JG |
623 | return MODE_OK; |
624 | } | |
625 | ||
7b334fcb | 626 | static enum drm_connector_status |
930a9e28 | 627 | radeon_vga_detect(struct drm_connector *connector, bool force) |
771fe6b9 JG |
628 | { |
629 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
630 | struct drm_encoder *encoder; | |
631 | struct drm_encoder_helper_funcs *encoder_funcs; | |
4b9d2a21 | 632 | bool dret = false; |
771fe6b9 JG |
633 | enum drm_connector_status ret = connector_status_disconnected; |
634 | ||
4ce001ab DA |
635 | encoder = radeon_best_single_encoder(connector); |
636 | if (!encoder) | |
637 | ret = connector_status_disconnected; | |
638 | ||
eb6b6d7c | 639 | if (radeon_connector->ddc_bus) |
4b9d2a21 | 640 | dret = radeon_ddc_probe(radeon_connector); |
0294cf4f AD |
641 | if (dret) { |
642 | if (radeon_connector->edid) { | |
643 | kfree(radeon_connector->edid); | |
644 | radeon_connector->edid = NULL; | |
645 | } | |
0294cf4f | 646 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
0294cf4f AD |
647 | |
648 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
649 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
650 | drm_get_connector_name(connector)); | |
651 | ret = connector_status_connected; | |
0294cf4f AD |
652 | } else { |
653 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
654 | ||
655 | /* some oems have boards with separate digital and analog connectors | |
656 | * with a shared ddc line (often vga + hdmi) | |
657 | */ | |
658 | if (radeon_connector->use_digital && radeon_connector->shared_ddc) { | |
659 | kfree(radeon_connector->edid); | |
660 | radeon_connector->edid = NULL; | |
661 | ret = connector_status_disconnected; | |
662 | } else | |
663 | ret = connector_status_connected; | |
664 | } | |
665 | } else { | |
d8a7f792 | 666 | if (radeon_connector->dac_load_detect && encoder) { |
445282db DA |
667 | encoder_funcs = encoder->helper_private; |
668 | ret = encoder_funcs->detect(encoder, connector); | |
669 | } | |
771fe6b9 JG |
670 | } |
671 | ||
4ce001ab DA |
672 | if (ret == connector_status_connected) |
673 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
771fe6b9 JG |
674 | radeon_connector_update_scratch_regs(connector, ret); |
675 | return ret; | |
676 | } | |
677 | ||
678 | struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = { | |
679 | .get_modes = radeon_vga_get_modes, | |
680 | .mode_valid = radeon_vga_mode_valid, | |
681 | .best_encoder = radeon_best_single_encoder, | |
682 | }; | |
683 | ||
684 | struct drm_connector_funcs radeon_vga_connector_funcs = { | |
685 | .dpms = drm_helper_connector_dpms, | |
686 | .detect = radeon_vga_detect, | |
687 | .fill_modes = drm_helper_probe_single_connector_modes, | |
688 | .destroy = radeon_connector_destroy, | |
689 | .set_property = radeon_connector_set_property, | |
690 | }; | |
691 | ||
4ce001ab DA |
692 | static int radeon_tv_get_modes(struct drm_connector *connector) |
693 | { | |
694 | struct drm_device *dev = connector->dev; | |
923f6848 | 695 | struct radeon_device *rdev = dev->dev_private; |
4ce001ab | 696 | struct drm_display_mode *tv_mode; |
923f6848 | 697 | struct drm_encoder *encoder; |
4ce001ab | 698 | |
923f6848 AD |
699 | encoder = radeon_best_single_encoder(connector); |
700 | if (!encoder) | |
701 | return 0; | |
4ce001ab | 702 | |
923f6848 AD |
703 | /* avivo chips can scale any mode */ |
704 | if (rdev->family >= CHIP_RS600) | |
705 | /* add scaled modes */ | |
706 | radeon_add_common_modes(encoder, connector); | |
707 | else { | |
708 | /* only 800x600 is supported right now on pre-avivo chips */ | |
d50ba256 | 709 | tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false); |
923f6848 AD |
710 | tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; |
711 | drm_mode_probed_add(connector, tv_mode); | |
712 | } | |
4ce001ab DA |
713 | return 1; |
714 | } | |
715 | ||
716 | static int radeon_tv_mode_valid(struct drm_connector *connector, | |
717 | struct drm_display_mode *mode) | |
718 | { | |
a3fa6320 AD |
719 | if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) |
720 | return MODE_CLOCK_RANGE; | |
4ce001ab DA |
721 | return MODE_OK; |
722 | } | |
723 | ||
7b334fcb | 724 | static enum drm_connector_status |
930a9e28 | 725 | radeon_tv_detect(struct drm_connector *connector, bool force) |
4ce001ab DA |
726 | { |
727 | struct drm_encoder *encoder; | |
728 | struct drm_encoder_helper_funcs *encoder_funcs; | |
445282db DA |
729 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
730 | enum drm_connector_status ret = connector_status_disconnected; | |
731 | ||
732 | if (!radeon_connector->dac_load_detect) | |
733 | return ret; | |
4ce001ab DA |
734 | |
735 | encoder = radeon_best_single_encoder(connector); | |
736 | if (!encoder) | |
737 | ret = connector_status_disconnected; | |
738 | else { | |
739 | encoder_funcs = encoder->helper_private; | |
740 | ret = encoder_funcs->detect(encoder, connector); | |
741 | } | |
742 | if (ret == connector_status_connected) | |
743 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false); | |
744 | radeon_connector_update_scratch_regs(connector, ret); | |
745 | return ret; | |
746 | } | |
747 | ||
748 | struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = { | |
749 | .get_modes = radeon_tv_get_modes, | |
750 | .mode_valid = radeon_tv_mode_valid, | |
751 | .best_encoder = radeon_best_single_encoder, | |
752 | }; | |
753 | ||
754 | struct drm_connector_funcs radeon_tv_connector_funcs = { | |
755 | .dpms = drm_helper_connector_dpms, | |
756 | .detect = radeon_tv_detect, | |
757 | .fill_modes = drm_helper_probe_single_connector_modes, | |
758 | .destroy = radeon_connector_destroy, | |
759 | .set_property = radeon_connector_set_property, | |
760 | }; | |
761 | ||
771fe6b9 JG |
762 | static int radeon_dvi_get_modes(struct drm_connector *connector) |
763 | { | |
764 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
765 | int ret; | |
766 | ||
767 | ret = radeon_ddc_get_modes(radeon_connector); | |
771fe6b9 JG |
768 | return ret; |
769 | } | |
770 | ||
4ce001ab DA |
771 | /* |
772 | * DVI is complicated | |
773 | * Do a DDC probe, if DDC probe passes, get the full EDID so | |
774 | * we can do analog/digital monitor detection at this point. | |
775 | * If the monitor is an analog monitor or we got no DDC, | |
776 | * we need to find the DAC encoder object for this connector. | |
777 | * If we got no DDC, we do load detection on the DAC encoder object. | |
778 | * If we got analog DDC or load detection passes on the DAC encoder | |
779 | * we have to check if this analog encoder is shared with anyone else (TV) | |
780 | * if its shared we have to set the other connector to disconnected. | |
781 | */ | |
7b334fcb | 782 | static enum drm_connector_status |
930a9e28 | 783 | radeon_dvi_detect(struct drm_connector *connector, bool force) |
771fe6b9 JG |
784 | { |
785 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
4ce001ab | 786 | struct drm_encoder *encoder = NULL; |
771fe6b9 JG |
787 | struct drm_encoder_helper_funcs *encoder_funcs; |
788 | struct drm_mode_object *obj; | |
789 | int i; | |
790 | enum drm_connector_status ret = connector_status_disconnected; | |
4b9d2a21 | 791 | bool dret = false; |
771fe6b9 | 792 | |
eb6b6d7c | 793 | if (radeon_connector->ddc_bus) |
4b9d2a21 | 794 | dret = radeon_ddc_probe(radeon_connector); |
4ce001ab | 795 | if (dret) { |
0294cf4f AD |
796 | if (radeon_connector->edid) { |
797 | kfree(radeon_connector->edid); | |
798 | radeon_connector->edid = NULL; | |
799 | } | |
4ce001ab | 800 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
4ce001ab DA |
801 | |
802 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
803 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
804 | drm_get_connector_name(connector)); | |
4ce001ab DA |
805 | } else { |
806 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
807 | ||
0294cf4f AD |
808 | /* some oems have boards with separate digital and analog connectors |
809 | * with a shared ddc line (often vga + hdmi) | |
810 | */ | |
811 | if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) { | |
812 | kfree(radeon_connector->edid); | |
813 | radeon_connector->edid = NULL; | |
814 | ret = connector_status_disconnected; | |
815 | } else | |
816 | ret = connector_status_connected; | |
71407c46 | 817 | |
42f14c4b AD |
818 | /* This gets complicated. We have boards with VGA + HDMI with a |
819 | * shared DDC line and we have boards with DVI-D + HDMI with a shared | |
820 | * DDC line. The latter is more complex because with DVI<->HDMI adapters | |
821 | * you don't really know what's connected to which port as both are digital. | |
71407c46 | 822 | */ |
d3932d6c | 823 | if (radeon_connector->shared_ddc && (ret == connector_status_connected)) { |
71407c46 | 824 | struct drm_device *dev = connector->dev; |
42f14c4b | 825 | struct radeon_device *rdev = dev->dev_private; |
71407c46 AD |
826 | struct drm_connector *list_connector; |
827 | struct radeon_connector *list_radeon_connector; | |
828 | list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) { | |
829 | if (connector == list_connector) | |
830 | continue; | |
831 | list_radeon_connector = to_radeon_connector(list_connector); | |
b2ea4aa6 AD |
832 | if (list_radeon_connector->shared_ddc && |
833 | (list_radeon_connector->ddc_bus->rec.i2c_id == | |
834 | radeon_connector->ddc_bus->rec.i2c_id)) { | |
42f14c4b AD |
835 | /* cases where both connectors are digital */ |
836 | if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) { | |
837 | /* hpd is our only option in this case */ | |
838 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { | |
71407c46 AD |
839 | kfree(radeon_connector->edid); |
840 | radeon_connector->edid = NULL; | |
841 | ret = connector_status_disconnected; | |
842 | } | |
843 | } | |
844 | } | |
845 | } | |
846 | } | |
4ce001ab DA |
847 | } |
848 | } | |
849 | ||
850 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == true)) | |
851 | goto out; | |
852 | ||
853 | /* find analog encoder */ | |
445282db DA |
854 | if (radeon_connector->dac_load_detect) { |
855 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
856 | if (connector->encoder_ids[i] == 0) | |
857 | break; | |
771fe6b9 | 858 | |
445282db DA |
859 | obj = drm_mode_object_find(connector->dev, |
860 | connector->encoder_ids[i], | |
861 | DRM_MODE_OBJECT_ENCODER); | |
862 | if (!obj) | |
863 | continue; | |
771fe6b9 | 864 | |
445282db | 865 | encoder = obj_to_encoder(obj); |
771fe6b9 | 866 | |
445282db DA |
867 | encoder_funcs = encoder->helper_private; |
868 | if (encoder_funcs->detect) { | |
869 | if (ret != connector_status_connected) { | |
870 | ret = encoder_funcs->detect(encoder, connector); | |
871 | if (ret == connector_status_connected) { | |
872 | radeon_connector->use_digital = false; | |
873 | } | |
771fe6b9 | 874 | } |
445282db | 875 | break; |
771fe6b9 JG |
876 | } |
877 | } | |
878 | } | |
879 | ||
4ce001ab DA |
880 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) && |
881 | encoder) { | |
882 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
883 | } | |
884 | ||
885 | out: | |
771fe6b9 JG |
886 | /* updated in get modes as well since we need to know if it's analog or digital */ |
887 | radeon_connector_update_scratch_regs(connector, ret); | |
888 | return ret; | |
889 | } | |
890 | ||
891 | /* okay need to be smart in here about which encoder to pick */ | |
892 | struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector) | |
893 | { | |
894 | int enc_id = connector->encoder_ids[0]; | |
895 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
896 | struct drm_mode_object *obj; | |
897 | struct drm_encoder *encoder; | |
898 | int i; | |
899 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
900 | if (connector->encoder_ids[i] == 0) | |
901 | break; | |
902 | ||
903 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
904 | if (!obj) | |
905 | continue; | |
906 | ||
907 | encoder = obj_to_encoder(obj); | |
908 | ||
4ce001ab | 909 | if (radeon_connector->use_digital == true) { |
771fe6b9 JG |
910 | if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) |
911 | return encoder; | |
912 | } else { | |
913 | if (encoder->encoder_type == DRM_MODE_ENCODER_DAC || | |
914 | encoder->encoder_type == DRM_MODE_ENCODER_TVDAC) | |
915 | return encoder; | |
916 | } | |
917 | } | |
918 | ||
919 | /* see if we have a default encoder TODO */ | |
920 | ||
921 | /* then check use digitial */ | |
922 | /* pick the first one */ | |
923 | if (enc_id) { | |
924 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
925 | if (!obj) | |
926 | return NULL; | |
927 | encoder = obj_to_encoder(obj); | |
928 | return encoder; | |
929 | } | |
930 | return NULL; | |
931 | } | |
932 | ||
d50ba256 DA |
933 | static void radeon_dvi_force(struct drm_connector *connector) |
934 | { | |
935 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
936 | if (connector->force == DRM_FORCE_ON) | |
937 | radeon_connector->use_digital = false; | |
938 | if (connector->force == DRM_FORCE_ON_DIGITAL) | |
939 | radeon_connector->use_digital = true; | |
940 | } | |
941 | ||
a3fa6320 AD |
942 | static int radeon_dvi_mode_valid(struct drm_connector *connector, |
943 | struct drm_display_mode *mode) | |
944 | { | |
1b24203e AD |
945 | struct drm_device *dev = connector->dev; |
946 | struct radeon_device *rdev = dev->dev_private; | |
a3fa6320 AD |
947 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
948 | ||
949 | /* XXX check mode bandwidth */ | |
950 | ||
1b24203e AD |
951 | /* clocks over 135 MHz have heat issues with DVI on RV100 */ |
952 | if (radeon_connector->use_digital && | |
953 | (rdev->family == CHIP_RV100) && | |
954 | (mode->clock > 135000)) | |
955 | return MODE_CLOCK_HIGH; | |
956 | ||
a3fa6320 AD |
957 | if (radeon_connector->use_digital && (mode->clock > 165000)) { |
958 | if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || | |
959 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || | |
960 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) | |
961 | return MODE_OK; | |
962 | else | |
963 | return MODE_CLOCK_HIGH; | |
964 | } | |
965 | return MODE_OK; | |
966 | } | |
967 | ||
771fe6b9 JG |
968 | struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { |
969 | .get_modes = radeon_dvi_get_modes, | |
a3fa6320 | 970 | .mode_valid = radeon_dvi_mode_valid, |
771fe6b9 JG |
971 | .best_encoder = radeon_dvi_encoder, |
972 | }; | |
973 | ||
974 | struct drm_connector_funcs radeon_dvi_connector_funcs = { | |
975 | .dpms = drm_helper_connector_dpms, | |
976 | .detect = radeon_dvi_detect, | |
977 | .fill_modes = drm_helper_probe_single_connector_modes, | |
978 | .set_property = radeon_connector_set_property, | |
979 | .destroy = radeon_connector_destroy, | |
d50ba256 | 980 | .force = radeon_dvi_force, |
771fe6b9 JG |
981 | }; |
982 | ||
ffd09c64 AD |
983 | static void radeon_dp_connector_destroy(struct drm_connector *connector) |
984 | { | |
985 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
986 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
987 | ||
ffd09c64 AD |
988 | if (radeon_connector->edid) |
989 | kfree(radeon_connector->edid); | |
990 | if (radeon_dig_connector->dp_i2c_bus) | |
ac1aade6 | 991 | radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus); |
ffd09c64 AD |
992 | kfree(radeon_connector->con_priv); |
993 | drm_sysfs_connector_remove(connector); | |
994 | drm_connector_cleanup(connector); | |
995 | kfree(connector); | |
996 | } | |
997 | ||
746c1aa4 DA |
998 | static int radeon_dp_get_modes(struct drm_connector *connector) |
999 | { | |
1000 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1001 | int ret; | |
1002 | ||
1003 | ret = radeon_ddc_get_modes(radeon_connector); | |
1004 | return ret; | |
1005 | } | |
1006 | ||
7b334fcb | 1007 | static enum drm_connector_status |
930a9e28 | 1008 | radeon_dp_detect(struct drm_connector *connector, bool force) |
746c1aa4 DA |
1009 | { |
1010 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
746c1aa4 | 1011 | enum drm_connector_status ret = connector_status_disconnected; |
4143e919 | 1012 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
746c1aa4 DA |
1013 | |
1014 | if (radeon_connector->edid) { | |
1015 | kfree(radeon_connector->edid); | |
1016 | radeon_connector->edid = NULL; | |
1017 | } | |
1018 | ||
6f50eae7 AD |
1019 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
1020 | /* eDP is always DP */ | |
1021 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
1022 | if (radeon_dp_getdpcd(radeon_connector)) | |
9fa05c98 | 1023 | ret = connector_status_connected; |
4143e919 | 1024 | } else { |
6f50eae7 AD |
1025 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
1026 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { | |
1027 | if (radeon_dp_getdpcd(radeon_connector)) | |
1028 | ret = connector_status_connected; | |
1029 | } else { | |
1030 | if (radeon_ddc_probe(radeon_connector)) | |
1031 | ret = connector_status_connected; | |
4143e919 | 1032 | } |
746c1aa4 | 1033 | } |
4143e919 | 1034 | |
30f44372 | 1035 | radeon_connector_update_scratch_regs(connector, ret); |
746c1aa4 DA |
1036 | return ret; |
1037 | } | |
1038 | ||
5801ead6 AD |
1039 | static int radeon_dp_mode_valid(struct drm_connector *connector, |
1040 | struct drm_display_mode *mode) | |
1041 | { | |
1042 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1043 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1044 | ||
1045 | /* XXX check mode bandwidth */ | |
1046 | ||
196c58d2 AD |
1047 | if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || |
1048 | (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) | |
5801ead6 AD |
1049 | return radeon_dp_mode_valid_helper(radeon_connector, mode); |
1050 | else | |
1051 | return MODE_OK; | |
1052 | } | |
1053 | ||
746c1aa4 DA |
1054 | struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = { |
1055 | .get_modes = radeon_dp_get_modes, | |
5801ead6 | 1056 | .mode_valid = radeon_dp_mode_valid, |
746c1aa4 DA |
1057 | .best_encoder = radeon_dvi_encoder, |
1058 | }; | |
1059 | ||
1060 | struct drm_connector_funcs radeon_dp_connector_funcs = { | |
1061 | .dpms = drm_helper_connector_dpms, | |
1062 | .detect = radeon_dp_detect, | |
1063 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1064 | .set_property = radeon_connector_set_property, | |
ffd09c64 | 1065 | .destroy = radeon_dp_connector_destroy, |
746c1aa4 DA |
1066 | .force = radeon_dvi_force, |
1067 | }; | |
1068 | ||
771fe6b9 JG |
1069 | void |
1070 | radeon_add_atom_connector(struct drm_device *dev, | |
1071 | uint32_t connector_id, | |
1072 | uint32_t supported_device, | |
1073 | int connector_type, | |
1074 | struct radeon_i2c_bus_rec *i2c_bus, | |
b75fad06 | 1075 | uint32_t igp_lane_info, |
eed45b30 | 1076 | uint16_t connector_object_id, |
26b5bc98 AD |
1077 | struct radeon_hpd *hpd, |
1078 | struct radeon_router *router) | |
771fe6b9 | 1079 | { |
445282db | 1080 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1081 | struct drm_connector *connector; |
1082 | struct radeon_connector *radeon_connector; | |
1083 | struct radeon_connector_atom_dig *radeon_dig_connector; | |
1084 | uint32_t subpixel_order = SubPixelNone; | |
0294cf4f | 1085 | bool shared_ddc = false; |
771fe6b9 | 1086 | |
4ce001ab | 1087 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1088 | return; |
1089 | ||
cf4c12f9 AD |
1090 | /* if the user selected tv=0 don't try and add the connector */ |
1091 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1092 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1093 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1094 | (radeon_tv == 0)) | |
1095 | return; | |
1096 | ||
771fe6b9 JG |
1097 | /* see if we already added it */ |
1098 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1099 | radeon_connector = to_radeon_connector(connector); | |
1100 | if (radeon_connector->connector_id == connector_id) { | |
1101 | radeon_connector->devices |= supported_device; | |
1102 | return; | |
1103 | } | |
0294cf4f | 1104 | if (radeon_connector->ddc_bus && i2c_bus->valid) { |
d3932d6c | 1105 | if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) { |
0294cf4f AD |
1106 | radeon_connector->shared_ddc = true; |
1107 | shared_ddc = true; | |
1108 | } | |
26b5bc98 AD |
1109 | if (radeon_connector->router_bus && router->valid && |
1110 | (radeon_connector->router.router_id == router->router_id)) { | |
1111 | radeon_connector->shared_ddc = false; | |
1112 | shared_ddc = false; | |
1113 | } | |
0294cf4f | 1114 | } |
771fe6b9 JG |
1115 | } |
1116 | ||
1117 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); | |
1118 | if (!radeon_connector) | |
1119 | return; | |
1120 | ||
1121 | connector = &radeon_connector->base; | |
1122 | ||
1123 | radeon_connector->connector_id = connector_id; | |
1124 | radeon_connector->devices = supported_device; | |
0294cf4f | 1125 | radeon_connector->shared_ddc = shared_ddc; |
b75fad06 | 1126 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1127 | radeon_connector->hpd = *hpd; |
26b5bc98 AD |
1128 | radeon_connector->router = *router; |
1129 | if (router->valid) { | |
1130 | radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info); | |
1131 | if (!radeon_connector->router_bus) | |
1132 | goto failed; | |
1133 | } | |
771fe6b9 JG |
1134 | switch (connector_type) { |
1135 | case DRM_MODE_CONNECTOR_VGA: | |
1136 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1137 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1138 | if (i2c_bus->valid) { |
f376b94f | 1139 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1140 | if (!radeon_connector->ddc_bus) |
1141 | goto failed; | |
1142 | } | |
35e4b7af | 1143 | radeon_connector->dac_load_detect = true; |
445282db DA |
1144 | drm_connector_attach_property(&radeon_connector->base, |
1145 | rdev->mode_info.load_detect_property, | |
1146 | 1); | |
2581afcc AD |
1147 | /* no HPD on analog connectors */ |
1148 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
eb1f8e4f | 1149 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
771fe6b9 JG |
1150 | break; |
1151 | case DRM_MODE_CONNECTOR_DVIA: | |
1152 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1153 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1154 | if (i2c_bus->valid) { |
f376b94f | 1155 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1156 | if (!radeon_connector->ddc_bus) |
1157 | goto failed; | |
1158 | } | |
35e4b7af | 1159 | radeon_connector->dac_load_detect = true; |
445282db DA |
1160 | drm_connector_attach_property(&radeon_connector->base, |
1161 | rdev->mode_info.load_detect_property, | |
1162 | 1); | |
2581afcc AD |
1163 | /* no HPD on analog connectors */ |
1164 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
771fe6b9 JG |
1165 | break; |
1166 | case DRM_MODE_CONNECTOR_DVII: | |
1167 | case DRM_MODE_CONNECTOR_DVID: | |
1168 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1169 | if (!radeon_dig_connector) | |
1170 | goto failed; | |
771fe6b9 JG |
1171 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1172 | radeon_connector->con_priv = radeon_dig_connector; | |
1173 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 1174 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 1175 | if (i2c_bus->valid) { |
f376b94f | 1176 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1177 | if (!radeon_connector->ddc_bus) |
1178 | goto failed; | |
1179 | } | |
1180 | subpixel_order = SubPixelHorizontalRGB; | |
445282db DA |
1181 | drm_connector_attach_property(&radeon_connector->base, |
1182 | rdev->mode_info.coherent_mode_property, | |
1183 | 1); | |
5bccf5e3 | 1184 | if (ASIC_IS_AVIVO(rdev)) { |
430f70d5 AD |
1185 | drm_connector_attach_property(&radeon_connector->base, |
1186 | rdev->mode_info.underscan_property, | |
1187 | UNDERSCAN_AUTO); | |
5bccf5e3 MG |
1188 | drm_connector_attach_property(&radeon_connector->base, |
1189 | rdev->mode_info.underscan_hborder_property, | |
1190 | 0); | |
1191 | drm_connector_attach_property(&radeon_connector->base, | |
1192 | rdev->mode_info.underscan_vborder_property, | |
1193 | 0); | |
1194 | } | |
390d0bbe AD |
1195 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { |
1196 | radeon_connector->dac_load_detect = true; | |
1197 | drm_connector_attach_property(&radeon_connector->base, | |
1198 | rdev->mode_info.load_detect_property, | |
1199 | 1); | |
1200 | } | |
771fe6b9 JG |
1201 | break; |
1202 | case DRM_MODE_CONNECTOR_HDMIA: | |
1203 | case DRM_MODE_CONNECTOR_HDMIB: | |
1204 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1205 | if (!radeon_dig_connector) | |
1206 | goto failed; | |
771fe6b9 JG |
1207 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1208 | radeon_connector->con_priv = radeon_dig_connector; | |
1209 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 1210 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 1211 | if (i2c_bus->valid) { |
f376b94f | 1212 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1213 | if (!radeon_connector->ddc_bus) |
1214 | goto failed; | |
1215 | } | |
445282db DA |
1216 | drm_connector_attach_property(&radeon_connector->base, |
1217 | rdev->mode_info.coherent_mode_property, | |
1218 | 1); | |
5bccf5e3 | 1219 | if (ASIC_IS_AVIVO(rdev)) { |
430f70d5 AD |
1220 | drm_connector_attach_property(&radeon_connector->base, |
1221 | rdev->mode_info.underscan_property, | |
1222 | UNDERSCAN_AUTO); | |
5bccf5e3 MG |
1223 | drm_connector_attach_property(&radeon_connector->base, |
1224 | rdev->mode_info.underscan_hborder_property, | |
1225 | 0); | |
1226 | drm_connector_attach_property(&radeon_connector->base, | |
1227 | rdev->mode_info.underscan_vborder_property, | |
1228 | 0); | |
1229 | } | |
771fe6b9 JG |
1230 | subpixel_order = SubPixelHorizontalRGB; |
1231 | break; | |
1232 | case DRM_MODE_CONNECTOR_DisplayPort: | |
196c58d2 | 1233 | case DRM_MODE_CONNECTOR_eDP: |
771fe6b9 JG |
1234 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); |
1235 | if (!radeon_dig_connector) | |
1236 | goto failed; | |
771fe6b9 JG |
1237 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1238 | radeon_connector->con_priv = radeon_dig_connector; | |
746c1aa4 | 1239 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); |
0b4c0f3f | 1240 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); |
771fe6b9 | 1241 | if (i2c_bus->valid) { |
390d0bbe | 1242 | /* add DP i2c bus */ |
196c58d2 AD |
1243 | if (connector_type == DRM_MODE_CONNECTOR_eDP) |
1244 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1245 | else | |
1246 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
390d0bbe AD |
1247 | if (!radeon_dig_connector->dp_i2c_bus) |
1248 | goto failed; | |
f376b94f | 1249 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1250 | if (!radeon_connector->ddc_bus) |
1251 | goto failed; | |
1252 | } | |
1253 | subpixel_order = SubPixelHorizontalRGB; | |
390d0bbe AD |
1254 | drm_connector_attach_property(&radeon_connector->base, |
1255 | rdev->mode_info.coherent_mode_property, | |
1256 | 1); | |
5bccf5e3 | 1257 | if (ASIC_IS_AVIVO(rdev)) { |
430f70d5 AD |
1258 | drm_connector_attach_property(&radeon_connector->base, |
1259 | rdev->mode_info.underscan_property, | |
1260 | UNDERSCAN_AUTO); | |
5bccf5e3 MG |
1261 | drm_connector_attach_property(&radeon_connector->base, |
1262 | rdev->mode_info.underscan_hborder_property, | |
1263 | 0); | |
1264 | drm_connector_attach_property(&radeon_connector->base, | |
1265 | rdev->mode_info.underscan_vborder_property, | |
1266 | 0); | |
1267 | } | |
771fe6b9 JG |
1268 | break; |
1269 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1270 | case DRM_MODE_CONNECTOR_Composite: | |
1271 | case DRM_MODE_CONNECTOR_9PinDIN: | |
cf4c12f9 AD |
1272 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); |
1273 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1274 | radeon_connector->dac_load_detect = true; | |
1275 | drm_connector_attach_property(&radeon_connector->base, | |
1276 | rdev->mode_info.load_detect_property, | |
1277 | 1); | |
1278 | drm_connector_attach_property(&radeon_connector->base, | |
1279 | rdev->mode_info.tv_std_property, | |
1280 | radeon_atombios_get_tv_info(rdev)); | |
1281 | /* no HPD on analog connectors */ | |
1282 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
771fe6b9 JG |
1283 | break; |
1284 | case DRM_MODE_CONNECTOR_LVDS: | |
1285 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1286 | if (!radeon_dig_connector) | |
1287 | goto failed; | |
771fe6b9 JG |
1288 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1289 | radeon_connector->con_priv = radeon_dig_connector; | |
1290 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
0b4c0f3f | 1291 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
771fe6b9 | 1292 | if (i2c_bus->valid) { |
f376b94f | 1293 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1294 | if (!radeon_connector->ddc_bus) |
1295 | goto failed; | |
1296 | } | |
445282db DA |
1297 | drm_connector_attach_property(&radeon_connector->base, |
1298 | dev->mode_config.scaling_mode_property, | |
1299 | DRM_MODE_SCALE_FULLSCREEN); | |
771fe6b9 JG |
1300 | subpixel_order = SubPixelHorizontalRGB; |
1301 | break; | |
1302 | } | |
1303 | ||
2581afcc | 1304 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1305 | if (i2c_bus->valid) |
1306 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1307 | } else | |
1308 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
1309 | ||
771fe6b9 JG |
1310 | connector->display_info.subpixel_order = subpixel_order; |
1311 | drm_sysfs_connector_add(connector); | |
1312 | return; | |
1313 | ||
1314 | failed: | |
771fe6b9 JG |
1315 | drm_connector_cleanup(connector); |
1316 | kfree(connector); | |
1317 | } | |
1318 | ||
1319 | void | |
1320 | radeon_add_legacy_connector(struct drm_device *dev, | |
1321 | uint32_t connector_id, | |
1322 | uint32_t supported_device, | |
1323 | int connector_type, | |
b75fad06 | 1324 | struct radeon_i2c_bus_rec *i2c_bus, |
eed45b30 AD |
1325 | uint16_t connector_object_id, |
1326 | struct radeon_hpd *hpd) | |
771fe6b9 | 1327 | { |
445282db | 1328 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1329 | struct drm_connector *connector; |
1330 | struct radeon_connector *radeon_connector; | |
1331 | uint32_t subpixel_order = SubPixelNone; | |
1332 | ||
4ce001ab | 1333 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1334 | return; |
1335 | ||
cf4c12f9 AD |
1336 | /* if the user selected tv=0 don't try and add the connector */ |
1337 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1338 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1339 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1340 | (radeon_tv == 0)) | |
1341 | return; | |
1342 | ||
771fe6b9 JG |
1343 | /* see if we already added it */ |
1344 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1345 | radeon_connector = to_radeon_connector(connector); | |
1346 | if (radeon_connector->connector_id == connector_id) { | |
1347 | radeon_connector->devices |= supported_device; | |
1348 | return; | |
1349 | } | |
1350 | } | |
1351 | ||
1352 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); | |
1353 | if (!radeon_connector) | |
1354 | return; | |
1355 | ||
1356 | connector = &radeon_connector->base; | |
1357 | ||
1358 | radeon_connector->connector_id = connector_id; | |
1359 | radeon_connector->devices = supported_device; | |
b75fad06 | 1360 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1361 | radeon_connector->hpd = *hpd; |
771fe6b9 JG |
1362 | switch (connector_type) { |
1363 | case DRM_MODE_CONNECTOR_VGA: | |
1364 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1365 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1366 | if (i2c_bus->valid) { |
f376b94f | 1367 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1368 | if (!radeon_connector->ddc_bus) |
1369 | goto failed; | |
1370 | } | |
35e4b7af | 1371 | radeon_connector->dac_load_detect = true; |
445282db DA |
1372 | drm_connector_attach_property(&radeon_connector->base, |
1373 | rdev->mode_info.load_detect_property, | |
1374 | 1); | |
2581afcc AD |
1375 | /* no HPD on analog connectors */ |
1376 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
eb1f8e4f | 1377 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
771fe6b9 JG |
1378 | break; |
1379 | case DRM_MODE_CONNECTOR_DVIA: | |
1380 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1381 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1382 | if (i2c_bus->valid) { |
f376b94f | 1383 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1384 | if (!radeon_connector->ddc_bus) |
1385 | goto failed; | |
1386 | } | |
35e4b7af | 1387 | radeon_connector->dac_load_detect = true; |
445282db DA |
1388 | drm_connector_attach_property(&radeon_connector->base, |
1389 | rdev->mode_info.load_detect_property, | |
1390 | 1); | |
2581afcc AD |
1391 | /* no HPD on analog connectors */ |
1392 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
771fe6b9 JG |
1393 | break; |
1394 | case DRM_MODE_CONNECTOR_DVII: | |
1395 | case DRM_MODE_CONNECTOR_DVID: | |
1396 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 1397 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 1398 | if (i2c_bus->valid) { |
f376b94f | 1399 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1400 | if (!radeon_connector->ddc_bus) |
1401 | goto failed; | |
68b3adb4 AD |
1402 | } |
1403 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
35e4b7af | 1404 | radeon_connector->dac_load_detect = true; |
445282db DA |
1405 | drm_connector_attach_property(&radeon_connector->base, |
1406 | rdev->mode_info.load_detect_property, | |
1407 | 1); | |
771fe6b9 JG |
1408 | } |
1409 | subpixel_order = SubPixelHorizontalRGB; | |
1410 | break; | |
1411 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1412 | case DRM_MODE_CONNECTOR_Composite: | |
1413 | case DRM_MODE_CONNECTOR_9PinDIN: | |
cf4c12f9 AD |
1414 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); |
1415 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1416 | radeon_connector->dac_load_detect = true; | |
1417 | /* RS400,RC410,RS480 chipset seems to report a lot | |
1418 | * of false positive on load detect, we haven't yet | |
1419 | * found a way to make load detect reliable on those | |
1420 | * chipset, thus just disable it for TV. | |
1421 | */ | |
1422 | if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) | |
1423 | radeon_connector->dac_load_detect = false; | |
1424 | drm_connector_attach_property(&radeon_connector->base, | |
1425 | rdev->mode_info.load_detect_property, | |
1426 | radeon_connector->dac_load_detect); | |
1427 | drm_connector_attach_property(&radeon_connector->base, | |
1428 | rdev->mode_info.tv_std_property, | |
1429 | radeon_combios_get_tv_info(rdev)); | |
1430 | /* no HPD on analog connectors */ | |
1431 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
771fe6b9 JG |
1432 | break; |
1433 | case DRM_MODE_CONNECTOR_LVDS: | |
1434 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
0b4c0f3f | 1435 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
771fe6b9 | 1436 | if (i2c_bus->valid) { |
f376b94f | 1437 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1438 | if (!radeon_connector->ddc_bus) |
1439 | goto failed; | |
1440 | } | |
445282db DA |
1441 | drm_connector_attach_property(&radeon_connector->base, |
1442 | dev->mode_config.scaling_mode_property, | |
1443 | DRM_MODE_SCALE_FULLSCREEN); | |
771fe6b9 JG |
1444 | subpixel_order = SubPixelHorizontalRGB; |
1445 | break; | |
1446 | } | |
1447 | ||
2581afcc | 1448 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1449 | if (i2c_bus->valid) |
1450 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1451 | } else | |
1452 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
771fe6b9 JG |
1453 | connector->display_info.subpixel_order = subpixel_order; |
1454 | drm_sysfs_connector_add(connector); | |
1455 | return; | |
1456 | ||
1457 | failed: | |
771fe6b9 JG |
1458 | drm_connector_cleanup(connector); |
1459 | kfree(connector); | |
1460 | } |