[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_drv.c

/**
 * \file radeon_drv.c
 * ATI Radeon driver
 *
 * \author Gareth Hughes <gareth@valinux.com>
 */

/*
 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#include "drmP.h"
#include "drm.h"
#include "radeon_drm.h"
#include "radeon_drv.h"

#include "drm_pciids.h"
#include <linux/console.h>
#include <linux/module.h>


/*
 * KMS wrapper.
 * - 2.0.0 - initial interface
 * - 2.1.0 - add square tiling interface
 * - 2.2.0 - add r6xx/r7xx const buffer support
 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
 * - 2.4.0 - add crtc id query
 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
 *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
 *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
 *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
 *   2.10.0 - fusion 2D tiling
 *   2.11.0 - backend map, initial compute support for the CS checker
 *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
 *   2.13.0 - virtual memory support, streamout
 *   2.14.0 - add evergreen tiling informations
 *   2.15.0 - add max_pipes query
 *   2.16.0 - fix evergreen 2D tiled surface calculation
 *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
 */
#define KMS_DRIVER_MAJOR	2
#define KMS_DRIVER_MINOR	17
#define KMS_DRIVER_PATCHLEVEL	0
int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
int radeon_driver_unload_kms(struct drm_device *dev);
int radeon_driver_firstopen_kms(struct drm_device *dev);
void radeon_driver_lastclose_kms(struct drm_device *dev);
int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
void radeon_driver_postclose_kms(struct drm_device *dev,
				 struct drm_file *file_priv);
void radeon_driver_preclose_kms(struct drm_device *dev,
				struct drm_file *file_priv);
int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
int radeon_resume_kms(struct drm_device *dev);
u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
				    int *max_error,
				    struct timeval *vblank_time,
				    unsigned flags);
void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
			 struct drm_file *file_priv);
int radeon_gem_object_init(struct drm_gem_object *obj);
void radeon_gem_object_free(struct drm_gem_object *obj);
int radeon_gem_object_open(struct drm_gem_object *obj,
				struct drm_file *file_priv);
void radeon_gem_object_close(struct drm_gem_object *obj,
				struct drm_file *file_priv);
extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
				      int *vpos, int *hpos);
extern struct drm_ioctl_desc radeon_ioctls_kms[];
extern int radeon_max_kms_ioctl;
int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
int radeon_mode_dumb_mmap(struct drm_file *filp,
			  struct drm_device *dev,
			  uint32_t handle, uint64_t *offset_p);
int radeon_mode_dumb_create(struct drm_file *file_priv,
			    struct drm_device *dev,
			    struct drm_mode_create_dumb *args);
int radeon_mode_dumb_destroy(struct drm_file *file_priv,
			     struct drm_device *dev,
			     uint32_t handle);
struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
					struct drm_gem_object *obj,
					int flags);
struct drm_gem_object *radeon_gem_prime_import(struct drm_device *dev,
					       struct dma_buf *dma_buf);

#if defined(CONFIG_DEBUG_FS)
int radeon_debugfs_init(struct drm_minor *minor);
void radeon_debugfs_cleanup(struct drm_minor *minor);
#endif


int radeon_no_wb;
int radeon_modeset = -1;
int radeon_dynclks = -1;
int radeon_r4xx_atom = 0;
int radeon_agpmode = 0;
int radeon_vram_limit = 0;
int radeon_gart_size = 512; /* default gart size */
int radeon_benchmarking = 0;
int radeon_testing = 0;
int radeon_connector_table = 0;
int radeon_tv = 1;
int radeon_audio = 0;
int radeon_disp_priority = 0;
int radeon_hw_i2c = 0;
int radeon_pcie_gen2 = 0;
int radeon_msi = -1;
int radeon_lockup_timeout = 10000;

MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
module_param_named(no_wb, radeon_no_wb, int, 0444);

MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
module_param_named(modeset, radeon_modeset, int, 0400);

MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
module_param_named(dynclks, radeon_dynclks, int, 0444);

MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);

MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
module_param_named(vramlimit, radeon_vram_limit, int, 0600);

MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
module_param_named(agpmode, radeon_agpmode, int, 0444);

MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
module_param_named(gartsize, radeon_gart_size, int, 0600);

MODULE_PARM_DESC(benchmark, "Run benchmark");
module_param_named(benchmark, radeon_benchmarking, int, 0444);

MODULE_PARM_DESC(test, "Run tests");
module_param_named(test, radeon_testing, int, 0444);

MODULE_PARM_DESC(connector_table, "Force connector table");
module_param_named(connector_table, radeon_connector_table, int, 0444);

MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
module_param_named(tv, radeon_tv, int, 0444);

MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
module_param_named(audio, radeon_audio, int, 0444);

MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
module_param_named(disp_priority, radeon_disp_priority, int, 0444);

MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);

MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (1 = enable)");
module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);

MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
module_param_named(msi, radeon_msi, int, 0444);

MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);

static int radeon_suspend(struct drm_device *dev, pm_message_t state)
{
	drm_radeon_private_t *dev_priv = dev->dev_private;

	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
		return 0;

	/* Disable *all* interrupts */
	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
		RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
	return 0;
}

static int radeon_resume(struct drm_device *dev)
{
	drm_radeon_private_t *dev_priv = dev->dev_private;

	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
		return 0;

	/* Restore interrupt registers */
	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
		RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
	return 0;
}

static struct pci_device_id pciidlist[] = {
	radeon_PCI_IDS
};

#if defined(CONFIG_DRM_RADEON_KMS)
MODULE_DEVICE_TABLE(pci, pciidlist);
#endif

static const struct file_operations radeon_driver_old_fops = {
	.owner = THIS_MODULE,
	.open = drm_open,
	.release = drm_release,
	.unlocked_ioctl = drm_ioctl,
	.mmap = drm_mmap,
	.poll = drm_poll,
	.fasync = drm_fasync,
	.read = drm_read,
#ifdef CONFIG_COMPAT
	.compat_ioctl = radeon_compat_ioctl,
#endif
	.llseek = noop_llseek,
};

static struct drm_driver driver_old = {
	.driver_features =
	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
	.load = radeon_driver_load,
	.firstopen = radeon_driver_firstopen,
	.open = radeon_driver_open,
	.preclose = radeon_driver_preclose,
	.postclose = radeon_driver_postclose,
	.lastclose = radeon_driver_lastclose,
	.unload = radeon_driver_unload,
	.suspend = radeon_suspend,
	.resume = radeon_resume,
	.get_vblank_counter = radeon_get_vblank_counter,
	.enable_vblank = radeon_enable_vblank,
	.disable_vblank = radeon_disable_vblank,
	.master_create = radeon_master_create,
	.master_destroy = radeon_master_destroy,
	.irq_preinstall = radeon_driver_irq_preinstall,
	.irq_postinstall = radeon_driver_irq_postinstall,
	.irq_uninstall = radeon_driver_irq_uninstall,
	.irq_handler = radeon_driver_irq_handler,
	.reclaim_buffers = drm_core_reclaim_buffers,
	.ioctls = radeon_ioctls,
	.dma_ioctl = radeon_cp_buffers,
	.fops = &radeon_driver_old_fops,
	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
	.date = DRIVER_DATE,
	.major = DRIVER_MAJOR,
	.minor = DRIVER_MINOR,
	.patchlevel = DRIVER_PATCHLEVEL,
};

static struct drm_driver kms_driver;

static void radeon_kick_out_firmware_fb(struct pci_dev *pdev)
{
	struct apertures_struct *ap;
	bool primary = false;

	ap = alloc_apertures(1);
	ap->ranges[0].base = pci_resource_start(pdev, 0);
	ap->ranges[0].size = pci_resource_len(pdev, 0);

#ifdef CONFIG_X86
	primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
#endif
	remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
	kfree(ap);
}

static int __devinit
radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	/* Get rid of things like offb */
	radeon_kick_out_firmware_fb(pdev);

	return drm_get_pci_dev(pdev, ent, &kms_driver);
}

static void
radeon_pci_remove(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);

	drm_put_dev(dev);
}

static int
radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	return radeon_suspend_kms(dev, state);
}

static int
radeon_pci_resume(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	return radeon_resume_kms(dev);
}

static const struct file_operations radeon_driver_kms_fops = {
	.owner = THIS_MODULE,
	.open = drm_open,
	.release = drm_release,
	.unlocked_ioctl = drm_ioctl,
	.mmap = radeon_mmap,
	.poll = drm_poll,
	.fasync = drm_fasync,
	.read = drm_read,
#ifdef CONFIG_COMPAT
	.compat_ioctl = radeon_kms_compat_ioctl,
#endif
};

static struct drm_driver kms_driver = {
	.driver_features =
	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
	    DRIVER_PRIME,
	.dev_priv_size = 0,
	.load = radeon_driver_load_kms,
	.firstopen = radeon_driver_firstopen_kms,
	.open = radeon_driver_open_kms,
	.preclose = radeon_driver_preclose_kms,
	.postclose = radeon_driver_postclose_kms,
	.lastclose = radeon_driver_lastclose_kms,
	.unload = radeon_driver_unload_kms,
	.suspend = radeon_suspend_kms,
	.resume = radeon_resume_kms,
	.get_vblank_counter = radeon_get_vblank_counter_kms,
	.enable_vblank = radeon_enable_vblank_kms,
	.disable_vblank = radeon_disable_vblank_kms,
	.get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
	.get_scanout_position = radeon_get_crtc_scanoutpos,
#if defined(CONFIG_DEBUG_FS)
	.debugfs_init = radeon_debugfs_init,
	.debugfs_cleanup = radeon_debugfs_cleanup,
#endif
	.irq_preinstall = radeon_driver_irq_preinstall_kms,
	.irq_postinstall = radeon_driver_irq_postinstall_kms,
	.irq_uninstall = radeon_driver_irq_uninstall_kms,
	.irq_handler = radeon_driver_irq_handler_kms,
	.reclaim_buffers = drm_core_reclaim_buffers,
	.ioctls = radeon_ioctls_kms,
	.gem_init_object = radeon_gem_object_init,
	.gem_free_object = radeon_gem_object_free,
	.gem_open_object = radeon_gem_object_open,
	.gem_close_object = radeon_gem_object_close,
	.dma_ioctl = radeon_dma_ioctl_kms,
	.dumb_create = radeon_mode_dumb_create,
	.dumb_map_offset = radeon_mode_dumb_mmap,
	.dumb_destroy = radeon_mode_dumb_destroy,
	.fops = &radeon_driver_kms_fops,

	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	.gem_prime_export = radeon_gem_prime_export,
	.gem_prime_import = radeon_gem_prime_import,

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
	.date = DRIVER_DATE,
	.major = KMS_DRIVER_MAJOR,
	.minor = KMS_DRIVER_MINOR,
	.patchlevel = KMS_DRIVER_PATCHLEVEL,
};

static struct drm_driver *driver;
static struct pci_driver *pdriver;

static struct pci_driver radeon_pci_driver = {
	.name = DRIVER_NAME,
	.id_table = pciidlist,
};

static struct pci_driver radeon_kms_pci_driver = {
	.name = DRIVER_NAME,
	.id_table = pciidlist,
	.probe = radeon_pci_probe,
	.remove = radeon_pci_remove,
	.suspend = radeon_pci_suspend,
	.resume = radeon_pci_resume,
};

static int __init radeon_init(void)
{
	driver = &driver_old;
	pdriver = &radeon_pci_driver;
	driver->num_ioctls = radeon_max_ioctl;
#ifdef CONFIG_VGA_CONSOLE
	if (vgacon_text_force() && radeon_modeset == -1) {
		DRM_INFO("VGACON disable radeon kernel modesetting.\n");
		driver = &driver_old;
		pdriver = &radeon_pci_driver;
		driver->driver_features &= ~DRIVER_MODESET;
		radeon_modeset = 0;
	}
#endif
	/* if enabled by default */
	if (radeon_modeset == -1) {
#ifdef CONFIG_DRM_RADEON_KMS
		DRM_INFO("radeon defaulting to kernel modesetting.\n");
		radeon_modeset = 1;
#else
		DRM_INFO("radeon defaulting to userspace modesetting.\n");
		radeon_modeset = 0;
#endif
	}
	if (radeon_modeset == 1) {
		DRM_INFO("radeon kernel modesetting enabled.\n");
		driver = &kms_driver;
		pdriver = &radeon_kms_pci_driver;
		driver->driver_features |= DRIVER_MODESET;
		driver->num_ioctls = radeon_max_kms_ioctl;
		radeon_register_atpx_handler();
	}
	/* if the vga console setting is enabled still
	 * let modprobe override it */
	return drm_pci_init(driver, pdriver);
}

static void __exit radeon_exit(void)
{
	drm_pci_exit(driver, pdriver);
	radeon_unregister_atpx_handler();
}

module_init(radeon_init);
module_exit(radeon_exit);

MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL and additional rights");
Commit	Line	Data
1da177e4 LT	1	/**
	2	* \file radeon_drv.c
	3	* ATI Radeon driver
	4	*
	5	* \author Gareth Hughes <gareth@valinux.com>
	6	*/
	7
	8	/*
	9	* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
	10	* All Rights Reserved.
	11	*
	12	* Permission is hereby granted, free of charge, to any person obtaining a
	13	* copy of this software and associated documentation files (the "Software"),
	14	* to deal in the Software without restriction, including without limitation
	15	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	16	* and/or sell copies of the Software, and to permit persons to whom the
	17	* Software is furnished to do so, subject to the following conditions:
	18	*
	19	* The above copyright notice and this permission notice (including the next
	20	* paragraph) shall be included in all copies or substantial portions of the
	21	* Software.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	24	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	25	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	26	* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
	27	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	28	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	29	* OTHER DEALINGS IN THE SOFTWARE.
	30	*/
	31
1da177e4 LT	32	#include "drmP.h"
	33	#include "drm.h"
	34	#include "radeon_drm.h"
	35	#include "radeon_drv.h"
	36
	37	#include "drm_pciids.h"
771fe6b9	38	#include <linux/console.h>
e0cd3608	39	#include <linux/module.h>
771fe6b9 JG	40
771fe6b9 JG	41
771fe6b9 JG	42	/*
771fe6b9 JG	43	* KMS wrapper.
0de1a57b DA	44	* - 2.0.0 - initial interface
0de1a57b DA	45	* - 2.1.0 - add square tiling interface
fdb43528	46	* - 2.2.0 - add r6xx/r7xx const buffer support
cae94b0a	47	* - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
bc35afdb	48	* - 2.4.0 - add crtc id query
148a03bc	49	* - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
ab9e1f59	50	* - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
71901cc4	51	* 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
58bbf018	52	* 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
486af189	53	* 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
b8709894 AD	54	* 2.10.0 - fusion 2D tiling
b8709894 AD	55	* 2.11.0 - backend map, initial compute support for the CS checker
e70f224c	56	* 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
dd220a00	57	* 2.13.0 - virtual memory support, streamout
285484e2	58	* 2.14.0 - add evergreen tiling informations
609c1e15	59	* 2.15.0 - add max_pipes query
d2609875	60	* 2.16.0 - fix evergreen 2D tiled surface calculation
7c77bf2a	61	* 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
771fe6b9 JG	62	*/
771fe6b9 JG	63	#define KMS_DRIVER_MAJOR 2
7c77bf2a	64	#define KMS_DRIVER_MINOR 17
771fe6b9 JG	65	#define KMS_DRIVER_PATCHLEVEL 0
	66	int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
	67	int radeon_driver_unload_kms(struct drm_device *dev);
	68	int radeon_driver_firstopen_kms(struct drm_device *dev);
	69	void radeon_driver_lastclose_kms(struct drm_device *dev);
	70	int radeon_driver_open_kms(struct drm_device dev, struct drm_file file_priv);
	71	void radeon_driver_postclose_kms(struct drm_device *dev,
	72	struct drm_file *file_priv);
	73	void radeon_driver_preclose_kms(struct drm_device *dev,
	74	struct drm_file *file_priv);
	75	int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
	76	int radeon_resume_kms(struct drm_device *dev);
	77	u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
	78	int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
	79	void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
f5a80209 MK	80	int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
	81	int *max_error,
	82	struct timeval *vblank_time,
	83	unsigned flags);
771fe6b9 JG	84	void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
	85	int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
	86	void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
	87	irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
771fe6b9 JG	88	int radeon_dma_ioctl_kms(struct drm_device dev, void data,
	89	struct drm_file *file_priv);
	90	int radeon_gem_object_init(struct drm_gem_object *obj);
	91	void radeon_gem_object_free(struct drm_gem_object *obj);
721604a1 JG	92	int radeon_gem_object_open(struct drm_gem_object *obj,
	93	struct drm_file *file_priv);
	94	void radeon_gem_object_close(struct drm_gem_object *obj,
	95	struct drm_file *file_priv);
f5a80209 MK	96	extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
f5a80209 MK	97	int vpos, int hpos);
771fe6b9 JG	98	extern struct drm_ioctl_desc radeon_ioctls_kms[];
	99	extern int radeon_max_kms_ioctl;
	100	int radeon_mmap(struct file filp, struct vm_area_struct vma);
ff72145b DA	101	int radeon_mode_dumb_mmap(struct drm_file *filp,
	102	struct drm_device *dev,
	103	uint32_t handle, uint64_t *offset_p);
	104	int radeon_mode_dumb_create(struct drm_file *file_priv,
	105	struct drm_device *dev,
	106	struct drm_mode_create_dumb *args);
	107	int radeon_mode_dumb_destroy(struct drm_file *file_priv,
	108	struct drm_device *dev,
	109	uint32_t handle);
40f5cf99 AD	110	struct dma_buf radeon_gem_prime_export(struct drm_device dev,
	111	struct drm_gem_object *obj,
	112	int flags);
	113	struct drm_gem_object radeon_gem_prime_import(struct drm_device dev,
	114	struct dma_buf *dma_buf);
ff72145b	115
771fe6b9 JG	116	#if defined(CONFIG_DEBUG_FS)
	117	int radeon_debugfs_init(struct drm_minor *minor);
	118	void radeon_debugfs_cleanup(struct drm_minor *minor);
	119	#endif
771fe6b9	120
1da177e4	121
689b9d74	122	int radeon_no_wb;
771fe6b9 JG	123	int radeon_modeset = -1;
	124	int radeon_dynclks = -1;
	125	int radeon_r4xx_atom = 0;
	126	int radeon_agpmode = 0;
	127	int radeon_vram_limit = 0;
	128	int radeon_gart_size = 512; /* default gart size */
	129	int radeon_benchmarking = 0;
ecc0b326	130	int radeon_testing = 0;
771fe6b9	131	int radeon_connector_table = 0;
4ce001ab	132	int radeon_tv = 1;
805c2216	133	int radeon_audio = 0;
f46c0120	134	int radeon_disp_priority = 0;
e2b0a8e1	135	int radeon_hw_i2c = 0;
d42dd579	136	int radeon_pcie_gen2 = 0;
a18cee15	137	int radeon_msi = -1;
3368ff0c	138	int radeon_lockup_timeout = 10000;
689b9d74	139
61a2d07d	140	MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
689b9d74 DA	141	module_param_named(no_wb, radeon_no_wb, int, 0444);
689b9d74 DA	142
771fe6b9 JG	143	MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
	144	module_param_named(modeset, radeon_modeset, int, 0400);
	145
	146	MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
	147	module_param_named(dynclks, radeon_dynclks, int, 0444);
	148
	149	MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
	150	module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
	151
	152	MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
	153	module_param_named(vramlimit, radeon_vram_limit, int, 0600);
	154
	155	MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
	156	module_param_named(agpmode, radeon_agpmode, int, 0444);
	157
27d4d052	158	MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
771fe6b9 JG	159	module_param_named(gartsize, radeon_gart_size, int, 0600);
	160
	161	MODULE_PARM_DESC(benchmark, "Run benchmark");
	162	module_param_named(benchmark, radeon_benchmarking, int, 0444);
	163
ecc0b326 MD	164	MODULE_PARM_DESC(test, "Run tests");
	165	module_param_named(test, radeon_testing, int, 0444);
	166
771fe6b9 JG	167	MODULE_PARM_DESC(connector_table, "Force connector table");
771fe6b9 JG	168	module_param_named(connector_table, radeon_connector_table, int, 0444);
4ce001ab DA	169
	170	MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
	171	module_param_named(tv, radeon_tv, int, 0444);
771fe6b9	172
805c2216	173	MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
dafc3bd5 CK	174	module_param_named(audio, radeon_audio, int, 0444);
dafc3bd5 CK	175
f46c0120 AD	176	MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
	177	module_param_named(disp_priority, radeon_disp_priority, int, 0444);
	178
e2b0a8e1 AD	179	MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
	180	module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
	181
d42dd579 AD	182	MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (1 = enable)");
	183	module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
	184
a18cee15 AD	185	MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
	186	module_param_named(msi, radeon_msi, int, 0444);
	187
3368ff0c CK	188	MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
	189	module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
	190
0a3e67a4 JB	191	static int radeon_suspend(struct drm_device *dev, pm_message_t state)
	192	{
	193	drm_radeon_private_t *dev_priv = dev->dev_private;
	194
03efb885 DA	195	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
	196	return 0;
	197
0a3e67a4	198	/* Disable all interrupts */
800b6995	199	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4 JB	200	RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
	201	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
	202	return 0;
	203	}
	204
	205	static int radeon_resume(struct drm_device *dev)
	206	{
	207	drm_radeon_private_t *dev_priv = dev->dev_private;
	208
03efb885 DA	209	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
	210	return 0;
	211
0a3e67a4	212	/* Restore interrupt registers */
800b6995	213	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4 JB	214	RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
	215	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
	216	return 0;
	217	}
	218
1da177e4 LT	219	static struct pci_device_id pciidlist[] = {
	220	radeon_PCI_IDS
	221	};
	222
771fe6b9 JG	223	#if defined(CONFIG_DRM_RADEON_KMS)
	224	MODULE_DEVICE_TABLE(pci, pciidlist);
	225	#endif
	226
e08e96de AV	227	static const struct file_operations radeon_driver_old_fops = {
	228	.owner = THIS_MODULE,
	229	.open = drm_open,
	230	.release = drm_release,
	231	.unlocked_ioctl = drm_ioctl,
	232	.mmap = drm_mmap,
	233	.poll = drm_poll,
	234	.fasync = drm_fasync,
	235	.read = drm_read,
	236	#ifdef CONFIG_COMPAT
	237	.compat_ioctl = radeon_compat_ioctl,
	238	#endif
	239	.llseek = noop_llseek,
	240	};
	241
771fe6b9	242	static struct drm_driver driver_old = {
b5e89ed5 DA	243	.driver_features =
b5e89ed5 DA	244	DRIVER_USE_AGP \| DRIVER_USE_MTRR \| DRIVER_PCI_DMA \| DRIVER_SG \|
0a3e67a4	245	DRIVER_HAVE_IRQ \| DRIVER_HAVE_DMA \| DRIVER_IRQ_SHARED,
1da177e4	246	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
22eae947 DA	247	.load = radeon_driver_load,
	248	.firstopen = radeon_driver_firstopen,
	249	.open = radeon_driver_open,
	250	.preclose = radeon_driver_preclose,
	251	.postclose = radeon_driver_postclose,
	252	.lastclose = radeon_driver_lastclose,
	253	.unload = radeon_driver_unload,
0a3e67a4 JB	254	.suspend = radeon_suspend,
	255	.resume = radeon_resume,
	256	.get_vblank_counter = radeon_get_vblank_counter,
	257	.enable_vblank = radeon_enable_vblank,
	258	.disable_vblank = radeon_disable_vblank,
60f2ee0b DA	259	.master_create = radeon_master_create,
60f2ee0b DA	260	.master_destroy = radeon_master_destroy,
1da177e4 LT	261	.irq_preinstall = radeon_driver_irq_preinstall,
	262	.irq_postinstall = radeon_driver_irq_postinstall,
	263	.irq_uninstall = radeon_driver_irq_uninstall,
	264	.irq_handler = radeon_driver_irq_handler,
1da177e4	265	.reclaim_buffers = drm_core_reclaim_buffers,
1da177e4 LT	266	.ioctls = radeon_ioctls,
1da177e4 LT	267	.dma_ioctl = radeon_cp_buffers,
e08e96de	268	.fops = &radeon_driver_old_fops,
22eae947 DA	269	.name = DRIVER_NAME,
	270	.desc = DRIVER_DESC,
	271	.date = DRIVER_DATE,
	272	.major = DRIVER_MAJOR,
	273	.minor = DRIVER_MINOR,
	274	.patchlevel = DRIVER_PATCHLEVEL,
1da177e4 LT	275	};
1da177e4 LT	276
771fe6b9 JG	277	static struct drm_driver kms_driver;
771fe6b9 JG	278
a56f7428 BH	279	static void radeon_kick_out_firmware_fb(struct pci_dev *pdev)
	280	{
	281	struct apertures_struct *ap;
	282	bool primary = false;
	283
	284	ap = alloc_apertures(1);
	285	ap->ranges[0].base = pci_resource_start(pdev, 0);
	286	ap->ranges[0].size = pci_resource_len(pdev, 0);
	287
	288	#ifdef CONFIG_X86
	289	primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
	290	#endif
	291	remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
	292	kfree(ap);
	293	}
	294
771fe6b9 JG	295	static int __devinit
	296	radeon_pci_probe(struct pci_dev pdev, const struct pci_device_id ent)
	297	{
a56f7428 BH	298	/* Get rid of things like offb */
	299	radeon_kick_out_firmware_fb(pdev);
	300
dcdb1674	301	return drm_get_pci_dev(pdev, ent, &kms_driver);
771fe6b9 JG	302	}
	303
	304	static void
	305	radeon_pci_remove(struct pci_dev *pdev)
	306	{
	307	struct drm_device *dev = pci_get_drvdata(pdev);
	308
	309	drm_put_dev(dev);
	310	}
	311
	312	static int
	313	radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
	314	{
	315	struct drm_device *dev = pci_get_drvdata(pdev);
	316	return radeon_suspend_kms(dev, state);
	317	}
	318
	319	static int
	320	radeon_pci_resume(struct pci_dev *pdev)
	321	{
	322	struct drm_device *dev = pci_get_drvdata(pdev);
	323	return radeon_resume_kms(dev);
	324	}
	325
e08e96de AV	326	static const struct file_operations radeon_driver_kms_fops = {
	327	.owner = THIS_MODULE,
	328	.open = drm_open,
	329	.release = drm_release,
	330	.unlocked_ioctl = drm_ioctl,
	331	.mmap = radeon_mmap,
	332	.poll = drm_poll,
	333	.fasync = drm_fasync,
	334	.read = drm_read,
	335	#ifdef CONFIG_COMPAT
	336	.compat_ioctl = radeon_kms_compat_ioctl,
	337	#endif
	338	};
	339
771fe6b9 JG	340	static struct drm_driver kms_driver = {
	341	.driver_features =
	342	DRIVER_USE_AGP \| DRIVER_USE_MTRR \| DRIVER_PCI_DMA \| DRIVER_SG \|
40f5cf99 AD	343	DRIVER_HAVE_IRQ \| DRIVER_HAVE_DMA \| DRIVER_IRQ_SHARED \| DRIVER_GEM \|
40f5cf99 AD	344	DRIVER_PRIME,
771fe6b9 JG	345	.dev_priv_size = 0,
	346	.load = radeon_driver_load_kms,
	347	.firstopen = radeon_driver_firstopen_kms,
	348	.open = radeon_driver_open_kms,
	349	.preclose = radeon_driver_preclose_kms,
	350	.postclose = radeon_driver_postclose_kms,
	351	.lastclose = radeon_driver_lastclose_kms,
	352	.unload = radeon_driver_unload_kms,
	353	.suspend = radeon_suspend_kms,
	354	.resume = radeon_resume_kms,
	355	.get_vblank_counter = radeon_get_vblank_counter_kms,
	356	.enable_vblank = radeon_enable_vblank_kms,
	357	.disable_vblank = radeon_disable_vblank_kms,
f5a80209 MK	358	.get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
f5a80209 MK	359	.get_scanout_position = radeon_get_crtc_scanoutpos,
771fe6b9 JG	360	#if defined(CONFIG_DEBUG_FS)
	361	.debugfs_init = radeon_debugfs_init,
	362	.debugfs_cleanup = radeon_debugfs_cleanup,
	363	#endif
	364	.irq_preinstall = radeon_driver_irq_preinstall_kms,
	365	.irq_postinstall = radeon_driver_irq_postinstall_kms,
	366	.irq_uninstall = radeon_driver_irq_uninstall_kms,
	367	.irq_handler = radeon_driver_irq_handler_kms,
	368	.reclaim_buffers = drm_core_reclaim_buffers,
771fe6b9 JG	369	.ioctls = radeon_ioctls_kms,
	370	.gem_init_object = radeon_gem_object_init,
	371	.gem_free_object = radeon_gem_object_free,
721604a1 JG	372	.gem_open_object = radeon_gem_object_open,
721604a1 JG	373	.gem_close_object = radeon_gem_object_close,
771fe6b9	374	.dma_ioctl = radeon_dma_ioctl_kms,
ff72145b DA	375	.dumb_create = radeon_mode_dumb_create,
	376	.dumb_map_offset = radeon_mode_dumb_mmap,
	377	.dumb_destroy = radeon_mode_dumb_destroy,
e08e96de	378	.fops = &radeon_driver_kms_fops,
40f5cf99 AD	379
	380	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	381	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	382	.gem_prime_export = radeon_gem_prime_export,
	383	.gem_prime_import = radeon_gem_prime_import,
	384
771fe6b9 JG	385	.name = DRIVER_NAME,
	386	.desc = DRIVER_DESC,
	387	.date = DRIVER_DATE,
	388	.major = KMS_DRIVER_MAJOR,
	389	.minor = KMS_DRIVER_MINOR,
	390	.patchlevel = KMS_DRIVER_PATCHLEVEL,
	391	};
771fe6b9 JG	392
771fe6b9 JG	393	static struct drm_driver *driver;
8410ea3b DA	394	static struct pci_driver *pdriver;
	395
	396	static struct pci_driver radeon_pci_driver = {
	397	.name = DRIVER_NAME,
	398	.id_table = pciidlist,
	399	};
	400
	401	static struct pci_driver radeon_kms_pci_driver = {
	402	.name = DRIVER_NAME,
	403	.id_table = pciidlist,
	404	.probe = radeon_pci_probe,
	405	.remove = radeon_pci_remove,
	406	.suspend = radeon_pci_suspend,
	407	.resume = radeon_pci_resume,
	408	};
771fe6b9	409
1da177e4 LT	410	static int __init radeon_init(void)
1da177e4 LT	411	{
771fe6b9	412	driver = &driver_old;
8410ea3b	413	pdriver = &radeon_pci_driver;
771fe6b9	414	driver->num_ioctls = radeon_max_ioctl;
de05065f DA	415	#ifdef CONFIG_VGA_CONSOLE
	416	if (vgacon_text_force() && radeon_modeset == -1) {
	417	DRM_INFO("VGACON disable radeon kernel modesetting.\n");
	418	driver = &driver_old;
8410ea3b	419	pdriver = &radeon_pci_driver;
de05065f DA	420	driver->driver_features &= ~DRIVER_MODESET;
	421	radeon_modeset = 0;
	422	}
	423	#endif
771fe6b9 JG	424	/* if enabled by default */
771fe6b9 JG	425	if (radeon_modeset == -1) {
a0cdc649 DA	426	#ifdef CONFIG_DRM_RADEON_KMS
a0cdc649 DA	427	DRM_INFO("radeon defaulting to kernel modesetting.\n");
771fe6b9	428	radeon_modeset = 1;
a0cdc649 DA	429	#else
	430	DRM_INFO("radeon defaulting to userspace modesetting.\n");
	431	radeon_modeset = 0;
	432	#endif
771fe6b9 JG	433	}
	434	if (radeon_modeset == 1) {
	435	DRM_INFO("radeon kernel modesetting enabled.\n");
	436	driver = &kms_driver;
8410ea3b	437	pdriver = &radeon_kms_pci_driver;
771fe6b9 JG	438	driver->driver_features \|= DRIVER_MODESET;
771fe6b9 JG	439	driver->num_ioctls = radeon_max_kms_ioctl;
6a9ee8af	440	radeon_register_atpx_handler();
771fe6b9	441	}
771fe6b9 JG	442	/* if the vga console setting is enabled still
771fe6b9 JG	443	* let modprobe override it */
8410ea3b	444	return drm_pci_init(driver, pdriver);
1da177e4 LT	445	}
	446
	447	static void __exit radeon_exit(void)
	448	{
8410ea3b	449	drm_pci_exit(driver, pdriver);
6a9ee8af	450	radeon_unregister_atpx_handler();
1da177e4 LT	451	}
1da177e4 LT	452
176f613e	453	module_init(radeon_init);
1da177e4 LT	454	module_exit(radeon_exit);
1da177e4 LT	455
b5e89ed5 DA	456	MODULE_AUTHOR(DRIVER_AUTHOR);
b5e89ed5 DA	457	MODULE_DESCRIPTION(DRIVER_DESC);
1da177e4	458	MODULE_LICENSE("GPL and additional rights");