[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_drv.c

/**
 * \file radeon_drv.c
 * ATI Radeon driver
 *
 * \author Gareth Hughes <gareth@valinux.com>
 */

/*
 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#include "drmP.h"
#include "drm.h"
#include "radeon_drm.h"
#include "radeon_drv.h"

#include "drm_pciids.h"
#include <linux/console.h>


/*
 * KMS wrapper.
 * - 2.0.0 - initial interface
 * - 2.1.0 - add square tiling interface
 * - 2.2.0 - add r6xx/r7xx const buffer support
 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
 * - 2.4.0 - add crtc id query
 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
 *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
 *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
 *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
 *   2.10.0 - fusion 2D tiling
 */
#define KMS_DRIVER_MAJOR	2
#define KMS_DRIVER_MINOR	10
#define KMS_DRIVER_PATCHLEVEL	0
int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
int radeon_driver_unload_kms(struct drm_device *dev);
int radeon_driver_firstopen_kms(struct drm_device *dev);
void radeon_driver_lastclose_kms(struct drm_device *dev);
int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
void radeon_driver_postclose_kms(struct drm_device *dev,
				 struct drm_file *file_priv);
void radeon_driver_preclose_kms(struct drm_device *dev,
				struct drm_file *file_priv);
int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
int radeon_resume_kms(struct drm_device *dev);
u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
				    int *max_error,
				    struct timeval *vblank_time,
				    unsigned flags);
void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
			 struct drm_file *file_priv);
int radeon_gem_object_init(struct drm_gem_object *obj);
void radeon_gem_object_free(struct drm_gem_object *obj);
extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
				      int *vpos, int *hpos);
extern struct drm_ioctl_desc radeon_ioctls_kms[];
extern int radeon_max_kms_ioctl;
int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
int radeon_mode_dumb_mmap(struct drm_file *filp,
			  struct drm_device *dev,
			  uint32_t handle, uint64_t *offset_p);
int radeon_mode_dumb_create(struct drm_file *file_priv,
			    struct drm_device *dev,
			    struct drm_mode_create_dumb *args);
int radeon_mode_dumb_destroy(struct drm_file *file_priv,
			     struct drm_device *dev,
			     uint32_t handle);

#if defined(CONFIG_DEBUG_FS)
int radeon_debugfs_init(struct drm_minor *minor);
void radeon_debugfs_cleanup(struct drm_minor *minor);
#endif


int radeon_no_wb;
int radeon_modeset = -1;
int radeon_dynclks = -1;
int radeon_r4xx_atom = 0;
int radeon_agpmode = 0;
int radeon_vram_limit = 0;
int radeon_gart_size = 512; /* default gart size */
int radeon_benchmarking = 0;
int radeon_testing = 0;
int radeon_connector_table = 0;
int radeon_tv = 1;
int radeon_audio = 1;
int radeon_disp_priority = 0;
int radeon_hw_i2c = 0;
int radeon_pcie_gen2 = 0;

MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
module_param_named(no_wb, radeon_no_wb, int, 0444);

MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
module_param_named(modeset, radeon_modeset, int, 0400);

MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
module_param_named(dynclks, radeon_dynclks, int, 0444);

MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);

MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
module_param_named(vramlimit, radeon_vram_limit, int, 0600);

MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
module_param_named(agpmode, radeon_agpmode, int, 0444);

MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32,64, etc)\n");
module_param_named(gartsize, radeon_gart_size, int, 0600);

MODULE_PARM_DESC(benchmark, "Run benchmark");
module_param_named(benchmark, radeon_benchmarking, int, 0444);

MODULE_PARM_DESC(test, "Run tests");
module_param_named(test, radeon_testing, int, 0444);

MODULE_PARM_DESC(connector_table, "Force connector table");
module_param_named(connector_table, radeon_connector_table, int, 0444);

MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
module_param_named(tv, radeon_tv, int, 0444);

MODULE_PARM_DESC(audio, "Audio enable (0 = disable)");
module_param_named(audio, radeon_audio, int, 0444);

MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
module_param_named(disp_priority, radeon_disp_priority, int, 0444);

MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);

MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (1 = enable)");
module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);

static int radeon_suspend(struct drm_device *dev, pm_message_t state)
{
	drm_radeon_private_t *dev_priv = dev->dev_private;

	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
		return 0;

	/* Disable *all* interrupts */
	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
		RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
	return 0;
}

static int radeon_resume(struct drm_device *dev)
{
	drm_radeon_private_t *dev_priv = dev->dev_private;

	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
		return 0;

	/* Restore interrupt registers */
	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
		RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
	return 0;
}

static struct pci_device_id pciidlist[] = {
	radeon_PCI_IDS
};

#if defined(CONFIG_DRM_RADEON_KMS)
MODULE_DEVICE_TABLE(pci, pciidlist);
#endif

static struct drm_driver driver_old = {
	.driver_features =
	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
	.load = radeon_driver_load,
	.firstopen = radeon_driver_firstopen,
	.open = radeon_driver_open,
	.preclose = radeon_driver_preclose,
	.postclose = radeon_driver_postclose,
	.lastclose = radeon_driver_lastclose,
	.unload = radeon_driver_unload,
	.suspend = radeon_suspend,
	.resume = radeon_resume,
	.get_vblank_counter = radeon_get_vblank_counter,
	.enable_vblank = radeon_enable_vblank,
	.disable_vblank = radeon_disable_vblank,
	.master_create = radeon_master_create,
	.master_destroy = radeon_master_destroy,
	.irq_preinstall = radeon_driver_irq_preinstall,
	.irq_postinstall = radeon_driver_irq_postinstall,
	.irq_uninstall = radeon_driver_irq_uninstall,
	.irq_handler = radeon_driver_irq_handler,
	.reclaim_buffers = drm_core_reclaim_buffers,
	.ioctls = radeon_ioctls,
	.dma_ioctl = radeon_cp_buffers,
	.fops = {
		 .owner = THIS_MODULE,
		 .open = drm_open,
		 .release = drm_release,
		 .unlocked_ioctl = drm_ioctl,
		 .mmap = drm_mmap,
		 .poll = drm_poll,
		 .fasync = drm_fasync,
		 .read = drm_read,
#ifdef CONFIG_COMPAT
		 .compat_ioctl = radeon_compat_ioctl,
#endif
		 .llseek = noop_llseek,
	},

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
	.date = DRIVER_DATE,
	.major = DRIVER_MAJOR,
	.minor = DRIVER_MINOR,
	.patchlevel = DRIVER_PATCHLEVEL,
};

static struct drm_driver kms_driver;

static void radeon_kick_out_firmware_fb(struct pci_dev *pdev)
{
	struct apertures_struct *ap;
	bool primary = false;

	ap = alloc_apertures(1);
	ap->ranges[0].base = pci_resource_start(pdev, 0);
	ap->ranges[0].size = pci_resource_len(pdev, 0);

#ifdef CONFIG_X86
	primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
#endif
	remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
	kfree(ap);
}

static int __devinit
radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	/* Get rid of things like offb */
	radeon_kick_out_firmware_fb(pdev);

	return drm_get_pci_dev(pdev, ent, &kms_driver);
}

static void
radeon_pci_remove(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);

	drm_put_dev(dev);
}

static int
radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	return radeon_suspend_kms(dev, state);
}

static int
radeon_pci_resume(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	return radeon_resume_kms(dev);
}

static struct drm_driver kms_driver = {
	.driver_features =
	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM,
	.dev_priv_size = 0,
	.load = radeon_driver_load_kms,
	.firstopen = radeon_driver_firstopen_kms,
	.open = radeon_driver_open_kms,
	.preclose = radeon_driver_preclose_kms,
	.postclose = radeon_driver_postclose_kms,
	.lastclose = radeon_driver_lastclose_kms,
	.unload = radeon_driver_unload_kms,
	.suspend = radeon_suspend_kms,
	.resume = radeon_resume_kms,
	.get_vblank_counter = radeon_get_vblank_counter_kms,
	.enable_vblank = radeon_enable_vblank_kms,
	.disable_vblank = radeon_disable_vblank_kms,
	.get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
	.get_scanout_position = radeon_get_crtc_scanoutpos,
#if defined(CONFIG_DEBUG_FS)
	.debugfs_init = radeon_debugfs_init,
	.debugfs_cleanup = radeon_debugfs_cleanup,
#endif
	.irq_preinstall = radeon_driver_irq_preinstall_kms,
	.irq_postinstall = radeon_driver_irq_postinstall_kms,
	.irq_uninstall = radeon_driver_irq_uninstall_kms,
	.irq_handler = radeon_driver_irq_handler_kms,
	.reclaim_buffers = drm_core_reclaim_buffers,
	.ioctls = radeon_ioctls_kms,
	.gem_init_object = radeon_gem_object_init,
	.gem_free_object = radeon_gem_object_free,
	.dma_ioctl = radeon_dma_ioctl_kms,
	.dumb_create = radeon_mode_dumb_create,
	.dumb_map_offset = radeon_mode_dumb_mmap,
	.dumb_destroy = radeon_mode_dumb_destroy,
	.fops = {
		 .owner = THIS_MODULE,
		 .open = drm_open,
		 .release = drm_release,
		 .unlocked_ioctl = drm_ioctl,
		 .mmap = radeon_mmap,
		 .poll = drm_poll,
		 .fasync = drm_fasync,
		 .read = drm_read,
#ifdef CONFIG_COMPAT
		 .compat_ioctl = radeon_kms_compat_ioctl,
#endif
	},

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
	.date = DRIVER_DATE,
	.major = KMS_DRIVER_MAJOR,
	.minor = KMS_DRIVER_MINOR,
	.patchlevel = KMS_DRIVER_PATCHLEVEL,
};

static struct drm_driver *driver;
static struct pci_driver *pdriver;

static struct pci_driver radeon_pci_driver = {
	.name = DRIVER_NAME,
	.id_table = pciidlist,
};

static struct pci_driver radeon_kms_pci_driver = {
	.name = DRIVER_NAME,
	.id_table = pciidlist,
	.probe = radeon_pci_probe,
	.remove = radeon_pci_remove,
	.suspend = radeon_pci_suspend,
	.resume = radeon_pci_resume,
};

static int __init radeon_init(void)
{
	driver = &driver_old;
	pdriver = &radeon_pci_driver;
	driver->num_ioctls = radeon_max_ioctl;
#ifdef CONFIG_VGA_CONSOLE
	if (vgacon_text_force() && radeon_modeset == -1) {
		DRM_INFO("VGACON disable radeon kernel modesetting.\n");
		driver = &driver_old;
		pdriver = &radeon_pci_driver;
		driver->driver_features &= ~DRIVER_MODESET;
		radeon_modeset = 0;
	}
#endif
	/* if enabled by default */
	if (radeon_modeset == -1) {
#ifdef CONFIG_DRM_RADEON_KMS
		DRM_INFO("radeon defaulting to kernel modesetting.\n");
		radeon_modeset = 1;
#else
		DRM_INFO("radeon defaulting to userspace modesetting.\n");
		radeon_modeset = 0;
#endif
	}
	if (radeon_modeset == 1) {
		DRM_INFO("radeon kernel modesetting enabled.\n");
		driver = &kms_driver;
		pdriver = &radeon_kms_pci_driver;
		driver->driver_features |= DRIVER_MODESET;
		driver->num_ioctls = radeon_max_kms_ioctl;
		radeon_register_atpx_handler();
	}
	/* if the vga console setting is enabled still
	 * let modprobe override it */
	return drm_pci_init(driver, pdriver);
}

static void __exit radeon_exit(void)
{
	drm_pci_exit(driver, pdriver);
	radeon_unregister_atpx_handler();
}

module_init(radeon_init);
module_exit(radeon_exit);

MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL and additional rights");
Commit	Line	Data
1da177e4 LT	1	/**
	2	* \file radeon_drv.c
	3	* ATI Radeon driver
	4	*
	5	* \author Gareth Hughes <gareth@valinux.com>
	6	*/
	7
	8	/*
	9	* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
	10	* All Rights Reserved.
	11	*
	12	* Permission is hereby granted, free of charge, to any person obtaining a
	13	* copy of this software and associated documentation files (the "Software"),
	14	* to deal in the Software without restriction, including without limitation
	15	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	16	* and/or sell copies of the Software, and to permit persons to whom the
	17	* Software is furnished to do so, subject to the following conditions:
	18	*
	19	* The above copyright notice and this permission notice (including the next
	20	* paragraph) shall be included in all copies or substantial portions of the
	21	* Software.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	24	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	25	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	26	* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
	27	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	28	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	29	* OTHER DEALINGS IN THE SOFTWARE.
	30	*/
	31
1da177e4 LT	32	#include "drmP.h"
	33	#include "drm.h"
	34	#include "radeon_drm.h"
	35	#include "radeon_drv.h"
	36
	37	#include "drm_pciids.h"
771fe6b9 JG	38	#include <linux/console.h>
	39
	40
771fe6b9 JG	41	/*
771fe6b9 JG	42	* KMS wrapper.
0de1a57b DA	43	* - 2.0.0 - initial interface
0de1a57b DA	44	* - 2.1.0 - add square tiling interface
fdb43528	45	* - 2.2.0 - add r6xx/r7xx const buffer support
cae94b0a	46	* - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
bc35afdb	47	* - 2.4.0 - add crtc id query
148a03bc	48	* - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
ab9e1f59	49	* - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
71901cc4	50	* 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
58bbf018	51	* 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
486af189	52	* 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
d19c37a5	53	* 2.10.0 - fusion 2D tiling
771fe6b9 JG	54	*/
771fe6b9 JG	55	#define KMS_DRIVER_MAJOR 2
d19c37a5	56	#define KMS_DRIVER_MINOR 10
771fe6b9 JG	57	#define KMS_DRIVER_PATCHLEVEL 0
	58	int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
	59	int radeon_driver_unload_kms(struct drm_device *dev);
	60	int radeon_driver_firstopen_kms(struct drm_device *dev);
	61	void radeon_driver_lastclose_kms(struct drm_device *dev);
	62	int radeon_driver_open_kms(struct drm_device dev, struct drm_file file_priv);
	63	void radeon_driver_postclose_kms(struct drm_device *dev,
	64	struct drm_file *file_priv);
	65	void radeon_driver_preclose_kms(struct drm_device *dev,
	66	struct drm_file *file_priv);
	67	int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
	68	int radeon_resume_kms(struct drm_device *dev);
	69	u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
	70	int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
	71	void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
f5a80209 MK	72	int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
	73	int *max_error,
	74	struct timeval *vblank_time,
	75	unsigned flags);
771fe6b9 JG	76	void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
	77	int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
	78	void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
	79	irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
771fe6b9 JG	80	int radeon_dma_ioctl_kms(struct drm_device dev, void data,
	81	struct drm_file *file_priv);
	82	int radeon_gem_object_init(struct drm_gem_object *obj);
	83	void radeon_gem_object_free(struct drm_gem_object *obj);
f5a80209 MK	84	extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
f5a80209 MK	85	int vpos, int hpos);
771fe6b9 JG	86	extern struct drm_ioctl_desc radeon_ioctls_kms[];
	87	extern int radeon_max_kms_ioctl;
	88	int radeon_mmap(struct file filp, struct vm_area_struct vma);
ff72145b DA	89	int radeon_mode_dumb_mmap(struct drm_file *filp,
	90	struct drm_device *dev,
	91	uint32_t handle, uint64_t *offset_p);
	92	int radeon_mode_dumb_create(struct drm_file *file_priv,
	93	struct drm_device *dev,
	94	struct drm_mode_create_dumb *args);
	95	int radeon_mode_dumb_destroy(struct drm_file *file_priv,
	96	struct drm_device *dev,
	97	uint32_t handle);
	98
771fe6b9 JG	99	#if defined(CONFIG_DEBUG_FS)
	100	int radeon_debugfs_init(struct drm_minor *minor);
	101	void radeon_debugfs_cleanup(struct drm_minor *minor);
	102	#endif
771fe6b9	103
1da177e4	104
689b9d74	105	int radeon_no_wb;
771fe6b9 JG	106	int radeon_modeset = -1;
	107	int radeon_dynclks = -1;
	108	int radeon_r4xx_atom = 0;
	109	int radeon_agpmode = 0;
	110	int radeon_vram_limit = 0;
	111	int radeon_gart_size = 512; /* default gart size */
	112	int radeon_benchmarking = 0;
ecc0b326	113	int radeon_testing = 0;
771fe6b9	114	int radeon_connector_table = 0;
4ce001ab	115	int radeon_tv = 1;
dafc3bd5	116	int radeon_audio = 1;
f46c0120	117	int radeon_disp_priority = 0;
e2b0a8e1	118	int radeon_hw_i2c = 0;
d42dd579	119	int radeon_pcie_gen2 = 0;
689b9d74	120
61a2d07d	121	MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
689b9d74 DA	122	module_param_named(no_wb, radeon_no_wb, int, 0444);
689b9d74 DA	123
771fe6b9 JG	124	MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
	125	module_param_named(modeset, radeon_modeset, int, 0400);
	126
	127	MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
	128	module_param_named(dynclks, radeon_dynclks, int, 0444);
	129
	130	MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
	131	module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
	132
	133	MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
	134	module_param_named(vramlimit, radeon_vram_limit, int, 0600);
	135
	136	MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
	137	module_param_named(agpmode, radeon_agpmode, int, 0444);
	138
	139	MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32,64, etc)\n");
	140	module_param_named(gartsize, radeon_gart_size, int, 0600);
	141
	142	MODULE_PARM_DESC(benchmark, "Run benchmark");
	143	module_param_named(benchmark, radeon_benchmarking, int, 0444);
	144
ecc0b326 MD	145	MODULE_PARM_DESC(test, "Run tests");
	146	module_param_named(test, radeon_testing, int, 0444);
	147
771fe6b9 JG	148	MODULE_PARM_DESC(connector_table, "Force connector table");
771fe6b9 JG	149	module_param_named(connector_table, radeon_connector_table, int, 0444);
4ce001ab DA	150
	151	MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
	152	module_param_named(tv, radeon_tv, int, 0444);
771fe6b9	153
dafc3bd5 CK	154	MODULE_PARM_DESC(audio, "Audio enable (0 = disable)");
	155	module_param_named(audio, radeon_audio, int, 0444);
	156
f46c0120 AD	157	MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
	158	module_param_named(disp_priority, radeon_disp_priority, int, 0444);
	159
e2b0a8e1 AD	160	MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
	161	module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
	162
d42dd579 AD	163	MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (1 = enable)");
	164	module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
	165
0a3e67a4 JB	166	static int radeon_suspend(struct drm_device *dev, pm_message_t state)
	167	{
	168	drm_radeon_private_t *dev_priv = dev->dev_private;
	169
03efb885 DA	170	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
	171	return 0;
	172
0a3e67a4	173	/* Disable all interrupts */
800b6995	174	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4 JB	175	RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
	176	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
	177	return 0;
	178	}
	179
	180	static int radeon_resume(struct drm_device *dev)
	181	{
	182	drm_radeon_private_t *dev_priv = dev->dev_private;
	183
03efb885 DA	184	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
	185	return 0;
	186
0a3e67a4	187	/* Restore interrupt registers */
800b6995	188	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4 JB	189	RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
	190	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
	191	return 0;
	192	}
	193
1da177e4 LT	194	static struct pci_device_id pciidlist[] = {
	195	radeon_PCI_IDS
	196	};
	197
771fe6b9 JG	198	#if defined(CONFIG_DRM_RADEON_KMS)
	199	MODULE_DEVICE_TABLE(pci, pciidlist);
	200	#endif
	201
	202	static struct drm_driver driver_old = {
b5e89ed5 DA	203	.driver_features =
b5e89ed5 DA	204	DRIVER_USE_AGP \| DRIVER_USE_MTRR \| DRIVER_PCI_DMA \| DRIVER_SG \|
0a3e67a4	205	DRIVER_HAVE_IRQ \| DRIVER_HAVE_DMA \| DRIVER_IRQ_SHARED,
1da177e4	206	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
22eae947 DA	207	.load = radeon_driver_load,
	208	.firstopen = radeon_driver_firstopen,
	209	.open = radeon_driver_open,
	210	.preclose = radeon_driver_preclose,
	211	.postclose = radeon_driver_postclose,
	212	.lastclose = radeon_driver_lastclose,
	213	.unload = radeon_driver_unload,
0a3e67a4 JB	214	.suspend = radeon_suspend,
	215	.resume = radeon_resume,
	216	.get_vblank_counter = radeon_get_vblank_counter,
	217	.enable_vblank = radeon_enable_vblank,
	218	.disable_vblank = radeon_disable_vblank,
60f2ee0b DA	219	.master_create = radeon_master_create,
60f2ee0b DA	220	.master_destroy = radeon_master_destroy,
1da177e4 LT	221	.irq_preinstall = radeon_driver_irq_preinstall,
	222	.irq_postinstall = radeon_driver_irq_postinstall,
	223	.irq_uninstall = radeon_driver_irq_uninstall,
	224	.irq_handler = radeon_driver_irq_handler,
1da177e4	225	.reclaim_buffers = drm_core_reclaim_buffers,
1da177e4 LT	226	.ioctls = radeon_ioctls,
	227	.dma_ioctl = radeon_cp_buffers,
	228	.fops = {
b5e89ed5 DA	229	.owner = THIS_MODULE,
	230	.open = drm_open,
	231	.release = drm_release,
ed8b6704	232	.unlocked_ioctl = drm_ioctl,
b5e89ed5 DA	233	.mmap = drm_mmap,
	234	.poll = drm_poll,
	235	.fasync = drm_fasync,
4fa07bf1	236	.read = drm_read,
9a186645	237	#ifdef CONFIG_COMPAT
b5e89ed5	238	.compat_ioctl = radeon_compat_ioctl,
9a186645	239	#endif
dc880abe	240	.llseek = noop_llseek,
22eae947 DA	241	},
22eae947 DA	242
22eae947 DA	243	.name = DRIVER_NAME,
	244	.desc = DRIVER_DESC,
	245	.date = DRIVER_DATE,
	246	.major = DRIVER_MAJOR,
	247	.minor = DRIVER_MINOR,
	248	.patchlevel = DRIVER_PATCHLEVEL,
1da177e4 LT	249	};
1da177e4 LT	250
771fe6b9 JG	251	static struct drm_driver kms_driver;
771fe6b9 JG	252
a56f7428 BH	253	static void radeon_kick_out_firmware_fb(struct pci_dev *pdev)
	254	{
	255	struct apertures_struct *ap;
	256	bool primary = false;
	257
	258	ap = alloc_apertures(1);
	259	ap->ranges[0].base = pci_resource_start(pdev, 0);
	260	ap->ranges[0].size = pci_resource_len(pdev, 0);
	261
	262	#ifdef CONFIG_X86
	263	primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
	264	#endif
	265	remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
	266	kfree(ap);
	267	}
	268
771fe6b9 JG	269	static int __devinit
	270	radeon_pci_probe(struct pci_dev pdev, const struct pci_device_id ent)
	271	{
a56f7428 BH	272	/* Get rid of things like offb */
	273	radeon_kick_out_firmware_fb(pdev);
	274
dcdb1674	275	return drm_get_pci_dev(pdev, ent, &kms_driver);
771fe6b9 JG	276	}
	277
	278	static void
	279	radeon_pci_remove(struct pci_dev *pdev)
	280	{
	281	struct drm_device *dev = pci_get_drvdata(pdev);
	282
	283	drm_put_dev(dev);
	284	}
	285
	286	static int
	287	radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
	288	{
	289	struct drm_device *dev = pci_get_drvdata(pdev);
	290	return radeon_suspend_kms(dev, state);
	291	}
	292
	293	static int
	294	radeon_pci_resume(struct pci_dev *pdev)
	295	{
	296	struct drm_device *dev = pci_get_drvdata(pdev);
	297	return radeon_resume_kms(dev);
	298	}
	299
	300	static struct drm_driver kms_driver = {
	301	.driver_features =
	302	DRIVER_USE_AGP \| DRIVER_USE_MTRR \| DRIVER_PCI_DMA \| DRIVER_SG \|
	303	DRIVER_HAVE_IRQ \| DRIVER_HAVE_DMA \| DRIVER_IRQ_SHARED \| DRIVER_GEM,
	304	.dev_priv_size = 0,
	305	.load = radeon_driver_load_kms,
	306	.firstopen = radeon_driver_firstopen_kms,
	307	.open = radeon_driver_open_kms,
	308	.preclose = radeon_driver_preclose_kms,
	309	.postclose = radeon_driver_postclose_kms,
	310	.lastclose = radeon_driver_lastclose_kms,
	311	.unload = radeon_driver_unload_kms,
	312	.suspend = radeon_suspend_kms,
	313	.resume = radeon_resume_kms,
	314	.get_vblank_counter = radeon_get_vblank_counter_kms,
	315	.enable_vblank = radeon_enable_vblank_kms,
	316	.disable_vblank = radeon_disable_vblank_kms,
f5a80209 MK	317	.get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
f5a80209 MK	318	.get_scanout_position = radeon_get_crtc_scanoutpos,
771fe6b9 JG	319	#if defined(CONFIG_DEBUG_FS)
	320	.debugfs_init = radeon_debugfs_init,
	321	.debugfs_cleanup = radeon_debugfs_cleanup,
	322	#endif
	323	.irq_preinstall = radeon_driver_irq_preinstall_kms,
	324	.irq_postinstall = radeon_driver_irq_postinstall_kms,
	325	.irq_uninstall = radeon_driver_irq_uninstall_kms,
	326	.irq_handler = radeon_driver_irq_handler_kms,
	327	.reclaim_buffers = drm_core_reclaim_buffers,
771fe6b9 JG	328	.ioctls = radeon_ioctls_kms,
	329	.gem_init_object = radeon_gem_object_init,
	330	.gem_free_object = radeon_gem_object_free,
	331	.dma_ioctl = radeon_dma_ioctl_kms,
ff72145b DA	332	.dumb_create = radeon_mode_dumb_create,
	333	.dumb_map_offset = radeon_mode_dumb_mmap,
	334	.dumb_destroy = radeon_mode_dumb_destroy,
771fe6b9 JG	335	.fops = {
	336	.owner = THIS_MODULE,
	337	.open = drm_open,
	338	.release = drm_release,
ed8b6704	339	.unlocked_ioctl = drm_ioctl,
771fe6b9 JG	340	.mmap = radeon_mmap,
	341	.poll = drm_poll,
	342	.fasync = drm_fasync,
4fa07bf1	343	.read = drm_read,
771fe6b9	344	#ifdef CONFIG_COMPAT
70ba2a37	345	.compat_ioctl = radeon_kms_compat_ioctl,
771fe6b9 JG	346	#endif
	347	},
	348
771fe6b9 JG	349	.name = DRIVER_NAME,
	350	.desc = DRIVER_DESC,
	351	.date = DRIVER_DATE,
	352	.major = KMS_DRIVER_MAJOR,
	353	.minor = KMS_DRIVER_MINOR,
	354	.patchlevel = KMS_DRIVER_PATCHLEVEL,
	355	};
771fe6b9 JG	356
771fe6b9 JG	357	static struct drm_driver *driver;
8410ea3b DA	358	static struct pci_driver *pdriver;
	359
	360	static struct pci_driver radeon_pci_driver = {
	361	.name = DRIVER_NAME,
	362	.id_table = pciidlist,
	363	};
	364
	365	static struct pci_driver radeon_kms_pci_driver = {
	366	.name = DRIVER_NAME,
	367	.id_table = pciidlist,
	368	.probe = radeon_pci_probe,
	369	.remove = radeon_pci_remove,
	370	.suspend = radeon_pci_suspend,
	371	.resume = radeon_pci_resume,
	372	};
771fe6b9	373
1da177e4 LT	374	static int __init radeon_init(void)
1da177e4 LT	375	{
771fe6b9	376	driver = &driver_old;
8410ea3b	377	pdriver = &radeon_pci_driver;
771fe6b9	378	driver->num_ioctls = radeon_max_ioctl;
de05065f DA	379	#ifdef CONFIG_VGA_CONSOLE
	380	if (vgacon_text_force() && radeon_modeset == -1) {
	381	DRM_INFO("VGACON disable radeon kernel modesetting.\n");
	382	driver = &driver_old;
8410ea3b	383	pdriver = &radeon_pci_driver;
de05065f DA	384	driver->driver_features &= ~DRIVER_MODESET;
	385	radeon_modeset = 0;
	386	}
	387	#endif
771fe6b9 JG	388	/* if enabled by default */
771fe6b9 JG	389	if (radeon_modeset == -1) {
a0cdc649 DA	390	#ifdef CONFIG_DRM_RADEON_KMS
a0cdc649 DA	391	DRM_INFO("radeon defaulting to kernel modesetting.\n");
771fe6b9	392	radeon_modeset = 1;
a0cdc649 DA	393	#else
	394	DRM_INFO("radeon defaulting to userspace modesetting.\n");
	395	radeon_modeset = 0;
	396	#endif
771fe6b9 JG	397	}
	398	if (radeon_modeset == 1) {
	399	DRM_INFO("radeon kernel modesetting enabled.\n");
	400	driver = &kms_driver;
8410ea3b	401	pdriver = &radeon_kms_pci_driver;
771fe6b9 JG	402	driver->driver_features \|= DRIVER_MODESET;
771fe6b9 JG	403	driver->num_ioctls = radeon_max_kms_ioctl;
6a9ee8af	404	radeon_register_atpx_handler();
771fe6b9	405	}
771fe6b9 JG	406	/* if the vga console setting is enabled still
771fe6b9 JG	407	* let modprobe override it */
8410ea3b	408	return drm_pci_init(driver, pdriver);
1da177e4 LT	409	}
	410
	411	static void __exit radeon_exit(void)
	412	{
8410ea3b	413	drm_pci_exit(driver, pdriver);
6a9ee8af	414	radeon_unregister_atpx_handler();
1da177e4 LT	415	}
1da177e4 LT	416
176f613e	417	module_init(radeon_init);
1da177e4 LT	418	module_exit(radeon_exit);
1da177e4 LT	419
b5e89ed5 DA	420	MODULE_AUTHOR(DRIVER_AUTHOR);
b5e89ed5 DA	421	MODULE_DESCRIPTION(DRIVER_DESC);
1da177e4	422	MODULE_LICENSE("GPL and additional rights");