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drm: Fix vblank timestamping constants for interlaced modes
[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_drv.c
CommitLineData
1da177e4
LT		 1/**
2 * \file radeon_drv.c
3 * ATI Radeon driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */
31
760285e7
DH		 32#include <drm/drmP.h>
33#include <drm/radeon_drm.h>
1da177e4
LT		 34#include "radeon_drv.h"
35
760285e7 36#include <drm/drm_pciids.h>
771fe6b9 37#include <linux/console.h>
e0cd3608 38#include <linux/module.h>
10ebc0bc
DA		 39#include <linux/pm_runtime.h>
40#include <linux/vga_switcheroo.h>
41#include "drm_crtc_helper.h"
771fe6b9
JG		 42/*
43 * KMS wrapper.
0de1a57b
DA		 44 * - 2.0.0 - initial interface
45 * - 2.1.0 - add square tiling interface
fdb43528 46 * - 2.2.0 - add r6xx/r7xx const buffer support
cae94b0a 47 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
bc35afdb 48 * - 2.4.0 - add crtc id query
148a03bc 49 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
ab9e1f59 50 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
71901cc4 51 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
58bbf018 52 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
486af189 53 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
b8709894
AD		 54 * 2.10.0 - fusion 2D tiling
55 * 2.11.0 - backend map, initial compute support for the CS checker
e70f224c 56 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
dd220a00 57 * 2.13.0 - virtual memory support, streamout
285484e2 58 * 2.14.0 - add evergreen tiling informations
609c1e15 59 * 2.15.0 - add max_pipes query
d2609875 60 * 2.16.0 - fix evergreen 2D tiled surface calculation
7c77bf2a 61 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
0f457e48 62 * 2.18.0 - r600-eg: allow "invalid" DB formats
b51ad12a 63 * 2.19.0 - r600-eg: MSAA textures
6759a0a7 64 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
c116cc94 65 * 2.21.0 - r600-r700: FMASK and CMASK
523885de 66 * 2.22.0 - r600 only: RESOLVE_BOX allowed
46fc8781 67 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
61051afd 68 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
71bfe916 69 * 2.25.0 - eg+: new info request for num SE and num SH
4ac0533a 70 * 2.26.0 - r600-eg: fix htile size computation
8696e33f 71 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
4613ca14 72 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
c18b1170 73 * 2.29.0 - R500 FP16 color clear registers
774c389f 74 * 2.30.0 - fix for FMASK texturing
a0a53aa8 75 * 2.31.0 - Add fastfb support for rs690
902aaef6 76 * 2.32.0 - new info request for rings working
64d7b8be 77 * 2.33.0 - Add SI tiling mode array query
39aee490 78 * 2.34.0 - Add CIK tiling mode array query
32f79a8a 79 * 2.35.0 - Add CIK macrotile mode array query
9482d0d3 80 * 2.36.0 - Fix CIK DCE tiling setup
771fe6b9
JG		 81 */
82#define KMS_DRIVER_MAJOR 2
9482d0d3 83#define KMS_DRIVER_MINOR 36
771fe6b9
JG		 84#define KMS_DRIVER_PATCHLEVEL 0
85int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
86int radeon_driver_unload_kms(struct drm_device *dev);
771fe6b9
JG		 87void radeon_driver_lastclose_kms(struct drm_device *dev);
88int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
89void radeon_driver_postclose_kms(struct drm_device *dev,
90 struct drm_file *file_priv);
91void radeon_driver_preclose_kms(struct drm_device *dev,
92 struct drm_file *file_priv);
10ebc0bc
DA		 93int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon);
94int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
771fe6b9
JG		 95u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
96int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
97void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
f5a80209
MK		 98int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
99 int *max_error,
100 struct timeval *vblank_time,
101 unsigned flags);
771fe6b9
JG		 102void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
103int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
104void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
e9f0d76f 105irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg);
771fe6b9 106void radeon_gem_object_free(struct drm_gem_object *obj);
721604a1
JG		 107int radeon_gem_object_open(struct drm_gem_object *obj,
108 struct drm_file *file_priv);
109void radeon_gem_object_close(struct drm_gem_object *obj,
110 struct drm_file *file_priv);
f5a80209 111extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
d47abc58
MK		 112 int *vpos, int *hpos, ktime_t *stime,
113 ktime_t *etime);
baa70943 114extern const struct drm_ioctl_desc radeon_ioctls_kms[];
771fe6b9
JG		 115extern int radeon_max_kms_ioctl;
116int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
ff72145b
DA		 117int radeon_mode_dumb_mmap(struct drm_file *filp,
118 struct drm_device *dev,
119 uint32_t handle, uint64_t *offset_p);
120int radeon_mode_dumb_create(struct drm_file *file_priv,
121 struct drm_device *dev,
122 struct drm_mode_create_dumb *args);
1e6d17a5
AP		 123struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
124struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
125 size_t size,
126 struct sg_table *sg);
127int radeon_gem_prime_pin(struct drm_gem_object *obj);
280cf211 128void radeon_gem_prime_unpin(struct drm_gem_object *obj);
1e6d17a5
AP		 129void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
130void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
14adc892
CK		 131extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
132 unsigned long arg);
ff72145b 133
771fe6b9
JG		 134#if defined(CONFIG_DEBUG_FS)
135int radeon_debugfs_init(struct drm_minor *minor);
136void radeon_debugfs_cleanup(struct drm_minor *minor);
137#endif
771fe6b9 138
14adc892
CK		 139/* atpx handler */
140#if defined(CONFIG_VGA_SWITCHEROO)
141void radeon_register_atpx_handler(void);
142void radeon_unregister_atpx_handler(void);
10ebc0bc 143bool radeon_is_px(void);
14adc892
CK		 144#else
145static inline void radeon_register_atpx_handler(void) {}
146static inline void radeon_unregister_atpx_handler(void) {}
10ebc0bc 147static inline bool radeon_is_px(void) { return false; }
14adc892 148#endif
1da177e4 149
689b9d74 150int radeon_no_wb;
e9ced8e0 151int radeon_modeset = -1;
771fe6b9
JG		 152int radeon_dynclks = -1;
153int radeon_r4xx_atom = 0;
154int radeon_agpmode = 0;
155int radeon_vram_limit = 0;
edcd26e8 156int radeon_gart_size = -1; /* auto */
771fe6b9 157int radeon_benchmarking = 0;
ecc0b326 158int radeon_testing = 0;
771fe6b9 159int radeon_connector_table = 0;
4ce001ab 160int radeon_tv = 1;
108dc8e8 161int radeon_audio = -1;
f46c0120 162int radeon_disp_priority = 0;
e2b0a8e1 163int radeon_hw_i2c = 0;
197bbb3d 164int radeon_pcie_gen2 = -1;
a18cee15 165int radeon_msi = -1;
3368ff0c 166int radeon_lockup_timeout = 10000;
a0a53aa8 167int radeon_fastfb = 0;
da321c8a 168int radeon_dpm = -1;
1294d4a3 169int radeon_aspm = -1;
10ebc0bc 170int radeon_runtime_pm = -1;
363eb0b4 171int radeon_hard_reset = 0;
689b9d74 172
61a2d07d 173MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
689b9d74
DA		 174module_param_named(no_wb, radeon_no_wb, int, 0444);
175
771fe6b9
JG		 176MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
177module_param_named(modeset, radeon_modeset, int, 0400);
178
179MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
180module_param_named(dynclks, radeon_dynclks, int, 0444);
181
182MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
183module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
184
185MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
186module_param_named(vramlimit, radeon_vram_limit, int, 0600);
187
188MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
189module_param_named(agpmode, radeon_agpmode, int, 0444);
190
edcd26e8 191MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
771fe6b9
JG		 192module_param_named(gartsize, radeon_gart_size, int, 0600);
193
194MODULE_PARM_DESC(benchmark, "Run benchmark");
195module_param_named(benchmark, radeon_benchmarking, int, 0444);
196
ecc0b326
MD		 197MODULE_PARM_DESC(test, "Run tests");
198module_param_named(test, radeon_testing, int, 0444);
199
771fe6b9
JG		 200MODULE_PARM_DESC(connector_table, "Force connector table");
201module_param_named(connector_table, radeon_connector_table, int, 0444);
4ce001ab
DA		 202
203MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
204module_param_named(tv, radeon_tv, int, 0444);
771fe6b9 205
108dc8e8 206MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
dafc3bd5
CK		 207module_param_named(audio, radeon_audio, int, 0444);
208
f46c0120
AD		 209MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
210module_param_named(disp_priority, radeon_disp_priority, int, 0444);
211
e2b0a8e1
AD		 212MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
213module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
214
197bbb3d 215MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
d42dd579
AD		 216module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
217
a18cee15
AD		 218MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
219module_param_named(msi, radeon_msi, int, 0444);
220
3368ff0c
CK		 221MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
222module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
223
a0a53aa8
SL		 224MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
225module_param_named(fastfb, radeon_fastfb, int, 0444);
226
da321c8a
AD		 227MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
228module_param_named(dpm, radeon_dpm, int, 0444);
229
1294d4a3
AD		 230MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
231module_param_named(aspm, radeon_aspm, int, 0444);
232
10ebc0bc
DA		 233MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
234module_param_named(runpm, radeon_runtime_pm, int, 0444);
235
363eb0b4
AD		 236MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
237module_param_named(hard_reset, radeon_hard_reset, int, 0444);
238
14adc892
CK		 239static struct pci_device_id pciidlist[] = {
240 radeon_PCI_IDS
241};
242
243MODULE_DEVICE_TABLE(pci, pciidlist);
244
245#ifdef CONFIG_DRM_RADEON_UMS
246
0a3e67a4
JB		 247static int radeon_suspend(struct drm_device *dev, pm_message_t state)
248{
249 drm_radeon_private_t *dev_priv = dev->dev_private;
250
03efb885
DA		 251 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
252 return 0;
253
0a3e67a4 254 /* Disable *all* interrupts */
800b6995 255 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4
JB		 256 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
257 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
258 return 0;
259}
260
261static int radeon_resume(struct drm_device *dev)
262{
263 drm_radeon_private_t *dev_priv = dev->dev_private;
264
03efb885
DA		 265 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
266 return 0;
267
0a3e67a4 268 /* Restore interrupt registers */
800b6995 269 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4
JB		 270 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
271 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
272 return 0;
273}
274
10ebc0bc 275
e08e96de
AV		 276static const struct file_operations radeon_driver_old_fops = {
277 .owner = THIS_MODULE,
278 .open = drm_open,
279 .release = drm_release,
280 .unlocked_ioctl = drm_ioctl,
281 .mmap = drm_mmap,
282 .poll = drm_poll,
e08e96de
AV		 283 .read = drm_read,
284#ifdef CONFIG_COMPAT
285 .compat_ioctl = radeon_compat_ioctl,
286#endif
287 .llseek = noop_llseek,
288};
289
771fe6b9 290static struct drm_driver driver_old = {
b5e89ed5 291 .driver_features =
28185647 292 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
0a3e67a4 293 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
1da177e4 294 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
22eae947
DA		 295 .load = radeon_driver_load,
296 .firstopen = radeon_driver_firstopen,
297 .open = radeon_driver_open,
298 .preclose = radeon_driver_preclose,
299 .postclose = radeon_driver_postclose,
300 .lastclose = radeon_driver_lastclose,
301 .unload = radeon_driver_unload,
0a3e67a4
JB		 302 .suspend = radeon_suspend,
303 .resume = radeon_resume,
304 .get_vblank_counter = radeon_get_vblank_counter,
305 .enable_vblank = radeon_enable_vblank,
306 .disable_vblank = radeon_disable_vblank,
60f2ee0b
DA		 307 .master_create = radeon_master_create,
308 .master_destroy = radeon_master_destroy,
1da177e4
LT		 309 .irq_preinstall = radeon_driver_irq_preinstall,
310 .irq_postinstall = radeon_driver_irq_postinstall,
311 .irq_uninstall = radeon_driver_irq_uninstall,
312 .irq_handler = radeon_driver_irq_handler,
1da177e4
LT		 313 .ioctls = radeon_ioctls,
314 .dma_ioctl = radeon_cp_buffers,
e08e96de 315 .fops = &radeon_driver_old_fops,
22eae947
DA		 316 .name = DRIVER_NAME,
317 .desc = DRIVER_DESC,
318 .date = DRIVER_DATE,
319 .major = DRIVER_MAJOR,
320 .minor = DRIVER_MINOR,
321 .patchlevel = DRIVER_PATCHLEVEL,
1da177e4
LT		 322};
323
14adc892
CK		 324#endif
325
771fe6b9
JG		 326static struct drm_driver kms_driver;
327
30238151 328static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
a56f7428
BH		 329{
330 struct apertures_struct *ap;
331 bool primary = false;
332
333 ap = alloc_apertures(1);
30238151
TR		 334 if (!ap)
335 return -ENOMEM;
336
a56f7428
BH		 337 ap->ranges[0].base = pci_resource_start(pdev, 0);
338 ap->ranges[0].size = pci_resource_len(pdev, 0);
339
340#ifdef CONFIG_X86
341 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
342#endif
343 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
344 kfree(ap);
30238151
TR		 345
346 return 0;
a56f7428
BH		 347}
348
56550d94
GKH		 349static int radeon_pci_probe(struct pci_dev *pdev,
350 const struct pci_device_id *ent)
771fe6b9 351{
30238151
TR		 352 int ret;
353
a56f7428 354 /* Get rid of things like offb */
30238151
TR		 355 ret = radeon_kick_out_firmware_fb(pdev);
356 if (ret)
357 return ret;
a56f7428 358
dcdb1674 359 return drm_get_pci_dev(pdev, ent, &kms_driver);
771fe6b9
JG		 360}
361
362static void
363radeon_pci_remove(struct pci_dev *pdev)
364{
365 struct drm_device *dev = pci_get_drvdata(pdev);
366
367 drm_put_dev(dev);
368}
369
7473e830 370static int radeon_pmops_suspend(struct device *dev)
771fe6b9 371{
7473e830
DA		 372 struct pci_dev *pdev = to_pci_dev(dev);
373 struct drm_device *drm_dev = pci_get_drvdata(pdev);
10ebc0bc 374 return radeon_suspend_kms(drm_dev, true, true);
771fe6b9
JG		 375}
376
7473e830 377static int radeon_pmops_resume(struct device *dev)
771fe6b9 378{
7473e830
DA		 379 struct pci_dev *pdev = to_pci_dev(dev);
380 struct drm_device *drm_dev = pci_get_drvdata(pdev);
10ebc0bc 381 return radeon_resume_kms(drm_dev, true, true);
7473e830
DA		 382}
383
384static int radeon_pmops_freeze(struct device *dev)
385{
386 struct pci_dev *pdev = to_pci_dev(dev);
387 struct drm_device *drm_dev = pci_get_drvdata(pdev);
10ebc0bc 388 return radeon_suspend_kms(drm_dev, false, true);
771fe6b9
JG		 389}
390
7473e830
DA		 391static int radeon_pmops_thaw(struct device *dev)
392{
393 struct pci_dev *pdev = to_pci_dev(dev);
394 struct drm_device *drm_dev = pci_get_drvdata(pdev);
10ebc0bc
DA		 395 return radeon_resume_kms(drm_dev, false, true);
396}
397
398static int radeon_pmops_runtime_suspend(struct device *dev)
399{
400 struct pci_dev *pdev = to_pci_dev(dev);
401 struct drm_device *drm_dev = pci_get_drvdata(pdev);
402 int ret;
403
404 if (radeon_runtime_pm == 0)
405 return -EINVAL;
406
407 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
408 drm_kms_helper_poll_disable(drm_dev);
409 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
410
411 ret = radeon_suspend_kms(drm_dev, false, false);
412 pci_save_state(pdev);
413 pci_disable_device(pdev);
414 pci_set_power_state(pdev, PCI_D3cold);
415 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
416
417 return 0;
418}
419
420static int radeon_pmops_runtime_resume(struct device *dev)
421{
422 struct pci_dev *pdev = to_pci_dev(dev);
423 struct drm_device *drm_dev = pci_get_drvdata(pdev);
424 int ret;
425
426 if (radeon_runtime_pm == 0)
427 return -EINVAL;
428
429 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
430
431 pci_set_power_state(pdev, PCI_D0);
432 pci_restore_state(pdev);
433 ret = pci_enable_device(pdev);
434 if (ret)
435 return ret;
436 pci_set_master(pdev);
437
438 ret = radeon_resume_kms(drm_dev, false, false);
439 drm_kms_helper_poll_enable(drm_dev);
440 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
441 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
442 return 0;
443}
444
445static int radeon_pmops_runtime_idle(struct device *dev)
446{
447 struct pci_dev *pdev = to_pci_dev(dev);
448 struct drm_device *drm_dev = pci_get_drvdata(pdev);
449 struct drm_crtc *crtc;
450
451 if (radeon_runtime_pm == 0)
452 return -EBUSY;
453
454 /* are we PX enabled? */
455 if (radeon_runtime_pm == -1 && !radeon_is_px()) {
456 DRM_DEBUG_DRIVER("failing to power off - not px\n");
457 return -EBUSY;
458 }
459
460 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
461 if (crtc->enabled) {
462 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
463 return -EBUSY;
464 }
465 }
466
467 pm_runtime_mark_last_busy(dev);
468 pm_runtime_autosuspend(dev);
469 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
470 return 1;
471}
472
473long radeon_drm_ioctl(struct file *filp,
474 unsigned int cmd, unsigned long arg)
475{
476 struct drm_file *file_priv = filp->private_data;
477 struct drm_device *dev;
478 long ret;
479 dev = file_priv->minor->dev;
480 ret = pm_runtime_get_sync(dev->dev);
481 if (ret < 0)
482 return ret;
483
484 ret = drm_ioctl(filp, cmd, arg);
485
486 pm_runtime_mark_last_busy(dev->dev);
487 pm_runtime_put_autosuspend(dev->dev);
488 return ret;
7473e830
DA		 489}
490
491static const struct dev_pm_ops radeon_pm_ops = {
492 .suspend = radeon_pmops_suspend,
493 .resume = radeon_pmops_resume,
494 .freeze = radeon_pmops_freeze,
495 .thaw = radeon_pmops_thaw,
496 .poweroff = radeon_pmops_freeze,
497 .restore = radeon_pmops_resume,
10ebc0bc
DA		 498 .runtime_suspend = radeon_pmops_runtime_suspend,
499 .runtime_resume = radeon_pmops_runtime_resume,
500 .runtime_idle = radeon_pmops_runtime_idle,
7473e830
DA		 501};
502
e08e96de
AV		 503static const struct file_operations radeon_driver_kms_fops = {
504 .owner = THIS_MODULE,
505 .open = drm_open,
506 .release = drm_release,
10ebc0bc 507 .unlocked_ioctl = radeon_drm_ioctl,
e08e96de
AV		 508 .mmap = radeon_mmap,
509 .poll = drm_poll,
e08e96de
AV		 510 .read = drm_read,
511#ifdef CONFIG_COMPAT
512 .compat_ioctl = radeon_kms_compat_ioctl,
513#endif
514};
515
771fe6b9
JG		 516static struct drm_driver kms_driver = {
517 .driver_features =
28185647 518 DRIVER_USE_AGP |
81e95697 519 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
f33bcab9 520 DRIVER_PRIME | DRIVER_RENDER,
771fe6b9
JG		 521 .dev_priv_size = 0,
522 .load = radeon_driver_load_kms,
771fe6b9
JG		 523 .open = radeon_driver_open_kms,
524 .preclose = radeon_driver_preclose_kms,
525 .postclose = radeon_driver_postclose_kms,
526 .lastclose = radeon_driver_lastclose_kms,
527 .unload = radeon_driver_unload_kms,
771fe6b9
JG		 528 .get_vblank_counter = radeon_get_vblank_counter_kms,
529 .enable_vblank = radeon_enable_vblank_kms,
530 .disable_vblank = radeon_disable_vblank_kms,
f5a80209
MK		 531 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
532 .get_scanout_position = radeon_get_crtc_scanoutpos,
771fe6b9
JG		 533#if defined(CONFIG_DEBUG_FS)
534 .debugfs_init = radeon_debugfs_init,
535 .debugfs_cleanup = radeon_debugfs_cleanup,
536#endif
537 .irq_preinstall = radeon_driver_irq_preinstall_kms,
538 .irq_postinstall = radeon_driver_irq_postinstall_kms,
539 .irq_uninstall = radeon_driver_irq_uninstall_kms,
540 .irq_handler = radeon_driver_irq_handler_kms,
771fe6b9 541 .ioctls = radeon_ioctls_kms,
771fe6b9 542 .gem_free_object = radeon_gem_object_free,
721604a1
JG		 543 .gem_open_object = radeon_gem_object_open,
544 .gem_close_object = radeon_gem_object_close,
ff72145b
DA		 545 .dumb_create = radeon_mode_dumb_create,
546 .dumb_map_offset = radeon_mode_dumb_mmap,
43387b37 547 .dumb_destroy = drm_gem_dumb_destroy,
e08e96de 548 .fops = &radeon_driver_kms_fops,
40f5cf99
AD		 549
550 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
551 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1e6d17a5
AP		 552 .gem_prime_export = drm_gem_prime_export,
553 .gem_prime_import = drm_gem_prime_import,
554 .gem_prime_pin = radeon_gem_prime_pin,
280cf211 555 .gem_prime_unpin = radeon_gem_prime_unpin,
1e6d17a5
AP		 556 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
557 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
558 .gem_prime_vmap = radeon_gem_prime_vmap,
559 .gem_prime_vunmap = radeon_gem_prime_vunmap,
40f5cf99 560
771fe6b9
JG		 561 .name = DRIVER_NAME,
562 .desc = DRIVER_DESC,
563 .date = DRIVER_DATE,
564 .major = KMS_DRIVER_MAJOR,
565 .minor = KMS_DRIVER_MINOR,
566 .patchlevel = KMS_DRIVER_PATCHLEVEL,
567};
771fe6b9
JG		 568
569static struct drm_driver *driver;
8410ea3b
DA		 570static struct pci_driver *pdriver;
571
14adc892 572#ifdef CONFIG_DRM_RADEON_UMS
8410ea3b
DA		 573static struct pci_driver radeon_pci_driver = {
574 .name = DRIVER_NAME,
575 .id_table = pciidlist,
576};
14adc892 577#endif
8410ea3b
DA		 578
579static struct pci_driver radeon_kms_pci_driver = {
580 .name = DRIVER_NAME,
581 .id_table = pciidlist,
582 .probe = radeon_pci_probe,
583 .remove = radeon_pci_remove,
7473e830 584 .driver.pm = &radeon_pm_ops,
8410ea3b 585};
771fe6b9 586
1da177e4
LT		 587static int __init radeon_init(void)
588{
e9ced8e0
DA		 589#ifdef CONFIG_VGA_CONSOLE
590 if (vgacon_text_force() && radeon_modeset == -1) {
591 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
592 radeon_modeset = 0;
593 }
594#endif
595 /* set to modesetting by default if not nomodeset */
596 if (radeon_modeset == -1)
597 radeon_modeset = 1;
598
771fe6b9
JG		 599 if (radeon_modeset == 1) {
600 DRM_INFO("radeon kernel modesetting enabled.\n");
601 driver = &kms_driver;
8410ea3b 602 pdriver = &radeon_kms_pci_driver;
771fe6b9
JG		 603 driver->driver_features |= DRIVER_MODESET;
604 driver->num_ioctls = radeon_max_kms_ioctl;
6a9ee8af 605 radeon_register_atpx_handler();
14adc892
CK		 606
607 } else {
608#ifdef CONFIG_DRM_RADEON_UMS
609 DRM_INFO("radeon userspace modesetting enabled.\n");
610 driver = &driver_old;
611 pdriver = &radeon_pci_driver;
612 driver->driver_features &= ~DRIVER_MODESET;
613 driver->num_ioctls = radeon_max_ioctl;
614#else
615 DRM_ERROR("No UMS support in radeon module!\n");
616 return -EINVAL;
617#endif
771fe6b9 618 }
14adc892
CK		 619
620 /* let modprobe override vga console setting */
8410ea3b 621 return drm_pci_init(driver, pdriver);
1da177e4
LT		 622}
623
624static void __exit radeon_exit(void)
625{
8410ea3b 626 drm_pci_exit(driver, pdriver);
6a9ee8af 627 radeon_unregister_atpx_handler();
1da177e4
LT		 628}
629
176f613e 630module_init(radeon_init);
1da177e4
LT		 631module_exit(radeon_exit);
632
b5e89ed5
DA		 633MODULE_AUTHOR(DRIVER_AUTHOR);
634MODULE_DESCRIPTION(DRIVER_DESC);
1da177e4 635MODULE_LICENSE("GPL and additional rights");
Linux kernel - Deliverables
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