[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_drv.c

/**
 * \file radeon_drv.c
 * ATI Radeon driver
 *
 * \author Gareth Hughes <gareth@valinux.com>
 */

/*
 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#include "drmP.h"
#include "drm.h"
#include "radeon_drm.h"
#include "radeon_drv.h"

#include "drm_pciids.h"
#include <linux/console.h>
#include <linux/module.h>


/*
 * KMS wrapper.
 * - 2.0.0 - initial interface
 * - 2.1.0 - add square tiling interface
 * - 2.2.0 - add r6xx/r7xx const buffer support
 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
 * - 2.4.0 - add crtc id query
 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
 *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
 *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
 *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
 *   2.10.0 - fusion 2D tiling
 *   2.11.0 - backend map, initial compute support for the CS checker
 */
#define KMS_DRIVER_MAJOR	2
#define KMS_DRIVER_MINOR	11
#define KMS_DRIVER_PATCHLEVEL	0
int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
int radeon_driver_unload_kms(struct drm_device *dev);
int radeon_driver_firstopen_kms(struct drm_device *dev);
void radeon_driver_lastclose_kms(struct drm_device *dev);
int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
void radeon_driver_postclose_kms(struct drm_device *dev,
				 struct drm_file *file_priv);
void radeon_driver_preclose_kms(struct drm_device *dev,
				struct drm_file *file_priv);
int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
int radeon_resume_kms(struct drm_device *dev);
u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
				    int *max_error,
				    struct timeval *vblank_time,
				    unsigned flags);
void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
			 struct drm_file *file_priv);
int radeon_gem_object_init(struct drm_gem_object *obj);
void radeon_gem_object_free(struct drm_gem_object *obj);
extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
				      int *vpos, int *hpos);
extern struct drm_ioctl_desc radeon_ioctls_kms[];
extern int radeon_max_kms_ioctl;
int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
int radeon_mode_dumb_mmap(struct drm_file *filp,
			  struct drm_device *dev,
			  uint32_t handle, uint64_t *offset_p);
int radeon_mode_dumb_create(struct drm_file *file_priv,
			    struct drm_device *dev,
			    struct drm_mode_create_dumb *args);
int radeon_mode_dumb_destroy(struct drm_file *file_priv,
			     struct drm_device *dev,
			     uint32_t handle);

#if defined(CONFIG_DEBUG_FS)
int radeon_debugfs_init(struct drm_minor *minor);
void radeon_debugfs_cleanup(struct drm_minor *minor);
#endif


int radeon_no_wb;
int radeon_modeset = -1;
int radeon_dynclks = -1;
int radeon_r4xx_atom = 0;
int radeon_agpmode = 0;
int radeon_vram_limit = 0;
int radeon_gart_size = 512; /* default gart size */
int radeon_benchmarking = 0;
int radeon_testing = 0;
int radeon_connector_table = 0;
int radeon_tv = 1;
int radeon_audio = 0;
int radeon_disp_priority = 0;
int radeon_hw_i2c = 0;
int radeon_pcie_gen2 = 0;

MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
module_param_named(no_wb, radeon_no_wb, int, 0444);

MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
module_param_named(modeset, radeon_modeset, int, 0400);

MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
module_param_named(dynclks, radeon_dynclks, int, 0444);

MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);

MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
module_param_named(vramlimit, radeon_vram_limit, int, 0600);

MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
module_param_named(agpmode, radeon_agpmode, int, 0444);

MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32,64, etc)\n");
module_param_named(gartsize, radeon_gart_size, int, 0600);

MODULE_PARM_DESC(benchmark, "Run benchmark");
module_param_named(benchmark, radeon_benchmarking, int, 0444);

MODULE_PARM_DESC(test, "Run tests");
module_param_named(test, radeon_testing, int, 0444);

MODULE_PARM_DESC(connector_table, "Force connector table");
module_param_named(connector_table, radeon_connector_table, int, 0444);

MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
module_param_named(tv, radeon_tv, int, 0444);

MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
module_param_named(audio, radeon_audio, int, 0444);

MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
module_param_named(disp_priority, radeon_disp_priority, int, 0444);

MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);

MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (1 = enable)");
module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);

static int radeon_suspend(struct drm_device *dev, pm_message_t state)
{
	drm_radeon_private_t *dev_priv = dev->dev_private;

	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
		return 0;

	/* Disable *all* interrupts */
	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
		RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
	return 0;
}

static int radeon_resume(struct drm_device *dev)
{
	drm_radeon_private_t *dev_priv = dev->dev_private;

	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
		return 0;

	/* Restore interrupt registers */
	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
		RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
	return 0;
}

static struct pci_device_id pciidlist[] = {
	radeon_PCI_IDS
};

#if defined(CONFIG_DRM_RADEON_KMS)
MODULE_DEVICE_TABLE(pci, pciidlist);
#endif

static struct drm_driver driver_old = {
	.driver_features =
	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
	.load = radeon_driver_load,
	.firstopen = radeon_driver_firstopen,
	.open = radeon_driver_open,
	.preclose = radeon_driver_preclose,
	.postclose = radeon_driver_postclose,
	.lastclose = radeon_driver_lastclose,
	.unload = radeon_driver_unload,
	.suspend = radeon_suspend,
	.resume = radeon_resume,
	.get_vblank_counter = radeon_get_vblank_counter,
	.enable_vblank = radeon_enable_vblank,
	.disable_vblank = radeon_disable_vblank,
	.master_create = radeon_master_create,
	.master_destroy = radeon_master_destroy,
	.irq_preinstall = radeon_driver_irq_preinstall,
	.irq_postinstall = radeon_driver_irq_postinstall,
	.irq_uninstall = radeon_driver_irq_uninstall,
	.irq_handler = radeon_driver_irq_handler,
	.reclaim_buffers = drm_core_reclaim_buffers,
	.ioctls = radeon_ioctls,
	.dma_ioctl = radeon_cp_buffers,
	.fops = {
		 .owner = THIS_MODULE,
		 .open = drm_open,
		 .release = drm_release,
		 .unlocked_ioctl = drm_ioctl,
		 .mmap = drm_mmap,
		 .poll = drm_poll,
		 .fasync = drm_fasync,
		 .read = drm_read,
#ifdef CONFIG_COMPAT
		 .compat_ioctl = radeon_compat_ioctl,
#endif
		 .llseek = noop_llseek,
	},

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
	.date = DRIVER_DATE,
	.major = DRIVER_MAJOR,
	.minor = DRIVER_MINOR,
	.patchlevel = DRIVER_PATCHLEVEL,
};

static struct drm_driver kms_driver;

static void radeon_kick_out_firmware_fb(struct pci_dev *pdev)
{
	struct apertures_struct *ap;
	bool primary = false;

	ap = alloc_apertures(1);
	ap->ranges[0].base = pci_resource_start(pdev, 0);
	ap->ranges[0].size = pci_resource_len(pdev, 0);

#ifdef CONFIG_X86
	primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
#endif
	remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
	kfree(ap);
}

static int __devinit
radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	/* Get rid of things like offb */
	radeon_kick_out_firmware_fb(pdev);

	return drm_get_pci_dev(pdev, ent, &kms_driver);
}

static void
radeon_pci_remove(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);

	drm_put_dev(dev);
}

static int
radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	return radeon_suspend_kms(dev, state);
}

static int
radeon_pci_resume(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	return radeon_resume_kms(dev);
}

static struct drm_driver kms_driver = {
	.driver_features =
	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM,
	.dev_priv_size = 0,
	.load = radeon_driver_load_kms,
	.firstopen = radeon_driver_firstopen_kms,
	.open = radeon_driver_open_kms,
	.preclose = radeon_driver_preclose_kms,
	.postclose = radeon_driver_postclose_kms,
	.lastclose = radeon_driver_lastclose_kms,
	.unload = radeon_driver_unload_kms,
	.suspend = radeon_suspend_kms,
	.resume = radeon_resume_kms,
	.get_vblank_counter = radeon_get_vblank_counter_kms,
	.enable_vblank = radeon_enable_vblank_kms,
	.disable_vblank = radeon_disable_vblank_kms,
	.get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
	.get_scanout_position = radeon_get_crtc_scanoutpos,
#if defined(CONFIG_DEBUG_FS)
	.debugfs_init = radeon_debugfs_init,
	.debugfs_cleanup = radeon_debugfs_cleanup,
#endif
	.irq_preinstall = radeon_driver_irq_preinstall_kms,
	.irq_postinstall = radeon_driver_irq_postinstall_kms,
	.irq_uninstall = radeon_driver_irq_uninstall_kms,
	.irq_handler = radeon_driver_irq_handler_kms,
	.reclaim_buffers = drm_core_reclaim_buffers,
	.ioctls = radeon_ioctls_kms,
	.gem_init_object = radeon_gem_object_init,
	.gem_free_object = radeon_gem_object_free,
	.dma_ioctl = radeon_dma_ioctl_kms,
	.dumb_create = radeon_mode_dumb_create,
	.dumb_map_offset = radeon_mode_dumb_mmap,
	.dumb_destroy = radeon_mode_dumb_destroy,
	.fops = {
		 .owner = THIS_MODULE,
		 .open = drm_open,
		 .release = drm_release,
		 .unlocked_ioctl = drm_ioctl,
		 .mmap = radeon_mmap,
		 .poll = drm_poll,
		 .fasync = drm_fasync,
		 .read = drm_read,
#ifdef CONFIG_COMPAT
		 .compat_ioctl = radeon_kms_compat_ioctl,
#endif
	},

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
	.date = DRIVER_DATE,
	.major = KMS_DRIVER_MAJOR,
	.minor = KMS_DRIVER_MINOR,
	.patchlevel = KMS_DRIVER_PATCHLEVEL,
};

static struct drm_driver *driver;
static struct pci_driver *pdriver;

static struct pci_driver radeon_pci_driver = {
	.name = DRIVER_NAME,
	.id_table = pciidlist,
};

static struct pci_driver radeon_kms_pci_driver = {
	.name = DRIVER_NAME,
	.id_table = pciidlist,
	.probe = radeon_pci_probe,
	.remove = radeon_pci_remove,
	.suspend = radeon_pci_suspend,
	.resume = radeon_pci_resume,
};

static int __init radeon_init(void)
{
	driver = &driver_old;
	pdriver = &radeon_pci_driver;
	driver->num_ioctls = radeon_max_ioctl;
#ifdef CONFIG_VGA_CONSOLE
	if (vgacon_text_force() && radeon_modeset == -1) {
		DRM_INFO("VGACON disable radeon kernel modesetting.\n");
		driver = &driver_old;
		pdriver = &radeon_pci_driver;
		driver->driver_features &= ~DRIVER_MODESET;
		radeon_modeset = 0;
	}
#endif
	/* if enabled by default */
	if (radeon_modeset == -1) {
#ifdef CONFIG_DRM_RADEON_KMS
		DRM_INFO("radeon defaulting to kernel modesetting.\n");
		radeon_modeset = 1;
#else
		DRM_INFO("radeon defaulting to userspace modesetting.\n");
		radeon_modeset = 0;
#endif
	}
	if (radeon_modeset == 1) {
		DRM_INFO("radeon kernel modesetting enabled.\n");
		driver = &kms_driver;
		pdriver = &radeon_kms_pci_driver;
		driver->driver_features |= DRIVER_MODESET;
		driver->num_ioctls = radeon_max_kms_ioctl;
		radeon_register_atpx_handler();
	}
	/* if the vga console setting is enabled still
	 * let modprobe override it */
	return drm_pci_init(driver, pdriver);
}

static void __exit radeon_exit(void)
{
	drm_pci_exit(driver, pdriver);
	radeon_unregister_atpx_handler();
}

module_init(radeon_init);
module_exit(radeon_exit);

MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL and additional rights");
Commit	Line	Data
1da177e4 LT	1	/**
	2	* \file radeon_drv.c
	3	* ATI Radeon driver
	4	*
	5	* \author Gareth Hughes <gareth@valinux.com>
	6	*/
	7
	8	/*
	9	* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
	10	* All Rights Reserved.
	11	*
	12	* Permission is hereby granted, free of charge, to any person obtaining a
	13	* copy of this software and associated documentation files (the "Software"),
	14	* to deal in the Software without restriction, including without limitation
	15	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	16	* and/or sell copies of the Software, and to permit persons to whom the
	17	* Software is furnished to do so, subject to the following conditions:
	18	*
	19	* The above copyright notice and this permission notice (including the next
	20	* paragraph) shall be included in all copies or substantial portions of the
	21	* Software.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	24	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	25	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	26	* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
	27	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	28	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	29	* OTHER DEALINGS IN THE SOFTWARE.
	30	*/
	31
1da177e4 LT	32	#include "drmP.h"
	33	#include "drm.h"
	34	#include "radeon_drm.h"
	35	#include "radeon_drv.h"
	36
	37	#include "drm_pciids.h"
771fe6b9	38	#include <linux/console.h>
e0cd3608	39	#include <linux/module.h>
771fe6b9 JG	40
771fe6b9 JG	41
771fe6b9 JG	42	/*
771fe6b9 JG	43	* KMS wrapper.
0de1a57b DA	44	* - 2.0.0 - initial interface
0de1a57b DA	45	* - 2.1.0 - add square tiling interface
fdb43528	46	* - 2.2.0 - add r6xx/r7xx const buffer support
cae94b0a	47	* - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
bc35afdb	48	* - 2.4.0 - add crtc id query
148a03bc	49	* - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
ab9e1f59	50	* - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
71901cc4	51	* 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
58bbf018	52	* 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
486af189	53	* 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
b8709894 AD	54	* 2.10.0 - fusion 2D tiling
b8709894 AD	55	* 2.11.0 - backend map, initial compute support for the CS checker
771fe6b9 JG	56	*/
771fe6b9 JG	57	#define KMS_DRIVER_MAJOR 2
e55b9422	58	#define KMS_DRIVER_MINOR 11
771fe6b9 JG	59	#define KMS_DRIVER_PATCHLEVEL 0
	60	int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
	61	int radeon_driver_unload_kms(struct drm_device *dev);
	62	int radeon_driver_firstopen_kms(struct drm_device *dev);
	63	void radeon_driver_lastclose_kms(struct drm_device *dev);
	64	int radeon_driver_open_kms(struct drm_device dev, struct drm_file file_priv);
	65	void radeon_driver_postclose_kms(struct drm_device *dev,
	66	struct drm_file *file_priv);
	67	void radeon_driver_preclose_kms(struct drm_device *dev,
	68	struct drm_file *file_priv);
	69	int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
	70	int radeon_resume_kms(struct drm_device *dev);
	71	u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
	72	int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
	73	void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
f5a80209 MK	74	int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
	75	int *max_error,
	76	struct timeval *vblank_time,
	77	unsigned flags);
771fe6b9 JG	78	void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
	79	int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
	80	void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
	81	irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
771fe6b9 JG	82	int radeon_dma_ioctl_kms(struct drm_device dev, void data,
	83	struct drm_file *file_priv);
	84	int radeon_gem_object_init(struct drm_gem_object *obj);
	85	void radeon_gem_object_free(struct drm_gem_object *obj);
f5a80209 MK	86	extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
f5a80209 MK	87	int vpos, int hpos);
771fe6b9 JG	88	extern struct drm_ioctl_desc radeon_ioctls_kms[];
	89	extern int radeon_max_kms_ioctl;
	90	int radeon_mmap(struct file filp, struct vm_area_struct vma);
ff72145b DA	91	int radeon_mode_dumb_mmap(struct drm_file *filp,
	92	struct drm_device *dev,
	93	uint32_t handle, uint64_t *offset_p);
	94	int radeon_mode_dumb_create(struct drm_file *file_priv,
	95	struct drm_device *dev,
	96	struct drm_mode_create_dumb *args);
	97	int radeon_mode_dumb_destroy(struct drm_file *file_priv,
	98	struct drm_device *dev,
	99	uint32_t handle);
	100
771fe6b9 JG	101	#if defined(CONFIG_DEBUG_FS)
	102	int radeon_debugfs_init(struct drm_minor *minor);
	103	void radeon_debugfs_cleanup(struct drm_minor *minor);
	104	#endif
771fe6b9	105
1da177e4	106
689b9d74	107	int radeon_no_wb;
771fe6b9 JG	108	int radeon_modeset = -1;
	109	int radeon_dynclks = -1;
	110	int radeon_r4xx_atom = 0;
	111	int radeon_agpmode = 0;
	112	int radeon_vram_limit = 0;
	113	int radeon_gart_size = 512; /* default gart size */
	114	int radeon_benchmarking = 0;
ecc0b326	115	int radeon_testing = 0;
771fe6b9	116	int radeon_connector_table = 0;
4ce001ab	117	int radeon_tv = 1;
805c2216	118	int radeon_audio = 0;
f46c0120	119	int radeon_disp_priority = 0;
e2b0a8e1	120	int radeon_hw_i2c = 0;
d42dd579	121	int radeon_pcie_gen2 = 0;
689b9d74	122
61a2d07d	123	MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
689b9d74 DA	124	module_param_named(no_wb, radeon_no_wb, int, 0444);
689b9d74 DA	125
771fe6b9 JG	126	MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
	127	module_param_named(modeset, radeon_modeset, int, 0400);
	128
	129	MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
	130	module_param_named(dynclks, radeon_dynclks, int, 0444);
	131
	132	MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
	133	module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
	134
	135	MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
	136	module_param_named(vramlimit, radeon_vram_limit, int, 0600);
	137
	138	MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
	139	module_param_named(agpmode, radeon_agpmode, int, 0444);
	140
	141	MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32,64, etc)\n");
	142	module_param_named(gartsize, radeon_gart_size, int, 0600);
	143
	144	MODULE_PARM_DESC(benchmark, "Run benchmark");
	145	module_param_named(benchmark, radeon_benchmarking, int, 0444);
	146
ecc0b326 MD	147	MODULE_PARM_DESC(test, "Run tests");
	148	module_param_named(test, radeon_testing, int, 0444);
	149
771fe6b9 JG	150	MODULE_PARM_DESC(connector_table, "Force connector table");
771fe6b9 JG	151	module_param_named(connector_table, radeon_connector_table, int, 0444);
4ce001ab DA	152
	153	MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
	154	module_param_named(tv, radeon_tv, int, 0444);
771fe6b9	155
805c2216	156	MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
dafc3bd5 CK	157	module_param_named(audio, radeon_audio, int, 0444);
dafc3bd5 CK	158
f46c0120 AD	159	MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
	160	module_param_named(disp_priority, radeon_disp_priority, int, 0444);
	161
e2b0a8e1 AD	162	MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
	163	module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
	164
d42dd579 AD	165	MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (1 = enable)");
	166	module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
	167
0a3e67a4 JB	168	static int radeon_suspend(struct drm_device *dev, pm_message_t state)
	169	{
	170	drm_radeon_private_t *dev_priv = dev->dev_private;
	171
03efb885 DA	172	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
	173	return 0;
	174
0a3e67a4	175	/* Disable all interrupts */
800b6995	176	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4 JB	177	RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
	178	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
	179	return 0;
	180	}
	181
	182	static int radeon_resume(struct drm_device *dev)
	183	{
	184	drm_radeon_private_t *dev_priv = dev->dev_private;
	185
03efb885 DA	186	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
	187	return 0;
	188
0a3e67a4	189	/* Restore interrupt registers */
800b6995	190	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4 JB	191	RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
	192	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
	193	return 0;
	194	}
	195
1da177e4 LT	196	static struct pci_device_id pciidlist[] = {
	197	radeon_PCI_IDS
	198	};
	199
771fe6b9 JG	200	#if defined(CONFIG_DRM_RADEON_KMS)
	201	MODULE_DEVICE_TABLE(pci, pciidlist);
	202	#endif
	203
	204	static struct drm_driver driver_old = {
b5e89ed5 DA	205	.driver_features =
b5e89ed5 DA	206	DRIVER_USE_AGP \| DRIVER_USE_MTRR \| DRIVER_PCI_DMA \| DRIVER_SG \|
0a3e67a4	207	DRIVER_HAVE_IRQ \| DRIVER_HAVE_DMA \| DRIVER_IRQ_SHARED,
1da177e4	208	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
22eae947 DA	209	.load = radeon_driver_load,
	210	.firstopen = radeon_driver_firstopen,
	211	.open = radeon_driver_open,
	212	.preclose = radeon_driver_preclose,
	213	.postclose = radeon_driver_postclose,
	214	.lastclose = radeon_driver_lastclose,
	215	.unload = radeon_driver_unload,
0a3e67a4 JB	216	.suspend = radeon_suspend,
	217	.resume = radeon_resume,
	218	.get_vblank_counter = radeon_get_vblank_counter,
	219	.enable_vblank = radeon_enable_vblank,
	220	.disable_vblank = radeon_disable_vblank,
60f2ee0b DA	221	.master_create = radeon_master_create,
60f2ee0b DA	222	.master_destroy = radeon_master_destroy,
1da177e4 LT	223	.irq_preinstall = radeon_driver_irq_preinstall,
	224	.irq_postinstall = radeon_driver_irq_postinstall,
	225	.irq_uninstall = radeon_driver_irq_uninstall,
	226	.irq_handler = radeon_driver_irq_handler,
1da177e4	227	.reclaim_buffers = drm_core_reclaim_buffers,
1da177e4 LT	228	.ioctls = radeon_ioctls,
	229	.dma_ioctl = radeon_cp_buffers,
	230	.fops = {
b5e89ed5 DA	231	.owner = THIS_MODULE,
	232	.open = drm_open,
	233	.release = drm_release,
ed8b6704	234	.unlocked_ioctl = drm_ioctl,
b5e89ed5 DA	235	.mmap = drm_mmap,
	236	.poll = drm_poll,
	237	.fasync = drm_fasync,
4fa07bf1	238	.read = drm_read,
9a186645	239	#ifdef CONFIG_COMPAT
b5e89ed5	240	.compat_ioctl = radeon_compat_ioctl,
9a186645	241	#endif
dc880abe	242	.llseek = noop_llseek,
22eae947 DA	243	},
22eae947 DA	244
22eae947 DA	245	.name = DRIVER_NAME,
	246	.desc = DRIVER_DESC,
	247	.date = DRIVER_DATE,
	248	.major = DRIVER_MAJOR,
	249	.minor = DRIVER_MINOR,
	250	.patchlevel = DRIVER_PATCHLEVEL,
1da177e4 LT	251	};
1da177e4 LT	252
771fe6b9 JG	253	static struct drm_driver kms_driver;
771fe6b9 JG	254
a56f7428 BH	255	static void radeon_kick_out_firmware_fb(struct pci_dev *pdev)
	256	{
	257	struct apertures_struct *ap;
	258	bool primary = false;
	259
	260	ap = alloc_apertures(1);
	261	ap->ranges[0].base = pci_resource_start(pdev, 0);
	262	ap->ranges[0].size = pci_resource_len(pdev, 0);
	263
	264	#ifdef CONFIG_X86
	265	primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
	266	#endif
	267	remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
	268	kfree(ap);
	269	}
	270
771fe6b9 JG	271	static int __devinit
	272	radeon_pci_probe(struct pci_dev pdev, const struct pci_device_id ent)
	273	{
a56f7428 BH	274	/* Get rid of things like offb */
	275	radeon_kick_out_firmware_fb(pdev);
	276
dcdb1674	277	return drm_get_pci_dev(pdev, ent, &kms_driver);
771fe6b9 JG	278	}
	279
	280	static void
	281	radeon_pci_remove(struct pci_dev *pdev)
	282	{
	283	struct drm_device *dev = pci_get_drvdata(pdev);
	284
	285	drm_put_dev(dev);
	286	}
	287
	288	static int
	289	radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
	290	{
	291	struct drm_device *dev = pci_get_drvdata(pdev);
	292	return radeon_suspend_kms(dev, state);
	293	}
	294
	295	static int
	296	radeon_pci_resume(struct pci_dev *pdev)
	297	{
	298	struct drm_device *dev = pci_get_drvdata(pdev);
	299	return radeon_resume_kms(dev);
	300	}
	301
	302	static struct drm_driver kms_driver = {
	303	.driver_features =
	304	DRIVER_USE_AGP \| DRIVER_USE_MTRR \| DRIVER_PCI_DMA \| DRIVER_SG \|
	305	DRIVER_HAVE_IRQ \| DRIVER_HAVE_DMA \| DRIVER_IRQ_SHARED \| DRIVER_GEM,
	306	.dev_priv_size = 0,
	307	.load = radeon_driver_load_kms,
	308	.firstopen = radeon_driver_firstopen_kms,
	309	.open = radeon_driver_open_kms,
	310	.preclose = radeon_driver_preclose_kms,
	311	.postclose = radeon_driver_postclose_kms,
	312	.lastclose = radeon_driver_lastclose_kms,
	313	.unload = radeon_driver_unload_kms,
	314	.suspend = radeon_suspend_kms,
	315	.resume = radeon_resume_kms,
	316	.get_vblank_counter = radeon_get_vblank_counter_kms,
	317	.enable_vblank = radeon_enable_vblank_kms,
	318	.disable_vblank = radeon_disable_vblank_kms,
f5a80209 MK	319	.get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
f5a80209 MK	320	.get_scanout_position = radeon_get_crtc_scanoutpos,
771fe6b9 JG	321	#if defined(CONFIG_DEBUG_FS)
	322	.debugfs_init = radeon_debugfs_init,
	323	.debugfs_cleanup = radeon_debugfs_cleanup,
	324	#endif
	325	.irq_preinstall = radeon_driver_irq_preinstall_kms,
	326	.irq_postinstall = radeon_driver_irq_postinstall_kms,
	327	.irq_uninstall = radeon_driver_irq_uninstall_kms,
	328	.irq_handler = radeon_driver_irq_handler_kms,
	329	.reclaim_buffers = drm_core_reclaim_buffers,
771fe6b9 JG	330	.ioctls = radeon_ioctls_kms,
	331	.gem_init_object = radeon_gem_object_init,
	332	.gem_free_object = radeon_gem_object_free,
	333	.dma_ioctl = radeon_dma_ioctl_kms,
ff72145b DA	334	.dumb_create = radeon_mode_dumb_create,
	335	.dumb_map_offset = radeon_mode_dumb_mmap,
	336	.dumb_destroy = radeon_mode_dumb_destroy,
771fe6b9 JG	337	.fops = {
	338	.owner = THIS_MODULE,
	339	.open = drm_open,
	340	.release = drm_release,
ed8b6704	341	.unlocked_ioctl = drm_ioctl,
771fe6b9 JG	342	.mmap = radeon_mmap,
	343	.poll = drm_poll,
	344	.fasync = drm_fasync,
4fa07bf1	345	.read = drm_read,
771fe6b9	346	#ifdef CONFIG_COMPAT
70ba2a37	347	.compat_ioctl = radeon_kms_compat_ioctl,
771fe6b9 JG	348	#endif
	349	},
	350
771fe6b9 JG	351	.name = DRIVER_NAME,
	352	.desc = DRIVER_DESC,
	353	.date = DRIVER_DATE,
	354	.major = KMS_DRIVER_MAJOR,
	355	.minor = KMS_DRIVER_MINOR,
	356	.patchlevel = KMS_DRIVER_PATCHLEVEL,
	357	};
771fe6b9 JG	358
771fe6b9 JG	359	static struct drm_driver *driver;
8410ea3b DA	360	static struct pci_driver *pdriver;
	361
	362	static struct pci_driver radeon_pci_driver = {
	363	.name = DRIVER_NAME,
	364	.id_table = pciidlist,
	365	};
	366
	367	static struct pci_driver radeon_kms_pci_driver = {
	368	.name = DRIVER_NAME,
	369	.id_table = pciidlist,
	370	.probe = radeon_pci_probe,
	371	.remove = radeon_pci_remove,
	372	.suspend = radeon_pci_suspend,
	373	.resume = radeon_pci_resume,
	374	};
771fe6b9	375
1da177e4 LT	376	static int __init radeon_init(void)
1da177e4 LT	377	{
771fe6b9	378	driver = &driver_old;
8410ea3b	379	pdriver = &radeon_pci_driver;
771fe6b9	380	driver->num_ioctls = radeon_max_ioctl;
de05065f DA	381	#ifdef CONFIG_VGA_CONSOLE
	382	if (vgacon_text_force() && radeon_modeset == -1) {
	383	DRM_INFO("VGACON disable radeon kernel modesetting.\n");
	384	driver = &driver_old;
8410ea3b	385	pdriver = &radeon_pci_driver;
de05065f DA	386	driver->driver_features &= ~DRIVER_MODESET;
	387	radeon_modeset = 0;
	388	}
	389	#endif
771fe6b9 JG	390	/* if enabled by default */
771fe6b9 JG	391	if (radeon_modeset == -1) {
a0cdc649 DA	392	#ifdef CONFIG_DRM_RADEON_KMS
a0cdc649 DA	393	DRM_INFO("radeon defaulting to kernel modesetting.\n");
771fe6b9	394	radeon_modeset = 1;
a0cdc649 DA	395	#else
	396	DRM_INFO("radeon defaulting to userspace modesetting.\n");
	397	radeon_modeset = 0;
	398	#endif
771fe6b9 JG	399	}
	400	if (radeon_modeset == 1) {
	401	DRM_INFO("radeon kernel modesetting enabled.\n");
	402	driver = &kms_driver;
8410ea3b	403	pdriver = &radeon_kms_pci_driver;
771fe6b9 JG	404	driver->driver_features \|= DRIVER_MODESET;
771fe6b9 JG	405	driver->num_ioctls = radeon_max_kms_ioctl;
6a9ee8af	406	radeon_register_atpx_handler();
771fe6b9	407	}
771fe6b9 JG	408	/* if the vga console setting is enabled still
771fe6b9 JG	409	* let modprobe override it */
8410ea3b	410	return drm_pci_init(driver, pdriver);
1da177e4 LT	411	}
	412
	413	static void __exit radeon_exit(void)
	414	{
8410ea3b	415	drm_pci_exit(driver, pdriver);
6a9ee8af	416	radeon_unregister_atpx_handler();
1da177e4 LT	417	}
1da177e4 LT	418
176f613e	419	module_init(radeon_init);
1da177e4 LT	420	module_exit(radeon_exit);
1da177e4 LT	421
b5e89ed5 DA	422	MODULE_AUTHOR(DRIVER_AUTHOR);
b5e89ed5 DA	423	MODULE_DESCRIPTION(DRIVER_DESC);
1da177e4	424	MODULE_LICENSE("GPL and additional rights");