Merge remote branch 'intel/drm-intel-next' of ../drm-next into drm-core-next
[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_drv.c
CommitLineData
1da177e4
LT
1/**
2 * \file radeon_drv.c
3 * ATI Radeon driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */
31
1da177e4
LT
32#include "drmP.h"
33#include "drm.h"
34#include "radeon_drm.h"
35#include "radeon_drv.h"
36
37#include "drm_pciids.h"
771fe6b9
JG
38#include <linux/console.h>
39
40
771fe6b9
JG
41/*
42 * KMS wrapper.
0de1a57b
DA
43 * - 2.0.0 - initial interface
44 * - 2.1.0 - add square tiling interface
fdb43528 45 * - 2.2.0 - add r6xx/r7xx const buffer support
cae94b0a 46 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
bc35afdb 47 * - 2.4.0 - add crtc id query
148a03bc 48 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
ab9e1f59 49 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
771fe6b9
JG
50 */
51#define KMS_DRIVER_MAJOR 2
e7aeeba6 52#define KMS_DRIVER_MINOR 6
771fe6b9
JG
53#define KMS_DRIVER_PATCHLEVEL 0
54int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
55int radeon_driver_unload_kms(struct drm_device *dev);
56int radeon_driver_firstopen_kms(struct drm_device *dev);
57void radeon_driver_lastclose_kms(struct drm_device *dev);
58int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
59void radeon_driver_postclose_kms(struct drm_device *dev,
60 struct drm_file *file_priv);
61void radeon_driver_preclose_kms(struct drm_device *dev,
62 struct drm_file *file_priv);
63int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
64int radeon_resume_kms(struct drm_device *dev);
65u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
66int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
67void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
68void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
69int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
70void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
71irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
771fe6b9
JG
72int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
73 struct drm_file *file_priv);
74int radeon_gem_object_init(struct drm_gem_object *obj);
75void radeon_gem_object_free(struct drm_gem_object *obj);
76extern struct drm_ioctl_desc radeon_ioctls_kms[];
77extern int radeon_max_kms_ioctl;
78int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
79#if defined(CONFIG_DEBUG_FS)
80int radeon_debugfs_init(struct drm_minor *minor);
81void radeon_debugfs_cleanup(struct drm_minor *minor);
82#endif
771fe6b9 83
1da177e4 84
689b9d74 85int radeon_no_wb;
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JG
86int radeon_modeset = -1;
87int radeon_dynclks = -1;
88int radeon_r4xx_atom = 0;
89int radeon_agpmode = 0;
90int radeon_vram_limit = 0;
91int radeon_gart_size = 512; /* default gart size */
92int radeon_benchmarking = 0;
ecc0b326 93int radeon_testing = 0;
771fe6b9 94int radeon_connector_table = 0;
4ce001ab 95int radeon_tv = 1;
dafc3bd5 96int radeon_audio = 1;
f46c0120 97int radeon_disp_priority = 0;
e2b0a8e1 98int radeon_hw_i2c = 0;
689b9d74 99
61a2d07d 100MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
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DA
101module_param_named(no_wb, radeon_no_wb, int, 0444);
102
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103MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
104module_param_named(modeset, radeon_modeset, int, 0400);
105
106MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
107module_param_named(dynclks, radeon_dynclks, int, 0444);
108
109MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
110module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
111
112MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
113module_param_named(vramlimit, radeon_vram_limit, int, 0600);
114
115MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
116module_param_named(agpmode, radeon_agpmode, int, 0444);
117
118MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32,64, etc)\n");
119module_param_named(gartsize, radeon_gart_size, int, 0600);
120
121MODULE_PARM_DESC(benchmark, "Run benchmark");
122module_param_named(benchmark, radeon_benchmarking, int, 0444);
123
ecc0b326
MD
124MODULE_PARM_DESC(test, "Run tests");
125module_param_named(test, radeon_testing, int, 0444);
126
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127MODULE_PARM_DESC(connector_table, "Force connector table");
128module_param_named(connector_table, radeon_connector_table, int, 0444);
4ce001ab
DA
129
130MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
131module_param_named(tv, radeon_tv, int, 0444);
771fe6b9 132
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CK
133MODULE_PARM_DESC(audio, "Audio enable (0 = disable)");
134module_param_named(audio, radeon_audio, int, 0444);
135
f46c0120
AD
136MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
137module_param_named(disp_priority, radeon_disp_priority, int, 0444);
138
e2b0a8e1
AD
139MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
140module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
141
0a3e67a4
JB
142static int radeon_suspend(struct drm_device *dev, pm_message_t state)
143{
144 drm_radeon_private_t *dev_priv = dev->dev_private;
145
03efb885
DA
146 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
147 return 0;
148
0a3e67a4 149 /* Disable *all* interrupts */
800b6995 150 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4
JB
151 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
152 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
153 return 0;
154}
155
156static int radeon_resume(struct drm_device *dev)
157{
158 drm_radeon_private_t *dev_priv = dev->dev_private;
159
03efb885
DA
160 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
161 return 0;
162
0a3e67a4 163 /* Restore interrupt registers */
800b6995 164 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4
JB
165 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
166 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
167 return 0;
168}
169
1da177e4
LT
170static struct pci_device_id pciidlist[] = {
171 radeon_PCI_IDS
172};
173
771fe6b9
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174#if defined(CONFIG_DRM_RADEON_KMS)
175MODULE_DEVICE_TABLE(pci, pciidlist);
176#endif
177
178static struct drm_driver driver_old = {
b5e89ed5
DA
179 .driver_features =
180 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
0a3e67a4 181 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
1da177e4 182 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
22eae947
DA
183 .load = radeon_driver_load,
184 .firstopen = radeon_driver_firstopen,
185 .open = radeon_driver_open,
186 .preclose = radeon_driver_preclose,
187 .postclose = radeon_driver_postclose,
188 .lastclose = radeon_driver_lastclose,
189 .unload = radeon_driver_unload,
0a3e67a4
JB
190 .suspend = radeon_suspend,
191 .resume = radeon_resume,
192 .get_vblank_counter = radeon_get_vblank_counter,
193 .enable_vblank = radeon_enable_vblank,
194 .disable_vblank = radeon_disable_vblank,
60f2ee0b
DA
195 .master_create = radeon_master_create,
196 .master_destroy = radeon_master_destroy,
1da177e4
LT
197 .irq_preinstall = radeon_driver_irq_preinstall,
198 .irq_postinstall = radeon_driver_irq_postinstall,
199 .irq_uninstall = radeon_driver_irq_uninstall,
200 .irq_handler = radeon_driver_irq_handler,
1da177e4 201 .reclaim_buffers = drm_core_reclaim_buffers,
1da177e4
LT
202 .ioctls = radeon_ioctls,
203 .dma_ioctl = radeon_cp_buffers,
204 .fops = {
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DA
205 .owner = THIS_MODULE,
206 .open = drm_open,
207 .release = drm_release,
ed8b6704 208 .unlocked_ioctl = drm_ioctl,
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DA
209 .mmap = drm_mmap,
210 .poll = drm_poll,
211 .fasync = drm_fasync,
4fa07bf1 212 .read = drm_read,
9a186645 213#ifdef CONFIG_COMPAT
b5e89ed5 214 .compat_ioctl = radeon_compat_ioctl,
9a186645 215#endif
22eae947
DA
216 },
217
1da177e4 218 .pci_driver = {
22eae947
DA
219 .name = DRIVER_NAME,
220 .id_table = pciidlist,
221 },
222
223 .name = DRIVER_NAME,
224 .desc = DRIVER_DESC,
225 .date = DRIVER_DATE,
226 .major = DRIVER_MAJOR,
227 .minor = DRIVER_MINOR,
228 .patchlevel = DRIVER_PATCHLEVEL,
1da177e4
LT
229};
230
771fe6b9
JG
231static struct drm_driver kms_driver;
232
233static int __devinit
234radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
235{
dcdb1674 236 return drm_get_pci_dev(pdev, ent, &kms_driver);
771fe6b9
JG
237}
238
239static void
240radeon_pci_remove(struct pci_dev *pdev)
241{
242 struct drm_device *dev = pci_get_drvdata(pdev);
243
244 drm_put_dev(dev);
245}
246
247static int
248radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
249{
250 struct drm_device *dev = pci_get_drvdata(pdev);
251 return radeon_suspend_kms(dev, state);
252}
253
254static int
255radeon_pci_resume(struct pci_dev *pdev)
256{
257 struct drm_device *dev = pci_get_drvdata(pdev);
258 return radeon_resume_kms(dev);
259}
260
261static struct drm_driver kms_driver = {
262 .driver_features =
263 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
264 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM,
265 .dev_priv_size = 0,
266 .load = radeon_driver_load_kms,
267 .firstopen = radeon_driver_firstopen_kms,
268 .open = radeon_driver_open_kms,
269 .preclose = radeon_driver_preclose_kms,
270 .postclose = radeon_driver_postclose_kms,
271 .lastclose = radeon_driver_lastclose_kms,
272 .unload = radeon_driver_unload_kms,
273 .suspend = radeon_suspend_kms,
274 .resume = radeon_resume_kms,
275 .get_vblank_counter = radeon_get_vblank_counter_kms,
276 .enable_vblank = radeon_enable_vblank_kms,
277 .disable_vblank = radeon_disable_vblank_kms,
771fe6b9
JG
278#if defined(CONFIG_DEBUG_FS)
279 .debugfs_init = radeon_debugfs_init,
280 .debugfs_cleanup = radeon_debugfs_cleanup,
281#endif
282 .irq_preinstall = radeon_driver_irq_preinstall_kms,
283 .irq_postinstall = radeon_driver_irq_postinstall_kms,
284 .irq_uninstall = radeon_driver_irq_uninstall_kms,
285 .irq_handler = radeon_driver_irq_handler_kms,
286 .reclaim_buffers = drm_core_reclaim_buffers,
771fe6b9
JG
287 .ioctls = radeon_ioctls_kms,
288 .gem_init_object = radeon_gem_object_init,
289 .gem_free_object = radeon_gem_object_free,
290 .dma_ioctl = radeon_dma_ioctl_kms,
291 .fops = {
292 .owner = THIS_MODULE,
293 .open = drm_open,
294 .release = drm_release,
ed8b6704 295 .unlocked_ioctl = drm_ioctl,
771fe6b9
JG
296 .mmap = radeon_mmap,
297 .poll = drm_poll,
298 .fasync = drm_fasync,
4fa07bf1 299 .read = drm_read,
771fe6b9 300#ifdef CONFIG_COMPAT
70ba2a37 301 .compat_ioctl = radeon_kms_compat_ioctl,
771fe6b9
JG
302#endif
303 },
304
305 .pci_driver = {
306 .name = DRIVER_NAME,
307 .id_table = pciidlist,
308 .probe = radeon_pci_probe,
309 .remove = radeon_pci_remove,
310 .suspend = radeon_pci_suspend,
311 .resume = radeon_pci_resume,
312 },
313
314 .name = DRIVER_NAME,
315 .desc = DRIVER_DESC,
316 .date = DRIVER_DATE,
317 .major = KMS_DRIVER_MAJOR,
318 .minor = KMS_DRIVER_MINOR,
319 .patchlevel = KMS_DRIVER_PATCHLEVEL,
320};
771fe6b9
JG
321
322static struct drm_driver *driver;
323
1da177e4
LT
324static int __init radeon_init(void)
325{
771fe6b9
JG
326 driver = &driver_old;
327 driver->num_ioctls = radeon_max_ioctl;
de05065f
DA
328#ifdef CONFIG_VGA_CONSOLE
329 if (vgacon_text_force() && radeon_modeset == -1) {
330 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
331 driver = &driver_old;
332 driver->driver_features &= ~DRIVER_MODESET;
333 radeon_modeset = 0;
334 }
335#endif
771fe6b9
JG
336 /* if enabled by default */
337 if (radeon_modeset == -1) {
a0cdc649
DA
338#ifdef CONFIG_DRM_RADEON_KMS
339 DRM_INFO("radeon defaulting to kernel modesetting.\n");
771fe6b9 340 radeon_modeset = 1;
a0cdc649
DA
341#else
342 DRM_INFO("radeon defaulting to userspace modesetting.\n");
343 radeon_modeset = 0;
344#endif
771fe6b9
JG
345 }
346 if (radeon_modeset == 1) {
347 DRM_INFO("radeon kernel modesetting enabled.\n");
348 driver = &kms_driver;
349 driver->driver_features |= DRIVER_MODESET;
350 driver->num_ioctls = radeon_max_kms_ioctl;
6a9ee8af 351 radeon_register_atpx_handler();
771fe6b9 352 }
771fe6b9
JG
353 /* if the vga console setting is enabled still
354 * let modprobe override it */
771fe6b9 355 return drm_init(driver);
1da177e4
LT
356}
357
358static void __exit radeon_exit(void)
359{
771fe6b9 360 drm_exit(driver);
6a9ee8af 361 radeon_unregister_atpx_handler();
1da177e4
LT
362}
363
176f613e 364module_init(radeon_init);
1da177e4
LT
365module_exit(radeon_exit);
366
b5e89ed5
DA
367MODULE_AUTHOR(DRIVER_AUTHOR);
368MODULE_DESCRIPTION(DRIVER_DESC);
1da177e4 369MODULE_LICENSE("GPL and additional rights");
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