Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /** |
2 | * \file radeon_drv.c | |
3 | * ATI Radeon driver | |
4 | * | |
5 | * \author Gareth Hughes <gareth@valinux.com> | |
6 | */ | |
7 | ||
8 | /* | |
9 | * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. | |
10 | * All Rights Reserved. | |
11 | * | |
12 | * Permission is hereby granted, free of charge, to any person obtaining a | |
13 | * copy of this software and associated documentation files (the "Software"), | |
14 | * to deal in the Software without restriction, including without limitation | |
15 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
16 | * and/or sell copies of the Software, and to permit persons to whom the | |
17 | * Software is furnished to do so, subject to the following conditions: | |
18 | * | |
19 | * The above copyright notice and this permission notice (including the next | |
20 | * paragraph) shall be included in all copies or substantial portions of the | |
21 | * Software. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
24 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
25 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
26 | * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
27 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
28 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
29 | * OTHER DEALINGS IN THE SOFTWARE. | |
30 | */ | |
31 | ||
1da177e4 LT |
32 | #include "drmP.h" |
33 | #include "drm.h" | |
34 | #include "radeon_drm.h" | |
35 | #include "radeon_drv.h" | |
36 | ||
37 | #include "drm_pciids.h" | |
771fe6b9 JG |
38 | #include <linux/console.h> |
39 | ||
40 | ||
771fe6b9 JG |
41 | /* |
42 | * KMS wrapper. | |
0de1a57b DA |
43 | * - 2.0.0 - initial interface |
44 | * - 2.1.0 - add square tiling interface | |
fdb43528 | 45 | * - 2.2.0 - add r6xx/r7xx const buffer support |
771fe6b9 JG |
46 | */ |
47 | #define KMS_DRIVER_MAJOR 2 | |
fdb43528 | 48 | #define KMS_DRIVER_MINOR 2 |
771fe6b9 JG |
49 | #define KMS_DRIVER_PATCHLEVEL 0 |
50 | int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); | |
51 | int radeon_driver_unload_kms(struct drm_device *dev); | |
52 | int radeon_driver_firstopen_kms(struct drm_device *dev); | |
53 | void radeon_driver_lastclose_kms(struct drm_device *dev); | |
54 | int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); | |
55 | void radeon_driver_postclose_kms(struct drm_device *dev, | |
56 | struct drm_file *file_priv); | |
57 | void radeon_driver_preclose_kms(struct drm_device *dev, | |
58 | struct drm_file *file_priv); | |
59 | int radeon_suspend_kms(struct drm_device *dev, pm_message_t state); | |
60 | int radeon_resume_kms(struct drm_device *dev); | |
61 | u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc); | |
62 | int radeon_enable_vblank_kms(struct drm_device *dev, int crtc); | |
63 | void radeon_disable_vblank_kms(struct drm_device *dev, int crtc); | |
64 | void radeon_driver_irq_preinstall_kms(struct drm_device *dev); | |
65 | int radeon_driver_irq_postinstall_kms(struct drm_device *dev); | |
66 | void radeon_driver_irq_uninstall_kms(struct drm_device *dev); | |
67 | irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS); | |
771fe6b9 JG |
68 | int radeon_dma_ioctl_kms(struct drm_device *dev, void *data, |
69 | struct drm_file *file_priv); | |
70 | int radeon_gem_object_init(struct drm_gem_object *obj); | |
71 | void radeon_gem_object_free(struct drm_gem_object *obj); | |
72 | extern struct drm_ioctl_desc radeon_ioctls_kms[]; | |
73 | extern int radeon_max_kms_ioctl; | |
74 | int radeon_mmap(struct file *filp, struct vm_area_struct *vma); | |
75 | #if defined(CONFIG_DEBUG_FS) | |
76 | int radeon_debugfs_init(struct drm_minor *minor); | |
77 | void radeon_debugfs_cleanup(struct drm_minor *minor); | |
78 | #endif | |
771fe6b9 | 79 | |
1da177e4 | 80 | |
689b9d74 | 81 | int radeon_no_wb; |
771fe6b9 JG |
82 | int radeon_modeset = -1; |
83 | int radeon_dynclks = -1; | |
84 | int radeon_r4xx_atom = 0; | |
85 | int radeon_agpmode = 0; | |
86 | int radeon_vram_limit = 0; | |
87 | int radeon_gart_size = 512; /* default gart size */ | |
88 | int radeon_benchmarking = 0; | |
ecc0b326 | 89 | int radeon_testing = 0; |
771fe6b9 | 90 | int radeon_connector_table = 0; |
4ce001ab | 91 | int radeon_tv = 1; |
383be5d1 | 92 | int radeon_new_pll = -1; |
c913e23a | 93 | int radeon_dynpm = -1; |
dafc3bd5 | 94 | int radeon_audio = 1; |
689b9d74 | 95 | |
61a2d07d | 96 | MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); |
689b9d74 DA |
97 | module_param_named(no_wb, radeon_no_wb, int, 0444); |
98 | ||
771fe6b9 JG |
99 | MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); |
100 | module_param_named(modeset, radeon_modeset, int, 0400); | |
101 | ||
102 | MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks"); | |
103 | module_param_named(dynclks, radeon_dynclks, int, 0444); | |
104 | ||
105 | MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx"); | |
106 | module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); | |
107 | ||
108 | MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing"); | |
109 | module_param_named(vramlimit, radeon_vram_limit, int, 0600); | |
110 | ||
111 | MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); | |
112 | module_param_named(agpmode, radeon_agpmode, int, 0444); | |
113 | ||
114 | MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32,64, etc)\n"); | |
115 | module_param_named(gartsize, radeon_gart_size, int, 0600); | |
116 | ||
117 | MODULE_PARM_DESC(benchmark, "Run benchmark"); | |
118 | module_param_named(benchmark, radeon_benchmarking, int, 0444); | |
119 | ||
ecc0b326 MD |
120 | MODULE_PARM_DESC(test, "Run tests"); |
121 | module_param_named(test, radeon_testing, int, 0444); | |
122 | ||
771fe6b9 JG |
123 | MODULE_PARM_DESC(connector_table, "Force connector table"); |
124 | module_param_named(connector_table, radeon_connector_table, int, 0444); | |
4ce001ab DA |
125 | |
126 | MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); | |
127 | module_param_named(tv, radeon_tv, int, 0444); | |
771fe6b9 | 128 | |
383be5d1 | 129 | MODULE_PARM_DESC(new_pll, "Select new PLL code"); |
b27b6375 AD |
130 | module_param_named(new_pll, radeon_new_pll, int, 0444); |
131 | ||
c913e23a RM |
132 | MODULE_PARM_DESC(dynpm, "Disable/Enable dynamic power management (1 = enable)"); |
133 | module_param_named(dynpm, radeon_dynpm, int, 0444); | |
134 | ||
dafc3bd5 CK |
135 | MODULE_PARM_DESC(audio, "Audio enable (0 = disable)"); |
136 | module_param_named(audio, radeon_audio, int, 0444); | |
137 | ||
0a3e67a4 JB |
138 | static int radeon_suspend(struct drm_device *dev, pm_message_t state) |
139 | { | |
140 | drm_radeon_private_t *dev_priv = dev->dev_private; | |
141 | ||
03efb885 DA |
142 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) |
143 | return 0; | |
144 | ||
0a3e67a4 | 145 | /* Disable *all* interrupts */ |
800b6995 | 146 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) |
0a3e67a4 JB |
147 | RADEON_WRITE(R500_DxMODE_INT_MASK, 0); |
148 | RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); | |
149 | return 0; | |
150 | } | |
151 | ||
152 | static int radeon_resume(struct drm_device *dev) | |
153 | { | |
154 | drm_radeon_private_t *dev_priv = dev->dev_private; | |
155 | ||
03efb885 DA |
156 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) |
157 | return 0; | |
158 | ||
0a3e67a4 | 159 | /* Restore interrupt registers */ |
800b6995 | 160 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) |
0a3e67a4 JB |
161 | RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); |
162 | RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); | |
163 | return 0; | |
164 | } | |
165 | ||
1da177e4 LT |
166 | static struct pci_device_id pciidlist[] = { |
167 | radeon_PCI_IDS | |
168 | }; | |
169 | ||
771fe6b9 JG |
170 | #if defined(CONFIG_DRM_RADEON_KMS) |
171 | MODULE_DEVICE_TABLE(pci, pciidlist); | |
172 | #endif | |
173 | ||
174 | static struct drm_driver driver_old = { | |
b5e89ed5 DA |
175 | .driver_features = |
176 | DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG | | |
0a3e67a4 | 177 | DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED, |
1da177e4 | 178 | .dev_priv_size = sizeof(drm_radeon_buf_priv_t), |
22eae947 DA |
179 | .load = radeon_driver_load, |
180 | .firstopen = radeon_driver_firstopen, | |
181 | .open = radeon_driver_open, | |
182 | .preclose = radeon_driver_preclose, | |
183 | .postclose = radeon_driver_postclose, | |
184 | .lastclose = radeon_driver_lastclose, | |
185 | .unload = radeon_driver_unload, | |
0a3e67a4 JB |
186 | .suspend = radeon_suspend, |
187 | .resume = radeon_resume, | |
188 | .get_vblank_counter = radeon_get_vblank_counter, | |
189 | .enable_vblank = radeon_enable_vblank, | |
190 | .disable_vblank = radeon_disable_vblank, | |
60f2ee0b DA |
191 | .master_create = radeon_master_create, |
192 | .master_destroy = radeon_master_destroy, | |
1da177e4 LT |
193 | .irq_preinstall = radeon_driver_irq_preinstall, |
194 | .irq_postinstall = radeon_driver_irq_postinstall, | |
195 | .irq_uninstall = radeon_driver_irq_uninstall, | |
196 | .irq_handler = radeon_driver_irq_handler, | |
1da177e4 LT |
197 | .reclaim_buffers = drm_core_reclaim_buffers, |
198 | .get_map_ofs = drm_core_get_map_ofs, | |
199 | .get_reg_ofs = drm_core_get_reg_ofs, | |
1da177e4 LT |
200 | .ioctls = radeon_ioctls, |
201 | .dma_ioctl = radeon_cp_buffers, | |
202 | .fops = { | |
b5e89ed5 DA |
203 | .owner = THIS_MODULE, |
204 | .open = drm_open, | |
205 | .release = drm_release, | |
ed8b6704 | 206 | .unlocked_ioctl = drm_ioctl, |
b5e89ed5 DA |
207 | .mmap = drm_mmap, |
208 | .poll = drm_poll, | |
209 | .fasync = drm_fasync, | |
9a186645 | 210 | #ifdef CONFIG_COMPAT |
b5e89ed5 | 211 | .compat_ioctl = radeon_compat_ioctl, |
9a186645 | 212 | #endif |
22eae947 DA |
213 | }, |
214 | ||
1da177e4 | 215 | .pci_driver = { |
22eae947 DA |
216 | .name = DRIVER_NAME, |
217 | .id_table = pciidlist, | |
218 | }, | |
219 | ||
220 | .name = DRIVER_NAME, | |
221 | .desc = DRIVER_DESC, | |
222 | .date = DRIVER_DATE, | |
223 | .major = DRIVER_MAJOR, | |
224 | .minor = DRIVER_MINOR, | |
225 | .patchlevel = DRIVER_PATCHLEVEL, | |
1da177e4 LT |
226 | }; |
227 | ||
771fe6b9 JG |
228 | static struct drm_driver kms_driver; |
229 | ||
230 | static int __devinit | |
231 | radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |
232 | { | |
233 | return drm_get_dev(pdev, ent, &kms_driver); | |
234 | } | |
235 | ||
236 | static void | |
237 | radeon_pci_remove(struct pci_dev *pdev) | |
238 | { | |
239 | struct drm_device *dev = pci_get_drvdata(pdev); | |
240 | ||
241 | drm_put_dev(dev); | |
242 | } | |
243 | ||
244 | static int | |
245 | radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state) | |
246 | { | |
247 | struct drm_device *dev = pci_get_drvdata(pdev); | |
248 | return radeon_suspend_kms(dev, state); | |
249 | } | |
250 | ||
251 | static int | |
252 | radeon_pci_resume(struct pci_dev *pdev) | |
253 | { | |
254 | struct drm_device *dev = pci_get_drvdata(pdev); | |
255 | return radeon_resume_kms(dev); | |
256 | } | |
257 | ||
258 | static struct drm_driver kms_driver = { | |
259 | .driver_features = | |
260 | DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG | | |
261 | DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM, | |
262 | .dev_priv_size = 0, | |
263 | .load = radeon_driver_load_kms, | |
264 | .firstopen = radeon_driver_firstopen_kms, | |
265 | .open = radeon_driver_open_kms, | |
266 | .preclose = radeon_driver_preclose_kms, | |
267 | .postclose = radeon_driver_postclose_kms, | |
268 | .lastclose = radeon_driver_lastclose_kms, | |
269 | .unload = radeon_driver_unload_kms, | |
270 | .suspend = radeon_suspend_kms, | |
271 | .resume = radeon_resume_kms, | |
272 | .get_vblank_counter = radeon_get_vblank_counter_kms, | |
273 | .enable_vblank = radeon_enable_vblank_kms, | |
274 | .disable_vblank = radeon_disable_vblank_kms, | |
771fe6b9 JG |
275 | #if defined(CONFIG_DEBUG_FS) |
276 | .debugfs_init = radeon_debugfs_init, | |
277 | .debugfs_cleanup = radeon_debugfs_cleanup, | |
278 | #endif | |
279 | .irq_preinstall = radeon_driver_irq_preinstall_kms, | |
280 | .irq_postinstall = radeon_driver_irq_postinstall_kms, | |
281 | .irq_uninstall = radeon_driver_irq_uninstall_kms, | |
282 | .irq_handler = radeon_driver_irq_handler_kms, | |
283 | .reclaim_buffers = drm_core_reclaim_buffers, | |
284 | .get_map_ofs = drm_core_get_map_ofs, | |
285 | .get_reg_ofs = drm_core_get_reg_ofs, | |
286 | .ioctls = radeon_ioctls_kms, | |
287 | .gem_init_object = radeon_gem_object_init, | |
288 | .gem_free_object = radeon_gem_object_free, | |
289 | .dma_ioctl = radeon_dma_ioctl_kms, | |
290 | .fops = { | |
291 | .owner = THIS_MODULE, | |
292 | .open = drm_open, | |
293 | .release = drm_release, | |
ed8b6704 | 294 | .unlocked_ioctl = drm_ioctl, |
771fe6b9 JG |
295 | .mmap = radeon_mmap, |
296 | .poll = drm_poll, | |
297 | .fasync = drm_fasync, | |
298 | #ifdef CONFIG_COMPAT | |
70ba2a37 | 299 | .compat_ioctl = radeon_kms_compat_ioctl, |
771fe6b9 JG |
300 | #endif |
301 | }, | |
302 | ||
303 | .pci_driver = { | |
304 | .name = DRIVER_NAME, | |
305 | .id_table = pciidlist, | |
306 | .probe = radeon_pci_probe, | |
307 | .remove = radeon_pci_remove, | |
308 | .suspend = radeon_pci_suspend, | |
309 | .resume = radeon_pci_resume, | |
310 | }, | |
311 | ||
312 | .name = DRIVER_NAME, | |
313 | .desc = DRIVER_DESC, | |
314 | .date = DRIVER_DATE, | |
315 | .major = KMS_DRIVER_MAJOR, | |
316 | .minor = KMS_DRIVER_MINOR, | |
317 | .patchlevel = KMS_DRIVER_PATCHLEVEL, | |
318 | }; | |
771fe6b9 JG |
319 | |
320 | static struct drm_driver *driver; | |
321 | ||
1da177e4 LT |
322 | static int __init radeon_init(void) |
323 | { | |
771fe6b9 JG |
324 | driver = &driver_old; |
325 | driver->num_ioctls = radeon_max_ioctl; | |
de05065f DA |
326 | #ifdef CONFIG_VGA_CONSOLE |
327 | if (vgacon_text_force() && radeon_modeset == -1) { | |
328 | DRM_INFO("VGACON disable radeon kernel modesetting.\n"); | |
329 | driver = &driver_old; | |
330 | driver->driver_features &= ~DRIVER_MODESET; | |
331 | radeon_modeset = 0; | |
332 | } | |
333 | #endif | |
771fe6b9 JG |
334 | /* if enabled by default */ |
335 | if (radeon_modeset == -1) { | |
a0cdc649 DA |
336 | #ifdef CONFIG_DRM_RADEON_KMS |
337 | DRM_INFO("radeon defaulting to kernel modesetting.\n"); | |
771fe6b9 | 338 | radeon_modeset = 1; |
a0cdc649 DA |
339 | #else |
340 | DRM_INFO("radeon defaulting to userspace modesetting.\n"); | |
341 | radeon_modeset = 0; | |
342 | #endif | |
771fe6b9 JG |
343 | } |
344 | if (radeon_modeset == 1) { | |
345 | DRM_INFO("radeon kernel modesetting enabled.\n"); | |
346 | driver = &kms_driver; | |
347 | driver->driver_features |= DRIVER_MODESET; | |
348 | driver->num_ioctls = radeon_max_kms_ioctl; | |
6a9ee8af | 349 | radeon_register_atpx_handler(); |
771fe6b9 | 350 | } |
771fe6b9 JG |
351 | /* if the vga console setting is enabled still |
352 | * let modprobe override it */ | |
771fe6b9 | 353 | return drm_init(driver); |
1da177e4 LT |
354 | } |
355 | ||
356 | static void __exit radeon_exit(void) | |
357 | { | |
771fe6b9 | 358 | drm_exit(driver); |
6a9ee8af | 359 | radeon_unregister_atpx_handler(); |
1da177e4 LT |
360 | } |
361 | ||
176f613e | 362 | module_init(radeon_init); |
1da177e4 LT |
363 | module_exit(radeon_exit); |
364 | ||
b5e89ed5 DA |
365 | MODULE_AUTHOR(DRIVER_AUTHOR); |
366 | MODULE_DESCRIPTION(DRIVER_DESC); | |
1da177e4 | 367 | MODULE_LICENSE("GPL and additional rights"); |