Merge tag 'master-2014-11-25' of git://git.kernel.org/pub/scm/linux/kernel/git/linvil...
[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_encoders.c
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1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
760285e7
DH
26#include <drm/drmP.h>
27#include <drm/drm_crtc_helper.h>
28#include <drm/radeon_drm.h>
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29#include "radeon.h"
30#include "atom.h"
31
f3728734
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32extern void
33radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder,
34 struct drm_connector *drm_connector);
35extern void
36radeon_atom_backlight_init(struct radeon_encoder *radeon_encoder,
37 struct drm_connector *drm_connector);
38
39
1f3b6a45
DA
40static uint32_t radeon_encoder_clones(struct drm_encoder *encoder)
41{
42 struct drm_device *dev = encoder->dev;
43 struct radeon_device *rdev = dev->dev_private;
44 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
45 struct drm_encoder *clone_encoder;
46 uint32_t index_mask = 0;
47 int count;
48
49 /* DIG routing gets problematic */
50 if (rdev->family >= CHIP_R600)
51 return index_mask;
52 /* LVDS/TV are too wacky */
53 if (radeon_encoder->devices & ATOM_DEVICE_LCD_SUPPORT)
54 return index_mask;
55 /* DVO requires 2x ppll clocks depending on tmds chip */
56 if (radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT)
57 return index_mask;
bcc1c2a1 58
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59 count = -1;
60 list_for_each_entry(clone_encoder, &dev->mode_config.encoder_list, head) {
61 struct radeon_encoder *radeon_clone = to_radeon_encoder(clone_encoder);
62 count++;
63
64 if (clone_encoder == encoder)
65 continue;
66 if (radeon_clone->devices & (ATOM_DEVICE_LCD_SUPPORT))
67 continue;
68 if (radeon_clone->devices & ATOM_DEVICE_DFP2_SUPPORT)
69 continue;
70 else
71 index_mask |= (1 << count);
72 }
73 return index_mask;
74}
75
76void radeon_setup_encoder_clones(struct drm_device *dev)
77{
78 struct drm_encoder *encoder;
79
80 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
81 encoder->possible_clones = radeon_encoder_clones(encoder);
82 }
83}
84
771fe6b9 85uint32_t
5137ee94 86radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, uint8_t dac)
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87{
88 struct radeon_device *rdev = dev->dev_private;
89 uint32_t ret = 0;
90
91 switch (supported_device) {
92 case ATOM_DEVICE_CRT1_SUPPORT:
93 case ATOM_DEVICE_TV1_SUPPORT:
94 case ATOM_DEVICE_TV2_SUPPORT:
95 case ATOM_DEVICE_CRT2_SUPPORT:
96 case ATOM_DEVICE_CV_SUPPORT:
97 switch (dac) {
98 case 1: /* dac a */
99 if ((rdev->family == CHIP_RS300) ||
100 (rdev->family == CHIP_RS400) ||
101 (rdev->family == CHIP_RS480))
5137ee94 102 ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
771fe6b9 103 else if (ASIC_IS_AVIVO(rdev))
5137ee94 104 ret = ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1;
771fe6b9 105 else
5137ee94 106 ret = ENCODER_INTERNAL_DAC1_ENUM_ID1;
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107 break;
108 case 2: /* dac b */
109 if (ASIC_IS_AVIVO(rdev))
5137ee94 110 ret = ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1;
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111 else {
112 /*if (rdev->family == CHIP_R200)
5137ee94 113 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
771fe6b9 114 else*/
5137ee94 115 ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
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116 }
117 break;
118 case 3: /* external dac */
119 if (ASIC_IS_AVIVO(rdev))
5137ee94 120 ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
771fe6b9 121 else
5137ee94 122 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
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123 break;
124 }
125 break;
126 case ATOM_DEVICE_LCD1_SUPPORT:
127 if (ASIC_IS_AVIVO(rdev))
5137ee94 128 ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
771fe6b9 129 else
5137ee94 130 ret = ENCODER_INTERNAL_LVDS_ENUM_ID1;
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131 break;
132 case ATOM_DEVICE_DFP1_SUPPORT:
133 if ((rdev->family == CHIP_RS300) ||
134 (rdev->family == CHIP_RS400) ||
135 (rdev->family == CHIP_RS480))
5137ee94 136 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
771fe6b9 137 else if (ASIC_IS_AVIVO(rdev))
5137ee94 138 ret = ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1;
771fe6b9 139 else
5137ee94 140 ret = ENCODER_INTERNAL_TMDS1_ENUM_ID1;
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141 break;
142 case ATOM_DEVICE_LCD2_SUPPORT:
143 case ATOM_DEVICE_DFP2_SUPPORT:
144 if ((rdev->family == CHIP_RS600) ||
145 (rdev->family == CHIP_RS690) ||
146 (rdev->family == CHIP_RS740))
5137ee94 147 ret = ENCODER_INTERNAL_DDI_ENUM_ID1;
771fe6b9 148 else if (ASIC_IS_AVIVO(rdev))
5137ee94 149 ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
771fe6b9 150 else
5137ee94 151 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
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152 break;
153 case ATOM_DEVICE_DFP3_SUPPORT:
5137ee94 154 ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
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155 break;
156 }
157
158 return ret;
159}
160
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161static void radeon_encoder_add_backlight(struct radeon_encoder *radeon_encoder,
162 struct drm_connector *connector)
163{
164 struct drm_device *dev = radeon_encoder->base.dev;
165 struct radeon_device *rdev = dev->dev_private;
166 bool use_bl = false;
167
168 if (!(radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)))
169 return;
170
171 if (radeon_backlight == 0) {
172 return;
173 } else if (radeon_backlight == 1) {
174 use_bl = true;
175 } else if (radeon_backlight == -1) {
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176 /* Quirks */
177 /* Amilo Xi 2550 only works with acpi bl */
178 if ((rdev->pdev->device == 0x9583) &&
179 (rdev->pdev->subsystem_vendor == 0x1734) &&
180 (rdev->pdev->subsystem_device == 0x1107))
181 use_bl = false;
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182 /* disable native backlight control on older asics */
183 else if (rdev->family < CHIP_R600)
184 use_bl = false;
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185 else
186 use_bl = true;
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187 }
188
189 if (use_bl) {
190 if (rdev->is_atom_bios)
191 radeon_atom_backlight_init(radeon_encoder, connector);
192 else
193 radeon_legacy_backlight_init(radeon_encoder, connector);
194 rdev->mode_info.bl_encoder = radeon_encoder;
195 }
196}
197
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198void
199radeon_link_encoder_connector(struct drm_device *dev)
200{
201 struct drm_connector *connector;
202 struct radeon_connector *radeon_connector;
203 struct drm_encoder *encoder;
204 struct radeon_encoder *radeon_encoder;
205
206 /* walk the list and link encoders to connectors */
207 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
208 radeon_connector = to_radeon_connector(connector);
209 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
210 radeon_encoder = to_radeon_encoder(encoder);
f3728734 211 if (radeon_encoder->devices & radeon_connector->devices) {
771fe6b9 212 drm_mode_connector_attach_encoder(connector, encoder);
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213 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
214 radeon_encoder_add_backlight(radeon_encoder, connector);
f3728734 215 }
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216 }
217 }
218}
219
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220void radeon_encoder_set_active_device(struct drm_encoder *encoder)
221{
222 struct drm_device *dev = encoder->dev;
223 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
224 struct drm_connector *connector;
225
226 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
227 if (connector->encoder == encoder) {
228 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
229 radeon_encoder->active_device = radeon_encoder->devices & radeon_connector->devices;
d9fdaafb 230 DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
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231 radeon_encoder->active_device, radeon_encoder->devices,
232 radeon_connector->devices, encoder->encoder_type);
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233 }
234 }
235}
236
5b1714d3 237struct drm_connector *
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238radeon_get_connector_for_encoder(struct drm_encoder *encoder)
239{
240 struct drm_device *dev = encoder->dev;
241 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
242 struct drm_connector *connector;
243 struct radeon_connector *radeon_connector;
244
245 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
246 radeon_connector = to_radeon_connector(connector);
43c33ed8 247 if (radeon_encoder->active_device & radeon_connector->devices)
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248 return connector;
249 }
250 return NULL;
251}
252
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253struct drm_connector *
254radeon_get_connector_for_encoder_init(struct drm_encoder *encoder)
255{
256 struct drm_device *dev = encoder->dev;
257 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
258 struct drm_connector *connector;
259 struct radeon_connector *radeon_connector;
260
261 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
262 radeon_connector = to_radeon_connector(connector);
263 if (radeon_encoder->devices & radeon_connector->devices)
264 return connector;
265 }
266 return NULL;
267}
268
3f03ced8 269struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder)
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270{
271 struct drm_device *dev = encoder->dev;
272 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
273 struct drm_encoder *other_encoder;
274 struct radeon_encoder *other_radeon_encoder;
275
276 if (radeon_encoder->is_ext_encoder)
277 return NULL;
278
279 list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) {
280 if (other_encoder == encoder)
281 continue;
282 other_radeon_encoder = to_radeon_encoder(other_encoder);
283 if (other_radeon_encoder->is_ext_encoder &&
284 (radeon_encoder->devices & other_radeon_encoder->devices))
285 return other_encoder;
286 }
287 return NULL;
288}
289
1d33e1fc 290u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder)
d7fa8bb3 291{
3f03ced8 292 struct drm_encoder *other_encoder = radeon_get_external_encoder(encoder);
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293
294 if (other_encoder) {
295 struct radeon_encoder *radeon_encoder = to_radeon_encoder(other_encoder);
296
297 switch (radeon_encoder->encoder_id) {
298 case ENCODER_OBJECT_ID_TRAVIS:
299 case ENCODER_OBJECT_ID_NUTMEG:
dc87cd5c 300 return radeon_encoder->encoder_id;
d7fa8bb3 301 default:
dc87cd5c 302 return ENCODER_OBJECT_ID_NONE;
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303 }
304 }
dc87cd5c 305 return ENCODER_OBJECT_ID_NONE;
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306}
307
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308void radeon_panel_mode_fixup(struct drm_encoder *encoder,
309 struct drm_display_mode *adjusted_mode)
310{
311 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
312 struct drm_device *dev = encoder->dev;
313 struct radeon_device *rdev = dev->dev_private;
314 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
315 unsigned hblank = native_mode->htotal - native_mode->hdisplay;
316 unsigned vblank = native_mode->vtotal - native_mode->vdisplay;
317 unsigned hover = native_mode->hsync_start - native_mode->hdisplay;
318 unsigned vover = native_mode->vsync_start - native_mode->vdisplay;
319 unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start;
320 unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start;
321
322 adjusted_mode->clock = native_mode->clock;
323 adjusted_mode->flags = native_mode->flags;
324
325 if (ASIC_IS_AVIVO(rdev)) {
326 adjusted_mode->hdisplay = native_mode->hdisplay;
327 adjusted_mode->vdisplay = native_mode->vdisplay;
328 }
329
330 adjusted_mode->htotal = native_mode->hdisplay + hblank;
331 adjusted_mode->hsync_start = native_mode->hdisplay + hover;
332 adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width;
333
334 adjusted_mode->vtotal = native_mode->vdisplay + vblank;
335 adjusted_mode->vsync_start = native_mode->vdisplay + vover;
336 adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width;
337
338 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
339
340 if (ASIC_IS_AVIVO(rdev)) {
341 adjusted_mode->crtc_hdisplay = native_mode->hdisplay;
342 adjusted_mode->crtc_vdisplay = native_mode->vdisplay;
343 }
344
345 adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank;
346 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover;
347 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;
348
349 adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank;
350 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover;
351 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + vsync_width;
352
353}
354
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355bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
356 u32 pixel_clock)
357{
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358 struct drm_device *dev = encoder->dev;
359 struct radeon_device *rdev = dev->dev_private;
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360 struct drm_connector *connector;
361 struct radeon_connector *radeon_connector;
362 struct radeon_connector_atom_dig *dig_connector;
363
364 connector = radeon_get_connector_for_encoder(encoder);
365 /* if we don't have an active device yet, just use one of
366 * the connectors tied to the encoder.
367 */
368 if (!connector)
369 connector = radeon_get_connector_for_encoder_init(encoder);
370 radeon_connector = to_radeon_connector(connector);
371
372 switch (connector->connector_type) {
373 case DRM_MODE_CONNECTOR_DVII:
374 case DRM_MODE_CONNECTOR_HDMIB:
375 if (radeon_connector->use_digital) {
376 /* HDMI 1.3 supports up to 340 Mhz over single link */
377bd8a9 377 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
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378 if (pixel_clock > 340000)
379 return true;
380 else
381 return false;
382 } else {
383 if (pixel_clock > 165000)
384 return true;
385 else
386 return false;
387 }
388 } else
389 return false;
390 case DRM_MODE_CONNECTOR_DVID:
391 case DRM_MODE_CONNECTOR_HDMIA:
392 case DRM_MODE_CONNECTOR_DisplayPort:
393 dig_connector = radeon_connector->con_priv;
394 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
395 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
396 return false;
397 else {
398 /* HDMI 1.3 supports up to 340 Mhz over single link */
377bd8a9 399 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
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400 if (pixel_clock > 340000)
401 return true;
402 else
403 return false;
404 } else {
405 if (pixel_clock > 165000)
406 return true;
407 else
408 return false;
409 }
410 }
411 default:
412 return false;
413 }
414}
415
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416bool radeon_encoder_is_digital(struct drm_encoder *encoder)
417{
418 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
419 switch (radeon_encoder->encoder_id) {
420 case ENCODER_OBJECT_ID_INTERNAL_LVDS:
421 case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
422 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
423 case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
424 case ENCODER_OBJECT_ID_INTERNAL_DVO1:
425 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
426 case ENCODER_OBJECT_ID_INTERNAL_DDI:
427 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
428 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
429 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
430 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
431 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3:
432 return true;
433 default:
434 return false;
435 }
436}
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