[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_fence.c

/*
 * Copyright 2009 Jerome Glisse.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 */
/*
 * Authors:
 *    Jerome Glisse <glisse@freedesktop.org>
 *    Dave Airlie
 */
#include <linux/seq_file.h>
#include <asm/atomic.h>
#include <linux/wait.h>
#include <linux/list.h>
#include <linux/kref.h>
#include <linux/slab.h>
#include "drmP.h"
#include "drm.h"
#include "radeon_reg.h"
#include "radeon.h"
#include "radeon_trace.h"

int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
{
	unsigned long irq_flags;

	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	if (fence->emited) {
		write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
		return 0;
	}
	fence->seq = atomic_add_return(1, &rdev->fence_drv.seq);
	if (!rdev->cp.ready) {
		/* FIXME: cp is not running assume everythings is done right
		 * away
		 */
		WREG32(rdev->fence_drv.scratch_reg, fence->seq);
	} else
		radeon_fence_ring_emit(rdev, fence);

	trace_radeon_fence_emit(rdev->ddev, fence->seq);
	fence->emited = true;
	list_move_tail(&fence->list, &rdev->fence_drv.emited);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	return 0;
}

static bool radeon_fence_poll_locked(struct radeon_device *rdev)
{
	struct radeon_fence *fence;
	struct list_head *i, *n;
	uint32_t seq;
	bool wake = false;
	unsigned long cjiffies;

	if (rdev->wb.enabled) {
		u32 scratch_index;
		if (rdev->wb.use_event)
			scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
		else
			scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
		seq = le32_to_cpu(rdev->wb.wb[scratch_index/4]);
	} else
		seq = RREG32(rdev->fence_drv.scratch_reg);
	if (seq != rdev->fence_drv.last_seq) {
		rdev->fence_drv.last_seq = seq;
		rdev->fence_drv.last_jiffies = jiffies;
		rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
	} else {
		cjiffies = jiffies;
		if (time_after(cjiffies, rdev->fence_drv.last_jiffies)) {
			cjiffies -= rdev->fence_drv.last_jiffies;
			if (time_after(rdev->fence_drv.last_timeout, cjiffies)) {
				/* update the timeout */
				rdev->fence_drv.last_timeout -= cjiffies;
			} else {
				/* the 500ms timeout is elapsed we should test
				 * for GPU lockup
				 */
				rdev->fence_drv.last_timeout = 1;
			}
		} else {
			/* wrap around update last jiffies, we will just wait
			 * a little longer
			 */
			rdev->fence_drv.last_jiffies = cjiffies;
		}
		return false;
	}
	n = NULL;
	list_for_each(i, &rdev->fence_drv.emited) {
		fence = list_entry(i, struct radeon_fence, list);
		if (fence->seq == seq) {
			n = i;
			break;
		}
	}
	/* all fence previous to this one are considered as signaled */
	if (n) {
		i = n;
		do {
			n = i->prev;
			list_move_tail(i, &rdev->fence_drv.signaled);
			fence = list_entry(i, struct radeon_fence, list);
			fence->signaled = true;
			i = n;
		} while (i != &rdev->fence_drv.emited);
		wake = true;
	}
	return wake;
}

static void radeon_fence_destroy(struct kref *kref)
{
	unsigned long irq_flags;
        struct radeon_fence *fence;

	fence = container_of(kref, struct radeon_fence, kref);
	write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
	list_del(&fence->list);
	fence->emited = false;
	write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
	kfree(fence);
}

int radeon_fence_create(struct radeon_device *rdev, struct radeon_fence **fence)
{
	unsigned long irq_flags;

	*fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
	if ((*fence) == NULL) {
		return -ENOMEM;
	}
	kref_init(&((*fence)->kref));
	(*fence)->rdev = rdev;
	(*fence)->emited = false;
	(*fence)->signaled = false;
	(*fence)->seq = 0;
	INIT_LIST_HEAD(&(*fence)->list);

	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	list_add_tail(&(*fence)->list, &rdev->fence_drv.created);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	return 0;
}


bool radeon_fence_signaled(struct radeon_fence *fence)
{
	unsigned long irq_flags;
	bool signaled = false;

	if (!fence)
		return true;

	if (fence->rdev->gpu_lockup)
		return true;

	write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
	signaled = fence->signaled;
	/* if we are shuting down report all fence as signaled */
	if (fence->rdev->shutdown) {
		signaled = true;
	}
	if (!fence->emited) {
		WARN(1, "Querying an unemited fence : %p !\n", fence);
		signaled = true;
	}
	if (!signaled) {
		radeon_fence_poll_locked(fence->rdev);
		signaled = fence->signaled;
	}
	write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
	return signaled;
}

int radeon_fence_wait(struct radeon_fence *fence, bool intr)
{
	struct radeon_device *rdev;
	unsigned long irq_flags, timeout;
	u32 seq;
	int r;

	if (fence == NULL) {
		WARN(1, "Querying an invalid fence : %p !\n", fence);
		return 0;
	}
	rdev = fence->rdev;
	if (radeon_fence_signaled(fence)) {
		return 0;
	}
	timeout = rdev->fence_drv.last_timeout;
retry:
	/* save current sequence used to check for GPU lockup */
	seq = rdev->fence_drv.last_seq;
	trace_radeon_fence_wait_begin(rdev->ddev, seq);
	if (intr) {
		radeon_irq_kms_sw_irq_get(rdev);
		r = wait_event_interruptible_timeout(rdev->fence_drv.queue,
				radeon_fence_signaled(fence), timeout);
		radeon_irq_kms_sw_irq_put(rdev);
		if (unlikely(r < 0)) {
			return r;
		}
	} else {
		radeon_irq_kms_sw_irq_get(rdev);
		r = wait_event_timeout(rdev->fence_drv.queue,
			 radeon_fence_signaled(fence), timeout);
		radeon_irq_kms_sw_irq_put(rdev);
	}
	trace_radeon_fence_wait_end(rdev->ddev, seq);
	if (unlikely(!radeon_fence_signaled(fence))) {
		/* we were interrupted for some reason and fence isn't
		 * isn't signaled yet, resume wait
		 */
		if (r) {
			timeout = r;
			goto retry;
		}
		/* don't protect read access to rdev->fence_drv.last_seq
		 * if we experiencing a lockup the value doesn't change
		 */
		if (seq == rdev->fence_drv.last_seq && radeon_gpu_is_lockup(rdev)) {
			/* good news we believe it's a lockup */
			WARN(1, "GPU lockup (waiting for 0x%08X last fence id 0x%08X)\n",
			     fence->seq, seq);
			/* FIXME: what should we do ? marking everyone
			 * as signaled for now
			 */
			rdev->gpu_lockup = true;
			r = radeon_gpu_reset(rdev);
			if (r)
				return r;
			WREG32(rdev->fence_drv.scratch_reg, fence->seq);
			rdev->gpu_lockup = false;
		}
		timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
		write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
		rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
		rdev->fence_drv.last_jiffies = jiffies;
		write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
		goto retry;
	}
	return 0;
}

int radeon_fence_wait_next(struct radeon_device *rdev)
{
	unsigned long irq_flags;
	struct radeon_fence *fence;
	int r;

	if (rdev->gpu_lockup) {
		return 0;
	}
	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	if (list_empty(&rdev->fence_drv.emited)) {
		write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
		return 0;
	}
	fence = list_entry(rdev->fence_drv.emited.next,
			   struct radeon_fence, list);
	radeon_fence_ref(fence);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	r = radeon_fence_wait(fence, false);
	radeon_fence_unref(&fence);
	return r;
}

int radeon_fence_wait_last(struct radeon_device *rdev)
{
	unsigned long irq_flags;
	struct radeon_fence *fence;
	int r;

	if (rdev->gpu_lockup) {
		return 0;
	}
	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	if (list_empty(&rdev->fence_drv.emited)) {
		write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
		return 0;
	}
	fence = list_entry(rdev->fence_drv.emited.prev,
			   struct radeon_fence, list);
	radeon_fence_ref(fence);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	r = radeon_fence_wait(fence, false);
	radeon_fence_unref(&fence);
	return r;
}

struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
{
	kref_get(&fence->kref);
	return fence;
}

void radeon_fence_unref(struct radeon_fence **fence)
{
	struct radeon_fence *tmp = *fence;

	*fence = NULL;
	if (tmp) {
		kref_put(&tmp->kref, radeon_fence_destroy);
	}
}

void radeon_fence_process(struct radeon_device *rdev)
{
	unsigned long irq_flags;
	bool wake;

	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	wake = radeon_fence_poll_locked(rdev);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	if (wake) {
		wake_up_all(&rdev->fence_drv.queue);
	}
}

int radeon_fence_driver_init(struct radeon_device *rdev)
{
	unsigned long irq_flags;
	int r;

	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	r = radeon_scratch_get(rdev, &rdev->fence_drv.scratch_reg);
	if (r) {
		dev_err(rdev->dev, "fence failed to get scratch register\n");
		write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
		return r;
	}
	WREG32(rdev->fence_drv.scratch_reg, 0);
	atomic_set(&rdev->fence_drv.seq, 0);
	INIT_LIST_HEAD(&rdev->fence_drv.created);
	INIT_LIST_HEAD(&rdev->fence_drv.emited);
	INIT_LIST_HEAD(&rdev->fence_drv.signaled);
	init_waitqueue_head(&rdev->fence_drv.queue);
	rdev->fence_drv.initialized = true;
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	if (radeon_debugfs_fence_init(rdev)) {
		dev_err(rdev->dev, "fence debugfs file creation failed\n");
	}
	return 0;
}

void radeon_fence_driver_fini(struct radeon_device *rdev)
{
	unsigned long irq_flags;

	if (!rdev->fence_drv.initialized)
		return;
	wake_up_all(&rdev->fence_drv.queue);
	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	radeon_scratch_free(rdev, rdev->fence_drv.scratch_reg);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	rdev->fence_drv.initialized = false;
}


/*
 * Fence debugfs
 */
#if defined(CONFIG_DEBUG_FS)
static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *)m->private;
	struct drm_device *dev = node->minor->dev;
	struct radeon_device *rdev = dev->dev_private;
	struct radeon_fence *fence;

	seq_printf(m, "Last signaled fence 0x%08X\n",
		   RREG32(rdev->fence_drv.scratch_reg));
	if (!list_empty(&rdev->fence_drv.emited)) {
		   fence = list_entry(rdev->fence_drv.emited.prev,
				      struct radeon_fence, list);
		   seq_printf(m, "Last emited fence %p with 0x%08X\n",
			      fence,  fence->seq);
	}
	return 0;
}

static struct drm_info_list radeon_debugfs_fence_list[] = {
	{"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
};
#endif

int radeon_debugfs_fence_init(struct radeon_device *rdev)
{
#if defined(CONFIG_DEBUG_FS)
	return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
#else
	return 0;
#endif
}
Commit	Line	Data
771fe6b9 JG	1	/*
	2	* Copyright 2009 Jerome Glisse.
	3	* All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the
	7	* "Software"), to deal in the Software without restriction, including
	8	* without limitation the rights to use, copy, modify, merge, publish,
	9	* distribute, sub license, and/or sell copies of the Software, and to
	10	* permit persons to whom the Software is furnished to do so, subject to
	11	* the following conditions:
	12	*
	13	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	14	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	15	* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
	16	* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
	17	* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
	18	* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
	19	* USE OR OTHER DEALINGS IN THE SOFTWARE.
	20	*
	21	* The above copyright notice and this permission notice (including the
	22	* next paragraph) shall be included in all copies or substantial portions
	23	* of the Software.
	24	*
	25	*/
	26	/*
	27	* Authors:
	28	* Jerome Glisse <glisse@freedesktop.org>
	29	* Dave Airlie
	30	*/
	31	#include <linux/seq_file.h>
	32	#include <asm/atomic.h>
	33	#include <linux/wait.h>
	34	#include <linux/list.h>
	35	#include <linux/kref.h>
5a0e3ad6	36	#include <linux/slab.h>
771fe6b9 JG	37	#include "drmP.h"
	38	#include "drm.h"
	39	#include "radeon_reg.h"
	40	#include "radeon.h"
99ee7fac	41	#include "radeon_trace.h"
771fe6b9 JG	42
	43	int radeon_fence_emit(struct radeon_device rdev, struct radeon_fence fence)
	44	{
	45	unsigned long irq_flags;
	46
	47	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	48	if (fence->emited) {
	49	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	50	return 0;
	51	}
	52	fence->seq = atomic_add_return(1, &rdev->fence_drv.seq);
	53	if (!rdev->cp.ready) {
	54	/* FIXME: cp is not running assume everythings is done right
	55	* away
	56	*/
	57	WREG32(rdev->fence_drv.scratch_reg, fence->seq);
3ce0a23d	58	} else
771fe6b9	59	radeon_fence_ring_emit(rdev, fence);
3ce0a23d	60
99ee7fac	61	trace_radeon_fence_emit(rdev->ddev, fence->seq);
771fe6b9	62	fence->emited = true;
3409fc1b	63	list_move_tail(&fence->list, &rdev->fence_drv.emited);
771fe6b9 JG	64	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	65	return 0;
	66	}
	67
	68	static bool radeon_fence_poll_locked(struct radeon_device *rdev)
	69	{
	70	struct radeon_fence *fence;
	71	struct list_head i, n;
	72	uint32_t seq;
	73	bool wake = false;
225758d8	74	unsigned long cjiffies;
771fe6b9	75
724c80e1	76	if (rdev->wb.enabled) {
d0f8a854 AD	77	u32 scratch_index;
	78	if (rdev->wb.use_event)
	79	scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
	80	else
	81	scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
dc66b325	82	seq = le32_to_cpu(rdev->wb.wb[scratch_index/4]);
724c80e1 AD	83	} else
724c80e1 AD	84	seq = RREG32(rdev->fence_drv.scratch_reg);
225758d8 JG	85	if (seq != rdev->fence_drv.last_seq) {
	86	rdev->fence_drv.last_seq = seq;
	87	rdev->fence_drv.last_jiffies = jiffies;
	88	rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
	89	} else {
	90	cjiffies = jiffies;
	91	if (time_after(cjiffies, rdev->fence_drv.last_jiffies)) {
	92	cjiffies -= rdev->fence_drv.last_jiffies;
	93	if (time_after(rdev->fence_drv.last_timeout, cjiffies)) {
	94	/* update the timeout */
	95	rdev->fence_drv.last_timeout -= cjiffies;
	96	} else {
	97	/* the 500ms timeout is elapsed we should test
	98	* for GPU lockup
	99	*/
	100	rdev->fence_drv.last_timeout = 1;
	101	}
	102	} else {
	103	/* wrap around update last jiffies, we will just wait
	104	* a little longer
	105	*/
	106	rdev->fence_drv.last_jiffies = cjiffies;
	107	}
	108	return false;
	109	}
771fe6b9 JG	110	n = NULL;
	111	list_for_each(i, &rdev->fence_drv.emited) {
	112	fence = list_entry(i, struct radeon_fence, list);
	113	if (fence->seq == seq) {
	114	n = i;
	115	break;
	116	}
	117	}
	118	/* all fence previous to this one are considered as signaled */
	119	if (n) {
	120	i = n;
	121	do {
	122	n = i->prev;
3409fc1b	123	list_move_tail(i, &rdev->fence_drv.signaled);
771fe6b9 JG	124	fence = list_entry(i, struct radeon_fence, list);
	125	fence->signaled = true;
	126	i = n;
	127	} while (i != &rdev->fence_drv.emited);
	128	wake = true;
	129	}
	130	return wake;
	131	}
	132
	133	static void radeon_fence_destroy(struct kref *kref)
	134	{
	135	unsigned long irq_flags;
	136	struct radeon_fence *fence;
	137
	138	fence = container_of(kref, struct radeon_fence, kref);
	139	write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
	140	list_del(&fence->list);
	141	fence->emited = false;
	142	write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
	143	kfree(fence);
	144	}
	145
	146	int radeon_fence_create(struct radeon_device rdev, struct radeon_fence *fence)
	147	{
	148	unsigned long irq_flags;
	149
	150	*fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
	151	if ((*fence) == NULL) {
	152	return -ENOMEM;
	153	}
	154	kref_init(&((*fence)->kref));
	155	(*fence)->rdev = rdev;
	156	(*fence)->emited = false;
	157	(*fence)->signaled = false;
	158	(*fence)->seq = 0;
	159	INIT_LIST_HEAD(&(*fence)->list);
	160
	161	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	162	list_add_tail(&(*fence)->list, &rdev->fence_drv.created);
	163	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	164	return 0;
	165	}
	166
	167
	168	bool radeon_fence_signaled(struct radeon_fence *fence)
	169	{
771fe6b9 JG	170	unsigned long irq_flags;
	171	bool signaled = false;
	172
3655d54a	173	if (!fence)
771fe6b9	174	return true;
3655d54a DJ	175
3655d54a DJ	176	if (fence->rdev->gpu_lockup)
771fe6b9	177	return true;
3655d54a	178
771fe6b9 JG	179	write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
	180	signaled = fence->signaled;
	181	/* if we are shuting down report all fence as signaled */
	182	if (fence->rdev->shutdown) {
	183	signaled = true;
	184	}
	185	if (!fence->emited) {
	186	WARN(1, "Querying an unemited fence : %p !\n", fence);
	187	signaled = true;
	188	}
	189	if (!signaled) {
	190	radeon_fence_poll_locked(fence->rdev);
	191	signaled = fence->signaled;
	192	}
	193	write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
	194	return signaled;
	195	}
	196
3ce0a23d	197	int radeon_fence_wait(struct radeon_fence *fence, bool intr)
771fe6b9 JG	198	{
771fe6b9 JG	199	struct radeon_device *rdev;
225758d8 JG	200	unsigned long irq_flags, timeout;
225758d8 JG	201	u32 seq;
771fe6b9 JG	202	int r;
771fe6b9 JG	203
771fe6b9 JG	204	if (fence == NULL) {
	205	WARN(1, "Querying an invalid fence : %p !\n", fence);
	206	return 0;
	207	}
	208	rdev = fence->rdev;
	209	if (radeon_fence_signaled(fence)) {
	210	return 0;
	211	}
225758d8	212	timeout = rdev->fence_drv.last_timeout;
771fe6b9	213	retry:
225758d8 JG	214	/* save current sequence used to check for GPU lockup */
225758d8 JG	215	seq = rdev->fence_drv.last_seq;
99ee7fac	216	trace_radeon_fence_wait_begin(rdev->ddev, seq);
3ce0a23d	217	if (intr) {
1614f8b1	218	radeon_irq_kms_sw_irq_get(rdev);
771fe6b9 JG	219	r = wait_event_interruptible_timeout(rdev->fence_drv.queue,
771fe6b9 JG	220	radeon_fence_signaled(fence), timeout);
1614f8b1	221	radeon_irq_kms_sw_irq_put(rdev);
90aca4d2	222	if (unlikely(r < 0)) {
5cc6fbab	223	return r;
90aca4d2	224	}
771fe6b9	225	} else {
1614f8b1	226	radeon_irq_kms_sw_irq_get(rdev);
771fe6b9 JG	227	r = wait_event_timeout(rdev->fence_drv.queue,
771fe6b9 JG	228	radeon_fence_signaled(fence), timeout);
1614f8b1	229	radeon_irq_kms_sw_irq_put(rdev);
771fe6b9	230	}
99ee7fac	231	trace_radeon_fence_wait_end(rdev->ddev, seq);
771fe6b9	232	if (unlikely(!radeon_fence_signaled(fence))) {
225758d8 JG	233	/* we were interrupted for some reason and fence isn't
	234	* isn't signaled yet, resume wait
	235	*/
	236	if (r) {
	237	timeout = r;
	238	goto retry;
771fe6b9	239	}
225758d8 JG	240	/* don't protect read access to rdev->fence_drv.last_seq
	241	* if we experiencing a lockup the value doesn't change
	242	*/
	243	if (seq == rdev->fence_drv.last_seq && radeon_gpu_is_lockup(rdev)) {
	244	/* good news we believe it's a lockup */
fce7d61b JP	245	WARN(1, "GPU lockup (waiting for 0x%08X last fence id 0x%08X)\n",
fce7d61b JP	246	fence->seq, seq);
225758d8 JG	247	/* FIXME: what should we do ? marking everyone
	248	* as signaled for now
	249	*/
90aca4d2	250	rdev->gpu_lockup = true;
90aca4d2 JG	251	r = radeon_gpu_reset(rdev);
	252	if (r)
	253	return r;
a1e9ada3	254	WREG32(rdev->fence_drv.scratch_reg, fence->seq);
90aca4d2	255	rdev->gpu_lockup = false;
771fe6b9	256	}
225758d8 JG	257	timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
	258	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	259	rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
	260	rdev->fence_drv.last_jiffies = jiffies;
	261	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
771fe6b9 JG	262	goto retry;
771fe6b9 JG	263	}
771fe6b9 JG	264	return 0;
	265	}
	266
	267	int radeon_fence_wait_next(struct radeon_device *rdev)
	268	{
	269	unsigned long irq_flags;
	270	struct radeon_fence *fence;
	271	int r;
	272
	273	if (rdev->gpu_lockup) {
	274	return 0;
	275	}
	276	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	277	if (list_empty(&rdev->fence_drv.emited)) {
	278	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	279	return 0;
	280	}
	281	fence = list_entry(rdev->fence_drv.emited.next,
	282	struct radeon_fence, list);
	283	radeon_fence_ref(fence);
	284	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	285	r = radeon_fence_wait(fence, false);
	286	radeon_fence_unref(&fence);
	287	return r;
	288	}
	289
	290	int radeon_fence_wait_last(struct radeon_device *rdev)
	291	{
	292	unsigned long irq_flags;
	293	struct radeon_fence *fence;
	294	int r;
	295
	296	if (rdev->gpu_lockup) {
	297	return 0;
	298	}
	299	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	300	if (list_empty(&rdev->fence_drv.emited)) {
	301	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	302	return 0;
	303	}
	304	fence = list_entry(rdev->fence_drv.emited.prev,
	305	struct radeon_fence, list);
	306	radeon_fence_ref(fence);
	307	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	308	r = radeon_fence_wait(fence, false);
	309	radeon_fence_unref(&fence);
	310	return r;
	311	}
	312
	313	struct radeon_fence radeon_fence_ref(struct radeon_fence fence)
	314	{
	315	kref_get(&fence->kref);
	316	return fence;
	317	}
	318
	319	void radeon_fence_unref(struct radeon_fence **fence)
	320	{
	321	struct radeon_fence tmp = fence;
	322
	323	*fence = NULL;
	324	if (tmp) {
cdb650a4	325	kref_put(&tmp->kref, radeon_fence_destroy);
771fe6b9 JG	326	}
	327	}
	328
	329	void radeon_fence_process(struct radeon_device *rdev)
	330	{
	331	unsigned long irq_flags;
	332	bool wake;
	333
	334	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	335	wake = radeon_fence_poll_locked(rdev);
	336	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	337	if (wake) {
	338	wake_up_all(&rdev->fence_drv.queue);
	339	}
	340	}
	341
	342	int radeon_fence_driver_init(struct radeon_device *rdev)
	343	{
	344	unsigned long irq_flags;
	345	int r;
	346
	347	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	348	r = radeon_scratch_get(rdev, &rdev->fence_drv.scratch_reg);
	349	if (r) {
0a0c7596	350	dev_err(rdev->dev, "fence failed to get scratch register\n");
771fe6b9 JG	351	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	352	return r;
	353	}
	354	WREG32(rdev->fence_drv.scratch_reg, 0);
	355	atomic_set(&rdev->fence_drv.seq, 0);
	356	INIT_LIST_HEAD(&rdev->fence_drv.created);
	357	INIT_LIST_HEAD(&rdev->fence_drv.emited);
	358	INIT_LIST_HEAD(&rdev->fence_drv.signaled);
771fe6b9	359	init_waitqueue_head(&rdev->fence_drv.queue);
0a0c7596	360	rdev->fence_drv.initialized = true;
771fe6b9 JG	361	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
771fe6b9 JG	362	if (radeon_debugfs_fence_init(rdev)) {
0a0c7596	363	dev_err(rdev->dev, "fence debugfs file creation failed\n");
771fe6b9 JG	364	}
	365	return 0;
	366	}
	367
	368	void radeon_fence_driver_fini(struct radeon_device *rdev)
	369	{
	370	unsigned long irq_flags;
	371
0a0c7596 JG	372	if (!rdev->fence_drv.initialized)
0a0c7596 JG	373	return;
771fe6b9 JG	374	wake_up_all(&rdev->fence_drv.queue);
	375	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	376	radeon_scratch_free(rdev, rdev->fence_drv.scratch_reg);
	377	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
0a0c7596	378	rdev->fence_drv.initialized = false;
771fe6b9 JG	379	}
	380
	381
	382	/*
	383	* Fence debugfs
	384	*/
	385	#if defined(CONFIG_DEBUG_FS)
	386	static int radeon_debugfs_fence_info(struct seq_file m, void data)
	387	{
	388	struct drm_info_node node = (struct drm_info_node )m->private;
	389	struct drm_device *dev = node->minor->dev;
	390	struct radeon_device *rdev = dev->dev_private;
	391	struct radeon_fence *fence;
	392
	393	seq_printf(m, "Last signaled fence 0x%08X\n",
	394	RREG32(rdev->fence_drv.scratch_reg));
	395	if (!list_empty(&rdev->fence_drv.emited)) {
	396	fence = list_entry(rdev->fence_drv.emited.prev,
	397	struct radeon_fence, list);
	398	seq_printf(m, "Last emited fence %p with 0x%08X\n",
	399	fence, fence->seq);
	400	}
	401	return 0;
	402	}
	403
	404	static struct drm_info_list radeon_debugfs_fence_list[] = {
	405	{"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
	406	};
	407	#endif
	408
	409	int radeon_debugfs_fence_init(struct radeon_device *rdev)
	410	{
	411	#if defined(CONFIG_DEBUG_FS)
	412	return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
	413	#else
	414	return 0;
	415	#endif
	416	}