[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_fence.c

/*
 * Copyright 2009 Jerome Glisse.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 */
/*
 * Authors:
 *    Jerome Glisse <glisse@freedesktop.org>
 *    Dave Airlie
 */
#include <linux/seq_file.h>
#include <asm/atomic.h>
#include <linux/wait.h>
#include <linux/list.h>
#include <linux/kref.h>
#include "drmP.h"
#include "drm.h"
#include "radeon_reg.h"
#include "radeon.h"

int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
{
	unsigned long irq_flags;

	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	if (fence->emited) {
		write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
		return 0;
	}
	fence->seq = atomic_add_return(1, &rdev->fence_drv.seq);
	if (!rdev->cp.ready) {
		/* FIXME: cp is not running assume everythings is done right
		 * away
		 */
		WREG32(rdev->fence_drv.scratch_reg, fence->seq);
	} else
		radeon_fence_ring_emit(rdev, fence);

	fence->emited = true;
	list_del(&fence->list);
	list_add_tail(&fence->list, &rdev->fence_drv.emited);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	return 0;
}

static bool radeon_fence_poll_locked(struct radeon_device *rdev)
{
	struct radeon_fence *fence;
	struct list_head *i, *n;
	uint32_t seq;
	bool wake = false;
	unsigned long cjiffies;

	seq = RREG32(rdev->fence_drv.scratch_reg);
	if (seq != rdev->fence_drv.last_seq) {
		rdev->fence_drv.last_seq = seq;
		rdev->fence_drv.last_jiffies = jiffies;
		rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
	} else {
		cjiffies = jiffies;
		if (time_after(cjiffies, rdev->fence_drv.last_jiffies)) {
			cjiffies -= rdev->fence_drv.last_jiffies;
			if (time_after(rdev->fence_drv.last_timeout, cjiffies)) {
				/* update the timeout */
				rdev->fence_drv.last_timeout -= cjiffies;
			} else {
				/* the 500ms timeout is elapsed we should test
				 * for GPU lockup
				 */
				rdev->fence_drv.last_timeout = 1;
			}
		} else {
			/* wrap around update last jiffies, we will just wait
			 * a little longer
			 */
			rdev->fence_drv.last_jiffies = cjiffies;
		}
		return false;
	}
	n = NULL;
	list_for_each(i, &rdev->fence_drv.emited) {
		fence = list_entry(i, struct radeon_fence, list);
		if (fence->seq == seq) {
			n = i;
			break;
		}
	}
	/* all fence previous to this one are considered as signaled */
	if (n) {
		i = n;
		do {
			n = i->prev;
			list_del(i);
			list_add_tail(i, &rdev->fence_drv.signaled);
			fence = list_entry(i, struct radeon_fence, list);
			fence->signaled = true;
			i = n;
		} while (i != &rdev->fence_drv.emited);
		wake = true;
	}
	return wake;
}

static void radeon_fence_destroy(struct kref *kref)
{
	unsigned long irq_flags;
        struct radeon_fence *fence;

	fence = container_of(kref, struct radeon_fence, kref);
	write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
	list_del(&fence->list);
	fence->emited = false;
	write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
	kfree(fence);
}

int radeon_fence_create(struct radeon_device *rdev, struct radeon_fence **fence)
{
	unsigned long irq_flags;

	*fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
	if ((*fence) == NULL) {
		return -ENOMEM;
	}
	kref_init(&((*fence)->kref));
	(*fence)->rdev = rdev;
	(*fence)->emited = false;
	(*fence)->signaled = false;
	(*fence)->seq = 0;
	INIT_LIST_HEAD(&(*fence)->list);

	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	list_add_tail(&(*fence)->list, &rdev->fence_drv.created);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	return 0;
}


bool radeon_fence_signaled(struct radeon_fence *fence)
{
	unsigned long irq_flags;
	bool signaled = false;

	if (!fence)
		return true;

	if (fence->rdev->gpu_lockup)
		return true;

	write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
	signaled = fence->signaled;
	/* if we are shuting down report all fence as signaled */
	if (fence->rdev->shutdown) {
		signaled = true;
	}
	if (!fence->emited) {
		WARN(1, "Querying an unemited fence : %p !\n", fence);
		signaled = true;
	}
	if (!signaled) {
		radeon_fence_poll_locked(fence->rdev);
		signaled = fence->signaled;
	}
	write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
	return signaled;
}

int radeon_fence_wait(struct radeon_fence *fence, bool intr)
{
	struct radeon_device *rdev;
	unsigned long irq_flags, timeout;
	u32 seq;
	int r;

	if (fence == NULL) {
		WARN(1, "Querying an invalid fence : %p !\n", fence);
		return 0;
	}
	rdev = fence->rdev;
	if (radeon_fence_signaled(fence)) {
		return 0;
	}
	timeout = rdev->fence_drv.last_timeout;
retry:
	/* save current sequence used to check for GPU lockup */
	seq = rdev->fence_drv.last_seq;
	if (intr) {
		radeon_irq_kms_sw_irq_get(rdev);
		r = wait_event_interruptible_timeout(rdev->fence_drv.queue,
				radeon_fence_signaled(fence), timeout);
		radeon_irq_kms_sw_irq_put(rdev);
		if (unlikely(r < 0))
			return r;
	} else {
		radeon_irq_kms_sw_irq_get(rdev);
		r = wait_event_timeout(rdev->fence_drv.queue,
			 radeon_fence_signaled(fence), timeout);
		radeon_irq_kms_sw_irq_put(rdev);
	}
	if (unlikely(!radeon_fence_signaled(fence))) {
		/* we were interrupted for some reason and fence isn't
		 * isn't signaled yet, resume wait
		 */
		if (r) {
			timeout = r;
			goto retry;
		}
		/* don't protect read access to rdev->fence_drv.last_seq
		 * if we experiencing a lockup the value doesn't change
		 */
		if (seq == rdev->fence_drv.last_seq && radeon_gpu_is_lockup(rdev)) {
			/* good news we believe it's a lockup */
			dev_warn(rdev->dev, "GPU lockup (last fence id 0x%08X)\n", seq);
			r = radeon_asic_reset(rdev);
			if (r)
				return r;
			/* FIXME: what should we do ? marking everyone
			 * as signaled for now
			 */
			WREG32(rdev->fence_drv.scratch_reg, fence->seq);
		}
		timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
		write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
		rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
		rdev->fence_drv.last_jiffies = jiffies;
		write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
		goto retry;
	}
	return 0;
}

int radeon_fence_wait_next(struct radeon_device *rdev)
{
	unsigned long irq_flags;
	struct radeon_fence *fence;
	int r;

	if (rdev->gpu_lockup) {
		return 0;
	}
	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	if (list_empty(&rdev->fence_drv.emited)) {
		write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
		return 0;
	}
	fence = list_entry(rdev->fence_drv.emited.next,
			   struct radeon_fence, list);
	radeon_fence_ref(fence);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	r = radeon_fence_wait(fence, false);
	radeon_fence_unref(&fence);
	return r;
}

int radeon_fence_wait_last(struct radeon_device *rdev)
{
	unsigned long irq_flags;
	struct radeon_fence *fence;
	int r;

	if (rdev->gpu_lockup) {
		return 0;
	}
	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	if (list_empty(&rdev->fence_drv.emited)) {
		write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
		return 0;
	}
	fence = list_entry(rdev->fence_drv.emited.prev,
			   struct radeon_fence, list);
	radeon_fence_ref(fence);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	r = radeon_fence_wait(fence, false);
	radeon_fence_unref(&fence);
	return r;
}

struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
{
	kref_get(&fence->kref);
	return fence;
}

void radeon_fence_unref(struct radeon_fence **fence)
{
	struct radeon_fence *tmp = *fence;

	*fence = NULL;
	if (tmp) {
		kref_put(&tmp->kref, &radeon_fence_destroy);
	}
}

void radeon_fence_process(struct radeon_device *rdev)
{
	unsigned long irq_flags;
	bool wake;

	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	wake = radeon_fence_poll_locked(rdev);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	if (wake) {
		wake_up_all(&rdev->fence_drv.queue);
	}
}

int radeon_fence_driver_init(struct radeon_device *rdev)
{
	unsigned long irq_flags;
	int r;

	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	r = radeon_scratch_get(rdev, &rdev->fence_drv.scratch_reg);
	if (r) {
		dev_err(rdev->dev, "fence failed to get scratch register\n");
		write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
		return r;
	}
	WREG32(rdev->fence_drv.scratch_reg, 0);
	atomic_set(&rdev->fence_drv.seq, 0);
	INIT_LIST_HEAD(&rdev->fence_drv.created);
	INIT_LIST_HEAD(&rdev->fence_drv.emited);
	INIT_LIST_HEAD(&rdev->fence_drv.signaled);
	init_waitqueue_head(&rdev->fence_drv.queue);
	rdev->fence_drv.initialized = true;
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	if (radeon_debugfs_fence_init(rdev)) {
		dev_err(rdev->dev, "fence debugfs file creation failed\n");
	}
	return 0;
}

void radeon_fence_driver_fini(struct radeon_device *rdev)
{
	unsigned long irq_flags;

	if (!rdev->fence_drv.initialized)
		return;
	wake_up_all(&rdev->fence_drv.queue);
	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	radeon_scratch_free(rdev, rdev->fence_drv.scratch_reg);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	rdev->fence_drv.initialized = false;
}


/*
 * Fence debugfs
 */
#if defined(CONFIG_DEBUG_FS)
static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *)m->private;
	struct drm_device *dev = node->minor->dev;
	struct radeon_device *rdev = dev->dev_private;
	struct radeon_fence *fence;

	seq_printf(m, "Last signaled fence 0x%08X\n",
		   RREG32(rdev->fence_drv.scratch_reg));
	if (!list_empty(&rdev->fence_drv.emited)) {
		   fence = list_entry(rdev->fence_drv.emited.prev,
				      struct radeon_fence, list);
		   seq_printf(m, "Last emited fence %p with 0x%08X\n",
			      fence,  fence->seq);
	}
	return 0;
}

static struct drm_info_list radeon_debugfs_fence_list[] = {
	{"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
};
#endif

int radeon_debugfs_fence_init(struct radeon_device *rdev)
{
#if defined(CONFIG_DEBUG_FS)
	return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
#else
	return 0;
#endif
}
Commit	Line	Data
771fe6b9 JG	1	/*
	2	* Copyright 2009 Jerome Glisse.
	3	* All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the
	7	* "Software"), to deal in the Software without restriction, including
	8	* without limitation the rights to use, copy, modify, merge, publish,
	9	* distribute, sub license, and/or sell copies of the Software, and to
	10	* permit persons to whom the Software is furnished to do so, subject to
	11	* the following conditions:
	12	*
	13	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	14	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	15	* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
	16	* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
	17	* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
	18	* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
	19	* USE OR OTHER DEALINGS IN THE SOFTWARE.
	20	*
	21	* The above copyright notice and this permission notice (including the
	22	* next paragraph) shall be included in all copies or substantial portions
	23	* of the Software.
	24	*
	25	*/
	26	/*
	27	* Authors:
	28	* Jerome Glisse <glisse@freedesktop.org>
	29	* Dave Airlie
	30	*/
	31	#include <linux/seq_file.h>
	32	#include <asm/atomic.h>
	33	#include <linux/wait.h>
	34	#include <linux/list.h>
	35	#include <linux/kref.h>
	36	#include "drmP.h"
	37	#include "drm.h"
	38	#include "radeon_reg.h"
	39	#include "radeon.h"
	40
	41	int radeon_fence_emit(struct radeon_device rdev, struct radeon_fence fence)
	42	{
	43	unsigned long irq_flags;
	44
	45	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	46	if (fence->emited) {
	47	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	48	return 0;
	49	}
	50	fence->seq = atomic_add_return(1, &rdev->fence_drv.seq);
	51	if (!rdev->cp.ready) {
	52	/* FIXME: cp is not running assume everythings is done right
	53	* away
	54	*/
	55	WREG32(rdev->fence_drv.scratch_reg, fence->seq);
3ce0a23d	56	} else
771fe6b9	57	radeon_fence_ring_emit(rdev, fence);
3ce0a23d	58
771fe6b9	59	fence->emited = true;
771fe6b9 JG	60	list_del(&fence->list);
	61	list_add_tail(&fence->list, &rdev->fence_drv.emited);
	62	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	63	return 0;
	64	}
	65
	66	static bool radeon_fence_poll_locked(struct radeon_device *rdev)
	67	{
	68	struct radeon_fence *fence;
	69	struct list_head i, n;
	70	uint32_t seq;
	71	bool wake = false;
225758d8	72	unsigned long cjiffies;
771fe6b9	73
771fe6b9	74	seq = RREG32(rdev->fence_drv.scratch_reg);
225758d8 JG	75	if (seq != rdev->fence_drv.last_seq) {
	76	rdev->fence_drv.last_seq = seq;
	77	rdev->fence_drv.last_jiffies = jiffies;
	78	rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
	79	} else {
	80	cjiffies = jiffies;
	81	if (time_after(cjiffies, rdev->fence_drv.last_jiffies)) {
	82	cjiffies -= rdev->fence_drv.last_jiffies;
	83	if (time_after(rdev->fence_drv.last_timeout, cjiffies)) {
	84	/* update the timeout */
	85	rdev->fence_drv.last_timeout -= cjiffies;
	86	} else {
	87	/* the 500ms timeout is elapsed we should test
	88	* for GPU lockup
	89	*/
	90	rdev->fence_drv.last_timeout = 1;
	91	}
	92	} else {
	93	/* wrap around update last jiffies, we will just wait
	94	* a little longer
	95	*/
	96	rdev->fence_drv.last_jiffies = cjiffies;
	97	}
	98	return false;
	99	}
771fe6b9 JG	100	n = NULL;
	101	list_for_each(i, &rdev->fence_drv.emited) {
	102	fence = list_entry(i, struct radeon_fence, list);
	103	if (fence->seq == seq) {
	104	n = i;
	105	break;
	106	}
	107	}
	108	/* all fence previous to this one are considered as signaled */
	109	if (n) {
	110	i = n;
	111	do {
	112	n = i->prev;
	113	list_del(i);
	114	list_add_tail(i, &rdev->fence_drv.signaled);
	115	fence = list_entry(i, struct radeon_fence, list);
	116	fence->signaled = true;
	117	i = n;
	118	} while (i != &rdev->fence_drv.emited);
	119	wake = true;
	120	}
	121	return wake;
	122	}
	123
	124	static void radeon_fence_destroy(struct kref *kref)
	125	{
	126	unsigned long irq_flags;
	127	struct radeon_fence *fence;
	128
	129	fence = container_of(kref, struct radeon_fence, kref);
	130	write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
	131	list_del(&fence->list);
	132	fence->emited = false;
	133	write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
	134	kfree(fence);
	135	}
	136
	137	int radeon_fence_create(struct radeon_device rdev, struct radeon_fence *fence)
	138	{
	139	unsigned long irq_flags;
	140
	141	*fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
	142	if ((*fence) == NULL) {
	143	return -ENOMEM;
	144	}
	145	kref_init(&((*fence)->kref));
	146	(*fence)->rdev = rdev;
	147	(*fence)->emited = false;
	148	(*fence)->signaled = false;
	149	(*fence)->seq = 0;
	150	INIT_LIST_HEAD(&(*fence)->list);
	151
	152	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	153	list_add_tail(&(*fence)->list, &rdev->fence_drv.created);
	154	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	155	return 0;
	156	}
	157
	158
	159	bool radeon_fence_signaled(struct radeon_fence *fence)
	160	{
771fe6b9 JG	161	unsigned long irq_flags;
	162	bool signaled = false;
	163
3655d54a	164	if (!fence)
771fe6b9	165	return true;
3655d54a DJ	166
3655d54a DJ	167	if (fence->rdev->gpu_lockup)
771fe6b9	168	return true;
3655d54a	169
771fe6b9 JG	170	write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
	171	signaled = fence->signaled;
	172	/* if we are shuting down report all fence as signaled */
	173	if (fence->rdev->shutdown) {
	174	signaled = true;
	175	}
	176	if (!fence->emited) {
	177	WARN(1, "Querying an unemited fence : %p !\n", fence);
	178	signaled = true;
	179	}
	180	if (!signaled) {
	181	radeon_fence_poll_locked(fence->rdev);
	182	signaled = fence->signaled;
	183	}
	184	write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
	185	return signaled;
	186	}
	187
3ce0a23d	188	int radeon_fence_wait(struct radeon_fence *fence, bool intr)
771fe6b9 JG	189	{
771fe6b9 JG	190	struct radeon_device *rdev;
225758d8 JG	191	unsigned long irq_flags, timeout;
225758d8 JG	192	u32 seq;
771fe6b9 JG	193	int r;
771fe6b9 JG	194
771fe6b9 JG	195	if (fence == NULL) {
	196	WARN(1, "Querying an invalid fence : %p !\n", fence);
	197	return 0;
	198	}
	199	rdev = fence->rdev;
	200	if (radeon_fence_signaled(fence)) {
	201	return 0;
	202	}
225758d8	203	timeout = rdev->fence_drv.last_timeout;
771fe6b9	204	retry:
225758d8 JG	205	/* save current sequence used to check for GPU lockup */
225758d8 JG	206	seq = rdev->fence_drv.last_seq;
3ce0a23d	207	if (intr) {
1614f8b1	208	radeon_irq_kms_sw_irq_get(rdev);
771fe6b9 JG	209	r = wait_event_interruptible_timeout(rdev->fence_drv.queue,
771fe6b9 JG	210	radeon_fence_signaled(fence), timeout);
1614f8b1	211	radeon_irq_kms_sw_irq_put(rdev);
2e7b6f7f	212	if (unlikely(r < 0))
5cc6fbab	213	return r;
771fe6b9	214	} else {
1614f8b1	215	radeon_irq_kms_sw_irq_get(rdev);
771fe6b9 JG	216	r = wait_event_timeout(rdev->fence_drv.queue,
771fe6b9 JG	217	radeon_fence_signaled(fence), timeout);
1614f8b1	218	radeon_irq_kms_sw_irq_put(rdev);
771fe6b9 JG	219	}
771fe6b9 JG	220	if (unlikely(!radeon_fence_signaled(fence))) {
225758d8 JG	221	/* we were interrupted for some reason and fence isn't
	222	* isn't signaled yet, resume wait
	223	*/
	224	if (r) {
	225	timeout = r;
	226	goto retry;
771fe6b9	227	}
225758d8 JG	228	/* don't protect read access to rdev->fence_drv.last_seq
	229	* if we experiencing a lockup the value doesn't change
	230	*/
	231	if (seq == rdev->fence_drv.last_seq && radeon_gpu_is_lockup(rdev)) {
	232	/* good news we believe it's a lockup */
	233	dev_warn(rdev->dev, "GPU lockup (last fence id 0x%08X)\n", seq);
a2d07b74	234	r = radeon_asic_reset(rdev);
225758d8 JG	235	if (r)
	236	return r;
	237	/* FIXME: what should we do ? marking everyone
	238	* as signaled for now
	239	*/
	240	WREG32(rdev->fence_drv.scratch_reg, fence->seq);
771fe6b9	241	}
225758d8 JG	242	timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
	243	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	244	rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
	245	rdev->fence_drv.last_jiffies = jiffies;
	246	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
771fe6b9 JG	247	goto retry;
771fe6b9 JG	248	}
771fe6b9 JG	249	return 0;
	250	}
	251
	252	int radeon_fence_wait_next(struct radeon_device *rdev)
	253	{
	254	unsigned long irq_flags;
	255	struct radeon_fence *fence;
	256	int r;
	257
	258	if (rdev->gpu_lockup) {
	259	return 0;
	260	}
	261	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	262	if (list_empty(&rdev->fence_drv.emited)) {
	263	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	264	return 0;
	265	}
	266	fence = list_entry(rdev->fence_drv.emited.next,
	267	struct radeon_fence, list);
	268	radeon_fence_ref(fence);
	269	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	270	r = radeon_fence_wait(fence, false);
	271	radeon_fence_unref(&fence);
	272	return r;
	273	}
	274
	275	int radeon_fence_wait_last(struct radeon_device *rdev)
	276	{
	277	unsigned long irq_flags;
	278	struct radeon_fence *fence;
	279	int r;
	280
	281	if (rdev->gpu_lockup) {
	282	return 0;
	283	}
	284	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	285	if (list_empty(&rdev->fence_drv.emited)) {
	286	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	287	return 0;
	288	}
	289	fence = list_entry(rdev->fence_drv.emited.prev,
	290	struct radeon_fence, list);
	291	radeon_fence_ref(fence);
	292	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	293	r = radeon_fence_wait(fence, false);
	294	radeon_fence_unref(&fence);
	295	return r;
	296	}
	297
	298	struct radeon_fence radeon_fence_ref(struct radeon_fence fence)
	299	{
	300	kref_get(&fence->kref);
	301	return fence;
	302	}
	303
	304	void radeon_fence_unref(struct radeon_fence **fence)
	305	{
	306	struct radeon_fence tmp = fence;
	307
	308	*fence = NULL;
	309	if (tmp) {
	310	kref_put(&tmp->kref, &radeon_fence_destroy);
	311	}
	312	}
313
314	void radeon_fence_process(struct radeon_device *rdev)
315	{
316	unsigned long irq_flags;
317	bool wake;
318
319	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
320	wake = radeon_fence_poll_locked(rdev);
321	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
322	if (wake) {
323	wake_up_all(&rdev->fence_drv.queue);
324	}
325	}
326
327	int radeon_fence_driver_init(struct radeon_device *rdev)
328	{
329	unsigned long irq_flags;
330	int r;
331
332	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
333	r = radeon_scratch_get(rdev, &rdev->fence_drv.scratch_reg);
334	if (r) {
0a0c7596	335	dev_err(rdev->dev, "fence failed to get scratch register\n");
771fe6b9 JG	336	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	337	return r;
	338	}
	339	WREG32(rdev->fence_drv.scratch_reg, 0);
	340	atomic_set(&rdev->fence_drv.seq, 0);
	341	INIT_LIST_HEAD(&rdev->fence_drv.created);
	342	INIT_LIST_HEAD(&rdev->fence_drv.emited);
	343	INIT_LIST_HEAD(&rdev->fence_drv.signaled);
771fe6b9	344	init_waitqueue_head(&rdev->fence_drv.queue);
0a0c7596	345	rdev->fence_drv.initialized = true;
771fe6b9 JG	346	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
771fe6b9 JG	347	if (radeon_debugfs_fence_init(rdev)) {
0a0c7596	348	dev_err(rdev->dev, "fence debugfs file creation failed\n");
771fe6b9 JG	349	}
	350	return 0;
	351	}
	352
	353	void radeon_fence_driver_fini(struct radeon_device *rdev)
	354	{
	355	unsigned long irq_flags;
	356
0a0c7596 JG	357	if (!rdev->fence_drv.initialized)
0a0c7596 JG	358	return;
771fe6b9 JG	359	wake_up_all(&rdev->fence_drv.queue);
	360	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	361	radeon_scratch_free(rdev, rdev->fence_drv.scratch_reg);
	362	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
0a0c7596	363	rdev->fence_drv.initialized = false;
771fe6b9 JG	364	}
	365
	366
	367	/*
	368	* Fence debugfs
	369	*/
	370	#if defined(CONFIG_DEBUG_FS)
	371	static int radeon_debugfs_fence_info(struct seq_file m, void data)
	372	{
	373	struct drm_info_node node = (struct drm_info_node )m->private;
	374	struct drm_device *dev = node->minor->dev;
	375	struct radeon_device *rdev = dev->dev_private;
	376	struct radeon_fence *fence;
	377
	378	seq_printf(m, "Last signaled fence 0x%08X\n",
	379	RREG32(rdev->fence_drv.scratch_reg));
	380	if (!list_empty(&rdev->fence_drv.emited)) {
	381	fence = list_entry(rdev->fence_drv.emited.prev,
	382	struct radeon_fence, list);
	383	seq_printf(m, "Last emited fence %p with 0x%08X\n",
	384	fence, fence->seq);
	385	}
	386	return 0;
	387	}
	388
	389	static struct drm_info_list radeon_debugfs_fence_list[] = {
	390	{"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
	391	};
	392	#endif
	393
	394	int radeon_debugfs_fence_init(struct radeon_device *rdev)
	395	{
	396	#if defined(CONFIG_DEBUG_FS)
	397	return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
	398	#else
	399	return 0;
	400	#endif
	401	}