[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_gem.c

/*
 * Copyright 2008 Advanced Micro Devices, Inc.
 * Copyright 2008 Red Hat Inc.
 * Copyright 2009 Jerome Glisse.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Dave Airlie
 *          Alex Deucher
 *          Jerome Glisse
 */
#include "drmP.h"
#include "drm.h"
#include "radeon_drm.h"
#include "radeon.h"

int radeon_gem_object_init(struct drm_gem_object *obj)
{
	BUG();

	return 0;
}

void radeon_gem_object_free(struct drm_gem_object *gobj)
{
	struct radeon_bo *robj = gem_to_radeon_bo(gobj);

	if (robj) {
		radeon_bo_unref(&robj);
	}
}

int radeon_gem_object_create(struct radeon_device *rdev, int size,
				int alignment, int initial_domain,
				bool discardable, bool kernel,
				struct drm_gem_object **obj)
{
	struct radeon_bo *robj;
	int r;

	*obj = NULL;
	/* At least align on page size */
	if (alignment < PAGE_SIZE) {
		alignment = PAGE_SIZE;
	}
	r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, &robj);
	if (r) {
		if (r != -ERESTARTSYS)
			DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
				  size, initial_domain, alignment, r);
		return r;
	}
	*obj = &robj->gem_base;

	mutex_lock(&rdev->gem.mutex);
	list_add_tail(&robj->list, &rdev->gem.objects);
	mutex_unlock(&rdev->gem.mutex);

	return 0;
}

int radeon_gem_object_pin(struct drm_gem_object *obj, uint32_t pin_domain,
			  uint64_t *gpu_addr)
{
	struct radeon_bo *robj = gem_to_radeon_bo(obj);
	int r;

	r = radeon_bo_reserve(robj, false);
	if (unlikely(r != 0))
		return r;
	r = radeon_bo_pin(robj, pin_domain, gpu_addr);
	radeon_bo_unreserve(robj);
	return r;
}

void radeon_gem_object_unpin(struct drm_gem_object *obj)
{
	struct radeon_bo *robj = gem_to_radeon_bo(obj);
	int r;

	r = radeon_bo_reserve(robj, false);
	if (likely(r == 0)) {
		radeon_bo_unpin(robj);
		radeon_bo_unreserve(robj);
	}
}

int radeon_gem_set_domain(struct drm_gem_object *gobj,
			  uint32_t rdomain, uint32_t wdomain)
{
	struct radeon_bo *robj;
	uint32_t domain;
	int r;

	/* FIXME: reeimplement */
	robj = gem_to_radeon_bo(gobj);
	/* work out where to validate the buffer to */
	domain = wdomain;
	if (!domain) {
		domain = rdomain;
	}
	if (!domain) {
		/* Do nothings */
		printk(KERN_WARNING "Set domain withou domain !\n");
		return 0;
	}
	if (domain == RADEON_GEM_DOMAIN_CPU) {
		/* Asking for cpu access wait for object idle */
		r = radeon_bo_wait(robj, NULL, false);
		if (r) {
			printk(KERN_ERR "Failed to wait for object !\n");
			return r;
		}
	}
	return 0;
}

int radeon_gem_init(struct radeon_device *rdev)
{
	INIT_LIST_HEAD(&rdev->gem.objects);
	return 0;
}

void radeon_gem_fini(struct radeon_device *rdev)
{
	radeon_bo_force_delete(rdev);
}


/*
 * GEM ioctls.
 */
int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
			  struct drm_file *filp)
{
	struct radeon_device *rdev = dev->dev_private;
	struct drm_radeon_gem_info *args = data;
	struct ttm_mem_type_manager *man;
	unsigned i;

	man = &rdev->mman.bdev.man[TTM_PL_VRAM];

	args->vram_size = rdev->mc.real_vram_size;
	args->vram_visible = (u64)man->size << PAGE_SHIFT;
	if (rdev->stollen_vga_memory)
		args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
	args->vram_visible -= radeon_fbdev_total_size(rdev);
	args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024;
	for(i = 0; i < RADEON_NUM_RINGS; ++i)
		args->gart_size -= rdev->ring[i].ring_size;
	return 0;
}

int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
			   struct drm_file *filp)
{
	/* TODO: implement */
	DRM_ERROR("unimplemented %s\n", __func__);
	return -ENOSYS;
}

int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
			    struct drm_file *filp)
{
	/* TODO: implement */
	DRM_ERROR("unimplemented %s\n", __func__);
	return -ENOSYS;
}

int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
			    struct drm_file *filp)
{
	struct radeon_device *rdev = dev->dev_private;
	struct drm_radeon_gem_create *args = data;
	struct drm_gem_object *gobj;
	uint32_t handle;
	int r;

	/* create a gem object to contain this object in */
	args->size = roundup(args->size, PAGE_SIZE);
	r = radeon_gem_object_create(rdev, args->size, args->alignment,
					args->initial_domain, false,
					false, &gobj);
	if (r) {
		return r;
	}
	r = drm_gem_handle_create(filp, gobj, &handle);
	/* drop reference from allocate - handle holds it now */
	drm_gem_object_unreference_unlocked(gobj);
	if (r) {
		return r;
	}
	args->handle = handle;
	return 0;
}

int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
				struct drm_file *filp)
{
	/* transition the BO to a domain -
	 * just validate the BO into a certain domain */
	struct drm_radeon_gem_set_domain *args = data;
	struct drm_gem_object *gobj;
	struct radeon_bo *robj;
	int r;

	/* for now if someone requests domain CPU -
	 * just make sure the buffer is finished with */

	/* just do a BO wait for now */
	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	if (gobj == NULL) {
		return -ENOENT;
	}
	robj = gem_to_radeon_bo(gobj);

	r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);

	drm_gem_object_unreference_unlocked(gobj);
	return r;
}

int radeon_mode_dumb_mmap(struct drm_file *filp,
			  struct drm_device *dev,
			  uint32_t handle, uint64_t *offset_p)
{
	struct drm_gem_object *gobj;
	struct radeon_bo *robj;

	gobj = drm_gem_object_lookup(dev, filp, handle);
	if (gobj == NULL) {
		return -ENOENT;
	}
	robj = gem_to_radeon_bo(gobj);
	*offset_p = radeon_bo_mmap_offset(robj);
	drm_gem_object_unreference_unlocked(gobj);
	return 0;
}

int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
			  struct drm_file *filp)
{
	struct drm_radeon_gem_mmap *args = data;

	return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
}

int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
			  struct drm_file *filp)
{
	struct drm_radeon_gem_busy *args = data;
	struct drm_gem_object *gobj;
	struct radeon_bo *robj;
	int r;
	uint32_t cur_placement = 0;

	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	if (gobj == NULL) {
		return -ENOENT;
	}
	robj = gem_to_radeon_bo(gobj);
	r = radeon_bo_wait(robj, &cur_placement, true);
	switch (cur_placement) {
	case TTM_PL_VRAM:
		args->domain = RADEON_GEM_DOMAIN_VRAM;
		break;
	case TTM_PL_TT:
		args->domain = RADEON_GEM_DOMAIN_GTT;
		break;
	case TTM_PL_SYSTEM:
		args->domain = RADEON_GEM_DOMAIN_CPU;
	default:
		break;
	}
	drm_gem_object_unreference_unlocked(gobj);
	return r;
}

int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
			      struct drm_file *filp)
{
	struct drm_radeon_gem_wait_idle *args = data;
	struct drm_gem_object *gobj;
	struct radeon_bo *robj;
	int r;

	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	if (gobj == NULL) {
		return -ENOENT;
	}
	robj = gem_to_radeon_bo(gobj);
	r = radeon_bo_wait(robj, NULL, false);
	/* callback hw specific functions if any */
	if (robj->rdev->asic->ioctl_wait_idle)
		robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
	drm_gem_object_unreference_unlocked(gobj);
	return r;
}

int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
				struct drm_file *filp)
{
	struct drm_radeon_gem_set_tiling *args = data;
	struct drm_gem_object *gobj;
	struct radeon_bo *robj;
	int r = 0;

	DRM_DEBUG("%d \n", args->handle);
	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	if (gobj == NULL)
		return -ENOENT;
	robj = gem_to_radeon_bo(gobj);
	r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
	drm_gem_object_unreference_unlocked(gobj);
	return r;
}

int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
				struct drm_file *filp)
{
	struct drm_radeon_gem_get_tiling *args = data;
	struct drm_gem_object *gobj;
	struct radeon_bo *rbo;
	int r = 0;

	DRM_DEBUG("\n");
	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	if (gobj == NULL)
		return -ENOENT;
	rbo = gem_to_radeon_bo(gobj);
	r = radeon_bo_reserve(rbo, false);
	if (unlikely(r != 0))
		goto out;
	radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
	radeon_bo_unreserve(rbo);
out:
	drm_gem_object_unreference_unlocked(gobj);
	return r;
}

int radeon_mode_dumb_create(struct drm_file *file_priv,
			    struct drm_device *dev,
			    struct drm_mode_create_dumb *args)
{
	struct radeon_device *rdev = dev->dev_private;
	struct drm_gem_object *gobj;
	uint32_t handle;
	int r;

	args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
	args->size = args->pitch * args->height;
	args->size = ALIGN(args->size, PAGE_SIZE);

	r = radeon_gem_object_create(rdev, args->size, 0,
				     RADEON_GEM_DOMAIN_VRAM,
				     false, ttm_bo_type_device,
				     &gobj);
	if (r)
		return -ENOMEM;

	r = drm_gem_handle_create(file_priv, gobj, &handle);
	/* drop reference from allocate - handle holds it now */
	drm_gem_object_unreference_unlocked(gobj);
	if (r) {
		return r;
	}
	args->handle = handle;
	return 0;
}

int radeon_mode_dumb_destroy(struct drm_file *file_priv,
			     struct drm_device *dev,
			     uint32_t handle)
{
	return drm_gem_handle_delete(file_priv, handle);
}
Commit	Line	Data
771fe6b9 JG	1	/*
	2	* Copyright 2008 Advanced Micro Devices, Inc.
	3	* Copyright 2008 Red Hat Inc.
	4	* Copyright 2009 Jerome Glisse.
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a
	7	* copy of this software and associated documentation files (the "Software"),
	8	* to deal in the Software without restriction, including without limitation
	9	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	10	* and/or sell copies of the Software, and to permit persons to whom the
	11	* Software is furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	20	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	21	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	22	* OTHER DEALINGS IN THE SOFTWARE.
	23	*
	24	* Authors: Dave Airlie
	25	* Alex Deucher
	26	* Jerome Glisse
	27	*/
	28	#include "drmP.h"
	29	#include "drm.h"
	30	#include "radeon_drm.h"
	31	#include "radeon.h"
	32
	33	int radeon_gem_object_init(struct drm_gem_object *obj)
	34	{
441921d5 DV	35	BUG();
441921d5 DV	36
771fe6b9 JG	37	return 0;
	38	}
	39
	40	void radeon_gem_object_free(struct drm_gem_object *gobj)
	41	{
7e4d15d9	42	struct radeon_bo *robj = gem_to_radeon_bo(gobj);
771fe6b9	43
771fe6b9	44	if (robj) {
4c788679	45	radeon_bo_unref(&robj);
771fe6b9 JG	46	}
	47	}
	48
	49	int radeon_gem_object_create(struct radeon_device *rdev, int size,
4c788679 JG	50	int alignment, int initial_domain,
	51	bool discardable, bool kernel,
	52	struct drm_gem_object **obj)
771fe6b9	53	{
4c788679	54	struct radeon_bo *robj;
771fe6b9 JG	55	int r;
	56
	57	*obj = NULL;
771fe6b9 JG	58	/* At least align on page size */
	59	if (alignment < PAGE_SIZE) {
	60	alignment = PAGE_SIZE;
	61	}
441921d5	62	r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, &robj);
771fe6b9	63	if (r) {
ecabd32a DA	64	if (r != -ERESTARTSYS)
	65	DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
	66	size, initial_domain, alignment, r);
771fe6b9 JG	67	return r;
771fe6b9 JG	68	}
441921d5 DV	69	*obj = &robj->gem_base;
	70
	71	mutex_lock(&rdev->gem.mutex);
	72	list_add_tail(&robj->list, &rdev->gem.objects);
	73	mutex_unlock(&rdev->gem.mutex);
	74
771fe6b9 JG	75	return 0;
	76	}
	77
	78	int radeon_gem_object_pin(struct drm_gem_object *obj, uint32_t pin_domain,
	79	uint64_t *gpu_addr)
	80	{
7e4d15d9	81	struct radeon_bo *robj = gem_to_radeon_bo(obj);
4c788679	82	int r;
771fe6b9	83
4c788679 JG	84	r = radeon_bo_reserve(robj, false);
	85	if (unlikely(r != 0))
	86	return r;
	87	r = radeon_bo_pin(robj, pin_domain, gpu_addr);
	88	radeon_bo_unreserve(robj);
	89	return r;
771fe6b9 JG	90	}
	91
	92	void radeon_gem_object_unpin(struct drm_gem_object *obj)
	93	{
7e4d15d9	94	struct radeon_bo *robj = gem_to_radeon_bo(obj);
4c788679 JG	95	int r;
	96
	97	r = radeon_bo_reserve(robj, false);
	98	if (likely(r == 0)) {
	99	radeon_bo_unpin(robj);
	100	radeon_bo_unreserve(robj);
	101	}
771fe6b9 JG	102	}
	103
	104	int radeon_gem_set_domain(struct drm_gem_object *gobj,
	105	uint32_t rdomain, uint32_t wdomain)
	106	{
4c788679	107	struct radeon_bo *robj;
771fe6b9 JG	108	uint32_t domain;
	109	int r;
	110
	111	/* FIXME: reeimplement */
7e4d15d9	112	robj = gem_to_radeon_bo(gobj);
771fe6b9 JG	113	/* work out where to validate the buffer to */
	114	domain = wdomain;
	115	if (!domain) {
	116	domain = rdomain;
	117	}
	118	if (!domain) {
	119	/* Do nothings */
	120	printk(KERN_WARNING "Set domain withou domain !\n");
	121	return 0;
	122	}
	123	if (domain == RADEON_GEM_DOMAIN_CPU) {
	124	/* Asking for cpu access wait for object idle */
4c788679	125	r = radeon_bo_wait(robj, NULL, false);
771fe6b9 JG	126	if (r) {
	127	printk(KERN_ERR "Failed to wait for object !\n");
	128	return r;
	129	}
	130	}
	131	return 0;
	132	}
	133
	134	int radeon_gem_init(struct radeon_device *rdev)
	135	{
	136	INIT_LIST_HEAD(&rdev->gem.objects);
	137	return 0;
	138	}
	139
	140	void radeon_gem_fini(struct radeon_device *rdev)
	141	{
4c788679	142	radeon_bo_force_delete(rdev);
771fe6b9 JG	143	}
	144
	145
	146	/*
	147	* GEM ioctls.
	148	*/
	149	int radeon_gem_info_ioctl(struct drm_device dev, void data,
	150	struct drm_file *filp)
	151	{
	152	struct radeon_device *rdev = dev->dev_private;
	153	struct drm_radeon_gem_info *args = data;
53595338	154	struct ttm_mem_type_manager *man;
bf852799	155	unsigned i;
53595338 DA	156
53595338 DA	157	man = &rdev->mman.bdev.man[TTM_PL_VRAM];
771fe6b9	158
7a50f01a	159	args->vram_size = rdev->mc.real_vram_size;
53595338	160	args->vram_visible = (u64)man->size << PAGE_SHIFT;
38e14921	161	if (rdev->stollen_vga_memory)
4c788679	162	args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
38651674	163	args->vram_visible -= radeon_fbdev_total_size(rdev);
7b1f2485	164	args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE641024;
bf852799	165	for(i = 0; i < RADEON_NUM_RINGS; ++i)
e32eb50d	166	args->gart_size -= rdev->ring[i].ring_size;
771fe6b9 JG	167	return 0;
	168	}
	169
	170	int radeon_gem_pread_ioctl(struct drm_device dev, void data,
	171	struct drm_file *filp)
	172	{
	173	/* TODO: implement */
	174	DRM_ERROR("unimplemented %s\n", __func__);
	175	return -ENOSYS;
	176	}
	177
	178	int radeon_gem_pwrite_ioctl(struct drm_device dev, void data,
	179	struct drm_file *filp)
	180	{
	181	/* TODO: implement */
	182	DRM_ERROR("unimplemented %s\n", __func__);
	183	return -ENOSYS;
	184	}
	185
	186	int radeon_gem_create_ioctl(struct drm_device dev, void data,
	187	struct drm_file *filp)
	188	{
	189	struct radeon_device *rdev = dev->dev_private;
	190	struct drm_radeon_gem_create *args = data;
	191	struct drm_gem_object *gobj;
	192	uint32_t handle;
	193	int r;
	194
	195	/* create a gem object to contain this object in */
	196	args->size = roundup(args->size, PAGE_SIZE);
	197	r = radeon_gem_object_create(rdev, args->size, args->alignment,
4c788679 JG	198	args->initial_domain, false,
4c788679 JG	199	false, &gobj);
771fe6b9 JG	200	if (r) {
	201	return r;
	202	}
	203	r = drm_gem_handle_create(filp, gobj, &handle);
29d08b3e DA	204	/* drop reference from allocate - handle holds it now */
29d08b3e DA	205	drm_gem_object_unreference_unlocked(gobj);
771fe6b9	206	if (r) {
771fe6b9 JG	207	return r;
771fe6b9 JG	208	}
771fe6b9 JG	209	args->handle = handle;
	210	return 0;
	211	}
	212
	213	int radeon_gem_set_domain_ioctl(struct drm_device dev, void data,
	214	struct drm_file *filp)
	215	{
	216	/* transition the BO to a domain -
	217	* just validate the BO into a certain domain */
	218	struct drm_radeon_gem_set_domain *args = data;
	219	struct drm_gem_object *gobj;
4c788679	220	struct radeon_bo *robj;
771fe6b9 JG	221	int r;
	222
	223	/* for now if someone requests domain CPU -
	224	* just make sure the buffer is finished with */
	225
	226	/* just do a BO wait for now */
	227	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	228	if (gobj == NULL) {
bf79cb91	229	return -ENOENT;
771fe6b9	230	}
7e4d15d9	231	robj = gem_to_radeon_bo(gobj);
771fe6b9 JG	232
	233	r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
	234
bc9025bd	235	drm_gem_object_unreference_unlocked(gobj);
771fe6b9 JG	236	return r;
	237	}
	238
ff72145b DA	239	int radeon_mode_dumb_mmap(struct drm_file *filp,
	240	struct drm_device *dev,
	241	uint32_t handle, uint64_t *offset_p)
771fe6b9	242	{
771fe6b9	243	struct drm_gem_object *gobj;
4c788679	244	struct radeon_bo *robj;
771fe6b9	245
ff72145b	246	gobj = drm_gem_object_lookup(dev, filp, handle);
771fe6b9	247	if (gobj == NULL) {
bf79cb91	248	return -ENOENT;
771fe6b9	249	}
7e4d15d9	250	robj = gem_to_radeon_bo(gobj);
ff72145b	251	*offset_p = radeon_bo_mmap_offset(robj);
bc9025bd	252	drm_gem_object_unreference_unlocked(gobj);
4c788679	253	return 0;
771fe6b9 JG	254	}
771fe6b9 JG	255
ff72145b DA	256	int radeon_gem_mmap_ioctl(struct drm_device dev, void data,
	257	struct drm_file *filp)
	258	{
	259	struct drm_radeon_gem_mmap *args = data;
	260
	261	return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
	262	}
	263
771fe6b9 JG	264	int radeon_gem_busy_ioctl(struct drm_device dev, void data,
	265	struct drm_file *filp)
	266	{
cefb87ef DA	267	struct drm_radeon_gem_busy *args = data;
cefb87ef DA	268	struct drm_gem_object *gobj;
4c788679	269	struct radeon_bo *robj;
cefb87ef	270	int r;
4361e52a	271	uint32_t cur_placement = 0;
cefb87ef DA	272
	273	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	274	if (gobj == NULL) {
bf79cb91	275	return -ENOENT;
cefb87ef	276	}
7e4d15d9	277	robj = gem_to_radeon_bo(gobj);
4c788679	278	r = radeon_bo_wait(robj, &cur_placement, true);
9f844e51 MD	279	switch (cur_placement) {
9f844e51 MD	280	case TTM_PL_VRAM:
cefb87ef	281	args->domain = RADEON_GEM_DOMAIN_VRAM;
9f844e51 MD	282	break;
9f844e51 MD	283	case TTM_PL_TT:
cefb87ef	284	args->domain = RADEON_GEM_DOMAIN_GTT;
9f844e51 MD	285	break;
9f844e51 MD	286	case TTM_PL_SYSTEM:
cefb87ef	287	args->domain = RADEON_GEM_DOMAIN_CPU;
9f844e51 MD	288	default:
	289	break;
	290	}
bc9025bd	291	drm_gem_object_unreference_unlocked(gobj);
e3b2415e	292	return r;
771fe6b9 JG	293	}
	294
	295	int radeon_gem_wait_idle_ioctl(struct drm_device dev, void data,
	296	struct drm_file *filp)
	297	{
	298	struct drm_radeon_gem_wait_idle *args = data;
	299	struct drm_gem_object *gobj;
4c788679	300	struct radeon_bo *robj;
771fe6b9 JG	301	int r;
	302
	303	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	304	if (gobj == NULL) {
bf79cb91	305	return -ENOENT;
771fe6b9	306	}
7e4d15d9	307	robj = gem_to_radeon_bo(gobj);
4c788679	308	r = radeon_bo_wait(robj, NULL, false);
062b389c JG	309	/* callback hw specific functions if any */
	310	if (robj->rdev->asic->ioctl_wait_idle)
	311	robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
bc9025bd	312	drm_gem_object_unreference_unlocked(gobj);
771fe6b9 JG	313	return r;
771fe6b9 JG	314	}
e024e110 DA	315
	316	int radeon_gem_set_tiling_ioctl(struct drm_device dev, void data,
	317	struct drm_file *filp)
	318	{
	319	struct drm_radeon_gem_set_tiling *args = data;
	320	struct drm_gem_object *gobj;
4c788679	321	struct radeon_bo *robj;
e024e110 DA	322	int r = 0;
	323
	324	DRM_DEBUG("%d \n", args->handle);
	325	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	326	if (gobj == NULL)
bf79cb91	327	return -ENOENT;
7e4d15d9	328	robj = gem_to_radeon_bo(gobj);
4c788679	329	r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
bc9025bd	330	drm_gem_object_unreference_unlocked(gobj);
e024e110 DA	331	return r;
	332	}
	333
	334	int radeon_gem_get_tiling_ioctl(struct drm_device dev, void data,
	335	struct drm_file *filp)
	336	{
	337	struct drm_radeon_gem_get_tiling *args = data;
	338	struct drm_gem_object *gobj;
4c788679	339	struct radeon_bo *rbo;
e024e110 DA	340	int r = 0;
	341
	342	DRM_DEBUG("\n");
	343	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	344	if (gobj == NULL)
bf79cb91	345	return -ENOENT;
7e4d15d9	346	rbo = gem_to_radeon_bo(gobj);
4c788679 JG	347	r = radeon_bo_reserve(rbo, false);
4c788679 JG	348	if (unlikely(r != 0))
51f07b7e	349	goto out;
4c788679 JG	350	radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
4c788679 JG	351	radeon_bo_unreserve(rbo);
51f07b7e	352	out:
bc9025bd	353	drm_gem_object_unreference_unlocked(gobj);
e024e110 DA	354	return r;
e024e110 DA	355	}
ff72145b DA	356
	357	int radeon_mode_dumb_create(struct drm_file *file_priv,
	358	struct drm_device *dev,
	359	struct drm_mode_create_dumb *args)
	360	{
	361	struct radeon_device *rdev = dev->dev_private;
	362	struct drm_gem_object *gobj;
c87a8d8d	363	uint32_t handle;
ff72145b DA	364	int r;
	365
	366	args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
	367	args->size = args->pitch * args->height;
	368	args->size = ALIGN(args->size, PAGE_SIZE);
	369
	370	r = radeon_gem_object_create(rdev, args->size, 0,
	371	RADEON_GEM_DOMAIN_VRAM,
	372	false, ttm_bo_type_device,
	373	&gobj);
	374	if (r)
	375	return -ENOMEM;
	376
c87a8d8d DA	377	r = drm_gem_handle_create(file_priv, gobj, &handle);
	378	/* drop reference from allocate - handle holds it now */
	379	drm_gem_object_unreference_unlocked(gobj);
ff72145b	380	if (r) {
ff72145b DA	381	return r;
ff72145b DA	382	}
c87a8d8d	383	args->handle = handle;
ff72145b DA	384	return 0;
	385	}
	386
	387	int radeon_mode_dumb_destroy(struct drm_file *file_priv,
	388	struct drm_device *dev,
	389	uint32_t handle)
	390	{
	391	return drm_gem_handle_delete(file_priv, handle);
	392	}