[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_gem.c

/*
 * Copyright 2008 Advanced Micro Devices, Inc.
 * Copyright 2008 Red Hat Inc.
 * Copyright 2009 Jerome Glisse.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Dave Airlie
 *          Alex Deucher
 *          Jerome Glisse
 */
#include "drmP.h"
#include "drm.h"
#include "radeon_drm.h"
#include "radeon.h"

int radeon_gem_object_init(struct drm_gem_object *obj)
{
	/* we do nothings here */
	return 0;
}

void radeon_gem_object_free(struct drm_gem_object *gobj)
{
	struct radeon_bo *robj = gobj->driver_private;

	gobj->driver_private = NULL;
	if (robj) {
		radeon_bo_unref(&robj);
	}
}

int radeon_gem_object_create(struct radeon_device *rdev, int size,
				int alignment, int initial_domain,
				bool discardable, bool kernel,
				struct drm_gem_object **obj)
{
	struct drm_gem_object *gobj;
	struct radeon_bo *robj;
	int r;

	*obj = NULL;
	gobj = drm_gem_object_alloc(rdev->ddev, size);
	if (!gobj) {
		return -ENOMEM;
	}
	/* At least align on page size */
	if (alignment < PAGE_SIZE) {
		alignment = PAGE_SIZE;
	}
	r = radeon_bo_create(rdev, gobj, size, kernel, initial_domain, &robj);
	if (r) {
		if (r != -ERESTARTSYS)
			DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
				  size, initial_domain, alignment, r);
		drm_gem_object_unreference_unlocked(gobj);
		return r;
	}
	gobj->driver_private = robj;
	*obj = gobj;
	return 0;
}

int radeon_gem_object_pin(struct drm_gem_object *obj, uint32_t pin_domain,
			  uint64_t *gpu_addr)
{
	struct radeon_bo *robj = obj->driver_private;
	int r;

	r = radeon_bo_reserve(robj, false);
	if (unlikely(r != 0))
		return r;
	r = radeon_bo_pin(robj, pin_domain, gpu_addr);
	radeon_bo_unreserve(robj);
	return r;
}

void radeon_gem_object_unpin(struct drm_gem_object *obj)
{
	struct radeon_bo *robj = obj->driver_private;
	int r;

	r = radeon_bo_reserve(robj, false);
	if (likely(r == 0)) {
		radeon_bo_unpin(robj);
		radeon_bo_unreserve(robj);
	}
}

int radeon_gem_set_domain(struct drm_gem_object *gobj,
			  uint32_t rdomain, uint32_t wdomain)
{
	struct radeon_bo *robj;
	uint32_t domain;
	int r;

	/* FIXME: reeimplement */
	robj = gobj->driver_private;
	/* work out where to validate the buffer to */
	domain = wdomain;
	if (!domain) {
		domain = rdomain;
	}
	if (!domain) {
		/* Do nothings */
		printk(KERN_WARNING "Set domain withou domain !\n");
		return 0;
	}
	if (domain == RADEON_GEM_DOMAIN_CPU) {
		/* Asking for cpu access wait for object idle */
		r = radeon_bo_wait(robj, NULL, false);
		if (r) {
			printk(KERN_ERR "Failed to wait for object !\n");
			return r;
		}
	}
	return 0;
}

int radeon_gem_init(struct radeon_device *rdev)
{
	INIT_LIST_HEAD(&rdev->gem.objects);
	return 0;
}

void radeon_gem_fini(struct radeon_device *rdev)
{
	radeon_bo_force_delete(rdev);
}


/*
 * GEM ioctls.
 */
int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
			  struct drm_file *filp)
{
	struct radeon_device *rdev = dev->dev_private;
	struct drm_radeon_gem_info *args = data;

	args->vram_size = rdev->mc.real_vram_size;
	args->vram_visible = rdev->mc.real_vram_size;
	if (rdev->stollen_vga_memory)
		args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
	if (rdev->fbdev_rbo)
		args->vram_visible -= radeon_bo_size(rdev->fbdev_rbo);
	args->gart_size = rdev->mc.gtt_size - rdev->cp.ring_size - 4096 -
		RADEON_IB_POOL_SIZE*64*1024;
	return 0;
}

int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
			   struct drm_file *filp)
{
	/* TODO: implement */
	DRM_ERROR("unimplemented %s\n", __func__);
	return -ENOSYS;
}

int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
			    struct drm_file *filp)
{
	/* TODO: implement */
	DRM_ERROR("unimplemented %s\n", __func__);
	return -ENOSYS;
}

int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
			    struct drm_file *filp)
{
	struct radeon_device *rdev = dev->dev_private;
	struct drm_radeon_gem_create *args = data;
	struct drm_gem_object *gobj;
	uint32_t handle;
	int r;

	/* create a gem object to contain this object in */
	args->size = roundup(args->size, PAGE_SIZE);
	r = radeon_gem_object_create(rdev, args->size, args->alignment,
					args->initial_domain, false,
					false, &gobj);
	if (r) {
		return r;
	}
	r = drm_gem_handle_create(filp, gobj, &handle);
	if (r) {
		drm_gem_object_unreference_unlocked(gobj);
		return r;
	}
	drm_gem_object_handle_unreference_unlocked(gobj);
	args->handle = handle;
	return 0;
}

int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
				struct drm_file *filp)
{
	/* transition the BO to a domain -
	 * just validate the BO into a certain domain */
	struct drm_radeon_gem_set_domain *args = data;
	struct drm_gem_object *gobj;
	struct radeon_bo *robj;
	int r;

	/* for now if someone requests domain CPU -
	 * just make sure the buffer is finished with */

	/* just do a BO wait for now */
	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	if (gobj == NULL) {
		return -EINVAL;
	}
	robj = gobj->driver_private;

	r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);

	drm_gem_object_unreference_unlocked(gobj);
	return r;
}

int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
			  struct drm_file *filp)
{
	struct drm_radeon_gem_mmap *args = data;
	struct drm_gem_object *gobj;
	struct radeon_bo *robj;

	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	if (gobj == NULL) {
		return -EINVAL;
	}
	robj = gobj->driver_private;
	args->addr_ptr = radeon_bo_mmap_offset(robj);
	drm_gem_object_unreference_unlocked(gobj);
	return 0;
}

int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
			  struct drm_file *filp)
{
	struct drm_radeon_gem_busy *args = data;
	struct drm_gem_object *gobj;
	struct radeon_bo *robj;
	int r;
	uint32_t cur_placement = 0;

	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	if (gobj == NULL) {
		return -EINVAL;
	}
	robj = gobj->driver_private;
	r = radeon_bo_wait(robj, &cur_placement, true);
	switch (cur_placement) {
	case TTM_PL_VRAM:
		args->domain = RADEON_GEM_DOMAIN_VRAM;
		break;
	case TTM_PL_TT:
		args->domain = RADEON_GEM_DOMAIN_GTT;
		break;
	case TTM_PL_SYSTEM:
		args->domain = RADEON_GEM_DOMAIN_CPU;
	default:
		break;
	}
	drm_gem_object_unreference_unlocked(gobj);
	return r;
}

int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
			      struct drm_file *filp)
{
	struct drm_radeon_gem_wait_idle *args = data;
	struct drm_gem_object *gobj;
	struct radeon_bo *robj;
	int r;

	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	if (gobj == NULL) {
		return -EINVAL;
	}
	robj = gobj->driver_private;
	r = radeon_bo_wait(robj, NULL, false);
	/* callback hw specific functions if any */
	if (robj->rdev->asic->ioctl_wait_idle)
		robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
	drm_gem_object_unreference_unlocked(gobj);
	return r;
}

int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
				struct drm_file *filp)
{
	struct drm_radeon_gem_set_tiling *args = data;
	struct drm_gem_object *gobj;
	struct radeon_bo *robj;
	int r = 0;

	DRM_DEBUG("%d \n", args->handle);
	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	if (gobj == NULL)
		return -EINVAL;
	robj = gobj->driver_private;
	r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
	drm_gem_object_unreference_unlocked(gobj);
	return r;
}

int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
				struct drm_file *filp)
{
	struct drm_radeon_gem_get_tiling *args = data;
	struct drm_gem_object *gobj;
	struct radeon_bo *rbo;
	int r = 0;

	DRM_DEBUG("\n");
	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	if (gobj == NULL)
		return -EINVAL;
	rbo = gobj->driver_private;
	r = radeon_bo_reserve(rbo, false);
	if (unlikely(r != 0))
		goto out;
	radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
	radeon_bo_unreserve(rbo);
out:
	drm_gem_object_unreference_unlocked(gobj);
	return r;
}
Commit	Line	Data
771fe6b9 JG	1	/*
	2	* Copyright 2008 Advanced Micro Devices, Inc.
	3	* Copyright 2008 Red Hat Inc.
	4	* Copyright 2009 Jerome Glisse.
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a
	7	* copy of this software and associated documentation files (the "Software"),
	8	* to deal in the Software without restriction, including without limitation
	9	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	10	* and/or sell copies of the Software, and to permit persons to whom the
	11	* Software is furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	20	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	21	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	22	* OTHER DEALINGS IN THE SOFTWARE.
	23	*
	24	* Authors: Dave Airlie
	25	* Alex Deucher
	26	* Jerome Glisse
	27	*/
	28	#include "drmP.h"
	29	#include "drm.h"
	30	#include "radeon_drm.h"
	31	#include "radeon.h"
	32
	33	int radeon_gem_object_init(struct drm_gem_object *obj)
	34	{
	35	/* we do nothings here */
	36	return 0;
	37	}
	38
	39	void radeon_gem_object_free(struct drm_gem_object *gobj)
	40	{
4c788679	41	struct radeon_bo *robj = gobj->driver_private;
771fe6b9 JG	42
	43	gobj->driver_private = NULL;
	44	if (robj) {
4c788679	45	radeon_bo_unref(&robj);
771fe6b9 JG	46	}
	47	}
	48
	49	int radeon_gem_object_create(struct radeon_device *rdev, int size,
4c788679 JG	50	int alignment, int initial_domain,
	51	bool discardable, bool kernel,
	52	struct drm_gem_object **obj)
771fe6b9 JG	53	{
771fe6b9 JG	54	struct drm_gem_object *gobj;
4c788679	55	struct radeon_bo *robj;
771fe6b9 JG	56	int r;
	57
	58	*obj = NULL;
	59	gobj = drm_gem_object_alloc(rdev->ddev, size);
	60	if (!gobj) {
	61	return -ENOMEM;
	62	}
	63	/* At least align on page size */
	64	if (alignment < PAGE_SIZE) {
	65	alignment = PAGE_SIZE;
	66	}
4c788679	67	r = radeon_bo_create(rdev, gobj, size, kernel, initial_domain, &robj);
771fe6b9	68	if (r) {
ecabd32a DA	69	if (r != -ERESTARTSYS)
	70	DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
	71	size, initial_domain, alignment, r);
bc9025bd	72	drm_gem_object_unreference_unlocked(gobj);
771fe6b9 JG	73	return r;
	74	}
	75	gobj->driver_private = robj;
	76	*obj = gobj;
	77	return 0;
	78	}
	79
	80	int radeon_gem_object_pin(struct drm_gem_object *obj, uint32_t pin_domain,
	81	uint64_t *gpu_addr)
	82	{
4c788679 JG	83	struct radeon_bo *robj = obj->driver_private;
4c788679 JG	84	int r;
771fe6b9	85
4c788679 JG	86	r = radeon_bo_reserve(robj, false);
	87	if (unlikely(r != 0))
	88	return r;
	89	r = radeon_bo_pin(robj, pin_domain, gpu_addr);
	90	radeon_bo_unreserve(robj);
	91	return r;
771fe6b9 JG	92	}
	93
	94	void radeon_gem_object_unpin(struct drm_gem_object *obj)
	95	{
4c788679 JG	96	struct radeon_bo *robj = obj->driver_private;
	97	int r;
	98
	99	r = radeon_bo_reserve(robj, false);
	100	if (likely(r == 0)) {
	101	radeon_bo_unpin(robj);
	102	radeon_bo_unreserve(robj);
	103	}
771fe6b9 JG	104	}
	105
	106	int radeon_gem_set_domain(struct drm_gem_object *gobj,
	107	uint32_t rdomain, uint32_t wdomain)
	108	{
4c788679	109	struct radeon_bo *robj;
771fe6b9 JG	110	uint32_t domain;
	111	int r;
	112
	113	/* FIXME: reeimplement */
	114	robj = gobj->driver_private;
	115	/* work out where to validate the buffer to */
	116	domain = wdomain;
	117	if (!domain) {
	118	domain = rdomain;
	119	}
	120	if (!domain) {
	121	/* Do nothings */
	122	printk(KERN_WARNING "Set domain withou domain !\n");
	123	return 0;
	124	}
	125	if (domain == RADEON_GEM_DOMAIN_CPU) {
	126	/* Asking for cpu access wait for object idle */
4c788679	127	r = radeon_bo_wait(robj, NULL, false);
771fe6b9 JG	128	if (r) {
	129	printk(KERN_ERR "Failed to wait for object !\n");
	130	return r;
	131	}
	132	}
	133	return 0;
	134	}
	135
	136	int radeon_gem_init(struct radeon_device *rdev)
	137	{
	138	INIT_LIST_HEAD(&rdev->gem.objects);
	139	return 0;
	140	}
	141
	142	void radeon_gem_fini(struct radeon_device *rdev)
	143	{
4c788679	144	radeon_bo_force_delete(rdev);
771fe6b9 JG	145	}
	146
	147
	148	/*
	149	* GEM ioctls.
	150	*/
	151	int radeon_gem_info_ioctl(struct drm_device dev, void data,
	152	struct drm_file *filp)
	153	{
	154	struct radeon_device *rdev = dev->dev_private;
	155	struct drm_radeon_gem_info *args = data;
	156
7a50f01a	157	args->vram_size = rdev->mc.real_vram_size;
38e14921 MD	158	args->vram_visible = rdev->mc.real_vram_size;
38e14921 MD	159	if (rdev->stollen_vga_memory)
4c788679 JG	160	args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
	161	if (rdev->fbdev_rbo)
	162	args->vram_visible -= radeon_bo_size(rdev->fbdev_rbo);
38e14921 MD	163	args->gart_size = rdev->mc.gtt_size - rdev->cp.ring_size - 4096 -
38e14921 MD	164	RADEON_IB_POOL_SIZE641024;
771fe6b9 JG	165	return 0;
	166	}
	167
	168	int radeon_gem_pread_ioctl(struct drm_device dev, void data,
	169	struct drm_file *filp)
	170	{
	171	/* TODO: implement */
	172	DRM_ERROR("unimplemented %s\n", __func__);
	173	return -ENOSYS;
	174	}
	175
	176	int radeon_gem_pwrite_ioctl(struct drm_device dev, void data,
	177	struct drm_file *filp)
	178	{
	179	/* TODO: implement */
	180	DRM_ERROR("unimplemented %s\n", __func__);
	181	return -ENOSYS;
	182	}
	183
	184	int radeon_gem_create_ioctl(struct drm_device dev, void data,
	185	struct drm_file *filp)
	186	{
	187	struct radeon_device *rdev = dev->dev_private;
	188	struct drm_radeon_gem_create *args = data;
	189	struct drm_gem_object *gobj;
	190	uint32_t handle;
	191	int r;
	192
	193	/* create a gem object to contain this object in */
	194	args->size = roundup(args->size, PAGE_SIZE);
	195	r = radeon_gem_object_create(rdev, args->size, args->alignment,
4c788679 JG	196	args->initial_domain, false,
4c788679 JG	197	false, &gobj);
771fe6b9 JG	198	if (r) {
	199	return r;
	200	}
	201	r = drm_gem_handle_create(filp, gobj, &handle);
	202	if (r) {
bc9025bd	203	drm_gem_object_unreference_unlocked(gobj);
771fe6b9 JG	204	return r;
771fe6b9 JG	205	}
bc9025bd	206	drm_gem_object_handle_unreference_unlocked(gobj);
771fe6b9 JG	207	args->handle = handle;
	208	return 0;
	209	}
	210
	211	int radeon_gem_set_domain_ioctl(struct drm_device dev, void data,
	212	struct drm_file *filp)
	213	{
	214	/* transition the BO to a domain -
	215	* just validate the BO into a certain domain */
	216	struct drm_radeon_gem_set_domain *args = data;
	217	struct drm_gem_object *gobj;
4c788679	218	struct radeon_bo *robj;
771fe6b9 JG	219	int r;
	220
	221	/* for now if someone requests domain CPU -
	222	* just make sure the buffer is finished with */
	223
	224	/* just do a BO wait for now */
	225	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	226	if (gobj == NULL) {
	227	return -EINVAL;
	228	}
	229	robj = gobj->driver_private;
	230
	231	r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
	232
bc9025bd	233	drm_gem_object_unreference_unlocked(gobj);
771fe6b9 JG	234	return r;
	235	}
	236
	237	int radeon_gem_mmap_ioctl(struct drm_device dev, void data,
	238	struct drm_file *filp)
	239	{
	240	struct drm_radeon_gem_mmap *args = data;
	241	struct drm_gem_object *gobj;
4c788679	242	struct radeon_bo *robj;
771fe6b9 JG	243
	244	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	245	if (gobj == NULL) {
	246	return -EINVAL;
	247	}
	248	robj = gobj->driver_private;
4c788679	249	args->addr_ptr = radeon_bo_mmap_offset(robj);
bc9025bd	250	drm_gem_object_unreference_unlocked(gobj);
4c788679	251	return 0;
771fe6b9 JG	252	}
	253
	254	int radeon_gem_busy_ioctl(struct drm_device dev, void data,
	255	struct drm_file *filp)
	256	{
cefb87ef DA	257	struct drm_radeon_gem_busy *args = data;
cefb87ef DA	258	struct drm_gem_object *gobj;
4c788679	259	struct radeon_bo *robj;
cefb87ef	260	int r;
4361e52a	261	uint32_t cur_placement = 0;
cefb87ef DA	262
	263	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	264	if (gobj == NULL) {
	265	return -EINVAL;
	266	}
	267	robj = gobj->driver_private;
4c788679	268	r = radeon_bo_wait(robj, &cur_placement, true);
9f844e51 MD	269	switch (cur_placement) {
9f844e51 MD	270	case TTM_PL_VRAM:
cefb87ef	271	args->domain = RADEON_GEM_DOMAIN_VRAM;
9f844e51 MD	272	break;
9f844e51 MD	273	case TTM_PL_TT:
cefb87ef	274	args->domain = RADEON_GEM_DOMAIN_GTT;
9f844e51 MD	275	break;
9f844e51 MD	276	case TTM_PL_SYSTEM:
cefb87ef	277	args->domain = RADEON_GEM_DOMAIN_CPU;
9f844e51 MD	278	default:
	279	break;
	280	}
bc9025bd	281	drm_gem_object_unreference_unlocked(gobj);
e3b2415e	282	return r;
771fe6b9 JG	283	}
	284
	285	int radeon_gem_wait_idle_ioctl(struct drm_device dev, void data,
	286	struct drm_file *filp)
	287	{
	288	struct drm_radeon_gem_wait_idle *args = data;
	289	struct drm_gem_object *gobj;
4c788679	290	struct radeon_bo *robj;
771fe6b9 JG	291	int r;
	292
	293	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	294	if (gobj == NULL) {
	295	return -EINVAL;
	296	}
	297	robj = gobj->driver_private;
4c788679	298	r = radeon_bo_wait(robj, NULL, false);
062b389c JG	299	/* callback hw specific functions if any */
	300	if (robj->rdev->asic->ioctl_wait_idle)
	301	robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
bc9025bd	302	drm_gem_object_unreference_unlocked(gobj);
771fe6b9 JG	303	return r;
771fe6b9 JG	304	}
e024e110 DA	305
	306	int radeon_gem_set_tiling_ioctl(struct drm_device dev, void data,
	307	struct drm_file *filp)
	308	{
	309	struct drm_radeon_gem_set_tiling *args = data;
	310	struct drm_gem_object *gobj;
4c788679	311	struct radeon_bo *robj;
e024e110 DA	312	int r = 0;
	313
	314	DRM_DEBUG("%d \n", args->handle);
	315	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	316	if (gobj == NULL)
	317	return -EINVAL;
	318	robj = gobj->driver_private;
4c788679	319	r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
bc9025bd	320	drm_gem_object_unreference_unlocked(gobj);
e024e110 DA	321	return r;
	322	}
	323
	324	int radeon_gem_get_tiling_ioctl(struct drm_device dev, void data,
	325	struct drm_file *filp)
	326	{
	327	struct drm_radeon_gem_get_tiling *args = data;
	328	struct drm_gem_object *gobj;
4c788679	329	struct radeon_bo *rbo;
e024e110 DA	330	int r = 0;
	331
	332	DRM_DEBUG("\n");
	333	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	334	if (gobj == NULL)
	335	return -EINVAL;
4c788679 JG	336	rbo = gobj->driver_private;
	337	r = radeon_bo_reserve(rbo, false);
	338	if (unlikely(r != 0))
51f07b7e	339	goto out;
4c788679 JG	340	radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
4c788679 JG	341	radeon_bo_unreserve(rbo);
51f07b7e	342	out:
bc9025bd	343	drm_gem_object_unreference_unlocked(gobj);
e024e110 DA	344	return r;
e024e110 DA	345	}