Commit | Line | Data |
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771fe6b9 JG |
1 | /* |
2 | * Copyright 2008 Advanced Micro Devices, Inc. | |
3 | * Copyright 2008 Red Hat Inc. | |
4 | * Copyright 2009 Jerome Glisse. | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | |
7 | * copy of this software and associated documentation files (the "Software"), | |
8 | * to deal in the Software without restriction, including without limitation | |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
10 | * and/or sell copies of the Software, and to permit persons to whom the | |
11 | * Software is furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
22 | * OTHER DEALINGS IN THE SOFTWARE. | |
23 | * | |
24 | * Authors: Dave Airlie | |
25 | * Alex Deucher | |
26 | * Jerome Glisse | |
27 | */ | |
760285e7 DH |
28 | #include <drm/drmP.h> |
29 | #include <drm/drm_crtc_helper.h> | |
30 | #include <drm/radeon_drm.h> | |
771fe6b9 | 31 | #include "radeon_reg.h" |
771fe6b9 JG |
32 | #include "radeon.h" |
33 | #include "atom.h" | |
34 | ||
10ebc0bc DA |
35 | #include <linux/pm_runtime.h> |
36 | ||
fb98257a CK |
37 | #define RADEON_WAIT_IDLE_TIMEOUT 200 |
38 | ||
b73ba98d AD |
39 | /** |
40 | * radeon_driver_irq_handler_kms - irq handler for KMS | |
41 | * | |
e9f0d76f | 42 | * @int irq, void *arg: args |
b73ba98d AD |
43 | * |
44 | * This is the irq handler for the radeon KMS driver (all asics). | |
45 | * radeon_irq_process is a macro that points to the per-asic | |
46 | * irq handler callback. | |
47 | */ | |
e9f0d76f | 48 | irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg) |
771fe6b9 JG |
49 | { |
50 | struct drm_device *dev = (struct drm_device *) arg; | |
51 | struct radeon_device *rdev = dev->dev_private; | |
10ebc0bc | 52 | irqreturn_t ret; |
771fe6b9 | 53 | |
10ebc0bc DA |
54 | ret = radeon_irq_process(rdev); |
55 | if (ret == IRQ_HANDLED) | |
56 | pm_runtime_mark_last_busy(dev->dev); | |
57 | return ret; | |
771fe6b9 JG |
58 | } |
59 | ||
d4877cf2 AD |
60 | /* |
61 | * Handle hotplug events outside the interrupt handler proper. | |
62 | */ | |
b73ba98d AD |
63 | /** |
64 | * radeon_hotplug_work_func - display hotplug work handler | |
65 | * | |
66 | * @work: work struct | |
67 | * | |
68 | * This is the hot plug event work handler (all asics). | |
69 | * The work gets scheduled from the irq handler if there | |
70 | * was a hot plug interrupt. It walks the connector table | |
71 | * and calls the hotplug handler for each one, then sends | |
72 | * a drm hotplug event to alert userspace. | |
73 | */ | |
d4877cf2 AD |
74 | static void radeon_hotplug_work_func(struct work_struct *work) |
75 | { | |
76 | struct radeon_device *rdev = container_of(work, struct radeon_device, | |
77 | hotplug_work); | |
78 | struct drm_device *dev = rdev->ddev; | |
79 | struct drm_mode_config *mode_config = &dev->mode_config; | |
80 | struct drm_connector *connector; | |
81 | ||
82 | if (mode_config->num_connector) { | |
83 | list_for_each_entry(connector, &mode_config->connector_list, head) | |
84 | radeon_connector_hotplug(connector); | |
85 | } | |
86 | /* Just fire off a uevent and let userspace tell us what to do */ | |
eb1f8e4f | 87 | drm_helper_hpd_irq_event(dev); |
d4877cf2 AD |
88 | } |
89 | ||
b73ba98d AD |
90 | /** |
91 | * radeon_driver_irq_preinstall_kms - drm irq preinstall callback | |
92 | * | |
93 | * @dev: drm dev pointer | |
94 | * | |
95 | * Gets the hw ready to enable irqs (all asics). | |
96 | * This function disables all interrupt sources on the GPU. | |
97 | */ | |
771fe6b9 JG |
98 | void radeon_driver_irq_preinstall_kms(struct drm_device *dev) |
99 | { | |
100 | struct radeon_device *rdev = dev->dev_private; | |
fb98257a | 101 | unsigned long irqflags; |
771fe6b9 JG |
102 | unsigned i; |
103 | ||
fb98257a | 104 | spin_lock_irqsave(&rdev->irq.lock, irqflags); |
771fe6b9 | 105 | /* Disable *all* interrupts */ |
1b37078b | 106 | for (i = 0; i < RADEON_NUM_RINGS; i++) |
736fc37f | 107 | atomic_set(&rdev->irq.ring_int[i], 0); |
4a6369e9 | 108 | rdev->irq.dpm_thermal = false; |
54bd5206 | 109 | for (i = 0; i < RADEON_MAX_HPD_PINS; i++) |
9e7b414e | 110 | rdev->irq.hpd[i] = false; |
54bd5206 IH |
111 | for (i = 0; i < RADEON_MAX_CRTCS; i++) { |
112 | rdev->irq.crtc_vblank_int[i] = false; | |
736fc37f | 113 | atomic_set(&rdev->irq.pflip[i], 0); |
f122c610 | 114 | rdev->irq.afmt[i] = false; |
6f34be50 | 115 | } |
771fe6b9 | 116 | radeon_irq_set(rdev); |
fb98257a | 117 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); |
771fe6b9 JG |
118 | /* Clear bits */ |
119 | radeon_irq_process(rdev); | |
120 | } | |
121 | ||
b73ba98d AD |
122 | /** |
123 | * radeon_driver_irq_postinstall_kms - drm irq preinstall callback | |
124 | * | |
125 | * @dev: drm dev pointer | |
126 | * | |
127 | * Handles stuff to be done after enabling irqs (all asics). | |
128 | * Returns 0 on success. | |
129 | */ | |
771fe6b9 JG |
130 | int radeon_driver_irq_postinstall_kms(struct drm_device *dev) |
131 | { | |
771fe6b9 | 132 | dev->max_vblank_count = 0x001fffff; |
771fe6b9 JG |
133 | return 0; |
134 | } | |
135 | ||
b73ba98d AD |
136 | /** |
137 | * radeon_driver_irq_uninstall_kms - drm irq uninstall callback | |
138 | * | |
139 | * @dev: drm dev pointer | |
140 | * | |
141 | * This function disables all interrupt sources on the GPU (all asics). | |
142 | */ | |
771fe6b9 JG |
143 | void radeon_driver_irq_uninstall_kms(struct drm_device *dev) |
144 | { | |
145 | struct radeon_device *rdev = dev->dev_private; | |
fb98257a | 146 | unsigned long irqflags; |
771fe6b9 JG |
147 | unsigned i; |
148 | ||
149 | if (rdev == NULL) { | |
150 | return; | |
151 | } | |
fb98257a | 152 | spin_lock_irqsave(&rdev->irq.lock, irqflags); |
771fe6b9 | 153 | /* Disable *all* interrupts */ |
1b37078b | 154 | for (i = 0; i < RADEON_NUM_RINGS; i++) |
736fc37f | 155 | atomic_set(&rdev->irq.ring_int[i], 0); |
4a6369e9 | 156 | rdev->irq.dpm_thermal = false; |
54bd5206 | 157 | for (i = 0; i < RADEON_MAX_HPD_PINS; i++) |
003e69f9 | 158 | rdev->irq.hpd[i] = false; |
54bd5206 IH |
159 | for (i = 0; i < RADEON_MAX_CRTCS; i++) { |
160 | rdev->irq.crtc_vblank_int[i] = false; | |
736fc37f | 161 | atomic_set(&rdev->irq.pflip[i], 0); |
f122c610 | 162 | rdev->irq.afmt[i] = false; |
6f34be50 | 163 | } |
771fe6b9 | 164 | radeon_irq_set(rdev); |
fb98257a | 165 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); |
771fe6b9 JG |
166 | } |
167 | ||
b73ba98d AD |
168 | /** |
169 | * radeon_msi_ok - asic specific msi checks | |
170 | * | |
171 | * @rdev: radeon device pointer | |
172 | * | |
173 | * Handles asic specific MSI checks to determine if | |
174 | * MSIs should be enabled on a particular chip (all asics). | |
175 | * Returns true if MSIs should be enabled, false if MSIs | |
176 | * should not be enabled. | |
177 | */ | |
8f6c25c5 AD |
178 | static bool radeon_msi_ok(struct radeon_device *rdev) |
179 | { | |
180 | /* RV370/RV380 was first asic with MSI support */ | |
181 | if (rdev->family < CHIP_RV380) | |
182 | return false; | |
183 | ||
184 | /* MSIs don't work on AGP */ | |
185 | if (rdev->flags & RADEON_IS_AGP) | |
186 | return false; | |
187 | ||
a18cee15 AD |
188 | /* force MSI on */ |
189 | if (radeon_msi == 1) | |
190 | return true; | |
191 | else if (radeon_msi == 0) | |
192 | return false; | |
193 | ||
b362105f AD |
194 | /* Quirks */ |
195 | /* HP RS690 only seems to work with MSIs. */ | |
196 | if ((rdev->pdev->device == 0x791f) && | |
197 | (rdev->pdev->subsystem_vendor == 0x103c) && | |
198 | (rdev->pdev->subsystem_device == 0x30c2)) | |
199 | return true; | |
200 | ||
44517c44 AD |
201 | /* Dell RS690 only seems to work with MSIs. */ |
202 | if ((rdev->pdev->device == 0x791f) && | |
203 | (rdev->pdev->subsystem_vendor == 0x1028) && | |
204 | (rdev->pdev->subsystem_device == 0x01fc)) | |
205 | return true; | |
206 | ||
01e718ec AD |
207 | /* Dell RS690 only seems to work with MSIs. */ |
208 | if ((rdev->pdev->device == 0x791f) && | |
209 | (rdev->pdev->subsystem_vendor == 0x1028) && | |
210 | (rdev->pdev->subsystem_device == 0x01fd)) | |
211 | return true; | |
212 | ||
3a6d59df AD |
213 | /* Gateway RS690 only seems to work with MSIs. */ |
214 | if ((rdev->pdev->device == 0x791f) && | |
215 | (rdev->pdev->subsystem_vendor == 0x107b) && | |
216 | (rdev->pdev->subsystem_device == 0x0185)) | |
217 | return true; | |
218 | ||
fb6ca6d1 AD |
219 | /* try and enable MSIs by default on all RS690s */ |
220 | if (rdev->family == CHIP_RS690) | |
221 | return true; | |
222 | ||
16a5e32b DA |
223 | /* RV515 seems to have MSI issues where it loses |
224 | * MSI rearms occasionally. This leads to lockups and freezes. | |
225 | * disable it by default. | |
226 | */ | |
227 | if (rdev->family == CHIP_RV515) | |
228 | return false; | |
8f6c25c5 AD |
229 | if (rdev->flags & RADEON_IS_IGP) { |
230 | /* APUs work fine with MSIs */ | |
231 | if (rdev->family >= CHIP_PALM) | |
232 | return true; | |
233 | /* lots of IGPs have problems with MSIs */ | |
234 | return false; | |
235 | } | |
236 | ||
237 | return true; | |
238 | } | |
239 | ||
b73ba98d AD |
240 | /** |
241 | * radeon_irq_kms_init - init driver interrupt info | |
242 | * | |
243 | * @rdev: radeon device pointer | |
244 | * | |
245 | * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics). | |
246 | * Returns 0 for success, error for failure. | |
247 | */ | |
771fe6b9 JG |
248 | int radeon_irq_kms_init(struct radeon_device *rdev) |
249 | { | |
250 | int r = 0; | |
251 | ||
fb98257a | 252 | spin_lock_init(&rdev->irq.lock); |
9e7b414e | 253 | r = drm_vblank_init(rdev->ddev, rdev->num_crtc); |
771fe6b9 JG |
254 | if (r) { |
255 | return r; | |
256 | } | |
3e5cb98d AD |
257 | /* enable msi */ |
258 | rdev->msi_enabled = 0; | |
8f6c25c5 AD |
259 | |
260 | if (radeon_msi_ok(rdev)) { | |
3e5cb98d | 261 | int ret = pci_enable_msi(rdev->pdev); |
d8f60cfc | 262 | if (!ret) { |
3e5cb98d | 263 | rdev->msi_enabled = 1; |
da7be684 | 264 | dev_info(rdev->dev, "radeon: using MSI.\n"); |
d8f60cfc | 265 | } |
3e5cb98d | 266 | } |
27c505ca SS |
267 | |
268 | INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func); | |
269 | INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi); | |
27c505ca | 270 | |
771fe6b9 | 271 | rdev->irq.installed = true; |
bb0f1b5c | 272 | r = drm_irq_install(rdev->ddev, rdev->ddev->pdev->irq); |
003e69f9 JG |
273 | if (r) { |
274 | rdev->irq.installed = false; | |
27c505ca | 275 | flush_work(&rdev->hotplug_work); |
003e69f9 JG |
276 | return r; |
277 | } | |
a01c34f7 | 278 | |
771fe6b9 JG |
279 | DRM_INFO("radeon: irq initialized.\n"); |
280 | return 0; | |
281 | } | |
282 | ||
b73ba98d | 283 | /** |
cf2fbdd2 | 284 | * radeon_irq_kms_fini - tear down driver interrupt info |
b73ba98d AD |
285 | * |
286 | * @rdev: radeon device pointer | |
287 | * | |
288 | * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics). | |
289 | */ | |
771fe6b9 JG |
290 | void radeon_irq_kms_fini(struct radeon_device *rdev) |
291 | { | |
003e69f9 | 292 | drm_vblank_cleanup(rdev->ddev); |
771fe6b9 | 293 | if (rdev->irq.installed) { |
771fe6b9 | 294 | drm_irq_uninstall(rdev->ddev); |
003e69f9 | 295 | rdev->irq.installed = false; |
3e5cb98d AD |
296 | if (rdev->msi_enabled) |
297 | pci_disable_msi(rdev->pdev); | |
a01c34f7 | 298 | flush_work(&rdev->hotplug_work); |
771fe6b9 JG |
299 | } |
300 | } | |
1614f8b1 | 301 | |
b73ba98d AD |
302 | /** |
303 | * radeon_irq_kms_sw_irq_get - enable software interrupt | |
304 | * | |
305 | * @rdev: radeon device pointer | |
306 | * @ring: ring whose interrupt you want to enable | |
307 | * | |
308 | * Enables the software interrupt for a specific ring (all asics). | |
309 | * The software interrupt is generally used to signal a fence on | |
310 | * a particular ring. | |
311 | */ | |
1b37078b | 312 | void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring) |
1614f8b1 DA |
313 | { |
314 | unsigned long irqflags; | |
315 | ||
736fc37f CK |
316 | if (!rdev->ddev->irq_enabled) |
317 | return; | |
318 | ||
319 | if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) { | |
320 | spin_lock_irqsave(&rdev->irq.lock, irqflags); | |
1614f8b1 | 321 | radeon_irq_set(rdev); |
736fc37f | 322 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); |
1614f8b1 | 323 | } |
1614f8b1 DA |
324 | } |
325 | ||
954605ca ML |
326 | /** |
327 | * radeon_irq_kms_sw_irq_get_delayed - enable software interrupt | |
328 | * | |
329 | * @rdev: radeon device pointer | |
330 | * @ring: ring whose interrupt you want to enable | |
331 | * | |
332 | * Enables the software interrupt for a specific ring (all asics). | |
333 | * The software interrupt is generally used to signal a fence on | |
334 | * a particular ring. | |
335 | */ | |
336 | bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring) | |
337 | { | |
338 | return atomic_inc_return(&rdev->irq.ring_int[ring]) == 1; | |
339 | } | |
340 | ||
b73ba98d AD |
341 | /** |
342 | * radeon_irq_kms_sw_irq_put - disable software interrupt | |
343 | * | |
344 | * @rdev: radeon device pointer | |
345 | * @ring: ring whose interrupt you want to disable | |
346 | * | |
347 | * Disables the software interrupt for a specific ring (all asics). | |
348 | * The software interrupt is generally used to signal a fence on | |
349 | * a particular ring. | |
350 | */ | |
1b37078b | 351 | void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring) |
1614f8b1 DA |
352 | { |
353 | unsigned long irqflags; | |
354 | ||
736fc37f CK |
355 | if (!rdev->ddev->irq_enabled) |
356 | return; | |
357 | ||
358 | if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) { | |
359 | spin_lock_irqsave(&rdev->irq.lock, irqflags); | |
1614f8b1 | 360 | radeon_irq_set(rdev); |
736fc37f | 361 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); |
1614f8b1 | 362 | } |
1614f8b1 DA |
363 | } |
364 | ||
b73ba98d AD |
365 | /** |
366 | * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt | |
367 | * | |
368 | * @rdev: radeon device pointer | |
369 | * @crtc: crtc whose interrupt you want to enable | |
370 | * | |
371 | * Enables the pageflip interrupt for a specific crtc (all asics). | |
372 | * For pageflips we use the vblank interrupt source. | |
373 | */ | |
6f34be50 AD |
374 | void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc) |
375 | { | |
376 | unsigned long irqflags; | |
377 | ||
378 | if (crtc < 0 || crtc >= rdev->num_crtc) | |
379 | return; | |
380 | ||
736fc37f CK |
381 | if (!rdev->ddev->irq_enabled) |
382 | return; | |
383 | ||
384 | if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) { | |
385 | spin_lock_irqsave(&rdev->irq.lock, irqflags); | |
6f34be50 | 386 | radeon_irq_set(rdev); |
736fc37f | 387 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); |
6f34be50 | 388 | } |
6f34be50 AD |
389 | } |
390 | ||
b73ba98d AD |
391 | /** |
392 | * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt | |
393 | * | |
394 | * @rdev: radeon device pointer | |
395 | * @crtc: crtc whose interrupt you want to disable | |
396 | * | |
397 | * Disables the pageflip interrupt for a specific crtc (all asics). | |
398 | * For pageflips we use the vblank interrupt source. | |
399 | */ | |
6f34be50 AD |
400 | void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc) |
401 | { | |
402 | unsigned long irqflags; | |
403 | ||
404 | if (crtc < 0 || crtc >= rdev->num_crtc) | |
405 | return; | |
406 | ||
736fc37f CK |
407 | if (!rdev->ddev->irq_enabled) |
408 | return; | |
409 | ||
410 | if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) { | |
411 | spin_lock_irqsave(&rdev->irq.lock, irqflags); | |
6f34be50 | 412 | radeon_irq_set(rdev); |
736fc37f | 413 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); |
6f34be50 | 414 | } |
6f34be50 AD |
415 | } |
416 | ||
b73ba98d AD |
417 | /** |
418 | * radeon_irq_kms_enable_afmt - enable audio format change interrupt | |
419 | * | |
420 | * @rdev: radeon device pointer | |
421 | * @block: afmt block whose interrupt you want to enable | |
422 | * | |
423 | * Enables the afmt change interrupt for a specific afmt block (all asics). | |
424 | */ | |
fb98257a CK |
425 | void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block) |
426 | { | |
427 | unsigned long irqflags; | |
428 | ||
cc9945bf AD |
429 | if (!rdev->ddev->irq_enabled) |
430 | return; | |
431 | ||
fb98257a CK |
432 | spin_lock_irqsave(&rdev->irq.lock, irqflags); |
433 | rdev->irq.afmt[block] = true; | |
434 | radeon_irq_set(rdev); | |
435 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); | |
436 | ||
437 | } | |
438 | ||
b73ba98d AD |
439 | /** |
440 | * radeon_irq_kms_disable_afmt - disable audio format change interrupt | |
441 | * | |
442 | * @rdev: radeon device pointer | |
443 | * @block: afmt block whose interrupt you want to disable | |
444 | * | |
445 | * Disables the afmt change interrupt for a specific afmt block (all asics). | |
446 | */ | |
fb98257a CK |
447 | void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block) |
448 | { | |
449 | unsigned long irqflags; | |
450 | ||
cc9945bf AD |
451 | if (!rdev->ddev->irq_enabled) |
452 | return; | |
453 | ||
fb98257a CK |
454 | spin_lock_irqsave(&rdev->irq.lock, irqflags); |
455 | rdev->irq.afmt[block] = false; | |
456 | radeon_irq_set(rdev); | |
457 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); | |
458 | } | |
459 | ||
b73ba98d AD |
460 | /** |
461 | * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt | |
462 | * | |
463 | * @rdev: radeon device pointer | |
464 | * @hpd_mask: mask of hpd pins you want to enable. | |
465 | * | |
466 | * Enables the hotplug detect interrupt for a specific hpd pin (all asics). | |
467 | */ | |
fb98257a CK |
468 | void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask) |
469 | { | |
470 | unsigned long irqflags; | |
471 | int i; | |
472 | ||
cc9945bf AD |
473 | if (!rdev->ddev->irq_enabled) |
474 | return; | |
475 | ||
fb98257a CK |
476 | spin_lock_irqsave(&rdev->irq.lock, irqflags); |
477 | for (i = 0; i < RADEON_MAX_HPD_PINS; ++i) | |
478 | rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i)); | |
479 | radeon_irq_set(rdev); | |
480 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); | |
481 | } | |
482 | ||
b73ba98d AD |
483 | /** |
484 | * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt | |
485 | * | |
486 | * @rdev: radeon device pointer | |
487 | * @hpd_mask: mask of hpd pins you want to disable. | |
488 | * | |
489 | * Disables the hotplug detect interrupt for a specific hpd pin (all asics). | |
490 | */ | |
fb98257a CK |
491 | void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask) |
492 | { | |
493 | unsigned long irqflags; | |
494 | int i; | |
495 | ||
cc9945bf AD |
496 | if (!rdev->ddev->irq_enabled) |
497 | return; | |
498 | ||
fb98257a CK |
499 | spin_lock_irqsave(&rdev->irq.lock, irqflags); |
500 | for (i = 0; i < RADEON_MAX_HPD_PINS; ++i) | |
501 | rdev->irq.hpd[i] &= !(hpd_mask & (1 << i)); | |
502 | radeon_irq_set(rdev); | |
503 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); | |
504 | } | |
505 |