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40f5cf99 AD |
1 | /* |
2 | * Copyright 2012 Advanced Micro Devices, Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * based on nouveau_prime.c | |
23 | * | |
24 | * Authors: Alex Deucher | |
25 | */ | |
760285e7 | 26 | #include <drm/drmP.h> |
40f5cf99 AD |
27 | |
28 | #include "radeon.h" | |
760285e7 | 29 | #include <drm/radeon_drm.h> |
b5e9c1a2 | 30 | #include <linux/dma-buf.h> |
40f5cf99 | 31 | |
1e6d17a5 | 32 | struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj) |
40f5cf99 | 33 | { |
1e6d17a5 | 34 | struct radeon_bo *bo = gem_to_radeon_bo(obj); |
40f5cf99 | 35 | int npages = bo->tbo.num_pages; |
40f5cf99 | 36 | |
1e6d17a5 | 37 | return drm_prime_pages_to_sg(bo->tbo.ttm->pages, npages); |
40f5cf99 AD |
38 | } |
39 | ||
1e6d17a5 | 40 | void *radeon_gem_prime_vmap(struct drm_gem_object *obj) |
946c7491 | 41 | { |
1e6d17a5 | 42 | struct radeon_bo *bo = gem_to_radeon_bo(obj); |
63bc620b DA |
43 | int ret; |
44 | ||
63bc620b DA |
45 | ret = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, |
46 | &bo->dma_buf_vmap); | |
1e6d17a5 | 47 | if (ret) |
63bc620b | 48 | return ERR_PTR(ret); |
1e6d17a5 | 49 | |
63bc620b DA |
50 | return bo->dma_buf_vmap.virtual; |
51 | } | |
52 | ||
1e6d17a5 | 53 | void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr) |
63bc620b | 54 | { |
1e6d17a5 | 55 | struct radeon_bo *bo = gem_to_radeon_bo(obj); |
63bc620b | 56 | |
1e6d17a5 | 57 | ttm_bo_kunmap(&bo->dma_buf_vmap); |
63bc620b | 58 | } |
1e6d17a5 AP |
59 | |
60 | struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev, | |
b5e9c1a2 | 61 | struct dma_buf_attachment *attach, |
1e6d17a5 | 62 | struct sg_table *sg) |
40f5cf99 | 63 | { |
831b6966 | 64 | struct reservation_object *resv = attach->dmabuf->resv; |
40f5cf99 AD |
65 | struct radeon_device *rdev = dev->dev_private; |
66 | struct radeon_bo *bo; | |
67 | int ret; | |
68 | ||
831b6966 | 69 | ww_mutex_lock(&resv->lock, NULL); |
b5e9c1a2 | 70 | ret = radeon_bo_create(rdev, attach->dmabuf->size, PAGE_SIZE, false, |
831b6966 ML |
71 | RADEON_GEM_DOMAIN_GTT, 0, sg, resv, &bo); |
72 | ww_mutex_unlock(&resv->lock); | |
40f5cf99 | 73 | if (ret) |
1e6d17a5 | 74 | return ERR_PTR(ret); |
40f5cf99 AD |
75 | |
76 | mutex_lock(&rdev->gem.mutex); | |
77 | list_add_tail(&bo->list, &rdev->gem.objects); | |
78 | mutex_unlock(&rdev->gem.mutex); | |
79 | ||
1e6d17a5 | 80 | return &bo->gem_base; |
40f5cf99 AD |
81 | } |
82 | ||
1e6d17a5 | 83 | int radeon_gem_prime_pin(struct drm_gem_object *obj) |
40f5cf99 AD |
84 | { |
85 | struct radeon_bo *bo = gem_to_radeon_bo(obj); | |
86 | int ret = 0; | |
87 | ||
489797d5 DA |
88 | ret = radeon_bo_reserve(bo, false); |
89 | if (unlikely(ret != 0)) | |
1e6d17a5 | 90 | return ret; |
489797d5 | 91 | |
40f5cf99 AD |
92 | /* pin buffer into GTT */ |
93 | ret = radeon_bo_pin(bo, RADEON_GEM_DOMAIN_GTT, NULL); | |
489797d5 | 94 | radeon_bo_unreserve(bo); |
280cf211 ML |
95 | return ret; |
96 | } | |
97 | ||
98 | void radeon_gem_prime_unpin(struct drm_gem_object *obj) | |
99 | { | |
100 | struct radeon_bo *bo = gem_to_radeon_bo(obj); | |
101 | int ret = 0; | |
40f5cf99 | 102 | |
280cf211 ML |
103 | ret = radeon_bo_reserve(bo, false); |
104 | if (unlikely(ret != 0)) | |
105 | return; | |
106 | ||
107 | radeon_bo_unpin(bo); | |
108 | radeon_bo_unreserve(bo); | |
40f5cf99 | 109 | } |
3aac4502 ML |
110 | |
111 | ||
112 | struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *obj) | |
113 | { | |
114 | struct radeon_bo *bo = gem_to_radeon_bo(obj); | |
115 | ||
116 | return bo->tbo.resv; | |
117 | } | |
484048db | 118 | |
f72a113a CK |
119 | struct dma_buf *radeon_gem_prime_export(struct drm_device *dev, |
120 | struct drm_gem_object *gobj, | |
121 | int flags) | |
122 | { | |
123 | struct radeon_bo *bo = gem_to_radeon_bo(gobj); | |
124 | if (radeon_ttm_tt_has_userptr(bo->tbo.ttm)) | |
125 | return ERR_PTR(-EPERM); | |
126 | return drm_gem_prime_export(dev, gobj, flags); | |
127 | } |