[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_test.c

/*
 * Copyright 2009 VMware, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Michel Dänzer
 */
#include <drm/drmP.h>
#include <drm/radeon_drm.h>
#include "radeon_reg.h"
#include "radeon.h"

#define RADEON_TEST_COPY_BLIT 1
#define RADEON_TEST_COPY_DMA  0


/* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
static void radeon_do_test_moves(struct radeon_device *rdev, int flag)
{
	struct radeon_bo *vram_obj = NULL;
	struct radeon_bo **gtt_obj = NULL;
	uint64_t gtt_addr, vram_addr;
	unsigned n, size;
	int i, r, ring;

	switch (flag) {
	case RADEON_TEST_COPY_DMA:
		ring = radeon_copy_dma_ring_index(rdev);
		break;
	case RADEON_TEST_COPY_BLIT:
		ring = radeon_copy_blit_ring_index(rdev);
		break;
	default:
		DRM_ERROR("Unknown copy method\n");
		return;
	}

	size = 1024 * 1024;

	/* Number of tests =
	 * (Total GTT - IB pool - writeback page - ring buffers) / test size
	 */
	n = rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024;
	for (i = 0; i < RADEON_NUM_RINGS; ++i)
		n -= rdev->ring[i].ring_size;
	if (rdev->wb.wb_obj)
		n -= RADEON_GPU_PAGE_SIZE;
	if (rdev->ih.ring_obj)
		n -= rdev->ih.ring_size;
	n /= size;

	gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
	if (!gtt_obj) {
		DRM_ERROR("Failed to allocate %d pointers\n", n);
		r = 1;
		goto out_cleanup;
	}

	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
			     NULL, &vram_obj);
	if (r) {
		DRM_ERROR("Failed to create VRAM object\n");
		goto out_cleanup;
	}
	r = radeon_bo_reserve(vram_obj, false);
	if (unlikely(r != 0))
		goto out_unref;
	r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
	if (r) {
		DRM_ERROR("Failed to pin VRAM object\n");
		goto out_unres;
	}
	for (i = 0; i < n; i++) {
		void *gtt_map, *vram_map;
		void **gtt_start, **gtt_end;
		void **vram_start, **vram_end;
		struct radeon_fence *fence = NULL;

		r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
				     RADEON_GEM_DOMAIN_GTT, NULL, gtt_obj + i);
		if (r) {
			DRM_ERROR("Failed to create GTT object %d\n", i);
			goto out_lclean;
		}

		r = radeon_bo_reserve(gtt_obj[i], false);
		if (unlikely(r != 0))
			goto out_lclean_unref;
		r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, &gtt_addr);
		if (r) {
			DRM_ERROR("Failed to pin GTT object %d\n", i);
			goto out_lclean_unres;
		}

		r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
		if (r) {
			DRM_ERROR("Failed to map GTT object %d\n", i);
			goto out_lclean_unpin;
		}

		for (gtt_start = gtt_map, gtt_end = gtt_map + size;
		     gtt_start < gtt_end;
		     gtt_start++)
			*gtt_start = gtt_start;

		radeon_bo_kunmap(gtt_obj[i]);

		if (ring == R600_RING_TYPE_DMA_INDEX)
			r = radeon_copy_dma(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
		else
			r = radeon_copy_blit(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
		if (r) {
			DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
			goto out_lclean_unpin;
		}

		r = radeon_fence_wait(fence, false);
		if (r) {
			DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
			goto out_lclean_unpin;
		}

		radeon_fence_unref(&fence);

		r = radeon_bo_kmap(vram_obj, &vram_map);
		if (r) {
			DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
			goto out_lclean_unpin;
		}

		for (gtt_start = gtt_map, gtt_end = gtt_map + size,
		     vram_start = vram_map, vram_end = vram_map + size;
		     vram_start < vram_end;
		     gtt_start++, vram_start++) {
			if (*vram_start != gtt_start) {
				DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
					  "expected 0x%p (GTT/VRAM offset "
					  "0x%16llx/0x%16llx)\n",
					  i, *vram_start, gtt_start,
					  (unsigned long long)
					  (gtt_addr - rdev->mc.gtt_start +
					   (void*)gtt_start - gtt_map),
					  (unsigned long long)
					  (vram_addr - rdev->mc.vram_start +
					   (void*)gtt_start - gtt_map));
				radeon_bo_kunmap(vram_obj);
				goto out_lclean_unpin;
			}
			*vram_start = vram_start;
		}

		radeon_bo_kunmap(vram_obj);

		if (ring == R600_RING_TYPE_DMA_INDEX)
			r = radeon_copy_dma(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
		else
			r = radeon_copy_blit(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
		if (r) {
			DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
			goto out_lclean_unpin;
		}

		r = radeon_fence_wait(fence, false);
		if (r) {
			DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
			goto out_lclean_unpin;
		}

		radeon_fence_unref(&fence);

		r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
		if (r) {
			DRM_ERROR("Failed to map GTT object after copy %d\n", i);
			goto out_lclean_unpin;
		}

		for (gtt_start = gtt_map, gtt_end = gtt_map + size,
		     vram_start = vram_map, vram_end = vram_map + size;
		     gtt_start < gtt_end;
		     gtt_start++, vram_start++) {
			if (*gtt_start != vram_start) {
				DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
					  "expected 0x%p (VRAM/GTT offset "
					  "0x%16llx/0x%16llx)\n",
					  i, *gtt_start, vram_start,
					  (unsigned long long)
					  (vram_addr - rdev->mc.vram_start +
					   (void*)vram_start - vram_map),
					  (unsigned long long)
					  (gtt_addr - rdev->mc.gtt_start +
					   (void*)vram_start - vram_map));
				radeon_bo_kunmap(gtt_obj[i]);
				goto out_lclean_unpin;
			}
		}

		radeon_bo_kunmap(gtt_obj[i]);

		DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
			 gtt_addr - rdev->mc.gtt_start);
		continue;

out_lclean_unpin:
		radeon_bo_unpin(gtt_obj[i]);
out_lclean_unres:
		radeon_bo_unreserve(gtt_obj[i]);
out_lclean_unref:
		radeon_bo_unref(&gtt_obj[i]);
out_lclean:
		for (--i; i >= 0; --i) {
			radeon_bo_unpin(gtt_obj[i]);
			radeon_bo_unreserve(gtt_obj[i]);
			radeon_bo_unref(&gtt_obj[i]);
		}
		if (fence)
			radeon_fence_unref(&fence);
		break;
	}

	radeon_bo_unpin(vram_obj);
out_unres:
	radeon_bo_unreserve(vram_obj);
out_unref:
	radeon_bo_unref(&vram_obj);
out_cleanup:
	kfree(gtt_obj);
	if (r) {
		printk(KERN_WARNING "Error while testing BO move.\n");
	}
}

void radeon_test_moves(struct radeon_device *rdev)
{
	if (rdev->asic->copy.dma)
		radeon_do_test_moves(rdev, RADEON_TEST_COPY_DMA);
	if (rdev->asic->copy.blit)
		radeon_do_test_moves(rdev, RADEON_TEST_COPY_BLIT);
}

static int radeon_test_create_and_emit_fence(struct radeon_device *rdev,
					     struct radeon_ring *ring,
					     struct radeon_fence **fence)
{
	uint32_t handle = ring->idx ^ 0xdeafbeef;
	int r;

	if (ring->idx == R600_RING_TYPE_UVD_INDEX) {
		r = radeon_uvd_get_create_msg(rdev, ring->idx, handle, NULL);
		if (r) {
			DRM_ERROR("Failed to get dummy create msg\n");
			return r;
		}

		r = radeon_uvd_get_destroy_msg(rdev, ring->idx, handle, fence);
		if (r) {
			DRM_ERROR("Failed to get dummy destroy msg\n");
			return r;
		}

	} else if (ring->idx == TN_RING_TYPE_VCE1_INDEX ||
		   ring->idx == TN_RING_TYPE_VCE2_INDEX) {
		r = radeon_vce_get_create_msg(rdev, ring->idx, handle, NULL);
		if (r) {
			DRM_ERROR("Failed to get dummy create msg\n");
			return r;
		}

		r = radeon_vce_get_destroy_msg(rdev, ring->idx, handle, fence);
		if (r) {
			DRM_ERROR("Failed to get dummy destroy msg\n");
			return r;
		}

	} else {
		r = radeon_ring_lock(rdev, ring, 64);
		if (r) {
			DRM_ERROR("Failed to lock ring A %d\n", ring->idx);
			return r;
		}
		radeon_fence_emit(rdev, fence, ring->idx);
		radeon_ring_unlock_commit(rdev, ring);
	}
	return 0;
}

void radeon_test_ring_sync(struct radeon_device *rdev,
			   struct radeon_ring *ringA,
			   struct radeon_ring *ringB)
{
	struct radeon_fence *fence1 = NULL, *fence2 = NULL;
	struct radeon_semaphore *semaphore = NULL;
	int r;

	r = radeon_semaphore_create(rdev, &semaphore);
	if (r) {
		DRM_ERROR("Failed to create semaphore\n");
		goto out_cleanup;
	}

	r = radeon_ring_lock(rdev, ringA, 64);
	if (r) {
		DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
		goto out_cleanup;
	}
	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
	radeon_ring_unlock_commit(rdev, ringA);

	r = radeon_test_create_and_emit_fence(rdev, ringA, &fence1);
	if (r)
		goto out_cleanup;

	r = radeon_ring_lock(rdev, ringA, 64);
	if (r) {
		DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
		goto out_cleanup;
	}
	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
	radeon_ring_unlock_commit(rdev, ringA);

	r = radeon_test_create_and_emit_fence(rdev, ringA, &fence2);
	if (r)
		goto out_cleanup;

	mdelay(1000);

	if (radeon_fence_signaled(fence1)) {
		DRM_ERROR("Fence 1 signaled without waiting for semaphore.\n");
		goto out_cleanup;
	}

	r = radeon_ring_lock(rdev, ringB, 64);
	if (r) {
		DRM_ERROR("Failed to lock ring B %p\n", ringB);
		goto out_cleanup;
	}
	radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
	radeon_ring_unlock_commit(rdev, ringB);

	r = radeon_fence_wait(fence1, false);
	if (r) {
		DRM_ERROR("Failed to wait for sync fence 1\n");
		goto out_cleanup;
	}

	mdelay(1000);

	if (radeon_fence_signaled(fence2)) {
		DRM_ERROR("Fence 2 signaled without waiting for semaphore.\n");
		goto out_cleanup;
	}

	r = radeon_ring_lock(rdev, ringB, 64);
	if (r) {
		DRM_ERROR("Failed to lock ring B %p\n", ringB);
		goto out_cleanup;
	}
	radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
	radeon_ring_unlock_commit(rdev, ringB);

	r = radeon_fence_wait(fence2, false);
	if (r) {
		DRM_ERROR("Failed to wait for sync fence 1\n");
		goto out_cleanup;
	}

out_cleanup:
	radeon_semaphore_free(rdev, &semaphore, NULL);

	if (fence1)
		radeon_fence_unref(&fence1);

	if (fence2)
		radeon_fence_unref(&fence2);

	if (r)
		printk(KERN_WARNING "Error while testing ring sync (%d).\n", r);
}

static void radeon_test_ring_sync2(struct radeon_device *rdev,
			    struct radeon_ring *ringA,
			    struct radeon_ring *ringB,
			    struct radeon_ring *ringC)
{
	struct radeon_fence *fenceA = NULL, *fenceB = NULL;
	struct radeon_semaphore *semaphore = NULL;
	bool sigA, sigB;
	int i, r;

	r = radeon_semaphore_create(rdev, &semaphore);
	if (r) {
		DRM_ERROR("Failed to create semaphore\n");
		goto out_cleanup;
	}

	r = radeon_ring_lock(rdev, ringA, 64);
	if (r) {
		DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
		goto out_cleanup;
	}
	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
	radeon_ring_unlock_commit(rdev, ringA);

	r = radeon_test_create_and_emit_fence(rdev, ringA, &fenceA);
	if (r)
		goto out_cleanup;

	r = radeon_ring_lock(rdev, ringB, 64);
	if (r) {
		DRM_ERROR("Failed to lock ring B %d\n", ringB->idx);
		goto out_cleanup;
	}
	radeon_semaphore_emit_wait(rdev, ringB->idx, semaphore);
	radeon_ring_unlock_commit(rdev, ringB);
	r = radeon_test_create_and_emit_fence(rdev, ringB, &fenceB);
	if (r)
		goto out_cleanup;

	mdelay(1000);

	if (radeon_fence_signaled(fenceA)) {
		DRM_ERROR("Fence A signaled without waiting for semaphore.\n");
		goto out_cleanup;
	}
	if (radeon_fence_signaled(fenceB)) {
		DRM_ERROR("Fence B signaled without waiting for semaphore.\n");
		goto out_cleanup;
	}

	r = radeon_ring_lock(rdev, ringC, 64);
	if (r) {
		DRM_ERROR("Failed to lock ring B %p\n", ringC);
		goto out_cleanup;
	}
	radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
	radeon_ring_unlock_commit(rdev, ringC);

	for (i = 0; i < 30; ++i) {
		mdelay(100);
		sigA = radeon_fence_signaled(fenceA);
		sigB = radeon_fence_signaled(fenceB);
		if (sigA || sigB)
			break;
	}

	if (!sigA && !sigB) {
		DRM_ERROR("Neither fence A nor B has been signaled\n");
		goto out_cleanup;
	} else if (sigA && sigB) {
		DRM_ERROR("Both fence A and B has been signaled\n");
		goto out_cleanup;
	}

	DRM_INFO("Fence %c was first signaled\n", sigA ? 'A' : 'B');

	r = radeon_ring_lock(rdev, ringC, 64);
	if (r) {
		DRM_ERROR("Failed to lock ring B %p\n", ringC);
		goto out_cleanup;
	}
	radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
	radeon_ring_unlock_commit(rdev, ringC);

	mdelay(1000);

	r = radeon_fence_wait(fenceA, false);
	if (r) {
		DRM_ERROR("Failed to wait for sync fence A\n");
		goto out_cleanup;
	}
	r = radeon_fence_wait(fenceB, false);
	if (r) {
		DRM_ERROR("Failed to wait for sync fence B\n");
		goto out_cleanup;
	}

out_cleanup:
	radeon_semaphore_free(rdev, &semaphore, NULL);

	if (fenceA)
		radeon_fence_unref(&fenceA);

	if (fenceB)
		radeon_fence_unref(&fenceB);

	if (r)
		printk(KERN_WARNING "Error while testing ring sync (%d).\n", r);
}

static bool radeon_test_sync_possible(struct radeon_ring *ringA,
				      struct radeon_ring *ringB)
{
	if (ringA->idx == TN_RING_TYPE_VCE2_INDEX &&
	    ringB->idx == TN_RING_TYPE_VCE1_INDEX)
		return false;

	return true;
}

void radeon_test_syncing(struct radeon_device *rdev)
{
	int i, j, k;

	for (i = 1; i < RADEON_NUM_RINGS; ++i) {
		struct radeon_ring *ringA = &rdev->ring[i];
		if (!ringA->ready)
			continue;

		for (j = 0; j < i; ++j) {
			struct radeon_ring *ringB = &rdev->ring[j];
			if (!ringB->ready)
				continue;

			if (!radeon_test_sync_possible(ringA, ringB))
				continue;

			DRM_INFO("Testing syncing between rings %d and %d...\n", i, j);
			radeon_test_ring_sync(rdev, ringA, ringB);

			DRM_INFO("Testing syncing between rings %d and %d...\n", j, i);
			radeon_test_ring_sync(rdev, ringB, ringA);

			for (k = 0; k < j; ++k) {
				struct radeon_ring *ringC = &rdev->ring[k];
				if (!ringC->ready)
					continue;

				if (!radeon_test_sync_possible(ringA, ringC))
					continue;

				if (!radeon_test_sync_possible(ringB, ringC))
					continue;

				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, j, k);
				radeon_test_ring_sync2(rdev, ringA, ringB, ringC);

				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, k, j);
				radeon_test_ring_sync2(rdev, ringA, ringC, ringB);

				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, i, k);
				radeon_test_ring_sync2(rdev, ringB, ringA, ringC);

				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, k, i);
				radeon_test_ring_sync2(rdev, ringB, ringC, ringA);

				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, i, j);
				radeon_test_ring_sync2(rdev, ringC, ringA, ringB);

				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, j, i);
				radeon_test_ring_sync2(rdev, ringC, ringB, ringA);
			}
		}
	}
}
Commit	Line	Data
ecc0b326 MD	1	/*
	2	* Copyright 2009 VMware, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: Michel Dänzer
	23	*/
	24	#include <drm/drmP.h>
	25	#include <drm/radeon_drm.h>
	26	#include "radeon_reg.h"
	27	#include "radeon.h"
	28
009ee7a0 AD	29	#define RADEON_TEST_COPY_BLIT 1
	30	#define RADEON_TEST_COPY_DMA 0
	31
ecc0b326 MD	32
ecc0b326 MD	33	/* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
009ee7a0	34	static void radeon_do_test_moves(struct radeon_device *rdev, int flag)
ecc0b326	35	{
4c788679 JG	36	struct radeon_bo *vram_obj = NULL;
4c788679 JG	37	struct radeon_bo **gtt_obj = NULL;
ecc0b326	38	uint64_t gtt_addr, vram_addr;
89cd67b3 DC	39	unsigned n, size;
89cd67b3 DC	40	int i, r, ring;
009ee7a0 AD	41
	42	switch (flag) {
	43	case RADEON_TEST_COPY_DMA:
	44	ring = radeon_copy_dma_ring_index(rdev);
	45	break;
	46	case RADEON_TEST_COPY_BLIT:
	47	ring = radeon_copy_blit_ring_index(rdev);
	48	break;
	49	default:
	50	DRM_ERROR("Unknown copy method\n");
	51	return;
	52	}
ecc0b326 MD	53
	54	size = 1024 * 1024;
	55
	56	/* Number of tests =
24cae9e7	57	* (Total GTT - IB pool - writeback page - ring buffers) / test size
ecc0b326	58	*/
7b1f2485	59	n = rdev->mc.gtt_size - RADEON_IB_POOL_SIZE641024;
bf852799	60	for (i = 0; i < RADEON_NUM_RINGS; ++i)
e32eb50d	61	n -= rdev->ring[i].ring_size;
24cae9e7 MD	62	if (rdev->wb.wb_obj)
	63	n -= RADEON_GPU_PAGE_SIZE;
	64	if (rdev->ih.ring_obj)
	65	n -= rdev->ih.ring_size;
	66	n /= size;
ecc0b326 MD	67
	68	gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
	69	if (!gtt_obj) {
	70	DRM_ERROR("Failed to allocate %d pointers\n", n);
	71	r = 1;
	72	goto out_cleanup;
	73	}
	74
441921d5	75	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
40f5cf99	76	NULL, &vram_obj);
ecc0b326 MD	77	if (r) {
	78	DRM_ERROR("Failed to create VRAM object\n");
	79	goto out_cleanup;
	80	}
4c788679 JG	81	r = radeon_bo_reserve(vram_obj, false);
4c788679 JG	82	if (unlikely(r != 0))
977c38d5	83	goto out_unref;
4c788679	84	r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
ecc0b326 MD	85	if (r) {
ecc0b326 MD	86	DRM_ERROR("Failed to pin VRAM object\n");
977c38d5	87	goto out_unres;
ecc0b326	88	}
ecc0b326 MD	89	for (i = 0; i < n; i++) {
	90	void gtt_map, vram_map;
	91	void gtt_start, gtt_end;
	92	void vram_start, vram_end;
977c38d5	93	struct radeon_fence *fence = NULL;
ecc0b326	94
441921d5	95	r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
40f5cf99	96	RADEON_GEM_DOMAIN_GTT, NULL, gtt_obj + i);
ecc0b326 MD	97	if (r) {
ecc0b326 MD	98	DRM_ERROR("Failed to create GTT object %d\n", i);
977c38d5	99	goto out_lclean;
ecc0b326 MD	100	}
ecc0b326 MD	101
4c788679 JG	102	r = radeon_bo_reserve(gtt_obj[i], false);
4c788679 JG	103	if (unlikely(r != 0))
977c38d5	104	goto out_lclean_unref;
4c788679	105	r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, &gtt_addr);
ecc0b326 MD	106	if (r) {
ecc0b326 MD	107	DRM_ERROR("Failed to pin GTT object %d\n", i);
977c38d5	108	goto out_lclean_unres;
ecc0b326 MD	109	}
ecc0b326 MD	110
4c788679	111	r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
ecc0b326 MD	112	if (r) {
ecc0b326 MD	113	DRM_ERROR("Failed to map GTT object %d\n", i);
977c38d5	114	goto out_lclean_unpin;
ecc0b326 MD	115	}
	116
	117	for (gtt_start = gtt_map, gtt_end = gtt_map + size;
	118	gtt_start < gtt_end;
	119	gtt_start++)
	120	*gtt_start = gtt_start;
	121
4c788679	122	radeon_bo_kunmap(gtt_obj[i]);
ecc0b326	123
009ee7a0 AD	124	if (ring == R600_RING_TYPE_DMA_INDEX)
	125	r = radeon_copy_dma(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
	126	else
	127	r = radeon_copy_blit(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
ecc0b326 MD	128	if (r) {
ecc0b326 MD	129	DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
977c38d5	130	goto out_lclean_unpin;
ecc0b326 MD	131	}
	132
	133	r = radeon_fence_wait(fence, false);
	134	if (r) {
	135	DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
977c38d5	136	goto out_lclean_unpin;
ecc0b326 MD	137	}
	138
	139	radeon_fence_unref(&fence);
	140
4c788679	141	r = radeon_bo_kmap(vram_obj, &vram_map);
ecc0b326 MD	142	if (r) {
ecc0b326 MD	143	DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
977c38d5	144	goto out_lclean_unpin;
ecc0b326 MD	145	}
	146
	147	for (gtt_start = gtt_map, gtt_end = gtt_map + size,
	148	vram_start = vram_map, vram_end = vram_map + size;
	149	vram_start < vram_end;
	150	gtt_start++, vram_start++) {
	151	if (*vram_start != gtt_start) {
	152	DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
4fb1a35c MD	153	"expected 0x%p (GTT/VRAM offset "
	154	"0x%16llx/0x%16llx)\n",
	155	i, *vram_start, gtt_start,
	156	(unsigned long long)
	157	(gtt_addr - rdev->mc.gtt_start +
	158	(void*)gtt_start - gtt_map),
	159	(unsigned long long)
	160	(vram_addr - rdev->mc.vram_start +
	161	(void*)gtt_start - gtt_map));
4c788679	162	radeon_bo_kunmap(vram_obj);
977c38d5	163	goto out_lclean_unpin;
ecc0b326 MD	164	}
	165	*vram_start = vram_start;
	166	}
	167
4c788679	168	radeon_bo_kunmap(vram_obj);
ecc0b326	169
009ee7a0 AD	170	if (ring == R600_RING_TYPE_DMA_INDEX)
	171	r = radeon_copy_dma(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
	172	else
	173	r = radeon_copy_blit(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
ecc0b326 MD	174	if (r) {
ecc0b326 MD	175	DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
977c38d5	176	goto out_lclean_unpin;
ecc0b326 MD	177	}
	178
	179	r = radeon_fence_wait(fence, false);
	180	if (r) {
	181	DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
977c38d5	182	goto out_lclean_unpin;
ecc0b326 MD	183	}
	184
	185	radeon_fence_unref(&fence);
	186
4c788679	187	r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
ecc0b326 MD	188	if (r) {
ecc0b326 MD	189	DRM_ERROR("Failed to map GTT object after copy %d\n", i);
977c38d5	190	goto out_lclean_unpin;
ecc0b326 MD	191	}
	192
	193	for (gtt_start = gtt_map, gtt_end = gtt_map + size,
	194	vram_start = vram_map, vram_end = vram_map + size;
	195	gtt_start < gtt_end;
	196	gtt_start++, vram_start++) {
	197	if (*gtt_start != vram_start) {
	198	DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
4fb1a35c MD	199	"expected 0x%p (VRAM/GTT offset "
	200	"0x%16llx/0x%16llx)\n",
	201	i, *gtt_start, vram_start,
	202	(unsigned long long)
	203	(vram_addr - rdev->mc.vram_start +
	204	(void*)vram_start - vram_map),
	205	(unsigned long long)
	206	(gtt_addr - rdev->mc.gtt_start +
	207	(void*)vram_start - vram_map));
4c788679	208	radeon_bo_kunmap(gtt_obj[i]);
977c38d5	209	goto out_lclean_unpin;
ecc0b326 MD	210	}
	211	}
	212
4c788679	213	radeon_bo_kunmap(gtt_obj[i]);
ecc0b326 MD	214
ecc0b326 MD	215	DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
d594e46a	216	gtt_addr - rdev->mc.gtt_start);
977c38d5 ML	217	continue;
	218
	219	out_lclean_unpin:
	220	radeon_bo_unpin(gtt_obj[i]);
	221	out_lclean_unres:
	222	radeon_bo_unreserve(gtt_obj[i]);
	223	out_lclean_unref:
	224	radeon_bo_unref(&gtt_obj[i]);
	225	out_lclean:
	226	for (--i; i >= 0; --i) {
	227	radeon_bo_unpin(gtt_obj[i]);
	228	radeon_bo_unreserve(gtt_obj[i]);
	229	radeon_bo_unref(&gtt_obj[i]);
	230	}
	231	if (fence)
	232	radeon_fence_unref(&fence);
	233	break;
ecc0b326 MD	234	}
ecc0b326 MD	235
977c38d5 ML	236	radeon_bo_unpin(vram_obj);
	237	out_unres:
	238	radeon_bo_unreserve(vram_obj);
	239	out_unref:
	240	radeon_bo_unref(&vram_obj);
ecc0b326	241	out_cleanup:
977c38d5	242	kfree(gtt_obj);
ecc0b326 MD	243	if (r) {
	244	printk(KERN_WARNING "Error while testing BO move.\n");
	245	}
	246	}
60a7e396	247
009ee7a0 AD	248	void radeon_test_moves(struct radeon_device *rdev)
	249	{
	250	if (rdev->asic->copy.dma)
	251	radeon_do_test_moves(rdev, RADEON_TEST_COPY_DMA);
	252	if (rdev->asic->copy.blit)
	253	radeon_do_test_moves(rdev, RADEON_TEST_COPY_BLIT);
	254	}
	255
f2ba57b5 CK	256	static int radeon_test_create_and_emit_fence(struct radeon_device *rdev,
	257	struct radeon_ring *ring,
	258	struct radeon_fence **fence)
	259	{
d93f7937	260	uint32_t handle = ring->idx ^ 0xdeafbeef;
f2ba57b5 CK	261	int r;
	262
	263	if (ring->idx == R600_RING_TYPE_UVD_INDEX) {
d93f7937	264	r = radeon_uvd_get_create_msg(rdev, ring->idx, handle, NULL);
f2ba57b5 CK	265	if (r) {
	266	DRM_ERROR("Failed to get dummy create msg\n");
	267	return r;
	268	}
	269
d93f7937	270	r = radeon_uvd_get_destroy_msg(rdev, ring->idx, handle, fence);
f2ba57b5 CK	271	if (r) {
	272	DRM_ERROR("Failed to get dummy destroy msg\n");
	273	return r;
	274	}
d93f7937 CK	275
	276	} else if (ring->idx == TN_RING_TYPE_VCE1_INDEX \|\|
	277	ring->idx == TN_RING_TYPE_VCE2_INDEX) {
	278	r = radeon_vce_get_create_msg(rdev, ring->idx, handle, NULL);
	279	if (r) {
	280	DRM_ERROR("Failed to get dummy create msg\n");
	281	return r;
	282	}
	283
	284	r = radeon_vce_get_destroy_msg(rdev, ring->idx, handle, fence);
	285	if (r) {
	286	DRM_ERROR("Failed to get dummy destroy msg\n");
	287	return r;
	288	}
	289
f2ba57b5 CK	290	} else {
	291	r = radeon_ring_lock(rdev, ring, 64);
	292	if (r) {
	293	DRM_ERROR("Failed to lock ring A %d\n", ring->idx);
	294	return r;
	295	}
	296	radeon_fence_emit(rdev, fence, ring->idx);
	297	radeon_ring_unlock_commit(rdev, ring);
	298	}
	299	return 0;
	300	}
	301
60a7e396	302	void radeon_test_ring_sync(struct radeon_device *rdev,
e32eb50d CK	303	struct radeon_ring *ringA,
e32eb50d CK	304	struct radeon_ring *ringB)
60a7e396	305	{
ce954884	306	struct radeon_fence fence1 = NULL, fence2 = NULL;
60a7e396	307	struct radeon_semaphore *semaphore = NULL;
60a7e396 CK	308	int r;
60a7e396 CK	309
60a7e396 CK	310	r = radeon_semaphore_create(rdev, &semaphore);
	311	if (r) {
	312	DRM_ERROR("Failed to create semaphore\n");
	313	goto out_cleanup;
	314	}
	315
e32eb50d	316	r = radeon_ring_lock(rdev, ringA, 64);
60a7e396	317	if (r) {
8b25ed34	318	DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
60a7e396 CK	319	goto out_cleanup;
60a7e396 CK	320	}
8b25ed34	321	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
f2ba57b5 CK	322	radeon_ring_unlock_commit(rdev, ringA);
	323
	324	r = radeon_test_create_and_emit_fence(rdev, ringA, &fence1);
	325	if (r)
876dc9f3	326	goto out_cleanup;
f2ba57b5 CK	327
f2ba57b5 CK	328	r = radeon_ring_lock(rdev, ringA, 64);
876dc9f3	329	if (r) {
f2ba57b5	330	DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
876dc9f3 CK	331	goto out_cleanup;
876dc9f3 CK	332	}
f2ba57b5	333	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
e32eb50d	334	radeon_ring_unlock_commit(rdev, ringA);
60a7e396	335
f2ba57b5 CK	336	r = radeon_test_create_and_emit_fence(rdev, ringA, &fence2);
	337	if (r)
	338	goto out_cleanup;
	339
60a7e396 CK	340	mdelay(1000);
60a7e396 CK	341
ce954884 CK	342	if (radeon_fence_signaled(fence1)) {
ce954884 CK	343	DRM_ERROR("Fence 1 signaled without waiting for semaphore.\n");
60a7e396 CK	344	goto out_cleanup;
	345	}
	346
e32eb50d	347	r = radeon_ring_lock(rdev, ringB, 64);
60a7e396	348	if (r) {
e32eb50d	349	DRM_ERROR("Failed to lock ring B %p\n", ringB);
60a7e396 CK	350	goto out_cleanup;
60a7e396 CK	351	}
8b25ed34	352	radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
e32eb50d	353	radeon_ring_unlock_commit(rdev, ringB);
60a7e396	354
ce954884 CK	355	r = radeon_fence_wait(fence1, false);
	356	if (r) {
	357	DRM_ERROR("Failed to wait for sync fence 1\n");
	358	goto out_cleanup;
	359	}
	360
	361	mdelay(1000);
	362
	363	if (radeon_fence_signaled(fence2)) {
	364	DRM_ERROR("Fence 2 signaled without waiting for semaphore.\n");
	365	goto out_cleanup;
	366	}
	367
	368	r = radeon_ring_lock(rdev, ringB, 64);
60a7e396	369	if (r) {
ce954884	370	DRM_ERROR("Failed to lock ring B %p\n", ringB);
60a7e396 CK	371	goto out_cleanup;
60a7e396 CK	372	}
8b25ed34	373	radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
ce954884	374	radeon_ring_unlock_commit(rdev, ringB);
60a7e396	375
ce954884 CK	376	r = radeon_fence_wait(fence2, false);
	377	if (r) {
	378	DRM_ERROR("Failed to wait for sync fence 1\n");
	379	goto out_cleanup;
	380	}
60a7e396 CK	381
60a7e396 CK	382	out_cleanup:
220907d9	383	radeon_semaphore_free(rdev, &semaphore, NULL);
60a7e396	384
ce954884 CK	385	if (fence1)
	386	radeon_fence_unref(&fence1);
	387
	388	if (fence2)
	389	radeon_fence_unref(&fence2);
	390
	391	if (r)
	392	printk(KERN_WARNING "Error while testing ring sync (%d).\n", r);
	393	}
	394
1109ca09	395	static void radeon_test_ring_sync2(struct radeon_device *rdev,
ce954884 CK	396	struct radeon_ring *ringA,
	397	struct radeon_ring *ringB,
	398	struct radeon_ring *ringC)
	399	{
	400	struct radeon_fence fenceA = NULL, fenceB = NULL;
	401	struct radeon_semaphore *semaphore = NULL;
ce954884 CK	402	bool sigA, sigB;
	403	int i, r;
	404
ce954884 CK	405	r = radeon_semaphore_create(rdev, &semaphore);
	406	if (r) {
	407	DRM_ERROR("Failed to create semaphore\n");
	408	goto out_cleanup;
	409	}
	410
	411	r = radeon_ring_lock(rdev, ringA, 64);
	412	if (r) {
8b25ed34	413	DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
ce954884 CK	414	goto out_cleanup;
ce954884 CK	415	}
8b25ed34	416	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
ce954884 CK	417	radeon_ring_unlock_commit(rdev, ringA);
ce954884 CK	418
f2ba57b5 CK	419	r = radeon_test_create_and_emit_fence(rdev, ringA, &fenceA);
	420	if (r)
	421	goto out_cleanup;
	422
ce954884 CK	423	r = radeon_ring_lock(rdev, ringB, 64);
ce954884 CK	424	if (r) {
8b25ed34	425	DRM_ERROR("Failed to lock ring B %d\n", ringB->idx);
ce954884 CK	426	goto out_cleanup;
ce954884 CK	427	}
8b25ed34	428	radeon_semaphore_emit_wait(rdev, ringB->idx, semaphore);
ce954884	429	radeon_ring_unlock_commit(rdev, ringB);
f2ba57b5 CK	430	r = radeon_test_create_and_emit_fence(rdev, ringB, &fenceB);
	431	if (r)
	432	goto out_cleanup;
ce954884 CK	433
	434	mdelay(1000);
	435
	436	if (radeon_fence_signaled(fenceA)) {
	437	DRM_ERROR("Fence A signaled without waiting for semaphore.\n");
	438	goto out_cleanup;
	439	}
	440	if (radeon_fence_signaled(fenceB)) {
f2ba57b5	441	DRM_ERROR("Fence B signaled without waiting for semaphore.\n");
ce954884 CK	442	goto out_cleanup;
	443	}
	444
	445	r = radeon_ring_lock(rdev, ringC, 64);
	446	if (r) {
	447	DRM_ERROR("Failed to lock ring B %p\n", ringC);
	448	goto out_cleanup;
	449	}
8b25ed34	450	radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
ce954884 CK	451	radeon_ring_unlock_commit(rdev, ringC);
	452
	453	for (i = 0; i < 30; ++i) {
	454	mdelay(100);
	455	sigA = radeon_fence_signaled(fenceA);
	456	sigB = radeon_fence_signaled(fenceB);
	457	if (sigA \|\| sigB)
	458	break;
	459	}
	460
	461	if (!sigA && !sigB) {
	462	DRM_ERROR("Neither fence A nor B has been signaled\n");
	463	goto out_cleanup;
	464	} else if (sigA && sigB) {
	465	DRM_ERROR("Both fence A and B has been signaled\n");
	466	goto out_cleanup;
	467	}
	468
	469	DRM_INFO("Fence %c was first signaled\n", sigA ? 'A' : 'B');
	470
	471	r = radeon_ring_lock(rdev, ringC, 64);
	472	if (r) {
	473	DRM_ERROR("Failed to lock ring B %p\n", ringC);
	474	goto out_cleanup;
	475	}
8b25ed34	476	radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
ce954884 CK	477	radeon_ring_unlock_commit(rdev, ringC);
	478
	479	mdelay(1000);
	480
	481	r = radeon_fence_wait(fenceA, false);
	482	if (r) {
	483	DRM_ERROR("Failed to wait for sync fence A\n");
	484	goto out_cleanup;
	485	}
	486	r = radeon_fence_wait(fenceB, false);
	487	if (r) {
	488	DRM_ERROR("Failed to wait for sync fence B\n");
	489	goto out_cleanup;
	490	}
	491
	492	out_cleanup:
220907d9	493	radeon_semaphore_free(rdev, &semaphore, NULL);
ce954884 CK	494
	495	if (fenceA)
	496	radeon_fence_unref(&fenceA);
	497
	498	if (fenceB)
	499	radeon_fence_unref(&fenceB);
60a7e396 CK	500
	501	if (r)
	502	printk(KERN_WARNING "Error while testing ring sync (%d).\n", r);
	503	}
	504
d93f7937 CK	505	static bool radeon_test_sync_possible(struct radeon_ring *ringA,
	506	struct radeon_ring *ringB)
	507	{
	508	if (ringA->idx == TN_RING_TYPE_VCE2_INDEX &&
	509	ringB->idx == TN_RING_TYPE_VCE1_INDEX)
	510	return false;
	511
	512	return true;
	513	}
	514
60a7e396 CK	515	void radeon_test_syncing(struct radeon_device *rdev)
60a7e396 CK	516	{
ce954884	517	int i, j, k;
60a7e396 CK	518
60a7e396 CK	519	for (i = 1; i < RADEON_NUM_RINGS; ++i) {
e32eb50d CK	520	struct radeon_ring *ringA = &rdev->ring[i];
e32eb50d CK	521	if (!ringA->ready)
60a7e396 CK	522	continue;
	523
	524	for (j = 0; j < i; ++j) {
e32eb50d CK	525	struct radeon_ring *ringB = &rdev->ring[j];
e32eb50d CK	526	if (!ringB->ready)
60a7e396 CK	527	continue;
60a7e396 CK	528
d93f7937 CK	529	if (!radeon_test_sync_possible(ringA, ringB))
	530	continue;
	531
ce954884	532	DRM_INFO("Testing syncing between rings %d and %d...\n", i, j);
e32eb50d	533	radeon_test_ring_sync(rdev, ringA, ringB);
60a7e396	534
ce954884	535	DRM_INFO("Testing syncing between rings %d and %d...\n", j, i);
e32eb50d	536	radeon_test_ring_sync(rdev, ringB, ringA);
ce954884 CK	537
	538	for (k = 0; k < j; ++k) {
	539	struct radeon_ring *ringC = &rdev->ring[k];
1f2e124d AD	540	if (!ringC->ready)
1f2e124d AD	541	continue;
ce954884	542
d93f7937 CK	543	if (!radeon_test_sync_possible(ringA, ringC))
	544	continue;
	545
	546	if (!radeon_test_sync_possible(ringB, ringC))
	547	continue;
	548
ce954884 CK	549	DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, j, k);
	550	radeon_test_ring_sync2(rdev, ringA, ringB, ringC);
	551
	552	DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, k, j);
	553	radeon_test_ring_sync2(rdev, ringA, ringC, ringB);
	554
	555	DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, i, k);
	556	radeon_test_ring_sync2(rdev, ringB, ringA, ringC);
	557
	558	DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, k, i);
	559	radeon_test_ring_sync2(rdev, ringB, ringC, ringA);
	560
	561	DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, i, j);
	562	radeon_test_ring_sync2(rdev, ringC, ringA, ringB);
	563
	564	DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, j, i);
	565	radeon_test_ring_sync2(rdev, ringC, ringB, ringA);
	566	}
60a7e396 CK	567	}
	568	}
	569	}