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ecc0b326 MD |
1 | /* |
2 | * Copyright 2009 VMware, Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Michel Dänzer | |
23 | */ | |
24 | #include <drm/drmP.h> | |
25 | #include <drm/radeon_drm.h> | |
26 | #include "radeon_reg.h" | |
27 | #include "radeon.h" | |
28 | ||
29 | ||
30 | /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */ | |
31 | void radeon_test_moves(struct radeon_device *rdev) | |
32 | { | |
4c788679 JG |
33 | struct radeon_bo *vram_obj = NULL; |
34 | struct radeon_bo **gtt_obj = NULL; | |
ecc0b326 MD |
35 | struct radeon_fence *fence = NULL; |
36 | uint64_t gtt_addr, vram_addr; | |
37 | unsigned i, n, size; | |
38 | int r; | |
39 | ||
40 | size = 1024 * 1024; | |
41 | ||
42 | /* Number of tests = | |
43 | * (Total GTT - IB pool - writeback page - ring buffer) / test size | |
44 | */ | |
a77f1718 | 45 | n = (rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - RADEON_GPU_PAGE_SIZE - |
ecc0b326 MD |
46 | rdev->cp.ring_size) / size; |
47 | ||
48 | gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL); | |
49 | if (!gtt_obj) { | |
50 | DRM_ERROR("Failed to allocate %d pointers\n", n); | |
51 | r = 1; | |
52 | goto out_cleanup; | |
53 | } | |
54 | ||
4c788679 JG |
55 | r = radeon_bo_create(rdev, NULL, size, true, RADEON_GEM_DOMAIN_VRAM, |
56 | &vram_obj); | |
ecc0b326 MD |
57 | if (r) { |
58 | DRM_ERROR("Failed to create VRAM object\n"); | |
59 | goto out_cleanup; | |
60 | } | |
4c788679 JG |
61 | r = radeon_bo_reserve(vram_obj, false); |
62 | if (unlikely(r != 0)) | |
63 | goto out_cleanup; | |
64 | r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr); | |
ecc0b326 MD |
65 | if (r) { |
66 | DRM_ERROR("Failed to pin VRAM object\n"); | |
67 | goto out_cleanup; | |
68 | } | |
ecc0b326 MD |
69 | for (i = 0; i < n; i++) { |
70 | void *gtt_map, *vram_map; | |
71 | void **gtt_start, **gtt_end; | |
72 | void **vram_start, **vram_end; | |
73 | ||
4c788679 JG |
74 | r = radeon_bo_create(rdev, NULL, size, true, |
75 | RADEON_GEM_DOMAIN_GTT, gtt_obj + i); | |
ecc0b326 MD |
76 | if (r) { |
77 | DRM_ERROR("Failed to create GTT object %d\n", i); | |
78 | goto out_cleanup; | |
79 | } | |
80 | ||
4c788679 JG |
81 | r = radeon_bo_reserve(gtt_obj[i], false); |
82 | if (unlikely(r != 0)) | |
83 | goto out_cleanup; | |
84 | r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, >t_addr); | |
ecc0b326 MD |
85 | if (r) { |
86 | DRM_ERROR("Failed to pin GTT object %d\n", i); | |
87 | goto out_cleanup; | |
88 | } | |
89 | ||
4c788679 | 90 | r = radeon_bo_kmap(gtt_obj[i], >t_map); |
ecc0b326 MD |
91 | if (r) { |
92 | DRM_ERROR("Failed to map GTT object %d\n", i); | |
93 | goto out_cleanup; | |
94 | } | |
95 | ||
96 | for (gtt_start = gtt_map, gtt_end = gtt_map + size; | |
97 | gtt_start < gtt_end; | |
98 | gtt_start++) | |
99 | *gtt_start = gtt_start; | |
100 | ||
4c788679 | 101 | radeon_bo_kunmap(gtt_obj[i]); |
ecc0b326 MD |
102 | |
103 | r = radeon_fence_create(rdev, &fence); | |
104 | if (r) { | |
105 | DRM_ERROR("Failed to create GTT->VRAM fence %d\n", i); | |
106 | goto out_cleanup; | |
107 | } | |
108 | ||
a77f1718 | 109 | r = radeon_copy(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, fence); |
ecc0b326 MD |
110 | if (r) { |
111 | DRM_ERROR("Failed GTT->VRAM copy %d\n", i); | |
112 | goto out_cleanup; | |
113 | } | |
114 | ||
115 | r = radeon_fence_wait(fence, false); | |
116 | if (r) { | |
117 | DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i); | |
118 | goto out_cleanup; | |
119 | } | |
120 | ||
121 | radeon_fence_unref(&fence); | |
122 | ||
4c788679 | 123 | r = radeon_bo_kmap(vram_obj, &vram_map); |
ecc0b326 MD |
124 | if (r) { |
125 | DRM_ERROR("Failed to map VRAM object after copy %d\n", i); | |
126 | goto out_cleanup; | |
127 | } | |
128 | ||
129 | for (gtt_start = gtt_map, gtt_end = gtt_map + size, | |
130 | vram_start = vram_map, vram_end = vram_map + size; | |
131 | vram_start < vram_end; | |
132 | gtt_start++, vram_start++) { | |
133 | if (*vram_start != gtt_start) { | |
134 | DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, " | |
135 | "expected 0x%p (GTT map 0x%p-0x%p)\n", | |
136 | i, *vram_start, gtt_start, gtt_map, | |
137 | gtt_end); | |
4c788679 | 138 | radeon_bo_kunmap(vram_obj); |
ecc0b326 MD |
139 | goto out_cleanup; |
140 | } | |
141 | *vram_start = vram_start; | |
142 | } | |
143 | ||
4c788679 | 144 | radeon_bo_kunmap(vram_obj); |
ecc0b326 MD |
145 | |
146 | r = radeon_fence_create(rdev, &fence); | |
147 | if (r) { | |
148 | DRM_ERROR("Failed to create VRAM->GTT fence %d\n", i); | |
149 | goto out_cleanup; | |
150 | } | |
151 | ||
a77f1718 | 152 | r = radeon_copy(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, fence); |
ecc0b326 MD |
153 | if (r) { |
154 | DRM_ERROR("Failed VRAM->GTT copy %d\n", i); | |
155 | goto out_cleanup; | |
156 | } | |
157 | ||
158 | r = radeon_fence_wait(fence, false); | |
159 | if (r) { | |
160 | DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i); | |
161 | goto out_cleanup; | |
162 | } | |
163 | ||
164 | radeon_fence_unref(&fence); | |
165 | ||
4c788679 | 166 | r = radeon_bo_kmap(gtt_obj[i], >t_map); |
ecc0b326 MD |
167 | if (r) { |
168 | DRM_ERROR("Failed to map GTT object after copy %d\n", i); | |
169 | goto out_cleanup; | |
170 | } | |
171 | ||
172 | for (gtt_start = gtt_map, gtt_end = gtt_map + size, | |
173 | vram_start = vram_map, vram_end = vram_map + size; | |
174 | gtt_start < gtt_end; | |
175 | gtt_start++, vram_start++) { | |
176 | if (*gtt_start != vram_start) { | |
177 | DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, " | |
178 | "expected 0x%p (VRAM map 0x%p-0x%p)\n", | |
179 | i, *gtt_start, vram_start, vram_map, | |
180 | vram_end); | |
4c788679 | 181 | radeon_bo_kunmap(gtt_obj[i]); |
ecc0b326 MD |
182 | goto out_cleanup; |
183 | } | |
184 | } | |
185 | ||
4c788679 | 186 | radeon_bo_kunmap(gtt_obj[i]); |
ecc0b326 MD |
187 | |
188 | DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n", | |
189 | gtt_addr - rdev->mc.gtt_location); | |
190 | } | |
191 | ||
192 | out_cleanup: | |
193 | if (vram_obj) { | |
4c788679 JG |
194 | if (radeon_bo_is_reserved(vram_obj)) { |
195 | radeon_bo_unpin(vram_obj); | |
196 | radeon_bo_unreserve(vram_obj); | |
197 | } | |
198 | radeon_bo_unref(&vram_obj); | |
ecc0b326 MD |
199 | } |
200 | if (gtt_obj) { | |
201 | for (i = 0; i < n; i++) { | |
202 | if (gtt_obj[i]) { | |
4c788679 JG |
203 | if (radeon_bo_is_reserved(gtt_obj[i])) { |
204 | radeon_bo_unpin(gtt_obj[i]); | |
205 | radeon_bo_unreserve(gtt_obj[i]); | |
206 | } | |
207 | radeon_bo_unref(>t_obj[i]); | |
ecc0b326 MD |
208 | } |
209 | } | |
210 | kfree(gtt_obj); | |
211 | } | |
212 | if (fence) { | |
213 | radeon_fence_unref(&fence); | |
214 | } | |
215 | if (r) { | |
216 | printk(KERN_WARNING "Error while testing BO move.\n"); | |
217 | } | |
218 | } |