[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_test.c

/*
 * Copyright 2009 VMware, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Michel Dänzer
 */
#include <drm/drmP.h>
#include <drm/radeon_drm.h>
#include "radeon_reg.h"
#include "radeon.h"


/* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
void radeon_test_moves(struct radeon_device *rdev)
{
	struct radeon_bo *vram_obj = NULL;
	struct radeon_bo **gtt_obj = NULL;
	struct radeon_fence *fence = NULL;
	uint64_t gtt_addr, vram_addr;
	unsigned i, n, size;
	int r;

	size = 1024 * 1024;

	/* Number of tests =
	 * (Total GTT - IB pool - writeback page - ring buffers) / test size
	 */
	n = rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - rdev->cp.ring_size;
	if (rdev->wb.wb_obj)
		n -= RADEON_GPU_PAGE_SIZE;
	if (rdev->ih.ring_obj)
		n -= rdev->ih.ring_size;
	n /= size;

	gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
	if (!gtt_obj) {
		DRM_ERROR("Failed to allocate %d pointers\n", n);
		r = 1;
		goto out_cleanup;
	}

	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
				&vram_obj);
	if (r) {
		DRM_ERROR("Failed to create VRAM object\n");
		goto out_cleanup;
	}
	r = radeon_bo_reserve(vram_obj, false);
	if (unlikely(r != 0))
		goto out_cleanup;
	r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
	if (r) {
		DRM_ERROR("Failed to pin VRAM object\n");
		goto out_cleanup;
	}
	for (i = 0; i < n; i++) {
		void *gtt_map, *vram_map;
		void **gtt_start, **gtt_end;
		void **vram_start, **vram_end;

		r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
					 RADEON_GEM_DOMAIN_GTT, gtt_obj + i);
		if (r) {
			DRM_ERROR("Failed to create GTT object %d\n", i);
			goto out_cleanup;
		}

		r = radeon_bo_reserve(gtt_obj[i], false);
		if (unlikely(r != 0))
			goto out_cleanup;
		r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, &gtt_addr);
		if (r) {
			DRM_ERROR("Failed to pin GTT object %d\n", i);
			goto out_cleanup;
		}

		r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
		if (r) {
			DRM_ERROR("Failed to map GTT object %d\n", i);
			goto out_cleanup;
		}

		for (gtt_start = gtt_map, gtt_end = gtt_map + size;
		     gtt_start < gtt_end;
		     gtt_start++)
			*gtt_start = gtt_start;

		radeon_bo_kunmap(gtt_obj[i]);

		r = radeon_fence_create(rdev, &fence);
		if (r) {
			DRM_ERROR("Failed to create GTT->VRAM fence %d\n", i);
			goto out_cleanup;
		}

		r = radeon_copy(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, fence);
		if (r) {
			DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
			goto out_cleanup;
		}

		r = radeon_fence_wait(fence, false);
		if (r) {
			DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
			goto out_cleanup;
		}

		radeon_fence_unref(&fence);

		r = radeon_bo_kmap(vram_obj, &vram_map);
		if (r) {
			DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
			goto out_cleanup;
		}

		for (gtt_start = gtt_map, gtt_end = gtt_map + size,
		     vram_start = vram_map, vram_end = vram_map + size;
		     vram_start < vram_end;
		     gtt_start++, vram_start++) {
			if (*vram_start != gtt_start) {
				DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
					  "expected 0x%p (GTT/VRAM offset "
					  "0x%16llx/0x%16llx)\n",
					  i, *vram_start, gtt_start,
					  (unsigned long long)
					  (gtt_addr - rdev->mc.gtt_start +
					   (void*)gtt_start - gtt_map),
					  (unsigned long long)
					  (vram_addr - rdev->mc.vram_start +
					   (void*)gtt_start - gtt_map));
				radeon_bo_kunmap(vram_obj);
				goto out_cleanup;
			}
			*vram_start = vram_start;
		}

		radeon_bo_kunmap(vram_obj);

		r = radeon_fence_create(rdev, &fence);
		if (r) {
			DRM_ERROR("Failed to create VRAM->GTT fence %d\n", i);
			goto out_cleanup;
		}

		r = radeon_copy(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, fence);
		if (r) {
			DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
			goto out_cleanup;
		}

		r = radeon_fence_wait(fence, false);
		if (r) {
			DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
			goto out_cleanup;
		}

		radeon_fence_unref(&fence);

		r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
		if (r) {
			DRM_ERROR("Failed to map GTT object after copy %d\n", i);
			goto out_cleanup;
		}

		for (gtt_start = gtt_map, gtt_end = gtt_map + size,
		     vram_start = vram_map, vram_end = vram_map + size;
		     gtt_start < gtt_end;
		     gtt_start++, vram_start++) {
			if (*gtt_start != vram_start) {
				DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
					  "expected 0x%p (VRAM/GTT offset "
					  "0x%16llx/0x%16llx)\n",
					  i, *gtt_start, vram_start,
					  (unsigned long long)
					  (vram_addr - rdev->mc.vram_start +
					   (void*)vram_start - vram_map),
					  (unsigned long long)
					  (gtt_addr - rdev->mc.gtt_start +
					   (void*)vram_start - vram_map));
				radeon_bo_kunmap(gtt_obj[i]);
				goto out_cleanup;
			}
		}

		radeon_bo_kunmap(gtt_obj[i]);

		DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
			 gtt_addr - rdev->mc.gtt_start);
	}

out_cleanup:
	if (vram_obj) {
		if (radeon_bo_is_reserved(vram_obj)) {
			radeon_bo_unpin(vram_obj);
			radeon_bo_unreserve(vram_obj);
		}
		radeon_bo_unref(&vram_obj);
	}
	if (gtt_obj) {
		for (i = 0; i < n; i++) {
			if (gtt_obj[i]) {
				if (radeon_bo_is_reserved(gtt_obj[i])) {
					radeon_bo_unpin(gtt_obj[i]);
					radeon_bo_unreserve(gtt_obj[i]);
				}
				radeon_bo_unref(&gtt_obj[i]);
			}
		}
		kfree(gtt_obj);
	}
	if (fence) {
		radeon_fence_unref(&fence);
	}
	if (r) {
		printk(KERN_WARNING "Error while testing BO move.\n");
	}
}
Commit	Line	Data
ecc0b326 MD	1	/*
	2	* Copyright 2009 VMware, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: Michel Dänzer
	23	*/
	24	#include <drm/drmP.h>
	25	#include <drm/radeon_drm.h>
	26	#include "radeon_reg.h"
	27	#include "radeon.h"
	28
	29
	30	/* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
	31	void radeon_test_moves(struct radeon_device *rdev)
	32	{
4c788679 JG	33	struct radeon_bo *vram_obj = NULL;
4c788679 JG	34	struct radeon_bo **gtt_obj = NULL;
ecc0b326 MD	35	struct radeon_fence *fence = NULL;
	36	uint64_t gtt_addr, vram_addr;
	37	unsigned i, n, size;
	38	int r;
	39
	40	size = 1024 * 1024;
	41
	42	/* Number of tests =
24cae9e7	43	* (Total GTT - IB pool - writeback page - ring buffers) / test size
ecc0b326	44	*/
24cae9e7 MD	45	n = rdev->mc.gtt_size - RADEON_IB_POOL_SIZE641024 - rdev->cp.ring_size;
	46	if (rdev->wb.wb_obj)
	47	n -= RADEON_GPU_PAGE_SIZE;
	48	if (rdev->ih.ring_obj)
	49	n -= rdev->ih.ring_size;
	50	n /= size;
ecc0b326 MD	51
	52	gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
	53	if (!gtt_obj) {
	54	DRM_ERROR("Failed to allocate %d pointers\n", n);
	55	r = 1;
	56	goto out_cleanup;
	57	}
	58
441921d5	59	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
4c788679	60	&vram_obj);
ecc0b326 MD	61	if (r) {
	62	DRM_ERROR("Failed to create VRAM object\n");
	63	goto out_cleanup;
	64	}
4c788679 JG	65	r = radeon_bo_reserve(vram_obj, false);
	66	if (unlikely(r != 0))
	67	goto out_cleanup;
	68	r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
ecc0b326 MD	69	if (r) {
	70	DRM_ERROR("Failed to pin VRAM object\n");
	71	goto out_cleanup;
	72	}
ecc0b326 MD	73	for (i = 0; i < n; i++) {
	74	void gtt_map, vram_map;
	75	void gtt_start, gtt_end;
	76	void vram_start, vram_end;
	77
441921d5	78	r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
4c788679	79	RADEON_GEM_DOMAIN_GTT, gtt_obj + i);
ecc0b326 MD	80	if (r) {
	81	DRM_ERROR("Failed to create GTT object %d\n", i);
	82	goto out_cleanup;
	83	}
	84
4c788679 JG	85	r = radeon_bo_reserve(gtt_obj[i], false);
	86	if (unlikely(r != 0))
	87	goto out_cleanup;
	88	r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, &gtt_addr);
ecc0b326 MD	89	if (r) {
	90	DRM_ERROR("Failed to pin GTT object %d\n", i);
	91	goto out_cleanup;
	92	}
	93
4c788679	94	r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
ecc0b326 MD	95	if (r) {
	96	DRM_ERROR("Failed to map GTT object %d\n", i);
	97	goto out_cleanup;
	98	}
	99
	100	for (gtt_start = gtt_map, gtt_end = gtt_map + size;
	101	gtt_start < gtt_end;
	102	gtt_start++)
	103	*gtt_start = gtt_start;
	104
4c788679	105	radeon_bo_kunmap(gtt_obj[i]);
ecc0b326 MD	106
	107	r = radeon_fence_create(rdev, &fence);
	108	if (r) {
	109	DRM_ERROR("Failed to create GTT->VRAM fence %d\n", i);
	110	goto out_cleanup;
	111	}
	112
a77f1718	113	r = radeon_copy(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, fence);
ecc0b326 MD	114	if (r) {
	115	DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
	116	goto out_cleanup;
	117	}
	118
	119	r = radeon_fence_wait(fence, false);
	120	if (r) {
	121	DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
	122	goto out_cleanup;
	123	}
	124
	125	radeon_fence_unref(&fence);
	126
4c788679	127	r = radeon_bo_kmap(vram_obj, &vram_map);
ecc0b326 MD	128	if (r) {
	129	DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
	130	goto out_cleanup;
	131	}
	132
	133	for (gtt_start = gtt_map, gtt_end = gtt_map + size,
	134	vram_start = vram_map, vram_end = vram_map + size;
	135	vram_start < vram_end;
	136	gtt_start++, vram_start++) {
	137	if (*vram_start != gtt_start) {
	138	DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
4fb1a35c MD	139	"expected 0x%p (GTT/VRAM offset "
	140	"0x%16llx/0x%16llx)\n",
	141	i, *vram_start, gtt_start,
	142	(unsigned long long)
	143	(gtt_addr - rdev->mc.gtt_start +
	144	(void*)gtt_start - gtt_map),
	145	(unsigned long long)
	146	(vram_addr - rdev->mc.vram_start +
	147	(void*)gtt_start - gtt_map));
4c788679	148	radeon_bo_kunmap(vram_obj);
ecc0b326 MD	149	goto out_cleanup;
	150	}
	151	*vram_start = vram_start;
	152	}
	153
4c788679	154	radeon_bo_kunmap(vram_obj);
ecc0b326 MD	155
	156	r = radeon_fence_create(rdev, &fence);
	157	if (r) {
	158	DRM_ERROR("Failed to create VRAM->GTT fence %d\n", i);
	159	goto out_cleanup;
	160	}
	161
a77f1718	162	r = radeon_copy(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, fence);
ecc0b326 MD	163	if (r) {
	164	DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
	165	goto out_cleanup;
	166	}
	167
	168	r = radeon_fence_wait(fence, false);
	169	if (r) {
	170	DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
	171	goto out_cleanup;
	172	}
	173
	174	radeon_fence_unref(&fence);
	175
4c788679	176	r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
ecc0b326 MD	177	if (r) {
	178	DRM_ERROR("Failed to map GTT object after copy %d\n", i);
	179	goto out_cleanup;
	180	}
	181
	182	for (gtt_start = gtt_map, gtt_end = gtt_map + size,
	183	vram_start = vram_map, vram_end = vram_map + size;
	184	gtt_start < gtt_end;
	185	gtt_start++, vram_start++) {
	186	if (*gtt_start != vram_start) {
	187	DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
4fb1a35c MD	188	"expected 0x%p (VRAM/GTT offset "
	189	"0x%16llx/0x%16llx)\n",
	190	i, *gtt_start, vram_start,
	191	(unsigned long long)
	192	(vram_addr - rdev->mc.vram_start +
	193	(void*)vram_start - vram_map),
	194	(unsigned long long)
	195	(gtt_addr - rdev->mc.gtt_start +
	196	(void*)vram_start - vram_map));
4c788679	197	radeon_bo_kunmap(gtt_obj[i]);
ecc0b326 MD	198	goto out_cleanup;
	199	}
	200	}
	201
4c788679	202	radeon_bo_kunmap(gtt_obj[i]);
ecc0b326 MD	203
ecc0b326 MD	204	DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
d594e46a	205	gtt_addr - rdev->mc.gtt_start);
ecc0b326 MD	206	}
	207
	208	out_cleanup:
	209	if (vram_obj) {
4c788679 JG	210	if (radeon_bo_is_reserved(vram_obj)) {
	211	radeon_bo_unpin(vram_obj);
	212	radeon_bo_unreserve(vram_obj);
	213	}
	214	radeon_bo_unref(&vram_obj);
ecc0b326 MD	215	}
	216	if (gtt_obj) {
	217	for (i = 0; i < n; i++) {
	218	if (gtt_obj[i]) {
4c788679 JG	219	if (radeon_bo_is_reserved(gtt_obj[i])) {
	220	radeon_bo_unpin(gtt_obj[i]);
	221	radeon_bo_unreserve(gtt_obj[i]);
	222	}
	223	radeon_bo_unref(&gtt_obj[i]);
ecc0b326 MD	224	}
	225	}
	226	kfree(gtt_obj);
	227	}
	228	if (fence) {
	229	radeon_fence_unref(&fence);
	230	}
	231	if (r) {
	232	printk(KERN_WARNING "Error while testing BO move.\n");
	233	}
	234	}