[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_test.c

/*
 * Copyright 2009 VMware, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Michel Dänzer
 */
#include <drm/drmP.h>
#include <drm/radeon_drm.h>
#include "radeon_reg.h"
#include "radeon.h"


/* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
void radeon_test_moves(struct radeon_device *rdev)
{
	struct radeon_bo *vram_obj = NULL;
	struct radeon_bo **gtt_obj = NULL;
	struct radeon_fence *fence = NULL;
	uint64_t gtt_addr, vram_addr;
	unsigned i, n, size;
	int r;

	size = 1024 * 1024;

	/* Number of tests =
	 * (Total GTT - IB pool - writeback page - ring buffers) / test size
	 */
	n = rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024;
	n -= rdev->cp.ring_size;
	if (rdev->wb.wb_obj)
		n -= RADEON_GPU_PAGE_SIZE;
	if (rdev->ih.ring_obj)
		n -= rdev->ih.ring_size;
	n /= size;

	gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
	if (!gtt_obj) {
		DRM_ERROR("Failed to allocate %d pointers\n", n);
		r = 1;
		goto out_cleanup;
	}

	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
				&vram_obj);
	if (r) {
		DRM_ERROR("Failed to create VRAM object\n");
		goto out_cleanup;
	}
	r = radeon_bo_reserve(vram_obj, false);
	if (unlikely(r != 0))
		goto out_cleanup;
	r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
	if (r) {
		DRM_ERROR("Failed to pin VRAM object\n");
		goto out_cleanup;
	}
	for (i = 0; i < n; i++) {
		void *gtt_map, *vram_map;
		void **gtt_start, **gtt_end;
		void **vram_start, **vram_end;

		r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
					 RADEON_GEM_DOMAIN_GTT, gtt_obj + i);
		if (r) {
			DRM_ERROR("Failed to create GTT object %d\n", i);
			goto out_cleanup;
		}

		r = radeon_bo_reserve(gtt_obj[i], false);
		if (unlikely(r != 0))
			goto out_cleanup;
		r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, &gtt_addr);
		if (r) {
			DRM_ERROR("Failed to pin GTT object %d\n", i);
			goto out_cleanup;
		}

		r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
		if (r) {
			DRM_ERROR("Failed to map GTT object %d\n", i);
			goto out_cleanup;
		}

		for (gtt_start = gtt_map, gtt_end = gtt_map + size;
		     gtt_start < gtt_end;
		     gtt_start++)
			*gtt_start = gtt_start;

		radeon_bo_kunmap(gtt_obj[i]);

		r = radeon_fence_create(rdev, &fence, RADEON_RING_TYPE_GFX_INDEX);
		if (r) {
			DRM_ERROR("Failed to create GTT->VRAM fence %d\n", i);
			goto out_cleanup;
		}

		r = radeon_copy(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, fence);
		if (r) {
			DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
			goto out_cleanup;
		}

		r = radeon_fence_wait(fence, false);
		if (r) {
			DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
			goto out_cleanup;
		}

		radeon_fence_unref(&fence);

		r = radeon_bo_kmap(vram_obj, &vram_map);
		if (r) {
			DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
			goto out_cleanup;
		}

		for (gtt_start = gtt_map, gtt_end = gtt_map + size,
		     vram_start = vram_map, vram_end = vram_map + size;
		     vram_start < vram_end;
		     gtt_start++, vram_start++) {
			if (*vram_start != gtt_start) {
				DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
					  "expected 0x%p (GTT/VRAM offset "
					  "0x%16llx/0x%16llx)\n",
					  i, *vram_start, gtt_start,
					  (unsigned long long)
					  (gtt_addr - rdev->mc.gtt_start +
					   (void*)gtt_start - gtt_map),
					  (unsigned long long)
					  (vram_addr - rdev->mc.vram_start +
					   (void*)gtt_start - gtt_map));
				radeon_bo_kunmap(vram_obj);
				goto out_cleanup;
			}
			*vram_start = vram_start;
		}

		radeon_bo_kunmap(vram_obj);

		r = radeon_fence_create(rdev, &fence, RADEON_RING_TYPE_GFX_INDEX);
		if (r) {
			DRM_ERROR("Failed to create VRAM->GTT fence %d\n", i);
			goto out_cleanup;
		}

		r = radeon_copy(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, fence);
		if (r) {
			DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
			goto out_cleanup;
		}

		r = radeon_fence_wait(fence, false);
		if (r) {
			DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
			goto out_cleanup;
		}

		radeon_fence_unref(&fence);

		r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
		if (r) {
			DRM_ERROR("Failed to map GTT object after copy %d\n", i);
			goto out_cleanup;
		}

		for (gtt_start = gtt_map, gtt_end = gtt_map + size,
		     vram_start = vram_map, vram_end = vram_map + size;
		     gtt_start < gtt_end;
		     gtt_start++, vram_start++) {
			if (*gtt_start != vram_start) {
				DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
					  "expected 0x%p (VRAM/GTT offset "
					  "0x%16llx/0x%16llx)\n",
					  i, *gtt_start, vram_start,
					  (unsigned long long)
					  (vram_addr - rdev->mc.vram_start +
					   (void*)vram_start - vram_map),
					  (unsigned long long)
					  (gtt_addr - rdev->mc.gtt_start +
					   (void*)vram_start - vram_map));
				radeon_bo_kunmap(gtt_obj[i]);
				goto out_cleanup;
			}
		}

		radeon_bo_kunmap(gtt_obj[i]);

		DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
			 gtt_addr - rdev->mc.gtt_start);
	}

out_cleanup:
	if (vram_obj) {
		if (radeon_bo_is_reserved(vram_obj)) {
			radeon_bo_unpin(vram_obj);
			radeon_bo_unreserve(vram_obj);
		}
		radeon_bo_unref(&vram_obj);
	}
	if (gtt_obj) {
		for (i = 0; i < n; i++) {
			if (gtt_obj[i]) {
				if (radeon_bo_is_reserved(gtt_obj[i])) {
					radeon_bo_unpin(gtt_obj[i]);
					radeon_bo_unreserve(gtt_obj[i]);
				}
				radeon_bo_unref(&gtt_obj[i]);
			}
		}
		kfree(gtt_obj);
	}
	if (fence) {
		radeon_fence_unref(&fence);
	}
	if (r) {
		printk(KERN_WARNING "Error while testing BO move.\n");
	}
}
Commit	Line	Data
ecc0b326 MD	1	/*
	2	* Copyright 2009 VMware, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: Michel Dänzer
	23	*/
	24	#include <drm/drmP.h>
	25	#include <drm/radeon_drm.h>
	26	#include "radeon_reg.h"
	27	#include "radeon.h"
	28
	29
	30	/* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
	31	void radeon_test_moves(struct radeon_device *rdev)
	32	{
4c788679 JG	33	struct radeon_bo *vram_obj = NULL;
4c788679 JG	34	struct radeon_bo **gtt_obj = NULL;
ecc0b326 MD	35	struct radeon_fence *fence = NULL;
	36	uint64_t gtt_addr, vram_addr;
	37	unsigned i, n, size;
	38	int r;
	39
	40	size = 1024 * 1024;
	41
	42	/* Number of tests =
24cae9e7	43	* (Total GTT - IB pool - writeback page - ring buffers) / test size
ecc0b326	44	*/
7b1f2485 CK	45	n = rdev->mc.gtt_size - RADEON_IB_POOL_SIZE641024;
7b1f2485 CK	46	n -= rdev->cp.ring_size;
24cae9e7 MD	47	if (rdev->wb.wb_obj)
	48	n -= RADEON_GPU_PAGE_SIZE;
	49	if (rdev->ih.ring_obj)
	50	n -= rdev->ih.ring_size;
	51	n /= size;
ecc0b326 MD	52
	53	gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
	54	if (!gtt_obj) {
	55	DRM_ERROR("Failed to allocate %d pointers\n", n);
	56	r = 1;
	57	goto out_cleanup;
	58	}
	59
441921d5	60	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
4c788679	61	&vram_obj);
ecc0b326 MD	62	if (r) {
	63	DRM_ERROR("Failed to create VRAM object\n");
	64	goto out_cleanup;
	65	}
4c788679 JG	66	r = radeon_bo_reserve(vram_obj, false);
	67	if (unlikely(r != 0))
	68	goto out_cleanup;
	69	r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
ecc0b326 MD	70	if (r) {
	71	DRM_ERROR("Failed to pin VRAM object\n");
	72	goto out_cleanup;
	73	}
ecc0b326 MD	74	for (i = 0; i < n; i++) {
	75	void gtt_map, vram_map;
	76	void gtt_start, gtt_end;
	77	void vram_start, vram_end;
	78
441921d5	79	r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
4c788679	80	RADEON_GEM_DOMAIN_GTT, gtt_obj + i);
ecc0b326 MD	81	if (r) {
	82	DRM_ERROR("Failed to create GTT object %d\n", i);
	83	goto out_cleanup;
	84	}
	85
4c788679 JG	86	r = radeon_bo_reserve(gtt_obj[i], false);
	87	if (unlikely(r != 0))
	88	goto out_cleanup;
	89	r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, &gtt_addr);
ecc0b326 MD	90	if (r) {
	91	DRM_ERROR("Failed to pin GTT object %d\n", i);
	92	goto out_cleanup;
	93	}
	94
4c788679	95	r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
ecc0b326 MD	96	if (r) {
	97	DRM_ERROR("Failed to map GTT object %d\n", i);
	98	goto out_cleanup;
	99	}
	100
	101	for (gtt_start = gtt_map, gtt_end = gtt_map + size;
	102	gtt_start < gtt_end;
	103	gtt_start++)
	104	*gtt_start = gtt_start;
	105
4c788679	106	radeon_bo_kunmap(gtt_obj[i]);
ecc0b326	107
7465280c	108	r = radeon_fence_create(rdev, &fence, RADEON_RING_TYPE_GFX_INDEX);
ecc0b326 MD	109	if (r) {
	110	DRM_ERROR("Failed to create GTT->VRAM fence %d\n", i);
	111	goto out_cleanup;
	112	}
	113
a77f1718	114	r = radeon_copy(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, fence);
ecc0b326 MD	115	if (r) {
	116	DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
	117	goto out_cleanup;
	118	}
	119
	120	r = radeon_fence_wait(fence, false);
	121	if (r) {
	122	DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
	123	goto out_cleanup;
	124	}
	125
	126	radeon_fence_unref(&fence);
	127
4c788679	128	r = radeon_bo_kmap(vram_obj, &vram_map);
ecc0b326 MD	129	if (r) {
	130	DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
	131	goto out_cleanup;
	132	}
	133
	134	for (gtt_start = gtt_map, gtt_end = gtt_map + size,
	135	vram_start = vram_map, vram_end = vram_map + size;
	136	vram_start < vram_end;
	137	gtt_start++, vram_start++) {
	138	if (*vram_start != gtt_start) {
	139	DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
4fb1a35c MD	140	"expected 0x%p (GTT/VRAM offset "
	141	"0x%16llx/0x%16llx)\n",
	142	i, *vram_start, gtt_start,
	143	(unsigned long long)
	144	(gtt_addr - rdev->mc.gtt_start +
	145	(void*)gtt_start - gtt_map),
	146	(unsigned long long)
	147	(vram_addr - rdev->mc.vram_start +
	148	(void*)gtt_start - gtt_map));
4c788679	149	radeon_bo_kunmap(vram_obj);
ecc0b326 MD	150	goto out_cleanup;
	151	}
	152	*vram_start = vram_start;
	153	}
	154
4c788679	155	radeon_bo_kunmap(vram_obj);
ecc0b326	156
7465280c	157	r = radeon_fence_create(rdev, &fence, RADEON_RING_TYPE_GFX_INDEX);
ecc0b326 MD	158	if (r) {
	159	DRM_ERROR("Failed to create VRAM->GTT fence %d\n", i);
	160	goto out_cleanup;
	161	}
	162
a77f1718	163	r = radeon_copy(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, fence);
ecc0b326 MD	164	if (r) {
	165	DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
	166	goto out_cleanup;
	167	}
	168
	169	r = radeon_fence_wait(fence, false);
	170	if (r) {
	171	DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
	172	goto out_cleanup;
	173	}
	174
	175	radeon_fence_unref(&fence);
	176
4c788679	177	r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
ecc0b326 MD	178	if (r) {
	179	DRM_ERROR("Failed to map GTT object after copy %d\n", i);
	180	goto out_cleanup;
	181	}
	182
	183	for (gtt_start = gtt_map, gtt_end = gtt_map + size,
	184	vram_start = vram_map, vram_end = vram_map + size;
	185	gtt_start < gtt_end;
	186	gtt_start++, vram_start++) {
	187	if (*gtt_start != vram_start) {
	188	DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
4fb1a35c MD	189	"expected 0x%p (VRAM/GTT offset "
	190	"0x%16llx/0x%16llx)\n",
	191	i, *gtt_start, vram_start,
	192	(unsigned long long)
	193	(vram_addr - rdev->mc.vram_start +
	194	(void*)vram_start - vram_map),
	195	(unsigned long long)
	196	(gtt_addr - rdev->mc.gtt_start +
	197	(void*)vram_start - vram_map));
4c788679	198	radeon_bo_kunmap(gtt_obj[i]);
ecc0b326 MD	199	goto out_cleanup;
	200	}
	201	}
	202
4c788679	203	radeon_bo_kunmap(gtt_obj[i]);
ecc0b326 MD	204
ecc0b326 MD	205	DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
d594e46a	206	gtt_addr - rdev->mc.gtt_start);
ecc0b326 MD	207	}
	208
	209	out_cleanup:
	210	if (vram_obj) {
4c788679 JG	211	if (radeon_bo_is_reserved(vram_obj)) {
	212	radeon_bo_unpin(vram_obj);
	213	radeon_bo_unreserve(vram_obj);
	214	}
	215	radeon_bo_unref(&vram_obj);
ecc0b326 MD	216	}
	217	if (gtt_obj) {
	218	for (i = 0; i < n; i++) {
	219	if (gtt_obj[i]) {
4c788679 JG	220	if (radeon_bo_is_reserved(gtt_obj[i])) {
	221	radeon_bo_unpin(gtt_obj[i]);
	222	radeon_bo_unreserve(gtt_obj[i]);
	223	}
	224	radeon_bo_unref(&gtt_obj[i]);
ecc0b326 MD	225	}
	226	}
	227	kfree(gtt_obj);
	228	}
	229	if (fence) {
	230	radeon_fence_unref(&fence);
	231	}
	232	if (r) {
	233	printk(KERN_WARNING "Error while testing BO move.\n");
	234	}
	235	}