Commit | Line | Data |
---|---|---|
4bf8e196 LP |
1 | /* |
2 | * rcar_du_drv.h -- R-Car Display Unit DRM driver | |
3 | * | |
2427b303 | 4 | * Copyright (C) 2013-2015 Renesas Electronics Corporation |
4bf8e196 LP |
5 | * |
6 | * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | */ | |
13 | ||
14 | #ifndef __RCAR_DU_DRV_H__ | |
15 | #define __RCAR_DU_DRV_H__ | |
16 | ||
17 | #include <linux/kernel.h> | |
8d3f9b22 | 18 | #include <linux/wait.h> |
4bf8e196 LP |
19 | |
20 | #include "rcar_du_crtc.h" | |
cb2025d2 | 21 | #include "rcar_du_group.h" |
6d62ef3a | 22 | #include "rcar_du_vsp.h" |
4bf8e196 LP |
23 | |
24 | struct clk; | |
25 | struct device; | |
26 | struct drm_device; | |
3864c6f4 | 27 | struct drm_fbdev_cma; |
cb2025d2 | 28 | struct rcar_du_device; |
90374b5c | 29 | struct rcar_du_lvdsenc; |
4bf8e196 | 30 | |
f66ee304 | 31 | #define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK (1 << 0) /* Per-CRTC IRQ and clock */ |
0c1c8776 | 32 | #define RCAR_DU_FEATURE_EXT_CTRL_REGS (1 << 1) /* Has extended control registers */ |
6d62ef3a | 33 | #define RCAR_DU_FEATURE_VSP1_SOURCE (1 << 2) /* Has inputs from VSP1 */ |
e8355e0d LP |
34 | |
35 | #define RCAR_DU_QUIRK_ALIGN_128B (1 << 0) /* Align pitches to 128 bytes */ | |
5cca30eb | 36 | #define RCAR_DU_QUIRK_LVDS_LANES (1 << 1) /* LVDS lanes 1 and 3 inverted */ |
f66ee304 | 37 | |
ef67a902 LP |
38 | /* |
39 | * struct rcar_du_output_routing - Output routing specification | |
40 | * @possible_crtcs: bitmask of possible CRTCs for the output | |
41 | * @encoder_type: DRM type of the internal encoder associated with the output | |
96c02691 | 42 | * @port: device tree port number corresponding to this output route |
ef67a902 LP |
43 | * |
44 | * The DU has 5 possible outputs (DPAD0/1, LVDS0/1, TCON). Output routing data | |
45 | * specify the valid SoC outputs, which CRTCs can drive the output, and the type | |
46 | * of in-SoC encoder for the output. | |
47 | */ | |
48 | struct rcar_du_output_routing { | |
49 | unsigned int possible_crtcs; | |
50 | unsigned int encoder_type; | |
96c02691 | 51 | unsigned int port; |
ef67a902 LP |
52 | }; |
53 | ||
481d342e LP |
54 | /* |
55 | * struct rcar_du_device_info - DU model-specific information | |
2427b303 | 56 | * @gen: device generation (2 or 3) |
481d342e | 57 | * @features: device features (RCAR_DU_FEATURE_*) |
e8355e0d | 58 | * @quirks: device quirks (RCAR_DU_QUIRK_*) |
a5f0ef59 | 59 | * @num_crtcs: total number of CRTCs |
ef67a902 | 60 | * @routes: array of CRTC to output routes, indexed by output (RCAR_DU_OUTPUT_*) |
90374b5c | 61 | * @num_lvds: number of internal LVDS encoders |
481d342e LP |
62 | */ |
63 | struct rcar_du_device_info { | |
2427b303 | 64 | unsigned int gen; |
481d342e | 65 | unsigned int features; |
e8355e0d | 66 | unsigned int quirks; |
a5f0ef59 | 67 | unsigned int num_crtcs; |
ef67a902 | 68 | struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX]; |
90374b5c | 69 | unsigned int num_lvds; |
481d342e LP |
70 | }; |
71 | ||
6a8c49fc | 72 | #define RCAR_DU_MAX_CRTCS 4 |
a64b9c7e LP |
73 | #define RCAR_DU_MAX_GROUPS DIV_ROUND_UP(RCAR_DU_MAX_CRTCS, 2) |
74 | #define RCAR_DU_MAX_LVDS 2 | |
6d62ef3a | 75 | #define RCAR_DU_MAX_VSPS 4 |
a64b9c7e | 76 | |
4bf8e196 LP |
77 | struct rcar_du_device { |
78 | struct device *dev; | |
481d342e | 79 | const struct rcar_du_device_info *info; |
4bf8e196 LP |
80 | |
81 | void __iomem *mmio; | |
4bf8e196 LP |
82 | |
83 | struct drm_device *ddev; | |
3864c6f4 | 84 | struct drm_fbdev_cma *fbdev; |
4bf8e196 | 85 | |
a64b9c7e | 86 | struct rcar_du_crtc crtcs[RCAR_DU_MAX_CRTCS]; |
4bf8e196 LP |
87 | unsigned int num_crtcs; |
88 | ||
a64b9c7e | 89 | struct rcar_du_group groups[RCAR_DU_MAX_GROUPS]; |
6d62ef3a | 90 | struct rcar_du_vsp vsps[RCAR_DU_MAX_VSPS]; |
7cbc05cb | 91 | |
9f6aee95 LP |
92 | struct { |
93 | struct drm_property *alpha; | |
94 | struct drm_property *colorkey; | |
9f6aee95 LP |
95 | } props; |
96 | ||
7cbc05cb | 97 | unsigned int dpad0_source; |
34a04f2b LP |
98 | unsigned int vspd1_sink; |
99 | ||
a64b9c7e | 100 | struct rcar_du_lvdsenc *lvds[RCAR_DU_MAX_LVDS]; |
8d3f9b22 LP |
101 | |
102 | struct { | |
103 | wait_queue_head_t wait; | |
104 | u32 pending; | |
105 | } commit; | |
4bf8e196 LP |
106 | }; |
107 | ||
481d342e LP |
108 | static inline bool rcar_du_has(struct rcar_du_device *rcdu, |
109 | unsigned int feature) | |
110 | { | |
111 | return rcdu->info->features & feature; | |
112 | } | |
113 | ||
e8355e0d LP |
114 | static inline bool rcar_du_needs(struct rcar_du_device *rcdu, |
115 | unsigned int quirk) | |
116 | { | |
117 | return rcdu->info->quirks & quirk; | |
118 | } | |
119 | ||
4bf8e196 LP |
120 | static inline u32 rcar_du_read(struct rcar_du_device *rcdu, u32 reg) |
121 | { | |
122 | return ioread32(rcdu->mmio + reg); | |
123 | } | |
124 | ||
125 | static inline void rcar_du_write(struct rcar_du_device *rcdu, u32 reg, u32 data) | |
126 | { | |
127 | iowrite32(data, rcdu->mmio + reg); | |
128 | } | |
129 | ||
130 | #endif /* __RCAR_DU_DRV_H__ */ |