[deliverable/linux.git] / drivers / gpu / drm / rcar-du / rcar_du_kms.c

/*
 * rcar_du_kms.c  --  R-Car Display Unit Mode Setting
 *
 * Copyright (C) 2013-2014 Renesas Electronics Corporation
 *
 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <drm/drmP.h>
#include <drm/drm_crtc.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_fb_cma_helper.h>
#include <drm/drm_gem_cma_helper.h>

#include <linux/of_graph.h>

#include "rcar_du_crtc.h"
#include "rcar_du_drv.h"
#include "rcar_du_encoder.h"
#include "rcar_du_kms.h"
#include "rcar_du_lvdsenc.h"
#include "rcar_du_regs.h"

/* -----------------------------------------------------------------------------
 * Format helpers
 */

static const struct rcar_du_format_info rcar_du_format_infos[] = {
	{
		.fourcc = DRM_FORMAT_RGB565,
		.bpp = 16,
		.planes = 1,
		.pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
		.edf = PnDDCR4_EDF_NONE,
	}, {
		.fourcc = DRM_FORMAT_ARGB1555,
		.bpp = 16,
		.planes = 1,
		.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
		.edf = PnDDCR4_EDF_NONE,
	}, {
		.fourcc = DRM_FORMAT_XRGB1555,
		.bpp = 16,
		.planes = 1,
		.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
		.edf = PnDDCR4_EDF_NONE,
	}, {
		.fourcc = DRM_FORMAT_XRGB8888,
		.bpp = 32,
		.planes = 1,
		.pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
		.edf = PnDDCR4_EDF_RGB888,
	}, {
		.fourcc = DRM_FORMAT_ARGB8888,
		.bpp = 32,
		.planes = 1,
		.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
		.edf = PnDDCR4_EDF_ARGB8888,
	}, {
		.fourcc = DRM_FORMAT_UYVY,
		.bpp = 16,
		.planes = 1,
		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
		.edf = PnDDCR4_EDF_NONE,
	}, {
		.fourcc = DRM_FORMAT_YUYV,
		.bpp = 16,
		.planes = 1,
		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
		.edf = PnDDCR4_EDF_NONE,
	}, {
		.fourcc = DRM_FORMAT_NV12,
		.bpp = 12,
		.planes = 2,
		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
		.edf = PnDDCR4_EDF_NONE,
	}, {
		.fourcc = DRM_FORMAT_NV21,
		.bpp = 12,
		.planes = 2,
		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
		.edf = PnDDCR4_EDF_NONE,
	}, {
		/* In YUV 4:2:2, only NV16 is supported (NV61 isn't) */
		.fourcc = DRM_FORMAT_NV16,
		.bpp = 16,
		.planes = 2,
		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
		.edf = PnDDCR4_EDF_NONE,
	},
};

const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
{
	unsigned int i;

	for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) {
		if (rcar_du_format_infos[i].fourcc == fourcc)
			return &rcar_du_format_infos[i];
	}

	return NULL;
}

/* -----------------------------------------------------------------------------
 * Frame buffer
 */

int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
			struct drm_mode_create_dumb *args)
{
	struct rcar_du_device *rcdu = dev->dev_private;
	unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
	unsigned int align;

	/* The R8A7779 DU requires a 16 pixels pitch alignment as documented,
	 * but the R8A7790 DU seems to require a 128 bytes pitch alignment.
	 */
	if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
		align = 128;
	else
		align = 16 * args->bpp / 8;

	args->pitch = roundup(min_pitch, align);

	return drm_gem_cma_dumb_create_internal(file, dev, args);
}

static struct drm_framebuffer *
rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
		  struct drm_mode_fb_cmd2 *mode_cmd)
{
	struct rcar_du_device *rcdu = dev->dev_private;
	const struct rcar_du_format_info *format;
	unsigned int max_pitch;
	unsigned int align;
	unsigned int bpp;

	format = rcar_du_format_info(mode_cmd->pixel_format);
	if (format == NULL) {
		dev_dbg(dev->dev, "unsupported pixel format %08x\n",
			mode_cmd->pixel_format);
		return ERR_PTR(-EINVAL);
	}

	/*
	 * The pitch and alignment constraints are expressed in pixels on the
	 * hardware side and in bytes in the DRM API.
	 */
	bpp = format->planes == 2 ? 1 : format->bpp / 8;
	max_pitch =  4096 * bpp;

	if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
		align = 128;
	else
		align = 16 * bpp;

	if (mode_cmd->pitches[0] & (align - 1) ||
	    mode_cmd->pitches[0] >= max_pitch) {
		dev_dbg(dev->dev, "invalid pitch value %u\n",
			mode_cmd->pitches[0]);
		return ERR_PTR(-EINVAL);
	}

	if (format->planes == 2) {
		if (mode_cmd->pitches[1] != mode_cmd->pitches[0]) {
			dev_dbg(dev->dev,
				"luma and chroma pitches do not match\n");
			return ERR_PTR(-EINVAL);
		}
	}

	return drm_fb_cma_create(dev, file_priv, mode_cmd);
}

static void rcar_du_output_poll_changed(struct drm_device *dev)
{
	struct rcar_du_device *rcdu = dev->dev_private;

	drm_fbdev_cma_hotplug_event(rcdu->fbdev);
}

static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
	.fb_create = rcar_du_fb_create,
	.output_poll_changed = rcar_du_output_poll_changed,
};

static int rcar_du_encoders_init_one(struct rcar_du_device *rcdu,
				     enum rcar_du_output output,
				     struct of_endpoint *ep)
{
	static const struct {
		const char *compatible;
		enum rcar_du_encoder_type type;
	} encoders[] = {
		{ "adi,adv7123", RCAR_DU_ENCODER_VGA },
		{ "thine,thc63lvdm83d", RCAR_DU_ENCODER_LVDS },
	};

	enum rcar_du_encoder_type enc_type = RCAR_DU_ENCODER_NONE;
	struct device_node *connector = NULL;
	struct device_node *encoder = NULL;
	struct device_node *prev = NULL;
	struct device_node *entity_ep_node;
	struct device_node *entity;
	int ret;

	/*
	 * Locate the connected entity and infer its type from the number of
	 * endpoints.
	 */
	entity = of_graph_get_remote_port_parent(ep->local_node);
	if (!entity) {
		dev_dbg(rcdu->dev, "unconnected endpoint %s, skipping\n",
			ep->local_node->full_name);
		return 0;
	}

	entity_ep_node = of_parse_phandle(ep->local_node, "remote-endpoint", 0);

	while (1) {
		struct device_node *ep_node;

		ep_node = of_graph_get_next_endpoint(entity, prev);
		of_node_put(prev);
		prev = ep_node;

		if (!ep_node)
			break;

		if (ep_node == entity_ep_node)
			continue;

		/*
		 * We've found one endpoint other than the input, this must
		 * be an encoder. Locate the connector.
		 */
		encoder = entity;
		connector = of_graph_get_remote_port_parent(ep_node);
		of_node_put(ep_node);

		if (!connector) {
			dev_warn(rcdu->dev,
				 "no connector for encoder %s, skipping\n",
				 encoder->full_name);
			of_node_put(entity_ep_node);
			of_node_put(encoder);
			return 0;
		}

		break;
	}

	of_node_put(entity_ep_node);

	if (encoder) {
		/*
		 * If an encoder has been found, get its type based on its
		 * compatible string.
		 */
		unsigned int i;

		for (i = 0; i < ARRAY_SIZE(encoders); ++i) {
			if (of_device_is_compatible(encoder,
						    encoders[i].compatible)) {
				enc_type = encoders[i].type;
				break;
			}
		}

		if (i == ARRAY_SIZE(encoders)) {
			dev_warn(rcdu->dev,
				 "unknown encoder type for %s, skipping\n",
				 encoder->full_name);
			of_node_put(encoder);
			of_node_put(connector);
			return 0;
		}
	} else {
		/*
		 * If no encoder has been found the entity must be the
		 * connector.
		 */
		connector = entity;
	}

	ret = rcar_du_encoder_init(rcdu, enc_type, output, encoder, connector);
	of_node_put(encoder);
	of_node_put(connector);

	return ret < 0 ? ret : 1;
}

static int rcar_du_encoders_init(struct rcar_du_device *rcdu)
{
	struct device_node *np = rcdu->dev->of_node;
	struct device_node *prev = NULL;
	unsigned int num_encoders = 0;

	/*
	 * Iterate over the endpoints and create one encoder for each output
	 * pipeline.
	 */
	while (1) {
		struct device_node *ep_node;
		enum rcar_du_output output;
		struct of_endpoint ep;
		unsigned int i;
		int ret;

		ep_node = of_graph_get_next_endpoint(np, prev);
		of_node_put(prev);
		prev = ep_node;

		if (ep_node == NULL)
			break;

		ret = of_graph_parse_endpoint(ep_node, &ep);
		if (ret < 0) {
			of_node_put(ep_node);
			return ret;
		}

		/* Find the output route corresponding to the port number. */
		for (i = 0; i < RCAR_DU_OUTPUT_MAX; ++i) {
			if (rcdu->info->routes[i].possible_crtcs &&
			    rcdu->info->routes[i].port == ep.port) {
				output = i;
				break;
			}
		}

		if (i == RCAR_DU_OUTPUT_MAX) {
			dev_warn(rcdu->dev,
				 "port %u references unexisting output, skipping\n",
				 ep.port);
			continue;
		}

		/* Process the output pipeline. */
		ret = rcar_du_encoders_init_one(rcdu, output, &ep);
		if (ret < 0) {
			of_node_put(ep_node);
			return ret;
		}

		num_encoders += ret;
	}

	return num_encoders;
}

int rcar_du_modeset_init(struct rcar_du_device *rcdu)
{
	static const unsigned int mmio_offsets[] = {
		DU0_REG_OFFSET, DU2_REG_OFFSET
	};

	struct drm_device *dev = rcdu->ddev;
	struct drm_encoder *encoder;
	struct drm_fbdev_cma *fbdev;
	unsigned int num_encoders;
	unsigned int num_groups;
	unsigned int i;
	int ret;

	drm_mode_config_init(dev);

	dev->mode_config.min_width = 0;
	dev->mode_config.min_height = 0;
	dev->mode_config.max_width = 4095;
	dev->mode_config.max_height = 2047;
	dev->mode_config.funcs = &rcar_du_mode_config_funcs;

	rcdu->num_crtcs = rcdu->info->num_crtcs;

	/* Initialize the groups. */
	num_groups = DIV_ROUND_UP(rcdu->num_crtcs, 2);

	for (i = 0; i < num_groups; ++i) {
		struct rcar_du_group *rgrp = &rcdu->groups[i];

		rgrp->dev = rcdu;
		rgrp->mmio_offset = mmio_offsets[i];
		rgrp->index = i;

		ret = rcar_du_planes_init(rgrp);
		if (ret < 0)
			return ret;
	}

	/* Create the CRTCs. */
	for (i = 0; i < rcdu->num_crtcs; ++i) {
		struct rcar_du_group *rgrp = &rcdu->groups[i / 2];

		ret = rcar_du_crtc_create(rgrp, i);
		if (ret < 0)
			return ret;
	}

	/* Initialize the encoders. */
	ret = rcar_du_lvdsenc_init(rcdu);
	if (ret < 0)
		return ret;

	ret = rcar_du_encoders_init(rcdu);
	if (ret < 0)
		return ret;

	num_encoders = ret;

	/* Set the possible CRTCs and possible clones. There's always at least
	 * one way for all encoders to clone each other, set all bits in the
	 * possible clones field.
	 */
	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
		struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
		const struct rcar_du_output_routing *route =
			&rcdu->info->routes[renc->output];

		encoder->possible_crtcs = route->possible_crtcs;
		encoder->possible_clones = (1 << num_encoders) - 1;
	}

	/* Now that the CRTCs have been initialized register the planes. */
	for (i = 0; i < num_groups; ++i) {
		ret = rcar_du_planes_register(&rcdu->groups[i]);
		if (ret < 0)
			return ret;
	}

	drm_kms_helper_poll_init(dev);

	drm_helper_disable_unused_functions(dev);

	fbdev = drm_fbdev_cma_init(dev, 32, dev->mode_config.num_crtc,
				   dev->mode_config.num_connector);
	if (IS_ERR(fbdev))
		return PTR_ERR(fbdev);

#ifndef CONFIG_FRAMEBUFFER_CONSOLE
	drm_fbdev_cma_restore_mode(fbdev);
#endif

	rcdu->fbdev = fbdev;

	return 0;
}
Commit	Line	Data
4bf8e196 LP	1	/*
	2	* rcar_du_kms.c -- R-Car Display Unit Mode Setting
	3	*
36d50464	4	* Copyright (C) 2013-2014 Renesas Electronics Corporation
4bf8e196 LP	5	*
	6	* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*/
	13
	14	#include <drm/drmP.h>
	15	#include <drm/drm_crtc.h>
	16	#include <drm/drm_crtc_helper.h>
	17	#include <drm/drm_fb_cma_helper.h>
	18	#include <drm/drm_gem_cma_helper.h>
	19
96c02691 LP	20	#include <linux/of_graph.h>
96c02691 LP	21
4bf8e196 LP	22	#include "rcar_du_crtc.h"
4bf8e196 LP	23	#include "rcar_du_drv.h"
6978f123	24	#include "rcar_du_encoder.h"
4bf8e196	25	#include "rcar_du_kms.h"
90374b5c	26	#include "rcar_du_lvdsenc.h"
4bf8e196	27	#include "rcar_du_regs.h"
4bf8e196 LP	28
	29	/* -----------------------------------------------------------------------------
	30	* Format helpers
	31	*/
	32
	33	static const struct rcar_du_format_info rcar_du_format_infos[] = {
	34	{
	35	.fourcc = DRM_FORMAT_RGB565,
	36	.bpp = 16,
	37	.planes = 1,
	38	.pnmr = PnMR_SPIM_TP \| PnMR_DDDF_16BPP,
	39	.edf = PnDDCR4_EDF_NONE,
	40	}, {
	41	.fourcc = DRM_FORMAT_ARGB1555,
	42	.bpp = 16,
	43	.planes = 1,
	44	.pnmr = PnMR_SPIM_ALP \| PnMR_DDDF_ARGB,
	45	.edf = PnDDCR4_EDF_NONE,
	46	}, {
	47	.fourcc = DRM_FORMAT_XRGB1555,
	48	.bpp = 16,
	49	.planes = 1,
	50	.pnmr = PnMR_SPIM_ALP \| PnMR_DDDF_ARGB,
	51	.edf = PnDDCR4_EDF_NONE,
	52	}, {
	53	.fourcc = DRM_FORMAT_XRGB8888,
	54	.bpp = 32,
	55	.planes = 1,
	56	.pnmr = PnMR_SPIM_TP \| PnMR_DDDF_16BPP,
	57	.edf = PnDDCR4_EDF_RGB888,
	58	}, {
	59	.fourcc = DRM_FORMAT_ARGB8888,
	60	.bpp = 32,
	61	.planes = 1,
	62	.pnmr = PnMR_SPIM_ALP \| PnMR_DDDF_16BPP,
	63	.edf = PnDDCR4_EDF_ARGB8888,
	64	}, {
	65	.fourcc = DRM_FORMAT_UYVY,
	66	.bpp = 16,
	67	.planes = 1,
	68	.pnmr = PnMR_SPIM_TP_OFF \| PnMR_DDDF_YC,
	69	.edf = PnDDCR4_EDF_NONE,
	70	}, {
	71	.fourcc = DRM_FORMAT_YUYV,
	72	.bpp = 16,
	73	.planes = 1,
	74	.pnmr = PnMR_SPIM_TP_OFF \| PnMR_DDDF_YC,
	75	.edf = PnDDCR4_EDF_NONE,
	76	}, {
	77	.fourcc = DRM_FORMAT_NV12,
	78	.bpp = 12,
	79	.planes = 2,
	80	.pnmr = PnMR_SPIM_TP_OFF \| PnMR_DDDF_YC,
	81	.edf = PnDDCR4_EDF_NONE,
	82	}, {
	83	.fourcc = DRM_FORMAT_NV21,
	84	.bpp = 12,
	85	.planes = 2,
	86	.pnmr = PnMR_SPIM_TP_OFF \| PnMR_DDDF_YC,
	87	.edf = PnDDCR4_EDF_NONE,
	88	}, {
	89	/* In YUV 4:2:2, only NV16 is supported (NV61 isn't) */
	90	.fourcc = DRM_FORMAT_NV16,
	91	.bpp = 16,
92	.planes = 2,
93	.pnmr = PnMR_SPIM_TP_OFF \| PnMR_DDDF_YC,
94	.edf = PnDDCR4_EDF_NONE,
95	},
96	};
97
98	const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
99	{
100	unsigned int i;
101
102	for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) {
103	if (rcar_du_format_infos[i].fourcc == fourcc)
104	return &rcar_du_format_infos[i];
105	}
106
107	return NULL;
108	}
109
4bf8e196 LP	110	/* -----------------------------------------------------------------------------
	111	* Frame buffer
	112	*/
	113
59e32642 LP	114	int rcar_du_dumb_create(struct drm_file file, struct drm_device dev,
	115	struct drm_mode_create_dumb *args)
	116	{
9e2d2de9	117	struct rcar_du_device *rcdu = dev->dev_private;
59e32642 LP	118	unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
	119	unsigned int align;
	120
9e2d2de9 LP	121	/* The R8A7779 DU requires a 16 pixels pitch alignment as documented,
	122	* but the R8A7790 DU seems to require a 128 bytes pitch alignment.
	123	*/
e8355e0d	124	if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
9e2d2de9 LP	125	align = 128;
	126	else
	127	align = 16 * args->bpp / 8;
	128
7e295a36	129	args->pitch = roundup(min_pitch, align);
59e32642	130
6d178291	131	return drm_gem_cma_dumb_create_internal(file, dev, args);
59e32642 LP	132	}
59e32642 LP	133
4bf8e196 LP	134	static struct drm_framebuffer *
	135	rcar_du_fb_create(struct drm_device dev, struct drm_file file_priv,
	136	struct drm_mode_fb_cmd2 *mode_cmd)
	137	{
9e2d2de9	138	struct rcar_du_device *rcdu = dev->dev_private;
4bf8e196	139	const struct rcar_du_format_info *format;
8bed5cc7	140	unsigned int max_pitch;
59e32642	141	unsigned int align;
8bed5cc7	142	unsigned int bpp;
4bf8e196 LP	143
	144	format = rcar_du_format_info(mode_cmd->pixel_format);
	145	if (format == NULL) {
	146	dev_dbg(dev->dev, "unsupported pixel format %08x\n",
	147	mode_cmd->pixel_format);
	148	return ERR_PTR(-EINVAL);
	149	}
	150
8bed5cc7 LP	151	/*
	152	* The pitch and alignment constraints are expressed in pixels on the
	153	* hardware side and in bytes in the DRM API.
	154	*/
	155	bpp = format->planes == 2 ? 1 : format->bpp / 8;
	156	max_pitch = 4096 * bpp;
	157
e8355e0d	158	if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
9e2d2de9 LP	159	align = 128;
9e2d2de9 LP	160	else
8bed5cc7	161	align = 16 * bpp;
59e32642 LP	162
59e32642 LP	163	if (mode_cmd->pitches[0] & (align - 1) \|\|
8bed5cc7	164	mode_cmd->pitches[0] >= max_pitch) {
4bf8e196 LP	165	dev_dbg(dev->dev, "invalid pitch value %u\n",
	166	mode_cmd->pitches[0]);
	167	return ERR_PTR(-EINVAL);
	168	}
	169
	170	if (format->planes == 2) {
	171	if (mode_cmd->pitches[1] != mode_cmd->pitches[0]) {
	172	dev_dbg(dev->dev,
	173	"luma and chroma pitches do not match\n");
	174	return ERR_PTR(-EINVAL);
	175	}
	176	}
	177
	178	return drm_fb_cma_create(dev, file_priv, mode_cmd);
	179	}
	180
3864c6f4 LP	181	static void rcar_du_output_poll_changed(struct drm_device *dev)
	182	{
	183	struct rcar_du_device *rcdu = dev->dev_private;
	184
	185	drm_fbdev_cma_hotplug_event(rcdu->fbdev);
	186	}
	187
4bf8e196 LP	188	static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
4bf8e196 LP	189	.fb_create = rcar_du_fb_create,
3864c6f4	190	.output_poll_changed = rcar_du_output_poll_changed,
4bf8e196 LP	191	};
4bf8e196 LP	192
2378ad12 LP	193	static int rcar_du_encoders_init_one(struct rcar_du_device *rcdu,
	194	enum rcar_du_output output,
	195	struct of_endpoint *ep)
96c02691 LP	196	{
	197	static const struct {
	198	const char *compatible;
	199	enum rcar_du_encoder_type type;
	200	} encoders[] = {
	201	{ "adi,adv7123", RCAR_DU_ENCODER_VGA },
	202	{ "thine,thc63lvdm83d", RCAR_DU_ENCODER_LVDS },
	203	};
	204
	205	enum rcar_du_encoder_type enc_type = RCAR_DU_ENCODER_NONE;
	206	struct device_node *connector = NULL;
	207	struct device_node *encoder = NULL;
	208	struct device_node *prev = NULL;
	209	struct device_node *entity_ep_node;
	210	struct device_node *entity;
	211	int ret;
	212
	213	/*
	214	* Locate the connected entity and infer its type from the number of
	215	* endpoints.
	216	*/
	217	entity = of_graph_get_remote_port_parent(ep->local_node);
	218	if (!entity) {
	219	dev_dbg(rcdu->dev, "unconnected endpoint %s, skipping\n",
	220	ep->local_node->full_name);
	221	return 0;
	222	}
	223
	224	entity_ep_node = of_parse_phandle(ep->local_node, "remote-endpoint", 0);
	225
	226	while (1) {
	227	struct device_node *ep_node;
	228
	229	ep_node = of_graph_get_next_endpoint(entity, prev);
	230	of_node_put(prev);
	231	prev = ep_node;
	232
	233	if (!ep_node)
	234	break;
	235
	236	if (ep_node == entity_ep_node)
	237	continue;
	238
	239	/*
	240	* We've found one endpoint other than the input, this must
	241	* be an encoder. Locate the connector.
	242	*/
	243	encoder = entity;
	244	connector = of_graph_get_remote_port_parent(ep_node);
	245	of_node_put(ep_node);
	246
	247	if (!connector) {
	248	dev_warn(rcdu->dev,
	249	"no connector for encoder %s, skipping\n",
	250	encoder->full_name);
	251	of_node_put(entity_ep_node);
	252	of_node_put(encoder);
	253	return 0;
	254	}
	255
	256	break;
	257	}
	258
	259	of_node_put(entity_ep_node);
260
261	if (encoder) {
262	/*
263	* If an encoder has been found, get its type based on its
264	* compatible string.
265	*/
266	unsigned int i;
267
268	for (i = 0; i < ARRAY_SIZE(encoders); ++i) {
269	if (of_device_is_compatible(encoder,
270	encoders[i].compatible)) {
271	enc_type = encoders[i].type;
272	break;
273	}
274	}
275
276	if (i == ARRAY_SIZE(encoders)) {
277	dev_warn(rcdu->dev,
278	"unknown encoder type for %s, skipping\n",
279	encoder->full_name);
280	of_node_put(encoder);
281	of_node_put(connector);
282	return 0;
283	}
284	} else {
285	/*
286	* If no encoder has been found the entity must be the
287	* connector.
288	*/
289	connector = entity;
290	}
291
3ea4d5ec	292	ret = rcar_du_encoder_init(rcdu, enc_type, output, encoder, connector);
96c02691 LP	293	of_node_put(encoder);
	294	of_node_put(connector);
	295
	296	return ret < 0 ? ret : 1;
	297	}
	298
2378ad12	299	static int rcar_du_encoders_init(struct rcar_du_device *rcdu)
96c02691 LP	300	{
	301	struct device_node *np = rcdu->dev->of_node;
	302	struct device_node *prev = NULL;
	303	unsigned int num_encoders = 0;
	304
	305	/*
	306	* Iterate over the endpoints and create one encoder for each output
	307	* pipeline.
	308	*/
	309	while (1) {
	310	struct device_node *ep_node;
	311	enum rcar_du_output output;
	312	struct of_endpoint ep;
	313	unsigned int i;
	314	int ret;
	315
	316	ep_node = of_graph_get_next_endpoint(np, prev);
	317	of_node_put(prev);
	318	prev = ep_node;
	319
	320	if (ep_node == NULL)
	321	break;
	322
	323	ret = of_graph_parse_endpoint(ep_node, &ep);
	324	if (ret < 0) {
	325	of_node_put(ep_node);
	326	return ret;
	327	}
	328
	329	/* Find the output route corresponding to the port number. */
	330	for (i = 0; i < RCAR_DU_OUTPUT_MAX; ++i) {
	331	if (rcdu->info->routes[i].possible_crtcs &&
	332	rcdu->info->routes[i].port == ep.port) {
	333	output = i;
	334	break;
	335	}
	336	}
	337
	338	if (i == RCAR_DU_OUTPUT_MAX) {
	339	dev_warn(rcdu->dev,
	340	"port %u references unexisting output, skipping\n",
	341	ep.port);
	342	continue;
	343	}
	344
	345	/* Process the output pipeline. */
2378ad12	346	ret = rcar_du_encoders_init_one(rcdu, output, &ep);
96c02691 LP	347	if (ret < 0) {
	348	of_node_put(ep_node);
	349	return ret;
	350	}
	351
	352	num_encoders += ret;
	353	}
	354
	355	return num_encoders;
	356	}
	357
4bf8e196 LP	358	int rcar_du_modeset_init(struct rcar_du_device *rcdu)
4bf8e196 LP	359	{
a5f0ef59 LP	360	static const unsigned int mmio_offsets[] = {
	361	DU0_REG_OFFSET, DU2_REG_OFFSET
	362	};
	363
4bf8e196 LP	364	struct drm_device *dev = rcdu->ddev;
4bf8e196 LP	365	struct drm_encoder *encoder;
3864c6f4	366	struct drm_fbdev_cma *fbdev;
96c02691	367	unsigned int num_encoders;
a5f0ef59	368	unsigned int num_groups;
4bf8e196 LP	369	unsigned int i;
	370	int ret;
	371
3864c6f4	372	drm_mode_config_init(dev);
4bf8e196	373
3864c6f4 LP	374	dev->mode_config.min_width = 0;
	375	dev->mode_config.min_height = 0;
	376	dev->mode_config.max_width = 4095;
	377	dev->mode_config.max_height = 2047;
	378	dev->mode_config.funcs = &rcar_du_mode_config_funcs;
4bf8e196	379
a5f0ef59 LP	380	rcdu->num_crtcs = rcdu->info->num_crtcs;
	381
	382	/* Initialize the groups. */
	383	num_groups = DIV_ROUND_UP(rcdu->num_crtcs, 2);
	384
	385	for (i = 0; i < num_groups; ++i) {
	386	struct rcar_du_group *rgrp = &rcdu->groups[i];
cb2025d2	387
a5f0ef59 LP	388	rgrp->dev = rcdu;
	389	rgrp->mmio_offset = mmio_offsets[i];
	390	rgrp->index = i;
4bf8e196	391
a5f0ef59	392	ret = rcar_du_planes_init(rgrp);
3463ff67 LP	393	if (ret < 0)
	394	return ret;
	395	}
4bf8e196	396
a5f0ef59 LP	397	/* Create the CRTCs. */
	398	for (i = 0; i < rcdu->num_crtcs; ++i) {
	399	struct rcar_du_group *rgrp = &rcdu->groups[i / 2];
	400
	401	ret = rcar_du_crtc_create(rgrp, i);
	402	if (ret < 0)
	403	return ret;
	404	}
4bf8e196	405
a5f0ef59	406	/* Initialize the encoders. */
90374b5c LP	407	ret = rcar_du_lvdsenc_init(rcdu);
	408	if (ret < 0)
	409	return ret;
	410
2378ad12	411	ret = rcar_du_encoders_init(rcdu);
96c02691 LP	412	if (ret < 0)
96c02691 LP	413	return ret;
4bf8e196	414
96c02691	415	num_encoders = ret;
4bf8e196	416
ef67a902 LP	417	/* Set the possible CRTCs and possible clones. There's always at least
	418	* one way for all encoders to clone each other, set all bits in the
	419	* possible clones field.
4bf8e196 LP	420	*/
	421	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
	422	struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
ef67a902 LP	423	const struct rcar_du_output_routing *route =
ef67a902 LP	424	&rcdu->info->routes[renc->output];
4bf8e196	425
ef67a902	426	encoder->possible_crtcs = route->possible_crtcs;
96c02691	427	encoder->possible_clones = (1 << num_encoders) - 1;
4bf8e196 LP	428	}
4bf8e196 LP	429
a5f0ef59 LP	430	/* Now that the CRTCs have been initialized register the planes. */
	431	for (i = 0; i < num_groups; ++i) {
	432	ret = rcar_du_planes_register(&rcdu->groups[i]);
	433	if (ret < 0)
	434	return ret;
	435	}
4bf8e196	436
3864c6f4 LP	437	drm_kms_helper_poll_init(dev);
	438
	439	drm_helper_disable_unused_functions(dev);
	440
	441	fbdev = drm_fbdev_cma_init(dev, 32, dev->mode_config.num_crtc,
	442	dev->mode_config.num_connector);
	443	if (IS_ERR(fbdev))
	444	return PTR_ERR(fbdev);
	445
	446	#ifndef CONFIG_FRAMEBUFFER_CONSOLE
	447	drm_fbdev_cma_restore_mode(fbdev);
	448	#endif
4bf8e196	449
3864c6f4	450	rcdu->fbdev = fbdev;
4bf8e196 LP	451
	452	return 0;
	453	}