[deliverable/linux.git] / drivers / gpu / drm / rcar-du / rcar_du_kms.c

/*
 * rcar_du_kms.c  --  R-Car Display Unit Mode Setting
 *
 * Copyright (C) 2013 Renesas Corporation
 *
 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <drm/drmP.h>
#include <drm/drm_crtc.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_fb_cma_helper.h>
#include <drm/drm_gem_cma_helper.h>

#include "rcar_du_crtc.h"
#include "rcar_du_drv.h"
#include "rcar_du_encoder.h"
#include "rcar_du_kms.h"
#include "rcar_du_lvdsenc.h"
#include "rcar_du_regs.h"

/* -----------------------------------------------------------------------------
 * Format helpers
 */

static const struct rcar_du_format_info rcar_du_format_infos[] = {
	{
		.fourcc = DRM_FORMAT_RGB565,
		.bpp = 16,
		.planes = 1,
		.pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
		.edf = PnDDCR4_EDF_NONE,
	}, {
		.fourcc = DRM_FORMAT_ARGB1555,
		.bpp = 16,
		.planes = 1,
		.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
		.edf = PnDDCR4_EDF_NONE,
	}, {
		.fourcc = DRM_FORMAT_XRGB1555,
		.bpp = 16,
		.planes = 1,
		.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
		.edf = PnDDCR4_EDF_NONE,
	}, {
		.fourcc = DRM_FORMAT_XRGB8888,
		.bpp = 32,
		.planes = 1,
		.pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
		.edf = PnDDCR4_EDF_RGB888,
	}, {
		.fourcc = DRM_FORMAT_ARGB8888,
		.bpp = 32,
		.planes = 1,
		.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
		.edf = PnDDCR4_EDF_ARGB8888,
	}, {
		.fourcc = DRM_FORMAT_UYVY,
		.bpp = 16,
		.planes = 1,
		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
		.edf = PnDDCR4_EDF_NONE,
	}, {
		.fourcc = DRM_FORMAT_YUYV,
		.bpp = 16,
		.planes = 1,
		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
		.edf = PnDDCR4_EDF_NONE,
	}, {
		.fourcc = DRM_FORMAT_NV12,
		.bpp = 12,
		.planes = 2,
		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
		.edf = PnDDCR4_EDF_NONE,
	}, {
		.fourcc = DRM_FORMAT_NV21,
		.bpp = 12,
		.planes = 2,
		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
		.edf = PnDDCR4_EDF_NONE,
	}, {
		/* In YUV 4:2:2, only NV16 is supported (NV61 isn't) */
		.fourcc = DRM_FORMAT_NV16,
		.bpp = 16,
		.planes = 2,
		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
		.edf = PnDDCR4_EDF_NONE,
	},
};

const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
{
	unsigned int i;

	for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) {
		if (rcar_du_format_infos[i].fourcc == fourcc)
			return &rcar_du_format_infos[i];
	}

	return NULL;
}

/* -----------------------------------------------------------------------------
 * Frame buffer
 */

int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
			struct drm_mode_create_dumb *args)
{
	struct rcar_du_device *rcdu = dev->dev_private;
	unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
	unsigned int align;

	/* The R8A7779 DU requires a 16 pixels pitch alignment as documented,
	 * but the R8A7790 DU seems to require a 128 bytes pitch alignment.
	 */
	if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
		align = 128;
	else
		align = 16 * args->bpp / 8;

	args->pitch = roundup(max(args->pitch, min_pitch), align);

	return drm_gem_cma_dumb_create(file, dev, args);
}

static struct drm_framebuffer *
rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
		  struct drm_mode_fb_cmd2 *mode_cmd)
{
	struct rcar_du_device *rcdu = dev->dev_private;
	const struct rcar_du_format_info *format;
	unsigned int align;

	format = rcar_du_format_info(mode_cmd->pixel_format);
	if (format == NULL) {
		dev_dbg(dev->dev, "unsupported pixel format %08x\n",
			mode_cmd->pixel_format);
		return ERR_PTR(-EINVAL);
	}

	if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
		align = 128;
	else
		align = 16 * format->bpp / 8;

	if (mode_cmd->pitches[0] & (align - 1) ||
	    mode_cmd->pitches[0] >= 8192) {
		dev_dbg(dev->dev, "invalid pitch value %u\n",
			mode_cmd->pitches[0]);
		return ERR_PTR(-EINVAL);
	}

	if (format->planes == 2) {
		if (mode_cmd->pitches[1] != mode_cmd->pitches[0]) {
			dev_dbg(dev->dev,
				"luma and chroma pitches do not match\n");
			return ERR_PTR(-EINVAL);
		}
	}

	return drm_fb_cma_create(dev, file_priv, mode_cmd);
}

static void rcar_du_output_poll_changed(struct drm_device *dev)
{
	struct rcar_du_device *rcdu = dev->dev_private;

	drm_fbdev_cma_hotplug_event(rcdu->fbdev);
}

static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
	.fb_create = rcar_du_fb_create,
	.output_poll_changed = rcar_du_output_poll_changed,
};

int rcar_du_modeset_init(struct rcar_du_device *rcdu)
{
	static const unsigned int mmio_offsets[] = {
		DU0_REG_OFFSET, DU2_REG_OFFSET
	};

	struct drm_device *dev = rcdu->ddev;
	struct drm_encoder *encoder;
	struct drm_fbdev_cma *fbdev;
	unsigned int num_groups;
	unsigned int i;
	int ret;

	drm_mode_config_init(dev);

	dev->mode_config.min_width = 0;
	dev->mode_config.min_height = 0;
	dev->mode_config.max_width = 4095;
	dev->mode_config.max_height = 2047;
	dev->mode_config.funcs = &rcar_du_mode_config_funcs;

	rcdu->num_crtcs = rcdu->info->num_crtcs;

	/* Initialize the groups. */
	num_groups = DIV_ROUND_UP(rcdu->num_crtcs, 2);

	for (i = 0; i < num_groups; ++i) {
		struct rcar_du_group *rgrp = &rcdu->groups[i];

		rgrp->dev = rcdu;
		rgrp->mmio_offset = mmio_offsets[i];
		rgrp->index = i;

		ret = rcar_du_planes_init(rgrp);
		if (ret < 0)
			return ret;
	}

	/* Create the CRTCs. */
	for (i = 0; i < rcdu->num_crtcs; ++i) {
		struct rcar_du_group *rgrp = &rcdu->groups[i / 2];

		ret = rcar_du_crtc_create(rgrp, i);
		if (ret < 0)
			return ret;
	}

	/* Initialize the encoders. */
	ret = rcar_du_lvdsenc_init(rcdu);
	if (ret < 0)
		return ret;

	for (i = 0; i < rcdu->pdata->num_encoders; ++i) {
		const struct rcar_du_encoder_data *pdata =
			&rcdu->pdata->encoders[i];
		const struct rcar_du_output_routing *route =
			&rcdu->info->routes[pdata->output];

		if (pdata->type == RCAR_DU_ENCODER_UNUSED)
			continue;

		if (pdata->output >= RCAR_DU_OUTPUT_MAX ||
		    route->possible_crtcs == 0) {
			dev_warn(rcdu->dev,
				 "encoder %u references unexisting output %u, skipping\n",
				 i, pdata->output);
			continue;
		}

		ret = rcar_du_encoder_init(rcdu, pdata->type, pdata->output,
					   pdata);
		if (ret < 0)
			return ret;
	}

	/* Set the possible CRTCs and possible clones. There's always at least
	 * one way for all encoders to clone each other, set all bits in the
	 * possible clones field.
	 */
	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
		struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
		const struct rcar_du_output_routing *route =
			&rcdu->info->routes[renc->output];

		encoder->possible_crtcs = route->possible_crtcs;
		encoder->possible_clones = (1 << rcdu->pdata->num_encoders) - 1;
	}

	/* Now that the CRTCs have been initialized register the planes. */
	for (i = 0; i < num_groups; ++i) {
		ret = rcar_du_planes_register(&rcdu->groups[i]);
		if (ret < 0)
			return ret;
	}

	drm_kms_helper_poll_init(dev);

	drm_helper_disable_unused_functions(dev);

	fbdev = drm_fbdev_cma_init(dev, 32, dev->mode_config.num_crtc,
				   dev->mode_config.num_connector);
	if (IS_ERR(fbdev))
		return PTR_ERR(fbdev);

#ifndef CONFIG_FRAMEBUFFER_CONSOLE
	drm_fbdev_cma_restore_mode(fbdev);
#endif

	rcdu->fbdev = fbdev;

	return 0;
}
Commit	Line	Data
4bf8e196 LP	1	/*
	2	* rcar_du_kms.c -- R-Car Display Unit Mode Setting
	3	*
	4	* Copyright (C) 2013 Renesas Corporation
	5	*
	6	* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*/
	13
	14	#include <drm/drmP.h>
	15	#include <drm/drm_crtc.h>
	16	#include <drm/drm_crtc_helper.h>
	17	#include <drm/drm_fb_cma_helper.h>
	18	#include <drm/drm_gem_cma_helper.h>
	19
	20	#include "rcar_du_crtc.h"
	21	#include "rcar_du_drv.h"
6978f123	22	#include "rcar_du_encoder.h"
4bf8e196	23	#include "rcar_du_kms.h"
90374b5c	24	#include "rcar_du_lvdsenc.h"
4bf8e196	25	#include "rcar_du_regs.h"
4bf8e196 LP	26
	27	/* -----------------------------------------------------------------------------
	28	* Format helpers
	29	*/
	30
	31	static const struct rcar_du_format_info rcar_du_format_infos[] = {
	32	{
	33	.fourcc = DRM_FORMAT_RGB565,
	34	.bpp = 16,
	35	.planes = 1,
	36	.pnmr = PnMR_SPIM_TP \| PnMR_DDDF_16BPP,
	37	.edf = PnDDCR4_EDF_NONE,
	38	}, {
	39	.fourcc = DRM_FORMAT_ARGB1555,
	40	.bpp = 16,
	41	.planes = 1,
	42	.pnmr = PnMR_SPIM_ALP \| PnMR_DDDF_ARGB,
	43	.edf = PnDDCR4_EDF_NONE,
	44	}, {
	45	.fourcc = DRM_FORMAT_XRGB1555,
	46	.bpp = 16,
	47	.planes = 1,
	48	.pnmr = PnMR_SPIM_ALP \| PnMR_DDDF_ARGB,
	49	.edf = PnDDCR4_EDF_NONE,
	50	}, {
	51	.fourcc = DRM_FORMAT_XRGB8888,
	52	.bpp = 32,
	53	.planes = 1,
	54	.pnmr = PnMR_SPIM_TP \| PnMR_DDDF_16BPP,
	55	.edf = PnDDCR4_EDF_RGB888,
	56	}, {
	57	.fourcc = DRM_FORMAT_ARGB8888,
	58	.bpp = 32,
	59	.planes = 1,
	60	.pnmr = PnMR_SPIM_ALP \| PnMR_DDDF_16BPP,
	61	.edf = PnDDCR4_EDF_ARGB8888,
	62	}, {
	63	.fourcc = DRM_FORMAT_UYVY,
	64	.bpp = 16,
	65	.planes = 1,
	66	.pnmr = PnMR_SPIM_TP_OFF \| PnMR_DDDF_YC,
	67	.edf = PnDDCR4_EDF_NONE,
	68	}, {
	69	.fourcc = DRM_FORMAT_YUYV,
	70	.bpp = 16,
	71	.planes = 1,
	72	.pnmr = PnMR_SPIM_TP_OFF \| PnMR_DDDF_YC,
	73	.edf = PnDDCR4_EDF_NONE,
	74	}, {
	75	.fourcc = DRM_FORMAT_NV12,
	76	.bpp = 12,
	77	.planes = 2,
	78	.pnmr = PnMR_SPIM_TP_OFF \| PnMR_DDDF_YC,
	79	.edf = PnDDCR4_EDF_NONE,
	80	}, {
	81	.fourcc = DRM_FORMAT_NV21,
	82	.bpp = 12,
	83	.planes = 2,
	84	.pnmr = PnMR_SPIM_TP_OFF \| PnMR_DDDF_YC,
	85	.edf = PnDDCR4_EDF_NONE,
	86	}, {
	87	/* In YUV 4:2:2, only NV16 is supported (NV61 isn't) */
	88	.fourcc = DRM_FORMAT_NV16,
	89	.bpp = 16,
90	.planes = 2,
91	.pnmr = PnMR_SPIM_TP_OFF \| PnMR_DDDF_YC,
92	.edf = PnDDCR4_EDF_NONE,
93	},
94	};
95
96	const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
97	{
98	unsigned int i;
99
100	for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) {
101	if (rcar_du_format_infos[i].fourcc == fourcc)
102	return &rcar_du_format_infos[i];
103	}
104
105	return NULL;
106	}
107
4bf8e196 LP	108	/* -----------------------------------------------------------------------------
	109	* Frame buffer
	110	*/
	111
59e32642 LP	112	int rcar_du_dumb_create(struct drm_file file, struct drm_device dev,
	113	struct drm_mode_create_dumb *args)
	114	{
9e2d2de9	115	struct rcar_du_device *rcdu = dev->dev_private;
59e32642 LP	116	unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
	117	unsigned int align;
	118
9e2d2de9 LP	119	/* The R8A7779 DU requires a 16 pixels pitch alignment as documented,
	120	* but the R8A7790 DU seems to require a 128 bytes pitch alignment.
	121	*/
e8355e0d	122	if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
9e2d2de9 LP	123	align = 128;
	124	else
	125	align = 16 * args->bpp / 8;
	126
59e32642 LP	127	args->pitch = roundup(max(args->pitch, min_pitch), align);
	128
	129	return drm_gem_cma_dumb_create(file, dev, args);
	130	}
	131
4bf8e196 LP	132	static struct drm_framebuffer *
	133	rcar_du_fb_create(struct drm_device dev, struct drm_file file_priv,
	134	struct drm_mode_fb_cmd2 *mode_cmd)
	135	{
9e2d2de9	136	struct rcar_du_device *rcdu = dev->dev_private;
4bf8e196	137	const struct rcar_du_format_info *format;
59e32642	138	unsigned int align;
4bf8e196 LP	139
	140	format = rcar_du_format_info(mode_cmd->pixel_format);
	141	if (format == NULL) {
	142	dev_dbg(dev->dev, "unsupported pixel format %08x\n",
	143	mode_cmd->pixel_format);
	144	return ERR_PTR(-EINVAL);
	145	}
	146
e8355e0d	147	if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
9e2d2de9 LP	148	align = 128;
	149	else
	150	align = 16 * format->bpp / 8;
59e32642 LP	151
	152	if (mode_cmd->pitches[0] & (align - 1) \|\|
	153	mode_cmd->pitches[0] >= 8192) {
4bf8e196 LP	154	dev_dbg(dev->dev, "invalid pitch value %u\n",
	155	mode_cmd->pitches[0]);
	156	return ERR_PTR(-EINVAL);
	157	}
	158
	159	if (format->planes == 2) {
	160	if (mode_cmd->pitches[1] != mode_cmd->pitches[0]) {
	161	dev_dbg(dev->dev,
	162	"luma and chroma pitches do not match\n");
	163	return ERR_PTR(-EINVAL);
	164	}
	165	}
	166
	167	return drm_fb_cma_create(dev, file_priv, mode_cmd);
	168	}
	169
3864c6f4 LP	170	static void rcar_du_output_poll_changed(struct drm_device *dev)
	171	{
	172	struct rcar_du_device *rcdu = dev->dev_private;
	173
	174	drm_fbdev_cma_hotplug_event(rcdu->fbdev);
	175	}
	176
4bf8e196 LP	177	static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
4bf8e196 LP	178	.fb_create = rcar_du_fb_create,
3864c6f4	179	.output_poll_changed = rcar_du_output_poll_changed,
4bf8e196 LP	180	};
	181
	182	int rcar_du_modeset_init(struct rcar_du_device *rcdu)
	183	{
a5f0ef59 LP	184	static const unsigned int mmio_offsets[] = {
	185	DU0_REG_OFFSET, DU2_REG_OFFSET
	186	};
	187
4bf8e196 LP	188	struct drm_device *dev = rcdu->ddev;
4bf8e196 LP	189	struct drm_encoder *encoder;
3864c6f4	190	struct drm_fbdev_cma *fbdev;
a5f0ef59	191	unsigned int num_groups;
4bf8e196 LP	192	unsigned int i;
	193	int ret;
	194
3864c6f4	195	drm_mode_config_init(dev);
4bf8e196	196
3864c6f4 LP	197	dev->mode_config.min_width = 0;
	198	dev->mode_config.min_height = 0;
	199	dev->mode_config.max_width = 4095;
	200	dev->mode_config.max_height = 2047;
	201	dev->mode_config.funcs = &rcar_du_mode_config_funcs;
4bf8e196	202
a5f0ef59 LP	203	rcdu->num_crtcs = rcdu->info->num_crtcs;
	204
	205	/* Initialize the groups. */
	206	num_groups = DIV_ROUND_UP(rcdu->num_crtcs, 2);
	207
	208	for (i = 0; i < num_groups; ++i) {
	209	struct rcar_du_group *rgrp = &rcdu->groups[i];
cb2025d2	210
a5f0ef59 LP	211	rgrp->dev = rcdu;
	212	rgrp->mmio_offset = mmio_offsets[i];
	213	rgrp->index = i;
4bf8e196	214
a5f0ef59	215	ret = rcar_du_planes_init(rgrp);
3463ff67 LP	216	if (ret < 0)
	217	return ret;
	218	}
4bf8e196	219
a5f0ef59 LP	220	/* Create the CRTCs. */
	221	for (i = 0; i < rcdu->num_crtcs; ++i) {
	222	struct rcar_du_group *rgrp = &rcdu->groups[i / 2];
	223
	224	ret = rcar_du_crtc_create(rgrp, i);
	225	if (ret < 0)
	226	return ret;
	227	}
4bf8e196	228
a5f0ef59	229	/* Initialize the encoders. */
90374b5c LP	230	ret = rcar_du_lvdsenc_init(rcdu);
	231	if (ret < 0)
	232	return ret;
	233
4bf8e196 LP	234	for (i = 0; i < rcdu->pdata->num_encoders; ++i) {
	235	const struct rcar_du_encoder_data *pdata =
	236	&rcdu->pdata->encoders[i];
ef67a902 LP	237	const struct rcar_du_output_routing *route =
ef67a902 LP	238	&rcdu->info->routes[pdata->output];
4bf8e196	239
9194731c	240	if (pdata->type == RCAR_DU_ENCODER_UNUSED)
6978f123 LP	241	continue;
6978f123 LP	242
ef67a902 LP	243	if (pdata->output >= RCAR_DU_OUTPUT_MAX \|\|
ef67a902 LP	244	route->possible_crtcs == 0) {
4bf8e196 LP	245	dev_warn(rcdu->dev,
	246	"encoder %u references unexisting output %u, skipping\n",
	247	i, pdata->output);
	248	continue;
	249	}
	250
d9961b22 LP	251	ret = rcar_du_encoder_init(rcdu, pdata->type, pdata->output,
	252	pdata);
	253	if (ret < 0)
	254	return ret;
4bf8e196 LP	255	}
4bf8e196 LP	256
ef67a902 LP	257	/* Set the possible CRTCs and possible clones. There's always at least
	258	* one way for all encoders to clone each other, set all bits in the
	259	* possible clones field.
4bf8e196 LP	260	*/
	261	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
	262	struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
ef67a902 LP	263	const struct rcar_du_output_routing *route =
ef67a902 LP	264	&rcdu->info->routes[renc->output];
4bf8e196	265
ef67a902 LP	266	encoder->possible_crtcs = route->possible_crtcs;
ef67a902 LP	267	encoder->possible_clones = (1 << rcdu->pdata->num_encoders) - 1;
4bf8e196 LP	268	}
4bf8e196 LP	269
a5f0ef59 LP	270	/* Now that the CRTCs have been initialized register the planes. */
	271	for (i = 0; i < num_groups; ++i) {
	272	ret = rcar_du_planes_register(&rcdu->groups[i]);
	273	if (ret < 0)
	274	return ret;
	275	}
4bf8e196	276
3864c6f4 LP	277	drm_kms_helper_poll_init(dev);
	278
	279	drm_helper_disable_unused_functions(dev);
	280
	281	fbdev = drm_fbdev_cma_init(dev, 32, dev->mode_config.num_crtc,
	282	dev->mode_config.num_connector);
	283	if (IS_ERR(fbdev))
	284	return PTR_ERR(fbdev);
	285
	286	#ifndef CONFIG_FRAMEBUFFER_CONSOLE
	287	drm_fbdev_cma_restore_mode(fbdev);
	288	#endif
4bf8e196	289
3864c6f4	290	rcdu->fbdev = fbdev;
4bf8e196 LP	291
	292	return 0;
	293	}