[deliverable/linux.git] / drivers / gpu / drm / rcar-du / rcar_du_plane.c

/*
 * rcar_du_plane.c  --  R-Car Display Unit Planes
 *
 * Copyright (C) 2013-2014 Renesas Electronics Corporation
 *
 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <drm/drmP.h>
#include <drm/drm_crtc.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_fb_cma_helper.h>
#include <drm/drm_gem_cma_helper.h>

#include "rcar_du_drv.h"
#include "rcar_du_kms.h"
#include "rcar_du_plane.h"
#include "rcar_du_regs.h"

#define RCAR_DU_COLORKEY_NONE		(0 << 24)
#define RCAR_DU_COLORKEY_SOURCE		(1 << 24)
#define RCAR_DU_COLORKEY_MASK		(1 << 24)

static inline struct rcar_du_plane *to_rcar_plane(struct drm_plane *plane)
{
	return container_of(plane, struct rcar_du_plane, plane);
}

static u32 rcar_du_plane_read(struct rcar_du_group *rgrp,
			      unsigned int index, u32 reg)
{
	return rcar_du_read(rgrp->dev,
			    rgrp->mmio_offset + index * PLANE_OFF + reg);
}

static void rcar_du_plane_write(struct rcar_du_group *rgrp,
				unsigned int index, u32 reg, u32 data)
{
	rcar_du_write(rgrp->dev, rgrp->mmio_offset + index * PLANE_OFF + reg,
		      data);
}

int rcar_du_plane_reserve(struct rcar_du_plane *plane,
			  const struct rcar_du_format_info *format)
{
	struct rcar_du_group *rgrp = plane->group;
	unsigned int i;
	int ret = -EBUSY;

	mutex_lock(&rgrp->planes.lock);

	for (i = 0; i < ARRAY_SIZE(rgrp->planes.planes); ++i) {
		if (!(rgrp->planes.free & (1 << i)))
			continue;

		if (format->planes == 1 ||
		    rgrp->planes.free & (1 << ((i + 1) % 8)))
			break;
	}

	if (i == ARRAY_SIZE(rgrp->planes.planes))
		goto done;

	rgrp->planes.free &= ~(1 << i);
	if (format->planes == 2)
		rgrp->planes.free &= ~(1 << ((i + 1) % 8));

	plane->hwindex = i;

	ret = 0;

done:
	mutex_unlock(&rgrp->planes.lock);
	return ret;
}

void rcar_du_plane_release(struct rcar_du_plane *plane)
{
	struct rcar_du_group *rgrp = plane->group;

	if (plane->hwindex == -1)
		return;

	mutex_lock(&rgrp->planes.lock);
	rgrp->planes.free |= 1 << plane->hwindex;
	if (plane->format->planes == 2)
		rgrp->planes.free |= 1 << ((plane->hwindex + 1) % 8);
	mutex_unlock(&rgrp->planes.lock);

	plane->hwindex = -1;
}

void rcar_du_plane_update_base(struct rcar_du_plane *plane)
{
	struct rcar_du_group *rgrp = plane->group;
	unsigned int index = plane->hwindex;
	bool interlaced;
	u32 mwr;

	interlaced = plane->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE;

	/* Memory pitch (expressed in pixels). Must be doubled for interlaced
	 * operation with 32bpp formats.
	 */
	if (plane->format->planes == 2)
		mwr = plane->pitch;
	else
		mwr = plane->pitch * 8 / plane->format->bpp;

	if (interlaced && plane->format->bpp == 32)
		mwr *= 2;

	rcar_du_plane_write(rgrp, index, PnMWR, mwr);

	/* The Y position is expressed in raster line units and must be doubled
	 * for 32bpp formats, according to the R8A7790 datasheet. No mention of
	 * doubling the Y position is found in the R8A7779 datasheet, but the
	 * rule seems to apply there as well.
	 *
	 * Despite not being documented, doubling seem not to be needed when
	 * operating in interlaced mode.
	 *
	 * Similarly, for the second plane, NV12 and NV21 formats seem to
	 * require a halved Y position value, in both progressive and interlaced
	 * modes.
	 */
	rcar_du_plane_write(rgrp, index, PnSPXR, plane->src_x);
	rcar_du_plane_write(rgrp, index, PnSPYR, plane->src_y *
			    (!interlaced && plane->format->bpp == 32 ? 2 : 1));
	rcar_du_plane_write(rgrp, index, PnDSA0R, plane->dma[0]);

	if (plane->format->planes == 2) {
		index = (index + 1) % 8;

		rcar_du_plane_write(rgrp, index, PnMWR, plane->pitch);

		rcar_du_plane_write(rgrp, index, PnSPXR, plane->src_x);
		rcar_du_plane_write(rgrp, index, PnSPYR, plane->src_y *
				    (plane->format->bpp == 16 ? 2 : 1) / 2);
		rcar_du_plane_write(rgrp, index, PnDSA0R, plane->dma[1]);
	}
}

void rcar_du_plane_compute_base(struct rcar_du_plane *plane,
				struct drm_framebuffer *fb)
{
	struct drm_gem_cma_object *gem;

	plane->pitch = fb->pitches[0];

	gem = drm_fb_cma_get_gem_obj(fb, 0);
	plane->dma[0] = gem->paddr + fb->offsets[0];

	if (plane->format->planes == 2) {
		gem = drm_fb_cma_get_gem_obj(fb, 1);
		plane->dma[1] = gem->paddr + fb->offsets[1];
	}
}

static void rcar_du_plane_setup_mode(struct rcar_du_plane *plane,
				     unsigned int index)
{
	struct rcar_du_group *rgrp = plane->group;
	u32 colorkey;
	u32 pnmr;

	/* The PnALPHAR register controls alpha-blending in 16bpp formats
	 * (ARGB1555 and XRGB1555).
	 *
	 * For ARGB, set the alpha value to 0, and enable alpha-blending when
	 * the A bit is 0. This maps A=0 to alpha=0 and A=1 to alpha=255.
	 *
	 * For XRGB, set the alpha value to the plane-wide alpha value and
	 * enable alpha-blending regardless of the X bit value.
	 */
	if (plane->format->fourcc != DRM_FORMAT_XRGB1555)
		rcar_du_plane_write(rgrp, index, PnALPHAR, PnALPHAR_ABIT_0);
	else
		rcar_du_plane_write(rgrp, index, PnALPHAR,
				    PnALPHAR_ABIT_X | plane->alpha);

	pnmr = PnMR_BM_MD | plane->format->pnmr;

	/* Disable color keying when requested. YUV formats have the
	 * PnMR_SPIM_TP_OFF bit set in their pnmr field, disabling color keying
	 * automatically.
	 */
	if ((plane->colorkey & RCAR_DU_COLORKEY_MASK) == RCAR_DU_COLORKEY_NONE)
		pnmr |= PnMR_SPIM_TP_OFF;

	/* For packed YUV formats we need to select the U/V order. */
	if (plane->format->fourcc == DRM_FORMAT_YUYV)
		pnmr |= PnMR_YCDF_YUYV;

	rcar_du_plane_write(rgrp, index, PnMR, pnmr);

	switch (plane->format->fourcc) {
	case DRM_FORMAT_RGB565:
		colorkey = ((plane->colorkey & 0xf80000) >> 8)
			 | ((plane->colorkey & 0x00fc00) >> 5)
			 | ((plane->colorkey & 0x0000f8) >> 3);
		rcar_du_plane_write(rgrp, index, PnTC2R, colorkey);
		break;

	case DRM_FORMAT_ARGB1555:
	case DRM_FORMAT_XRGB1555:
		colorkey = ((plane->colorkey & 0xf80000) >> 9)
			 | ((plane->colorkey & 0x00f800) >> 6)
			 | ((plane->colorkey & 0x0000f8) >> 3);
		rcar_du_plane_write(rgrp, index, PnTC2R, colorkey);
		break;

	case DRM_FORMAT_XRGB8888:
	case DRM_FORMAT_ARGB8888:
		rcar_du_plane_write(rgrp, index, PnTC3R,
				    PnTC3R_CODE | (plane->colorkey & 0xffffff));
		break;
	}
}

static void __rcar_du_plane_setup(struct rcar_du_plane *plane,
				  unsigned int index)
{
	struct rcar_du_group *rgrp = plane->group;
	u32 ddcr2 = PnDDCR2_CODE;
	u32 ddcr4;

	/* Data format
	 *
	 * The data format is selected by the DDDF field in PnMR and the EDF
	 * field in DDCR4.
	 */
	ddcr4 = rcar_du_plane_read(rgrp, index, PnDDCR4);
	ddcr4 &= ~PnDDCR4_EDF_MASK;
	ddcr4 |= plane->format->edf | PnDDCR4_CODE;

	rcar_du_plane_setup_mode(plane, index);

	if (plane->format->planes == 2) {
		if (plane->hwindex != index) {
			if (plane->format->fourcc == DRM_FORMAT_NV12 ||
			    plane->format->fourcc == DRM_FORMAT_NV21)
				ddcr2 |= PnDDCR2_Y420;

			if (plane->format->fourcc == DRM_FORMAT_NV21)
				ddcr2 |= PnDDCR2_NV21;

			ddcr2 |= PnDDCR2_DIVU;
		} else {
			ddcr2 |= PnDDCR2_DIVY;
		}
	}

	rcar_du_plane_write(rgrp, index, PnDDCR2, ddcr2);
	rcar_du_plane_write(rgrp, index, PnDDCR4, ddcr4);

	/* Destination position and size */
	rcar_du_plane_write(rgrp, index, PnDSXR, plane->width);
	rcar_du_plane_write(rgrp, index, PnDSYR, plane->height);
	rcar_du_plane_write(rgrp, index, PnDPXR, plane->dst_x);
	rcar_du_plane_write(rgrp, index, PnDPYR, plane->dst_y);

	/* Wrap-around and blinking, disabled */
	rcar_du_plane_write(rgrp, index, PnWASPR, 0);
	rcar_du_plane_write(rgrp, index, PnWAMWR, 4095);
	rcar_du_plane_write(rgrp, index, PnBTR, 0);
	rcar_du_plane_write(rgrp, index, PnMLR, 0);
}

void rcar_du_plane_setup(struct rcar_du_plane *plane)
{
	__rcar_du_plane_setup(plane, plane->hwindex);
	if (plane->format->planes == 2)
		__rcar_du_plane_setup(plane, (plane->hwindex + 1) % 8);

	rcar_du_plane_update_base(plane);
}

static int
rcar_du_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
		       struct drm_framebuffer *fb, int crtc_x, int crtc_y,
		       unsigned int crtc_w, unsigned int crtc_h,
		       uint32_t src_x, uint32_t src_y,
		       uint32_t src_w, uint32_t src_h)
{
	struct rcar_du_plane *rplane = to_rcar_plane(plane);
	struct rcar_du_device *rcdu = rplane->group->dev;
	const struct rcar_du_format_info *format;
	unsigned int nplanes;
	int ret;

	if (plane->type != DRM_PLANE_TYPE_OVERLAY)
		return -EINVAL;

	format = rcar_du_format_info(fb->pixel_format);
	if (format == NULL) {
		dev_dbg(rcdu->dev, "%s: unsupported format %08x\n", __func__,
			fb->pixel_format);
		return -EINVAL;
	}

	if (src_w >> 16 != crtc_w || src_h >> 16 != crtc_h) {
		dev_dbg(rcdu->dev, "%s: scaling not supported\n", __func__);
		return -EINVAL;
	}

	nplanes = rplane->format ? rplane->format->planes : 0;

	/* Reallocate hardware planes if the number of required planes has
	 * changed.
	 */
	if (format->planes != nplanes) {
		rcar_du_plane_release(rplane);
		ret = rcar_du_plane_reserve(rplane, format);
		if (ret < 0)
			return ret;
	}

	rplane->crtc = crtc;
	rplane->format = format;

	rplane->src_x = src_x >> 16;
	rplane->src_y = src_y >> 16;
	rplane->dst_x = crtc_x;
	rplane->dst_y = crtc_y;
	rplane->width = crtc_w;
	rplane->height = crtc_h;

	rcar_du_plane_compute_base(rplane, fb);
	rcar_du_plane_setup(rplane);

	mutex_lock(&rplane->group->planes.lock);
	rplane->enabled = true;
	rcar_du_crtc_update_planes(rplane->crtc);
	mutex_unlock(&rplane->group->planes.lock);

	return 0;
}

static int rcar_du_plane_disable(struct drm_plane *plane)
{
	struct rcar_du_plane *rplane = to_rcar_plane(plane);

	if (plane->type != DRM_PLANE_TYPE_OVERLAY)
		return -EINVAL;

	if (!rplane->enabled)
		return 0;

	mutex_lock(&rplane->group->planes.lock);
	rplane->enabled = false;
	rcar_du_crtc_update_planes(rplane->crtc);
	mutex_unlock(&rplane->group->planes.lock);

	rcar_du_plane_release(rplane);

	rplane->crtc = NULL;
	rplane->format = NULL;

	return 0;
}

/* Both the .set_property and the .update_plane operations are called with the
 * mode_config lock held. There is this no need to explicitly protect access to
 * the alpha and colorkey fields and the mode register.
 */
static void rcar_du_plane_set_alpha(struct rcar_du_plane *plane, u32 alpha)
{
	if (plane->alpha == alpha)
		return;

	plane->alpha = alpha;
	if (!plane->enabled || plane->format->fourcc != DRM_FORMAT_XRGB1555)
		return;

	rcar_du_plane_setup_mode(plane, plane->hwindex);
}

static void rcar_du_plane_set_colorkey(struct rcar_du_plane *plane,
				       u32 colorkey)
{
	if (plane->colorkey == colorkey)
		return;

	plane->colorkey = colorkey;
	if (!plane->enabled)
		return;

	rcar_du_plane_setup_mode(plane, plane->hwindex);
}

static void rcar_du_plane_set_zpos(struct rcar_du_plane *plane,
				   unsigned int zpos)
{
	mutex_lock(&plane->group->planes.lock);
	if (plane->zpos == zpos)
		goto done;

	plane->zpos = zpos;
	if (!plane->enabled)
		goto done;

	rcar_du_crtc_update_planes(plane->crtc);

done:
	mutex_unlock(&plane->group->planes.lock);
}

static int rcar_du_plane_set_property(struct drm_plane *plane,
				      struct drm_property *property,
				      uint64_t value)
{
	struct rcar_du_plane *rplane = to_rcar_plane(plane);
	struct rcar_du_group *rgrp = rplane->group;

	if (property == rgrp->planes.alpha)
		rcar_du_plane_set_alpha(rplane, value);
	else if (property == rgrp->planes.colorkey)
		rcar_du_plane_set_colorkey(rplane, value);
	else if (property == rgrp->planes.zpos)
		rcar_du_plane_set_zpos(rplane, value);
	else
		return -EINVAL;

	return 0;
}

static const struct drm_plane_funcs rcar_du_plane_funcs = {
	.update_plane = rcar_du_plane_update,
	.disable_plane = rcar_du_plane_disable,
	.set_property = rcar_du_plane_set_property,
	.destroy = drm_plane_cleanup,
};

static const uint32_t formats[] = {
	DRM_FORMAT_RGB565,
	DRM_FORMAT_ARGB1555,
	DRM_FORMAT_XRGB1555,
	DRM_FORMAT_XRGB8888,
	DRM_FORMAT_ARGB8888,
	DRM_FORMAT_UYVY,
	DRM_FORMAT_YUYV,
	DRM_FORMAT_NV12,
	DRM_FORMAT_NV21,
	DRM_FORMAT_NV16,
};

int rcar_du_planes_init(struct rcar_du_group *rgrp)
{
	struct rcar_du_planes *planes = &rgrp->planes;
	struct rcar_du_device *rcdu = rgrp->dev;
	unsigned int num_planes;
	unsigned int num_crtcs;
	unsigned int crtcs;
	unsigned int i;
	int ret;

	mutex_init(&planes->lock);
	planes->free = 0xff;

	planes->alpha =
		drm_property_create_range(rcdu->ddev, 0, "alpha", 0, 255);
	if (planes->alpha == NULL)
		return -ENOMEM;

	/* The color key is expressed as an RGB888 triplet stored in a 32-bit
	 * integer in XRGB8888 format. Bit 24 is used as a flag to disable (0)
	 * or enable source color keying (1).
	 */
	planes->colorkey =
		drm_property_create_range(rcdu->ddev, 0, "colorkey",
					  0, 0x01ffffff);
	if (planes->colorkey == NULL)
		return -ENOMEM;

	planes->zpos =
		drm_property_create_range(rcdu->ddev, 0, "zpos", 1, 7);
	if (planes->zpos == NULL)
		return -ENOMEM;

	 /* Create one primary plane per in this group CRTC and seven overlay
	  * planes.
	  */
	num_crtcs = min(rcdu->num_crtcs - 2 * rgrp->index, 2U);
	num_planes = num_crtcs + 7;

	crtcs = ((1 << rcdu->num_crtcs) - 1) & (3 << (2 * rgrp->index));

	for (i = 0; i < num_planes; ++i) {
		enum drm_plane_type type = i < num_crtcs
					 ? DRM_PLANE_TYPE_PRIMARY
					 : DRM_PLANE_TYPE_OVERLAY;
		struct rcar_du_plane *plane = &planes->planes[i];

		plane->group = rgrp;
		plane->hwindex = -1;
		plane->alpha = 255;
		plane->colorkey = RCAR_DU_COLORKEY_NONE;
		plane->zpos = type == DRM_PLANE_TYPE_PRIMARY ? 0 : 1;

		ret = drm_universal_plane_init(rcdu->ddev, &plane->plane, crtcs,
					       &rcar_du_plane_funcs, formats,
					       ARRAY_SIZE(formats), type);
		if (ret < 0)
			return ret;

		if (type == DRM_PLANE_TYPE_PRIMARY)
			continue;

		drm_object_attach_property(&plane->plane.base,
					   planes->alpha, 255);
		drm_object_attach_property(&plane->plane.base,
					   planes->colorkey,
					   RCAR_DU_COLORKEY_NONE);
		drm_object_attach_property(&plane->plane.base,
					   planes->zpos, 1);
	}

	return 0;
}
Commit	Line	Data
4bf8e196 LP	1	/*
	2	* rcar_du_plane.c -- R-Car Display Unit Planes
	3	*
36d50464	4	* Copyright (C) 2013-2014 Renesas Electronics Corporation
4bf8e196 LP	5	*
	6	* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*/
	13
	14	#include <drm/drmP.h>
	15	#include <drm/drm_crtc.h>
	16	#include <drm/drm_crtc_helper.h>
	17	#include <drm/drm_fb_cma_helper.h>
	18	#include <drm/drm_gem_cma_helper.h>
	19
	20	#include "rcar_du_drv.h"
	21	#include "rcar_du_kms.h"
	22	#include "rcar_du_plane.h"
	23	#include "rcar_du_regs.h"
	24
	25	#define RCAR_DU_COLORKEY_NONE (0 << 24)
	26	#define RCAR_DU_COLORKEY_SOURCE (1 << 24)
	27	#define RCAR_DU_COLORKEY_MASK (1 << 24)
	28
4bf8e196 LP	29	static inline struct rcar_du_plane to_rcar_plane(struct drm_plane plane)
4bf8e196 LP	30	{
917de180	31	return container_of(plane, struct rcar_du_plane, plane);
4bf8e196 LP	32	}
4bf8e196 LP	33
cb2025d2	34	static u32 rcar_du_plane_read(struct rcar_du_group *rgrp,
4bf8e196 LP	35	unsigned int index, u32 reg)
4bf8e196 LP	36	{
cb2025d2 LP	37	return rcar_du_read(rgrp->dev,
cb2025d2 LP	38	rgrp->mmio_offset + index * PLANE_OFF + reg);
4bf8e196 LP	39	}
4bf8e196 LP	40
cb2025d2	41	static void rcar_du_plane_write(struct rcar_du_group *rgrp,
4bf8e196 LP	42	unsigned int index, u32 reg, u32 data)
4bf8e196 LP	43	{
cb2025d2 LP	44	rcar_du_write(rgrp->dev, rgrp->mmio_offset + index * PLANE_OFF + reg,
cb2025d2 LP	45	data);
4bf8e196 LP	46	}
	47
	48	int rcar_du_plane_reserve(struct rcar_du_plane *plane,
	49	const struct rcar_du_format_info *format)
	50	{
cb2025d2	51	struct rcar_du_group *rgrp = plane->group;
4bf8e196 LP	52	unsigned int i;
	53	int ret = -EBUSY;
	54
cb2025d2	55	mutex_lock(&rgrp->planes.lock);
4bf8e196	56
cb2025d2 LP	57	for (i = 0; i < ARRAY_SIZE(rgrp->planes.planes); ++i) {
cb2025d2 LP	58	if (!(rgrp->planes.free & (1 << i)))
4bf8e196 LP	59	continue;
	60
	61	if (format->planes == 1 \|\|
cb2025d2	62	rgrp->planes.free & (1 << ((i + 1) % 8)))
4bf8e196 LP	63	break;
	64	}
	65
cb2025d2	66	if (i == ARRAY_SIZE(rgrp->planes.planes))
4bf8e196 LP	67	goto done;
4bf8e196 LP	68
cb2025d2	69	rgrp->planes.free &= ~(1 << i);
4bf8e196	70	if (format->planes == 2)
cb2025d2	71	rgrp->planes.free &= ~(1 << ((i + 1) % 8));
4bf8e196 LP	72
	73	plane->hwindex = i;
	74
	75	ret = 0;
	76
	77	done:
cb2025d2	78	mutex_unlock(&rgrp->planes.lock);
4bf8e196 LP	79	return ret;
	80	}
	81
	82	void rcar_du_plane_release(struct rcar_du_plane *plane)
	83	{
cb2025d2	84	struct rcar_du_group *rgrp = plane->group;
4bf8e196 LP	85
	86	if (plane->hwindex == -1)
	87	return;
	88
cb2025d2 LP	89	mutex_lock(&rgrp->planes.lock);
cb2025d2 LP	90	rgrp->planes.free \|= 1 << plane->hwindex;
4bf8e196	91	if (plane->format->planes == 2)
cb2025d2 LP	92	rgrp->planes.free \|= 1 << ((plane->hwindex + 1) % 8);
cb2025d2 LP	93	mutex_unlock(&rgrp->planes.lock);
4bf8e196 LP	94
	95	plane->hwindex = -1;
	96	}
	97
	98	void rcar_du_plane_update_base(struct rcar_du_plane *plane)
	99	{
cb2025d2	100	struct rcar_du_group *rgrp = plane->group;
4bf8e196	101	unsigned int index = plane->hwindex;
906eff7f	102	bool interlaced;
eb86301f LP	103	u32 mwr;
eb86301f LP	104
906eff7f LP	105	interlaced = plane->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE;
	106
	107	/* Memory pitch (expressed in pixels). Must be doubled for interlaced
	108	* operation with 32bpp formats.
	109	*/
eb86301f LP	110	if (plane->format->planes == 2)
	111	mwr = plane->pitch;
	112	else
	113	mwr = plane->pitch * 8 / plane->format->bpp;
	114
906eff7f LP	115	if (interlaced && plane->format->bpp == 32)
	116	mwr *= 2;
	117
eb86301f	118	rcar_du_plane_write(rgrp, index, PnMWR, mwr);
4bf8e196	119
9e7db06d LP	120	/* The Y position is expressed in raster line units and must be doubled
	121	* for 32bpp formats, according to the R8A7790 datasheet. No mention of
	122	* doubling the Y position is found in the R8A7779 datasheet, but the
	123	* rule seems to apply there as well.
	124	*
906eff7f LP	125	* Despite not being documented, doubling seem not to be needed when
	126	* operating in interlaced mode.
	127	*
9e7db06d	128	* Similarly, for the second plane, NV12 and NV21 formats seem to
906eff7f LP	129	* require a halved Y position value, in both progressive and interlaced
906eff7f LP	130	* modes.
4bf8e196	131	*/
cb2025d2 LP	132	rcar_du_plane_write(rgrp, index, PnSPXR, plane->src_x);
cb2025d2 LP	133	rcar_du_plane_write(rgrp, index, PnSPYR, plane->src_y *
906eff7f	134	(!interlaced && plane->format->bpp == 32 ? 2 : 1));
cb2025d2	135	rcar_du_plane_write(rgrp, index, PnDSA0R, plane->dma[0]);
4bf8e196 LP	136
	137	if (plane->format->planes == 2) {
	138	index = (index + 1) % 8;
	139
49785e25 LP	140	rcar_du_plane_write(rgrp, index, PnMWR, plane->pitch);
49785e25 LP	141
cb2025d2 LP	142	rcar_du_plane_write(rgrp, index, PnSPXR, plane->src_x);
cb2025d2 LP	143	rcar_du_plane_write(rgrp, index, PnSPYR, plane->src_y *
4bf8e196	144	(plane->format->bpp == 16 ? 2 : 1) / 2);
cb2025d2	145	rcar_du_plane_write(rgrp, index, PnDSA0R, plane->dma[1]);
4bf8e196 LP	146	}
	147	}
	148
	149	void rcar_du_plane_compute_base(struct rcar_du_plane *plane,
	150	struct drm_framebuffer *fb)
	151	{
	152	struct drm_gem_cma_object *gem;
	153
eb86301f LP	154	plane->pitch = fb->pitches[0];
eb86301f LP	155
4bf8e196 LP	156	gem = drm_fb_cma_get_gem_obj(fb, 0);
	157	plane->dma[0] = gem->paddr + fb->offsets[0];
	158
	159	if (plane->format->planes == 2) {
	160	gem = drm_fb_cma_get_gem_obj(fb, 1);
	161	plane->dma[1] = gem->paddr + fb->offsets[1];
	162	}
	163	}
	164
	165	static void rcar_du_plane_setup_mode(struct rcar_du_plane *plane,
	166	unsigned int index)
	167	{
cb2025d2	168	struct rcar_du_group *rgrp = plane->group;
4bf8e196 LP	169	u32 colorkey;
	170	u32 pnmr;
	171
	172	/* The PnALPHAR register controls alpha-blending in 16bpp formats
	173	* (ARGB1555 and XRGB1555).
	174	*
	175	* For ARGB, set the alpha value to 0, and enable alpha-blending when
	176	* the A bit is 0. This maps A=0 to alpha=0 and A=1 to alpha=255.
	177	*
	178	* For XRGB, set the alpha value to the plane-wide alpha value and
	179	* enable alpha-blending regardless of the X bit value.
	180	*/
	181	if (plane->format->fourcc != DRM_FORMAT_XRGB1555)
cb2025d2	182	rcar_du_plane_write(rgrp, index, PnALPHAR, PnALPHAR_ABIT_0);
4bf8e196	183	else
cb2025d2	184	rcar_du_plane_write(rgrp, index, PnALPHAR,
4bf8e196 LP	185	PnALPHAR_ABIT_X \| plane->alpha);
	186
	187	pnmr = PnMR_BM_MD \| plane->format->pnmr;
	188
	189	/* Disable color keying when requested. YUV formats have the
	190	* PnMR_SPIM_TP_OFF bit set in their pnmr field, disabling color keying
	191	* automatically.
	192	*/
	193	if ((plane->colorkey & RCAR_DU_COLORKEY_MASK) == RCAR_DU_COLORKEY_NONE)
	194	pnmr \|= PnMR_SPIM_TP_OFF;
	195
	196	/* For packed YUV formats we need to select the U/V order. */
	197	if (plane->format->fourcc == DRM_FORMAT_YUYV)
	198	pnmr \|= PnMR_YCDF_YUYV;
	199
cb2025d2	200	rcar_du_plane_write(rgrp, index, PnMR, pnmr);
4bf8e196 LP	201
	202	switch (plane->format->fourcc) {
	203	case DRM_FORMAT_RGB565:
	204	colorkey = ((plane->colorkey & 0xf80000) >> 8)
	205	\| ((plane->colorkey & 0x00fc00) >> 5)
	206	\| ((plane->colorkey & 0x0000f8) >> 3);
cb2025d2	207	rcar_du_plane_write(rgrp, index, PnTC2R, colorkey);
4bf8e196 LP	208	break;
	209
	210	case DRM_FORMAT_ARGB1555:
	211	case DRM_FORMAT_XRGB1555:
	212	colorkey = ((plane->colorkey & 0xf80000) >> 9)
	213	\| ((plane->colorkey & 0x00f800) >> 6)
	214	\| ((plane->colorkey & 0x0000f8) >> 3);
cb2025d2	215	rcar_du_plane_write(rgrp, index, PnTC2R, colorkey);
4bf8e196 LP	216	break;
	217
	218	case DRM_FORMAT_XRGB8888:
	219	case DRM_FORMAT_ARGB8888:
cb2025d2	220	rcar_du_plane_write(rgrp, index, PnTC3R,
4bf8e196 LP	221	PnTC3R_CODE \| (plane->colorkey & 0xffffff));
	222	break;
	223	}
	224	}
	225
	226	static void __rcar_du_plane_setup(struct rcar_du_plane *plane,
	227	unsigned int index)
	228	{
cb2025d2	229	struct rcar_du_group *rgrp = plane->group;
4bf8e196 LP	230	u32 ddcr2 = PnDDCR2_CODE;
4bf8e196 LP	231	u32 ddcr4;
4bf8e196 LP	232
	233	/* Data format
	234	*
	235	* The data format is selected by the DDDF field in PnMR and the EDF
	236	* field in DDCR4.
	237	*/
cb2025d2	238	ddcr4 = rcar_du_plane_read(rgrp, index, PnDDCR4);
4bf8e196 LP	239	ddcr4 &= ~PnDDCR4_EDF_MASK;
	240	ddcr4 \|= plane->format->edf \| PnDDCR4_CODE;
	241
	242	rcar_du_plane_setup_mode(plane, index);
	243
	244	if (plane->format->planes == 2) {
	245	if (plane->hwindex != index) {
	246	if (plane->format->fourcc == DRM_FORMAT_NV12 \|\|
	247	plane->format->fourcc == DRM_FORMAT_NV21)
	248	ddcr2 \|= PnDDCR2_Y420;
	249
	250	if (plane->format->fourcc == DRM_FORMAT_NV21)
	251	ddcr2 \|= PnDDCR2_NV21;
	252
	253	ddcr2 \|= PnDDCR2_DIVU;
	254	} else {
	255	ddcr2 \|= PnDDCR2_DIVY;
	256	}
	257	}
	258
cb2025d2 LP	259	rcar_du_plane_write(rgrp, index, PnDDCR2, ddcr2);
cb2025d2 LP	260	rcar_du_plane_write(rgrp, index, PnDDCR4, ddcr4);
4bf8e196	261
4bf8e196	262	/* Destination position and size */
cb2025d2 LP	263	rcar_du_plane_write(rgrp, index, PnDSXR, plane->width);
	264	rcar_du_plane_write(rgrp, index, PnDSYR, plane->height);
	265	rcar_du_plane_write(rgrp, index, PnDPXR, plane->dst_x);
	266	rcar_du_plane_write(rgrp, index, PnDPYR, plane->dst_y);
4bf8e196 LP	267
4bf8e196 LP	268	/* Wrap-around and blinking, disabled */
cb2025d2 LP	269	rcar_du_plane_write(rgrp, index, PnWASPR, 0);
	270	rcar_du_plane_write(rgrp, index, PnWAMWR, 4095);
	271	rcar_du_plane_write(rgrp, index, PnBTR, 0);
	272	rcar_du_plane_write(rgrp, index, PnMLR, 0);
4bf8e196 LP	273	}
	274
	275	void rcar_du_plane_setup(struct rcar_du_plane *plane)
	276	{
	277	__rcar_du_plane_setup(plane, plane->hwindex);
	278	if (plane->format->planes == 2)
	279	__rcar_du_plane_setup(plane, (plane->hwindex + 1) % 8);
	280
	281	rcar_du_plane_update_base(plane);
	282	}
	283
	284	static int
	285	rcar_du_plane_update(struct drm_plane plane, struct drm_crtc crtc,
	286	struct drm_framebuffer *fb, int crtc_x, int crtc_y,
	287	unsigned int crtc_w, unsigned int crtc_h,
	288	uint32_t src_x, uint32_t src_y,
	289	uint32_t src_w, uint32_t src_h)
	290	{
	291	struct rcar_du_plane *rplane = to_rcar_plane(plane);
cb2025d2	292	struct rcar_du_device *rcdu = rplane->group->dev;
4bf8e196 LP	293	const struct rcar_du_format_info *format;
	294	unsigned int nplanes;
	295	int ret;
	296
917de180 LP	297	if (plane->type != DRM_PLANE_TYPE_OVERLAY)
	298	return -EINVAL;
	299
4bf8e196 LP	300	format = rcar_du_format_info(fb->pixel_format);
	301	if (format == NULL) {
	302	dev_dbg(rcdu->dev, "%s: unsupported format %08x\n", __func__,
	303	fb->pixel_format);
	304	return -EINVAL;
	305	}
	306
	307	if (src_w >> 16 != crtc_w \|\| src_h >> 16 != crtc_h) {
	308	dev_dbg(rcdu->dev, "%s: scaling not supported\n", __func__);
	309	return -EINVAL;
	310	}
	311
	312	nplanes = rplane->format ? rplane->format->planes : 0;
	313
	314	/* Reallocate hardware planes if the number of required planes has
	315	* changed.
	316	*/
	317	if (format->planes != nplanes) {
	318	rcar_du_plane_release(rplane);
	319	ret = rcar_du_plane_reserve(rplane, format);
	320	if (ret < 0)
	321	return ret;
	322	}
	323
	324	rplane->crtc = crtc;
	325	rplane->format = format;
4bf8e196 LP	326
	327	rplane->src_x = src_x >> 16;
	328	rplane->src_y = src_y >> 16;
	329	rplane->dst_x = crtc_x;
	330	rplane->dst_y = crtc_y;
	331	rplane->width = crtc_w;
	332	rplane->height = crtc_h;
	333
	334	rcar_du_plane_compute_base(rplane, fb);
	335	rcar_du_plane_setup(rplane);
	336
cb2025d2	337	mutex_lock(&rplane->group->planes.lock);
4bf8e196 LP	338	rplane->enabled = true;
4bf8e196 LP	339	rcar_du_crtc_update_planes(rplane->crtc);
cb2025d2	340	mutex_unlock(&rplane->group->planes.lock);
4bf8e196 LP	341
	342	return 0;
	343	}
	344
	345	static int rcar_du_plane_disable(struct drm_plane *plane)
	346	{
4bf8e196 LP	347	struct rcar_du_plane *rplane = to_rcar_plane(plane);
4bf8e196 LP	348
917de180 LP	349	if (plane->type != DRM_PLANE_TYPE_OVERLAY)
	350	return -EINVAL;
	351
4bf8e196 LP	352	if (!rplane->enabled)
	353	return 0;
	354
cb2025d2	355	mutex_lock(&rplane->group->planes.lock);
4bf8e196 LP	356	rplane->enabled = false;
4bf8e196 LP	357	rcar_du_crtc_update_planes(rplane->crtc);
cb2025d2	358	mutex_unlock(&rplane->group->planes.lock);
4bf8e196 LP	359
	360	rcar_du_plane_release(rplane);
	361
	362	rplane->crtc = NULL;
	363	rplane->format = NULL;
	364
	365	return 0;
	366	}
	367
	368	/* Both the .set_property and the .update_plane operations are called with the
	369	* mode_config lock held. There is this no need to explicitly protect access to
	370	* the alpha and colorkey fields and the mode register.
	371	*/
	372	static void rcar_du_plane_set_alpha(struct rcar_du_plane *plane, u32 alpha)
	373	{
	374	if (plane->alpha == alpha)
	375	return;
	376
	377	plane->alpha = alpha;
	378	if (!plane->enabled \|\| plane->format->fourcc != DRM_FORMAT_XRGB1555)
	379	return;
	380
	381	rcar_du_plane_setup_mode(plane, plane->hwindex);
	382	}
	383
	384	static void rcar_du_plane_set_colorkey(struct rcar_du_plane *plane,
	385	u32 colorkey)
	386	{
	387	if (plane->colorkey == colorkey)
	388	return;
	389
	390	plane->colorkey = colorkey;
	391	if (!plane->enabled)
	392	return;
	393
	394	rcar_du_plane_setup_mode(plane, plane->hwindex);
	395	}
	396
	397	static void rcar_du_plane_set_zpos(struct rcar_du_plane *plane,
	398	unsigned int zpos)
	399	{
cb2025d2	400	mutex_lock(&plane->group->planes.lock);
4bf8e196 LP	401	if (plane->zpos == zpos)
	402	goto done;
	403
	404	plane->zpos = zpos;
	405	if (!plane->enabled)
	406	goto done;
	407
	408	rcar_du_crtc_update_planes(plane->crtc);
	409
	410	done:
cb2025d2	411	mutex_unlock(&plane->group->planes.lock);
4bf8e196 LP	412	}
	413
	414	static int rcar_du_plane_set_property(struct drm_plane *plane,
	415	struct drm_property *property,
	416	uint64_t value)
	417	{
4bf8e196	418	struct rcar_du_plane *rplane = to_rcar_plane(plane);
cb2025d2	419	struct rcar_du_group *rgrp = rplane->group;
4bf8e196	420
cb2025d2	421	if (property == rgrp->planes.alpha)
4bf8e196	422	rcar_du_plane_set_alpha(rplane, value);
cb2025d2	423	else if (property == rgrp->planes.colorkey)
4bf8e196	424	rcar_du_plane_set_colorkey(rplane, value);
cb2025d2	425	else if (property == rgrp->planes.zpos)
4bf8e196 LP	426	rcar_du_plane_set_zpos(rplane, value);
	427	else
	428	return -EINVAL;
	429
	430	return 0;
	431	}
	432
	433	static const struct drm_plane_funcs rcar_du_plane_funcs = {
	434	.update_plane = rcar_du_plane_update,
	435	.disable_plane = rcar_du_plane_disable,
	436	.set_property = rcar_du_plane_set_property,
	437	.destroy = drm_plane_cleanup,
	438	};
	439
	440	static const uint32_t formats[] = {
	441	DRM_FORMAT_RGB565,
	442	DRM_FORMAT_ARGB1555,
	443	DRM_FORMAT_XRGB1555,
	444	DRM_FORMAT_XRGB8888,
	445	DRM_FORMAT_ARGB8888,
	446	DRM_FORMAT_UYVY,
	447	DRM_FORMAT_YUYV,
	448	DRM_FORMAT_NV12,
	449	DRM_FORMAT_NV21,
	450	DRM_FORMAT_NV16,
	451	};
	452
cb2025d2	453	int rcar_du_planes_init(struct rcar_du_group *rgrp)
4bf8e196	454	{
cb2025d2 LP	455	struct rcar_du_planes *planes = &rgrp->planes;
cb2025d2 LP	456	struct rcar_du_device *rcdu = rgrp->dev;
917de180 LP	457	unsigned int num_planes;
	458	unsigned int num_crtcs;
	459	unsigned int crtcs;
4bf8e196	460	unsigned int i;
917de180	461	int ret;
4bf8e196	462
cb2025d2 LP	463	mutex_init(&planes->lock);
cb2025d2 LP	464	planes->free = 0xff;
4bf8e196	465
cb2025d2	466	planes->alpha =
4bf8e196	467	drm_property_create_range(rcdu->ddev, 0, "alpha", 0, 255);
cb2025d2	468	if (planes->alpha == NULL)
4bf8e196 LP	469	return -ENOMEM;
	470
	471	/* The color key is expressed as an RGB888 triplet stored in a 32-bit
	472	* integer in XRGB8888 format. Bit 24 is used as a flag to disable (0)
	473	* or enable source color keying (1).
	474	*/
cb2025d2	475	planes->colorkey =
4bf8e196 LP	476	drm_property_create_range(rcdu->ddev, 0, "colorkey",
4bf8e196 LP	477	0, 0x01ffffff);
cb2025d2	478	if (planes->colorkey == NULL)
4bf8e196 LP	479	return -ENOMEM;
4bf8e196 LP	480
cb2025d2	481	planes->zpos =
4bf8e196	482	drm_property_create_range(rcdu->ddev, 0, "zpos", 1, 7);
cb2025d2	483	if (planes->zpos == NULL)
4bf8e196 LP	484	return -ENOMEM;
4bf8e196 LP	485
917de180 LP	486	/* Create one primary plane per in this group CRTC and seven overlay
	487	* planes.
	488	*/
	489	num_crtcs = min(rcdu->num_crtcs - 2 * rgrp->index, 2U);
	490	num_planes = num_crtcs + 7;
	491
	492	crtcs = ((1 << rcdu->num_crtcs) - 1) & (3 << (2 * rgrp->index));
	493
	494	for (i = 0; i < num_planes; ++i) {
	495	enum drm_plane_type type = i < num_crtcs
	496	? DRM_PLANE_TYPE_PRIMARY
	497	: DRM_PLANE_TYPE_OVERLAY;
cb2025d2	498	struct rcar_du_plane *plane = &planes->planes[i];
4bf8e196	499
cb2025d2	500	plane->group = rgrp;
4bf8e196 LP	501	plane->hwindex = -1;
	502	plane->alpha = 255;
	503	plane->colorkey = RCAR_DU_COLORKEY_NONE;
917de180	504	plane->zpos = type == DRM_PLANE_TYPE_PRIMARY ? 0 : 1;
4bf8e196	505
917de180 LP	506	ret = drm_universal_plane_init(rcdu->ddev, &plane->plane, crtcs,
	507	&rcar_du_plane_funcs, formats,
	508	ARRAY_SIZE(formats), type);
4bf8e196 LP	509	if (ret < 0)
	510	return ret;
	511
917de180 LP	512	if (type == DRM_PLANE_TYPE_PRIMARY)
	513	continue;
	514
4bf8e196	515	drm_object_attach_property(&plane->plane.base,
cb2025d2	516	planes->alpha, 255);
4bf8e196	517	drm_object_attach_property(&plane->plane.base,
cb2025d2	518	planes->colorkey,
4bf8e196 LP	519	RCAR_DU_COLORKEY_NONE);
4bf8e196 LP	520	drm_object_attach_property(&plane->plane.base,
cb2025d2	521	planes->zpos, 1);
4bf8e196 LP	522	}
	523
	524	return 0;
	525	}