projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 90374b5c LP |
1 | /* |
| 2 | * rcar_lvds_regs.h -- R-Car LVDS Interface Registers Definitions | |
| 3 | * | |
| 6bc2e15c | 4 | * Copyright (C) 2013-2015 Renesas Electronics Corporation |
| 90374b5c LP |
5 | * |
| 6 | * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or modify | |
| 9 | * it under the terms of the GNU General Public License version 2 | |
| 10 | * as published by the Free Software Foundation. | |
| 11 | */ | |
| 12 | ||
| 13 | #ifndef __RCAR_LVDS_REGS_H__ | |
| 14 | #define __RCAR_LVDS_REGS_H__ | |
| 15 | ||
| 16 | #define LVDCR0 0x0000 | |
| 17 | #define LVDCR0_DUSEL (1 << 15) | |
| 6bc2e15c | 18 | #define LVDCR0_DMD (1 << 12) /* Gen2 only */ |
| 90374b5c LP |
19 | #define LVDCR0_LVMD_MASK (0xf << 8) |
| 20 | #define LVDCR0_LVMD_SHIFT 8 | |
| 82e7c5e4 | 21 | #define LVDCR0_PLLON (1 << 4) |
| 6bc2e15c KM |
22 | #define LVDCR0_PWD (1 << 2) /* Gen3 only */ |
| 23 | #define LVDCR0_BEN (1 << 2) /* Gen2 only */ | |
| 24 | #define LVDCR0_LVEN (1 << 1) /* Gen2 only */ | |
| 90374b5c LP |
25 | #define LVDCR0_LVRES (1 << 0) |
| 26 | ||
| 27 | #define LVDCR1 0x0004 | |
| 6bc2e15c KM |
28 | #define LVDCR1_CKSEL (1 << 15) /* Gen2 only */ |
| 29 | #define LVDCR1_CHSTBY_GEN2(n) (3 << (2 + (n) * 2)) /* Gen2 only */ | |
| 30 | #define LVDCR1_CHSTBY_GEN3(n) (1 << (2 + (n) * 2)) /* Gen3 only */ | |
| 31 | #define LVDCR1_CLKSTBY_GEN2 (3 << 0) /* Gen2 only */ | |
| 32 | #define LVDCR1_CLKSTBY_GEN3 (1 << 0) /* Gen3 only */ | |
| 90374b5c LP |
33 | |
| 34 | #define LVDPLLCR 0x0008 | |
| 35 | #define LVDPLLCR_CEEN (1 << 14) | |
| 36 | #define LVDPLLCR_FBEN (1 << 13) | |
| 37 | #define LVDPLLCR_COSEL (1 << 12) | |
| 6bc2e15c | 38 | /* Gen2 */ |
| 90374b5c LP |
39 | #define LVDPLLCR_PLLDLYCNT_150M (0x1bf << 0) |
| 40 | #define LVDPLLCR_PLLDLYCNT_121M (0x22c << 0) | |
| 41 | #define LVDPLLCR_PLLDLYCNT_60M (0x77b << 0) | |
| 42 | #define LVDPLLCR_PLLDLYCNT_38M (0x69a << 0) | |
| 43 | #define LVDPLLCR_PLLDLYCNT_MASK (0x7ff << 0) | |
| 6bc2e15c KM |
44 | /* Gen3 */ |
| 45 | #define LVDPLLCR_PLLDIVCNT_42M (0x014cb << 0) | |
| 46 | #define LVDPLLCR_PLLDIVCNT_85M (0x00a45 << 0) | |
| 47 | #define LVDPLLCR_PLLDIVCNT_128M (0x006c3 << 0) | |
| 48 | #define LVDPLLCR_PLLDIVCNT_148M (0x046c1 << 0) | |
| 49 | #define LVDPLLCR_PLLDIVCNT_MASK (0x7ffff << 0) | |
| 90374b5c LP |
50 | |
| 51 | #define LVDCTRCR 0x000c | |
| 52 | #define LVDCTRCR_CTR3SEL_ZERO (0 << 12) | |
| 53 | #define LVDCTRCR_CTR3SEL_ODD (1 << 12) | |
| 54 | #define LVDCTRCR_CTR3SEL_CDE (2 << 12) | |
| 55 | #define LVDCTRCR_CTR3SEL_MASK (7 << 12) | |
| 56 | #define LVDCTRCR_CTR2SEL_DISP (0 << 8) | |
| 57 | #define LVDCTRCR_CTR2SEL_ODD (1 << 8) | |
| 58 | #define LVDCTRCR_CTR2SEL_CDE (2 << 8) | |
| 59 | #define LVDCTRCR_CTR2SEL_HSYNC (3 << 8) | |
| 60 | #define LVDCTRCR_CTR2SEL_VSYNC (4 << 8) | |
| 61 | #define LVDCTRCR_CTR2SEL_MASK (7 << 8) | |
| 62 | #define LVDCTRCR_CTR1SEL_VSYNC (0 << 4) | |
| 63 | #define LVDCTRCR_CTR1SEL_DISP (1 << 4) | |
| 64 | #define LVDCTRCR_CTR1SEL_ODD (2 << 4) | |
| 65 | #define LVDCTRCR_CTR1SEL_CDE (3 << 4) | |
| 66 | #define LVDCTRCR_CTR1SEL_HSYNC (4 << 4) | |
| 67 | #define LVDCTRCR_CTR1SEL_MASK (7 << 4) | |
| 68 | #define LVDCTRCR_CTR0SEL_HSYNC (0 << 0) | |
| 69 | #define LVDCTRCR_CTR0SEL_VSYNC (1 << 0) | |
| 70 | #define LVDCTRCR_CTR0SEL_DISP (2 << 0) | |
| 71 | #define LVDCTRCR_CTR0SEL_ODD (3 << 0) | |
| 72 | #define LVDCTRCR_CTR0SEL_CDE (4 << 0) | |
| 73 | #define LVDCTRCR_CTR0SEL_MASK (7 << 0) | |
| 74 | ||
| 75 | #define LVDCHCR 0x0010 | |
| 76 | #define LVDCHCR_CHSEL_CH(n, c) ((((c) - (n)) & 3) << ((n) * 4)) | |
| 77 | #define LVDCHCR_CHSEL_MASK(n) (3 << ((n) * 4)) | |
| 78 | ||
| 79 | #endif /* __RCAR_LVDS_REGS_H__ */ |