Commit | Line | Data |
---|---|---|
51c13278 LP |
1 | /* |
2 | * shmob_drm_crtc.c -- SH Mobile DRM CRTCs | |
3 | * | |
4 | * Copyright (C) 2012 Renesas Corporation | |
5 | * | |
6 | * Laurent Pinchart (laurent.pinchart@ideasonboard.com) | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | */ | |
13 | ||
14 | #include <linux/backlight.h> | |
15 | #include <linux/clk.h> | |
16 | ||
17 | #include <drm/drmP.h> | |
18 | #include <drm/drm_crtc.h> | |
19 | #include <drm/drm_crtc_helper.h> | |
20 | #include <drm/drm_fb_cma_helper.h> | |
21 | #include <drm/drm_gem_cma_helper.h> | |
22 | ||
23 | #include <video/sh_mobile_meram.h> | |
24 | ||
25 | #include "shmob_drm_backlight.h" | |
26 | #include "shmob_drm_crtc.h" | |
27 | #include "shmob_drm_drv.h" | |
28 | #include "shmob_drm_kms.h" | |
29 | #include "shmob_drm_plane.h" | |
30 | #include "shmob_drm_regs.h" | |
31 | ||
32 | /* | |
33 | * TODO: panel support | |
34 | */ | |
35 | ||
36 | /* ----------------------------------------------------------------------------- | |
37 | * Clock management | |
38 | */ | |
39 | ||
c0c72a85 | 40 | static int shmob_drm_clk_on(struct shmob_drm_device *sdev) |
51c13278 | 41 | { |
c0c72a85 LP |
42 | int ret; |
43 | ||
44 | if (sdev->clock) { | |
45 | ret = clk_prepare_enable(sdev->clock); | |
46 | if (ret < 0) | |
47 | return ret; | |
48 | } | |
51c13278 LP |
49 | #if 0 |
50 | if (sdev->meram_dev && sdev->meram_dev->pdev) | |
51 | pm_runtime_get_sync(&sdev->meram_dev->pdev->dev); | |
52 | #endif | |
c0c72a85 LP |
53 | |
54 | return 0; | |
51c13278 LP |
55 | } |
56 | ||
57 | static void shmob_drm_clk_off(struct shmob_drm_device *sdev) | |
58 | { | |
59 | #if 0 | |
60 | if (sdev->meram_dev && sdev->meram_dev->pdev) | |
61 | pm_runtime_put_sync(&sdev->meram_dev->pdev->dev); | |
62 | #endif | |
63 | if (sdev->clock) | |
8d01e1ef | 64 | clk_disable_unprepare(sdev->clock); |
51c13278 LP |
65 | } |
66 | ||
67 | /* ----------------------------------------------------------------------------- | |
68 | * CRTC | |
69 | */ | |
70 | ||
71 | static void shmob_drm_crtc_setup_geometry(struct shmob_drm_crtc *scrtc) | |
72 | { | |
73 | struct drm_crtc *crtc = &scrtc->crtc; | |
74 | struct shmob_drm_device *sdev = crtc->dev->dev_private; | |
75 | const struct shmob_drm_interface_data *idata = &sdev->pdata->iface; | |
76 | const struct drm_display_mode *mode = &crtc->mode; | |
77 | u32 value; | |
78 | ||
79 | value = sdev->ldmt1r | |
80 | | ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? 0 : LDMT1R_VPOL) | |
81 | | ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? 0 : LDMT1R_HPOL) | |
82 | | ((idata->flags & SHMOB_DRM_IFACE_FL_DWPOL) ? LDMT1R_DWPOL : 0) | |
83 | | ((idata->flags & SHMOB_DRM_IFACE_FL_DIPOL) ? LDMT1R_DIPOL : 0) | |
84 | | ((idata->flags & SHMOB_DRM_IFACE_FL_DAPOL) ? LDMT1R_DAPOL : 0) | |
85 | | ((idata->flags & SHMOB_DRM_IFACE_FL_HSCNT) ? LDMT1R_HSCNT : 0) | |
86 | | ((idata->flags & SHMOB_DRM_IFACE_FL_DWCNT) ? LDMT1R_DWCNT : 0); | |
87 | lcdc_write(sdev, LDMT1R, value); | |
88 | ||
89 | if (idata->interface >= SHMOB_DRM_IFACE_SYS8A && | |
90 | idata->interface <= SHMOB_DRM_IFACE_SYS24) { | |
91 | /* Setup SYS bus. */ | |
92 | value = (idata->sys.cs_setup << LDMT2R_CSUP_SHIFT) | |
93 | | (idata->sys.vsync_active_high ? LDMT2R_RSV : 0) | |
94 | | (idata->sys.vsync_dir_input ? LDMT2R_VSEL : 0) | |
95 | | (idata->sys.write_setup << LDMT2R_WCSC_SHIFT) | |
96 | | (idata->sys.write_cycle << LDMT2R_WCEC_SHIFT) | |
97 | | (idata->sys.write_strobe << LDMT2R_WCLW_SHIFT); | |
98 | lcdc_write(sdev, LDMT2R, value); | |
99 | ||
100 | value = (idata->sys.read_latch << LDMT3R_RDLC_SHIFT) | |
101 | | (idata->sys.read_setup << LDMT3R_RCSC_SHIFT) | |
102 | | (idata->sys.read_cycle << LDMT3R_RCEC_SHIFT) | |
103 | | (idata->sys.read_strobe << LDMT3R_RCLW_SHIFT); | |
104 | lcdc_write(sdev, LDMT3R, value); | |
105 | } | |
106 | ||
107 | value = ((mode->hdisplay / 8) << 16) /* HDCN */ | |
108 | | (mode->htotal / 8); /* HTCN */ | |
109 | lcdc_write(sdev, LDHCNR, value); | |
110 | ||
111 | value = (((mode->hsync_end - mode->hsync_start) / 8) << 16) /* HSYNW */ | |
112 | | (mode->hsync_start / 8); /* HSYNP */ | |
113 | lcdc_write(sdev, LDHSYNR, value); | |
114 | ||
115 | value = ((mode->hdisplay & 7) << 24) | ((mode->htotal & 7) << 16) | |
116 | | (((mode->hsync_end - mode->hsync_start) & 7) << 8) | |
117 | | (mode->hsync_start & 7); | |
118 | lcdc_write(sdev, LDHAJR, value); | |
119 | ||
120 | value = ((mode->vdisplay) << 16) /* VDLN */ | |
121 | | mode->vtotal; /* VTLN */ | |
122 | lcdc_write(sdev, LDVLNR, value); | |
123 | ||
124 | value = ((mode->vsync_end - mode->vsync_start) << 16) /* VSYNW */ | |
125 | | mode->vsync_start; /* VSYNP */ | |
126 | lcdc_write(sdev, LDVSYNR, value); | |
127 | } | |
128 | ||
129 | static void shmob_drm_crtc_start_stop(struct shmob_drm_crtc *scrtc, bool start) | |
130 | { | |
131 | struct shmob_drm_device *sdev = scrtc->crtc.dev->dev_private; | |
132 | u32 value; | |
133 | ||
134 | value = lcdc_read(sdev, LDCNT2R); | |
135 | if (start) | |
136 | lcdc_write(sdev, LDCNT2R, value | LDCNT2R_DO); | |
137 | else | |
138 | lcdc_write(sdev, LDCNT2R, value & ~LDCNT2R_DO); | |
139 | ||
140 | /* Wait until power is applied/stopped. */ | |
141 | while (1) { | |
142 | value = lcdc_read(sdev, LDPMR) & LDPMR_LPS; | |
143 | if ((start && value) || (!start && !value)) | |
144 | break; | |
145 | ||
146 | cpu_relax(); | |
147 | } | |
148 | ||
149 | if (!start) { | |
150 | /* Stop the dot clock. */ | |
151 | lcdc_write(sdev, LDDCKSTPR, LDDCKSTPR_DCKSTP); | |
152 | } | |
153 | } | |
154 | ||
155 | /* | |
156 | * shmob_drm_crtc_start - Configure and start the LCDC | |
157 | * @scrtc: the SH Mobile CRTC | |
158 | * | |
159 | * Configure and start the LCDC device. External devices (clocks, MERAM, panels, | |
160 | * ...) are not touched by this function. | |
161 | */ | |
162 | static void shmob_drm_crtc_start(struct shmob_drm_crtc *scrtc) | |
163 | { | |
164 | struct drm_crtc *crtc = &scrtc->crtc; | |
165 | struct shmob_drm_device *sdev = crtc->dev->dev_private; | |
166 | const struct shmob_drm_interface_data *idata = &sdev->pdata->iface; | |
167 | const struct shmob_drm_format_info *format; | |
168 | struct drm_device *dev = sdev->ddev; | |
169 | struct drm_plane *plane; | |
170 | u32 value; | |
c0c72a85 | 171 | int ret; |
51c13278 LP |
172 | |
173 | if (scrtc->started) | |
174 | return; | |
175 | ||
f4510a27 | 176 | format = shmob_drm_format_info(crtc->primary->fb->pixel_format); |
51c13278 LP |
177 | if (WARN_ON(format == NULL)) |
178 | return; | |
179 | ||
180 | /* Enable clocks before accessing the hardware. */ | |
c0c72a85 LP |
181 | ret = shmob_drm_clk_on(sdev); |
182 | if (ret < 0) | |
183 | return; | |
51c13278 LP |
184 | |
185 | /* Reset and enable the LCDC. */ | |
186 | lcdc_write(sdev, LDCNT2R, lcdc_read(sdev, LDCNT2R) | LDCNT2R_BR); | |
187 | lcdc_wait_bit(sdev, LDCNT2R, LDCNT2R_BR, 0); | |
188 | lcdc_write(sdev, LDCNT2R, LDCNT2R_ME); | |
189 | ||
190 | /* Stop the LCDC first and disable all interrupts. */ | |
191 | shmob_drm_crtc_start_stop(scrtc, false); | |
192 | lcdc_write(sdev, LDINTR, 0); | |
193 | ||
194 | /* Configure power supply, dot clocks and start them. */ | |
195 | lcdc_write(sdev, LDPMR, 0); | |
196 | ||
197 | value = sdev->lddckr; | |
198 | if (idata->clk_div) { | |
199 | /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider | |
200 | * denominator. | |
201 | */ | |
202 | lcdc_write(sdev, LDDCKPAT1R, 0); | |
203 | lcdc_write(sdev, LDDCKPAT2R, (1 << (idata->clk_div / 2)) - 1); | |
204 | ||
205 | if (idata->clk_div == 1) | |
206 | value |= LDDCKR_MOSEL; | |
207 | else | |
208 | value |= idata->clk_div; | |
209 | } | |
210 | ||
211 | lcdc_write(sdev, LDDCKR, value); | |
212 | lcdc_write(sdev, LDDCKSTPR, 0); | |
213 | lcdc_wait_bit(sdev, LDDCKSTPR, ~0, 0); | |
214 | ||
215 | /* TODO: Setup SYS panel */ | |
216 | ||
217 | /* Setup geometry, format, frame buffer memory and operation mode. */ | |
218 | shmob_drm_crtc_setup_geometry(scrtc); | |
219 | ||
220 | /* TODO: Handle YUV colorspaces. Hardcode REC709 for now. */ | |
221 | lcdc_write(sdev, LDDFR, format->lddfr | LDDFR_CF1); | |
222 | lcdc_write(sdev, LDMLSR, scrtc->line_size); | |
223 | lcdc_write(sdev, LDSA1R, scrtc->dma[0]); | |
224 | if (format->yuv) | |
225 | lcdc_write(sdev, LDSA2R, scrtc->dma[1]); | |
226 | lcdc_write(sdev, LDSM1R, 0); | |
227 | ||
228 | /* Word and long word swap. */ | |
229 | switch (format->fourcc) { | |
230 | case DRM_FORMAT_RGB565: | |
231 | case DRM_FORMAT_NV21: | |
232 | case DRM_FORMAT_NV61: | |
233 | case DRM_FORMAT_NV42: | |
234 | value = LDDDSR_LS | LDDDSR_WS; | |
235 | break; | |
236 | case DRM_FORMAT_RGB888: | |
237 | case DRM_FORMAT_NV12: | |
238 | case DRM_FORMAT_NV16: | |
239 | case DRM_FORMAT_NV24: | |
240 | value = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS; | |
241 | break; | |
242 | case DRM_FORMAT_ARGB8888: | |
243 | default: | |
244 | value = LDDDSR_LS; | |
245 | break; | |
246 | } | |
247 | lcdc_write(sdev, LDDDSR, value); | |
248 | ||
249 | /* Setup planes. */ | |
2b79dc13 | 250 | drm_for_each_legacy_plane(plane, &dev->mode_config.plane_list) { |
51c13278 LP |
251 | if (plane->crtc == crtc) |
252 | shmob_drm_plane_setup(plane); | |
253 | } | |
254 | ||
255 | /* Enable the display output. */ | |
256 | lcdc_write(sdev, LDCNT1R, LDCNT1R_DE); | |
257 | ||
258 | shmob_drm_crtc_start_stop(scrtc, true); | |
259 | ||
260 | scrtc->started = true; | |
261 | } | |
262 | ||
263 | static void shmob_drm_crtc_stop(struct shmob_drm_crtc *scrtc) | |
264 | { | |
265 | struct drm_crtc *crtc = &scrtc->crtc; | |
266 | struct shmob_drm_device *sdev = crtc->dev->dev_private; | |
267 | ||
268 | if (!scrtc->started) | |
269 | return; | |
270 | ||
271 | /* Disable the MERAM cache. */ | |
272 | if (scrtc->cache) { | |
273 | sh_mobile_meram_cache_free(sdev->meram, scrtc->cache); | |
274 | scrtc->cache = NULL; | |
275 | } | |
276 | ||
277 | /* Stop the LCDC. */ | |
278 | shmob_drm_crtc_start_stop(scrtc, false); | |
279 | ||
280 | /* Disable the display output. */ | |
281 | lcdc_write(sdev, LDCNT1R, 0); | |
282 | ||
283 | /* Stop clocks. */ | |
284 | shmob_drm_clk_off(sdev); | |
285 | ||
286 | scrtc->started = false; | |
287 | } | |
288 | ||
289 | void shmob_drm_crtc_suspend(struct shmob_drm_crtc *scrtc) | |
290 | { | |
291 | shmob_drm_crtc_stop(scrtc); | |
292 | } | |
293 | ||
294 | void shmob_drm_crtc_resume(struct shmob_drm_crtc *scrtc) | |
295 | { | |
296 | if (scrtc->dpms != DRM_MODE_DPMS_ON) | |
297 | return; | |
298 | ||
299 | shmob_drm_crtc_start(scrtc); | |
300 | } | |
301 | ||
302 | static void shmob_drm_crtc_compute_base(struct shmob_drm_crtc *scrtc, | |
303 | int x, int y) | |
304 | { | |
305 | struct drm_crtc *crtc = &scrtc->crtc; | |
f4510a27 | 306 | struct drm_framebuffer *fb = crtc->primary->fb; |
51c13278 LP |
307 | struct shmob_drm_device *sdev = crtc->dev->dev_private; |
308 | struct drm_gem_cma_object *gem; | |
309 | unsigned int bpp; | |
310 | ||
311 | bpp = scrtc->format->yuv ? 8 : scrtc->format->bpp; | |
312 | gem = drm_fb_cma_get_gem_obj(fb, 0); | |
313 | scrtc->dma[0] = gem->paddr + fb->offsets[0] | |
314 | + y * fb->pitches[0] + x * bpp / 8; | |
315 | ||
316 | if (scrtc->format->yuv) { | |
317 | bpp = scrtc->format->bpp - 8; | |
318 | gem = drm_fb_cma_get_gem_obj(fb, 1); | |
319 | scrtc->dma[1] = gem->paddr + fb->offsets[1] | |
320 | + y / (bpp == 4 ? 2 : 1) * fb->pitches[1] | |
321 | + x * (bpp == 16 ? 2 : 1); | |
322 | } | |
323 | ||
324 | if (scrtc->cache) | |
325 | sh_mobile_meram_cache_update(sdev->meram, scrtc->cache, | |
326 | scrtc->dma[0], scrtc->dma[1], | |
327 | &scrtc->dma[0], &scrtc->dma[1]); | |
328 | } | |
329 | ||
330 | static void shmob_drm_crtc_update_base(struct shmob_drm_crtc *scrtc) | |
331 | { | |
332 | struct drm_crtc *crtc = &scrtc->crtc; | |
333 | struct shmob_drm_device *sdev = crtc->dev->dev_private; | |
334 | ||
335 | shmob_drm_crtc_compute_base(scrtc, crtc->x, crtc->y); | |
336 | ||
337 | lcdc_write_mirror(sdev, LDSA1R, scrtc->dma[0]); | |
338 | if (scrtc->format->yuv) | |
339 | lcdc_write_mirror(sdev, LDSA2R, scrtc->dma[1]); | |
340 | ||
341 | lcdc_write(sdev, LDRCNTR, lcdc_read(sdev, LDRCNTR) ^ LDRCNTR_MRS); | |
342 | } | |
343 | ||
344 | #define to_shmob_crtc(c) container_of(c, struct shmob_drm_crtc, crtc) | |
345 | ||
346 | static void shmob_drm_crtc_dpms(struct drm_crtc *crtc, int mode) | |
347 | { | |
348 | struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc); | |
349 | ||
350 | if (scrtc->dpms == mode) | |
351 | return; | |
352 | ||
353 | if (mode == DRM_MODE_DPMS_ON) | |
354 | shmob_drm_crtc_start(scrtc); | |
355 | else | |
356 | shmob_drm_crtc_stop(scrtc); | |
357 | ||
358 | scrtc->dpms = mode; | |
359 | } | |
360 | ||
361 | static bool shmob_drm_crtc_mode_fixup(struct drm_crtc *crtc, | |
362 | const struct drm_display_mode *mode, | |
363 | struct drm_display_mode *adjusted_mode) | |
364 | { | |
365 | return true; | |
366 | } | |
367 | ||
368 | static void shmob_drm_crtc_mode_prepare(struct drm_crtc *crtc) | |
369 | { | |
370 | shmob_drm_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); | |
371 | } | |
372 | ||
373 | static int shmob_drm_crtc_mode_set(struct drm_crtc *crtc, | |
374 | struct drm_display_mode *mode, | |
375 | struct drm_display_mode *adjusted_mode, | |
376 | int x, int y, | |
377 | struct drm_framebuffer *old_fb) | |
378 | { | |
379 | struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc); | |
380 | struct shmob_drm_device *sdev = crtc->dev->dev_private; | |
381 | const struct sh_mobile_meram_cfg *mdata = sdev->pdata->meram; | |
382 | const struct shmob_drm_format_info *format; | |
383 | void *cache; | |
384 | ||
f4510a27 | 385 | format = shmob_drm_format_info(crtc->primary->fb->pixel_format); |
51c13278 LP |
386 | if (format == NULL) { |
387 | dev_dbg(sdev->dev, "mode_set: unsupported format %08x\n", | |
f4510a27 | 388 | crtc->primary->fb->pixel_format); |
51c13278 LP |
389 | return -EINVAL; |
390 | } | |
391 | ||
392 | scrtc->format = format; | |
f4510a27 | 393 | scrtc->line_size = crtc->primary->fb->pitches[0]; |
51c13278 LP |
394 | |
395 | if (sdev->meram) { | |
396 | /* Enable MERAM cache if configured. We need to de-init | |
397 | * configured ICBs before we can re-initialize them. | |
398 | */ | |
399 | if (scrtc->cache) { | |
400 | sh_mobile_meram_cache_free(sdev->meram, scrtc->cache); | |
401 | scrtc->cache = NULL; | |
402 | } | |
403 | ||
404 | cache = sh_mobile_meram_cache_alloc(sdev->meram, mdata, | |
f4510a27 | 405 | crtc->primary->fb->pitches[0], |
51c13278 LP |
406 | adjusted_mode->vdisplay, |
407 | format->meram, | |
408 | &scrtc->line_size); | |
409 | if (!IS_ERR(cache)) | |
410 | scrtc->cache = cache; | |
411 | } | |
412 | ||
413 | shmob_drm_crtc_compute_base(scrtc, x, y); | |
414 | ||
415 | return 0; | |
416 | } | |
417 | ||
418 | static void shmob_drm_crtc_mode_commit(struct drm_crtc *crtc) | |
419 | { | |
420 | shmob_drm_crtc_dpms(crtc, DRM_MODE_DPMS_ON); | |
421 | } | |
422 | ||
423 | static int shmob_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, | |
424 | struct drm_framebuffer *old_fb) | |
425 | { | |
426 | shmob_drm_crtc_update_base(to_shmob_crtc(crtc)); | |
427 | ||
428 | return 0; | |
429 | } | |
430 | ||
431 | static const struct drm_crtc_helper_funcs crtc_helper_funcs = { | |
432 | .dpms = shmob_drm_crtc_dpms, | |
433 | .mode_fixup = shmob_drm_crtc_mode_fixup, | |
434 | .prepare = shmob_drm_crtc_mode_prepare, | |
435 | .commit = shmob_drm_crtc_mode_commit, | |
436 | .mode_set = shmob_drm_crtc_mode_set, | |
437 | .mode_set_base = shmob_drm_crtc_mode_set_base, | |
438 | }; | |
439 | ||
440 | void shmob_drm_crtc_cancel_page_flip(struct shmob_drm_crtc *scrtc, | |
441 | struct drm_file *file) | |
442 | { | |
443 | struct drm_pending_vblank_event *event; | |
444 | struct drm_device *dev = scrtc->crtc.dev; | |
445 | unsigned long flags; | |
446 | ||
447 | /* Destroy the pending vertical blanking event associated with the | |
448 | * pending page flip, if any, and disable vertical blanking interrupts. | |
449 | */ | |
450 | spin_lock_irqsave(&dev->event_lock, flags); | |
451 | event = scrtc->event; | |
452 | if (event && event->base.file_priv == file) { | |
453 | scrtc->event = NULL; | |
454 | event->base.destroy(&event->base); | |
455 | drm_vblank_put(dev, 0); | |
456 | } | |
457 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
458 | } | |
459 | ||
460 | void shmob_drm_crtc_finish_page_flip(struct shmob_drm_crtc *scrtc) | |
461 | { | |
462 | struct drm_pending_vblank_event *event; | |
463 | struct drm_device *dev = scrtc->crtc.dev; | |
51c13278 LP |
464 | unsigned long flags; |
465 | ||
466 | spin_lock_irqsave(&dev->event_lock, flags); | |
467 | event = scrtc->event; | |
468 | scrtc->event = NULL; | |
f7e96d7e RC |
469 | if (event) { |
470 | drm_send_vblank_event(dev, 0, event); | |
471 | drm_vblank_put(dev, 0); | |
472 | } | |
51c13278 | 473 | spin_unlock_irqrestore(&dev->event_lock, flags); |
51c13278 LP |
474 | } |
475 | ||
476 | static int shmob_drm_crtc_page_flip(struct drm_crtc *crtc, | |
477 | struct drm_framebuffer *fb, | |
ed8d1975 KP |
478 | struct drm_pending_vblank_event *event, |
479 | uint32_t page_flip_flags) | |
51c13278 LP |
480 | { |
481 | struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc); | |
482 | struct drm_device *dev = scrtc->crtc.dev; | |
483 | unsigned long flags; | |
484 | ||
485 | spin_lock_irqsave(&dev->event_lock, flags); | |
486 | if (scrtc->event != NULL) { | |
487 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
488 | return -EBUSY; | |
489 | } | |
490 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
491 | ||
f4510a27 | 492 | crtc->primary->fb = fb; |
51c13278 LP |
493 | shmob_drm_crtc_update_base(scrtc); |
494 | ||
495 | if (event) { | |
496 | event->pipe = 0; | |
17f0efc4 | 497 | drm_vblank_get(dev, 0); |
51c13278 LP |
498 | spin_lock_irqsave(&dev->event_lock, flags); |
499 | scrtc->event = event; | |
500 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
51c13278 LP |
501 | } |
502 | ||
503 | return 0; | |
504 | } | |
505 | ||
506 | static const struct drm_crtc_funcs crtc_funcs = { | |
507 | .destroy = drm_crtc_cleanup, | |
508 | .set_config = drm_crtc_helper_set_config, | |
509 | .page_flip = shmob_drm_crtc_page_flip, | |
510 | }; | |
511 | ||
512 | int shmob_drm_crtc_create(struct shmob_drm_device *sdev) | |
513 | { | |
514 | struct drm_crtc *crtc = &sdev->crtc.crtc; | |
515 | int ret; | |
516 | ||
517 | sdev->crtc.dpms = DRM_MODE_DPMS_OFF; | |
518 | ||
519 | ret = drm_crtc_init(sdev->ddev, crtc, &crtc_funcs); | |
520 | if (ret < 0) | |
521 | return ret; | |
522 | ||
523 | drm_crtc_helper_add(crtc, &crtc_helper_funcs); | |
524 | ||
525 | return 0; | |
526 | } | |
527 | ||
528 | /* ----------------------------------------------------------------------------- | |
529 | * Encoder | |
530 | */ | |
531 | ||
532 | #define to_shmob_encoder(e) \ | |
533 | container_of(e, struct shmob_drm_encoder, encoder) | |
534 | ||
535 | static void shmob_drm_encoder_dpms(struct drm_encoder *encoder, int mode) | |
536 | { | |
537 | struct shmob_drm_encoder *senc = to_shmob_encoder(encoder); | |
538 | struct shmob_drm_device *sdev = encoder->dev->dev_private; | |
539 | struct shmob_drm_connector *scon = &sdev->connector; | |
540 | ||
541 | if (senc->dpms == mode) | |
542 | return; | |
543 | ||
544 | shmob_drm_backlight_dpms(scon, mode); | |
545 | ||
546 | senc->dpms = mode; | |
547 | } | |
548 | ||
549 | static bool shmob_drm_encoder_mode_fixup(struct drm_encoder *encoder, | |
550 | const struct drm_display_mode *mode, | |
551 | struct drm_display_mode *adjusted_mode) | |
552 | { | |
553 | struct drm_device *dev = encoder->dev; | |
554 | struct shmob_drm_device *sdev = dev->dev_private; | |
555 | struct drm_connector *connector = &sdev->connector.connector; | |
556 | const struct drm_display_mode *panel_mode; | |
557 | ||
558 | if (list_empty(&connector->modes)) { | |
559 | dev_dbg(dev->dev, "mode_fixup: empty modes list\n"); | |
560 | return false; | |
561 | } | |
562 | ||
563 | /* The flat panel mode is fixed, just copy it to the adjusted mode. */ | |
564 | panel_mode = list_first_entry(&connector->modes, | |
565 | struct drm_display_mode, head); | |
566 | drm_mode_copy(adjusted_mode, panel_mode); | |
567 | ||
568 | return true; | |
569 | } | |
570 | ||
571 | static void shmob_drm_encoder_mode_prepare(struct drm_encoder *encoder) | |
572 | { | |
573 | /* No-op, everything is handled in the CRTC code. */ | |
574 | } | |
575 | ||
576 | static void shmob_drm_encoder_mode_set(struct drm_encoder *encoder, | |
577 | struct drm_display_mode *mode, | |
578 | struct drm_display_mode *adjusted_mode) | |
579 | { | |
580 | /* No-op, everything is handled in the CRTC code. */ | |
581 | } | |
582 | ||
583 | static void shmob_drm_encoder_mode_commit(struct drm_encoder *encoder) | |
584 | { | |
585 | /* No-op, everything is handled in the CRTC code. */ | |
586 | } | |
587 | ||
588 | static const struct drm_encoder_helper_funcs encoder_helper_funcs = { | |
589 | .dpms = shmob_drm_encoder_dpms, | |
590 | .mode_fixup = shmob_drm_encoder_mode_fixup, | |
591 | .prepare = shmob_drm_encoder_mode_prepare, | |
592 | .commit = shmob_drm_encoder_mode_commit, | |
593 | .mode_set = shmob_drm_encoder_mode_set, | |
594 | }; | |
595 | ||
596 | static void shmob_drm_encoder_destroy(struct drm_encoder *encoder) | |
597 | { | |
598 | drm_encoder_cleanup(encoder); | |
599 | } | |
600 | ||
601 | static const struct drm_encoder_funcs encoder_funcs = { | |
602 | .destroy = shmob_drm_encoder_destroy, | |
603 | }; | |
604 | ||
605 | int shmob_drm_encoder_create(struct shmob_drm_device *sdev) | |
606 | { | |
607 | struct drm_encoder *encoder = &sdev->encoder.encoder; | |
608 | int ret; | |
609 | ||
610 | sdev->encoder.dpms = DRM_MODE_DPMS_OFF; | |
611 | ||
612 | encoder->possible_crtcs = 1; | |
613 | ||
614 | ret = drm_encoder_init(sdev->ddev, encoder, &encoder_funcs, | |
615 | DRM_MODE_ENCODER_LVDS); | |
616 | if (ret < 0) | |
617 | return ret; | |
618 | ||
619 | drm_encoder_helper_add(encoder, &encoder_helper_funcs); | |
620 | ||
621 | return 0; | |
622 | } | |
623 | ||
624 | void shmob_drm_crtc_enable_vblank(struct shmob_drm_device *sdev, bool enable) | |
625 | { | |
626 | unsigned long flags; | |
627 | u32 ldintr; | |
628 | ||
629 | /* Be careful not to acknowledge any pending interrupt. */ | |
630 | spin_lock_irqsave(&sdev->irq_lock, flags); | |
631 | ldintr = lcdc_read(sdev, LDINTR) | LDINTR_STATUS_MASK; | |
632 | if (enable) | |
633 | ldintr |= LDINTR_VEE; | |
634 | else | |
635 | ldintr &= ~LDINTR_VEE; | |
636 | lcdc_write(sdev, LDINTR, ldintr); | |
637 | spin_unlock_irqrestore(&sdev->irq_lock, flags); | |
638 | } | |
639 | ||
640 | /* ----------------------------------------------------------------------------- | |
641 | * Connector | |
642 | */ | |
643 | ||
644 | #define to_shmob_connector(c) \ | |
645 | container_of(c, struct shmob_drm_connector, connector) | |
646 | ||
647 | static int shmob_drm_connector_get_modes(struct drm_connector *connector) | |
648 | { | |
649 | struct shmob_drm_device *sdev = connector->dev->dev_private; | |
650 | struct drm_display_mode *mode; | |
651 | ||
652 | mode = drm_mode_create(connector->dev); | |
653 | if (mode == NULL) | |
654 | return 0; | |
655 | ||
656 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | |
657 | mode->clock = sdev->pdata->panel.mode.clock; | |
658 | mode->hdisplay = sdev->pdata->panel.mode.hdisplay; | |
659 | mode->hsync_start = sdev->pdata->panel.mode.hsync_start; | |
660 | mode->hsync_end = sdev->pdata->panel.mode.hsync_end; | |
661 | mode->htotal = sdev->pdata->panel.mode.htotal; | |
662 | mode->vdisplay = sdev->pdata->panel.mode.vdisplay; | |
663 | mode->vsync_start = sdev->pdata->panel.mode.vsync_start; | |
664 | mode->vsync_end = sdev->pdata->panel.mode.vsync_end; | |
665 | mode->vtotal = sdev->pdata->panel.mode.vtotal; | |
666 | mode->flags = sdev->pdata->panel.mode.flags; | |
667 | ||
668 | drm_mode_set_name(mode); | |
669 | drm_mode_probed_add(connector, mode); | |
670 | ||
671 | connector->display_info.width_mm = sdev->pdata->panel.width_mm; | |
672 | connector->display_info.height_mm = sdev->pdata->panel.height_mm; | |
673 | ||
674 | return 1; | |
675 | } | |
676 | ||
51c13278 LP |
677 | static struct drm_encoder * |
678 | shmob_drm_connector_best_encoder(struct drm_connector *connector) | |
679 | { | |
680 | struct shmob_drm_connector *scon = to_shmob_connector(connector); | |
681 | ||
682 | return scon->encoder; | |
683 | } | |
684 | ||
685 | static const struct drm_connector_helper_funcs connector_helper_funcs = { | |
686 | .get_modes = shmob_drm_connector_get_modes, | |
51c13278 LP |
687 | .best_encoder = shmob_drm_connector_best_encoder, |
688 | }; | |
689 | ||
690 | static void shmob_drm_connector_destroy(struct drm_connector *connector) | |
691 | { | |
692 | struct shmob_drm_connector *scon = to_shmob_connector(connector); | |
693 | ||
694 | shmob_drm_backlight_exit(scon); | |
34ea3d38 | 695 | drm_connector_unregister(connector); |
51c13278 LP |
696 | drm_connector_cleanup(connector); |
697 | } | |
698 | ||
699 | static enum drm_connector_status | |
700 | shmob_drm_connector_detect(struct drm_connector *connector, bool force) | |
701 | { | |
702 | return connector_status_connected; | |
703 | } | |
704 | ||
705 | static const struct drm_connector_funcs connector_funcs = { | |
706 | .dpms = drm_helper_connector_dpms, | |
707 | .detect = shmob_drm_connector_detect, | |
708 | .fill_modes = drm_helper_probe_single_connector_modes, | |
709 | .destroy = shmob_drm_connector_destroy, | |
710 | }; | |
711 | ||
712 | int shmob_drm_connector_create(struct shmob_drm_device *sdev, | |
713 | struct drm_encoder *encoder) | |
714 | { | |
715 | struct drm_connector *connector = &sdev->connector.connector; | |
716 | int ret; | |
717 | ||
718 | sdev->connector.encoder = encoder; | |
719 | ||
720 | connector->display_info.width_mm = sdev->pdata->panel.width_mm; | |
721 | connector->display_info.height_mm = sdev->pdata->panel.height_mm; | |
722 | ||
723 | ret = drm_connector_init(sdev->ddev, connector, &connector_funcs, | |
724 | DRM_MODE_CONNECTOR_LVDS); | |
725 | if (ret < 0) | |
726 | return ret; | |
727 | ||
728 | drm_connector_helper_add(connector, &connector_helper_funcs); | |
34ea3d38 | 729 | ret = drm_connector_register(connector); |
51c13278 LP |
730 | if (ret < 0) |
731 | goto err_cleanup; | |
732 | ||
733 | ret = shmob_drm_backlight_init(&sdev->connector); | |
734 | if (ret < 0) | |
735 | goto err_sysfs; | |
736 | ||
737 | ret = drm_mode_connector_attach_encoder(connector, encoder); | |
738 | if (ret < 0) | |
739 | goto err_backlight; | |
740 | ||
741 | connector->encoder = encoder; | |
742 | ||
743 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF); | |
c708a56d | 744 | drm_object_property_set_value(&connector->base, |
51c13278 LP |
745 | sdev->ddev->mode_config.dpms_property, DRM_MODE_DPMS_OFF); |
746 | ||
747 | return 0; | |
748 | ||
749 | err_backlight: | |
750 | shmob_drm_backlight_exit(&sdev->connector); | |
751 | err_sysfs: | |
34ea3d38 | 752 | drm_connector_unregister(connector); |
51c13278 LP |
753 | err_cleanup: |
754 | drm_connector_cleanup(connector); | |
755 | return ret; | |
756 | } |