Commit | Line | Data |
---|---|---|
51c13278 LP |
1 | /* |
2 | * shmob_drm_crtc.c -- SH Mobile DRM CRTCs | |
3 | * | |
9588b826 | 4 | * Copyright (C) 2012 Renesas Electronics Corporation |
51c13278 LP |
5 | * |
6 | * Laurent Pinchart (laurent.pinchart@ideasonboard.com) | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | */ | |
13 | ||
14 | #include <linux/backlight.h> | |
15 | #include <linux/clk.h> | |
16 | ||
17 | #include <drm/drmP.h> | |
18 | #include <drm/drm_crtc.h> | |
19 | #include <drm/drm_crtc_helper.h> | |
20 | #include <drm/drm_fb_cma_helper.h> | |
21 | #include <drm/drm_gem_cma_helper.h> | |
3cb9ae4f | 22 | #include <drm/drm_plane_helper.h> |
51c13278 LP |
23 | |
24 | #include <video/sh_mobile_meram.h> | |
25 | ||
26 | #include "shmob_drm_backlight.h" | |
27 | #include "shmob_drm_crtc.h" | |
28 | #include "shmob_drm_drv.h" | |
29 | #include "shmob_drm_kms.h" | |
30 | #include "shmob_drm_plane.h" | |
31 | #include "shmob_drm_regs.h" | |
32 | ||
33 | /* | |
34 | * TODO: panel support | |
35 | */ | |
36 | ||
37 | /* ----------------------------------------------------------------------------- | |
38 | * Clock management | |
39 | */ | |
40 | ||
c0c72a85 | 41 | static int shmob_drm_clk_on(struct shmob_drm_device *sdev) |
51c13278 | 42 | { |
c0c72a85 LP |
43 | int ret; |
44 | ||
45 | if (sdev->clock) { | |
46 | ret = clk_prepare_enable(sdev->clock); | |
47 | if (ret < 0) | |
48 | return ret; | |
49 | } | |
51c13278 LP |
50 | #if 0 |
51 | if (sdev->meram_dev && sdev->meram_dev->pdev) | |
52 | pm_runtime_get_sync(&sdev->meram_dev->pdev->dev); | |
53 | #endif | |
c0c72a85 LP |
54 | |
55 | return 0; | |
51c13278 LP |
56 | } |
57 | ||
58 | static void shmob_drm_clk_off(struct shmob_drm_device *sdev) | |
59 | { | |
60 | #if 0 | |
61 | if (sdev->meram_dev && sdev->meram_dev->pdev) | |
62 | pm_runtime_put_sync(&sdev->meram_dev->pdev->dev); | |
63 | #endif | |
64 | if (sdev->clock) | |
8d01e1ef | 65 | clk_disable_unprepare(sdev->clock); |
51c13278 LP |
66 | } |
67 | ||
68 | /* ----------------------------------------------------------------------------- | |
69 | * CRTC | |
70 | */ | |
71 | ||
72 | static void shmob_drm_crtc_setup_geometry(struct shmob_drm_crtc *scrtc) | |
73 | { | |
74 | struct drm_crtc *crtc = &scrtc->crtc; | |
75 | struct shmob_drm_device *sdev = crtc->dev->dev_private; | |
76 | const struct shmob_drm_interface_data *idata = &sdev->pdata->iface; | |
77 | const struct drm_display_mode *mode = &crtc->mode; | |
78 | u32 value; | |
79 | ||
80 | value = sdev->ldmt1r | |
81 | | ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? 0 : LDMT1R_VPOL) | |
82 | | ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? 0 : LDMT1R_HPOL) | |
83 | | ((idata->flags & SHMOB_DRM_IFACE_FL_DWPOL) ? LDMT1R_DWPOL : 0) | |
84 | | ((idata->flags & SHMOB_DRM_IFACE_FL_DIPOL) ? LDMT1R_DIPOL : 0) | |
85 | | ((idata->flags & SHMOB_DRM_IFACE_FL_DAPOL) ? LDMT1R_DAPOL : 0) | |
86 | | ((idata->flags & SHMOB_DRM_IFACE_FL_HSCNT) ? LDMT1R_HSCNT : 0) | |
87 | | ((idata->flags & SHMOB_DRM_IFACE_FL_DWCNT) ? LDMT1R_DWCNT : 0); | |
88 | lcdc_write(sdev, LDMT1R, value); | |
89 | ||
90 | if (idata->interface >= SHMOB_DRM_IFACE_SYS8A && | |
91 | idata->interface <= SHMOB_DRM_IFACE_SYS24) { | |
92 | /* Setup SYS bus. */ | |
93 | value = (idata->sys.cs_setup << LDMT2R_CSUP_SHIFT) | |
94 | | (idata->sys.vsync_active_high ? LDMT2R_RSV : 0) | |
95 | | (idata->sys.vsync_dir_input ? LDMT2R_VSEL : 0) | |
96 | | (idata->sys.write_setup << LDMT2R_WCSC_SHIFT) | |
97 | | (idata->sys.write_cycle << LDMT2R_WCEC_SHIFT) | |
98 | | (idata->sys.write_strobe << LDMT2R_WCLW_SHIFT); | |
99 | lcdc_write(sdev, LDMT2R, value); | |
100 | ||
101 | value = (idata->sys.read_latch << LDMT3R_RDLC_SHIFT) | |
102 | | (idata->sys.read_setup << LDMT3R_RCSC_SHIFT) | |
103 | | (idata->sys.read_cycle << LDMT3R_RCEC_SHIFT) | |
104 | | (idata->sys.read_strobe << LDMT3R_RCLW_SHIFT); | |
105 | lcdc_write(sdev, LDMT3R, value); | |
106 | } | |
107 | ||
108 | value = ((mode->hdisplay / 8) << 16) /* HDCN */ | |
109 | | (mode->htotal / 8); /* HTCN */ | |
110 | lcdc_write(sdev, LDHCNR, value); | |
111 | ||
112 | value = (((mode->hsync_end - mode->hsync_start) / 8) << 16) /* HSYNW */ | |
113 | | (mode->hsync_start / 8); /* HSYNP */ | |
114 | lcdc_write(sdev, LDHSYNR, value); | |
115 | ||
116 | value = ((mode->hdisplay & 7) << 24) | ((mode->htotal & 7) << 16) | |
117 | | (((mode->hsync_end - mode->hsync_start) & 7) << 8) | |
118 | | (mode->hsync_start & 7); | |
119 | lcdc_write(sdev, LDHAJR, value); | |
120 | ||
121 | value = ((mode->vdisplay) << 16) /* VDLN */ | |
122 | | mode->vtotal; /* VTLN */ | |
123 | lcdc_write(sdev, LDVLNR, value); | |
124 | ||
125 | value = ((mode->vsync_end - mode->vsync_start) << 16) /* VSYNW */ | |
126 | | mode->vsync_start; /* VSYNP */ | |
127 | lcdc_write(sdev, LDVSYNR, value); | |
128 | } | |
129 | ||
130 | static void shmob_drm_crtc_start_stop(struct shmob_drm_crtc *scrtc, bool start) | |
131 | { | |
132 | struct shmob_drm_device *sdev = scrtc->crtc.dev->dev_private; | |
133 | u32 value; | |
134 | ||
135 | value = lcdc_read(sdev, LDCNT2R); | |
136 | if (start) | |
137 | lcdc_write(sdev, LDCNT2R, value | LDCNT2R_DO); | |
138 | else | |
139 | lcdc_write(sdev, LDCNT2R, value & ~LDCNT2R_DO); | |
140 | ||
141 | /* Wait until power is applied/stopped. */ | |
142 | while (1) { | |
143 | value = lcdc_read(sdev, LDPMR) & LDPMR_LPS; | |
144 | if ((start && value) || (!start && !value)) | |
145 | break; | |
146 | ||
147 | cpu_relax(); | |
148 | } | |
149 | ||
150 | if (!start) { | |
151 | /* Stop the dot clock. */ | |
152 | lcdc_write(sdev, LDDCKSTPR, LDDCKSTPR_DCKSTP); | |
153 | } | |
154 | } | |
155 | ||
156 | /* | |
157 | * shmob_drm_crtc_start - Configure and start the LCDC | |
158 | * @scrtc: the SH Mobile CRTC | |
159 | * | |
160 | * Configure and start the LCDC device. External devices (clocks, MERAM, panels, | |
161 | * ...) are not touched by this function. | |
162 | */ | |
163 | static void shmob_drm_crtc_start(struct shmob_drm_crtc *scrtc) | |
164 | { | |
165 | struct drm_crtc *crtc = &scrtc->crtc; | |
166 | struct shmob_drm_device *sdev = crtc->dev->dev_private; | |
167 | const struct shmob_drm_interface_data *idata = &sdev->pdata->iface; | |
168 | const struct shmob_drm_format_info *format; | |
169 | struct drm_device *dev = sdev->ddev; | |
170 | struct drm_plane *plane; | |
171 | u32 value; | |
c0c72a85 | 172 | int ret; |
51c13278 LP |
173 | |
174 | if (scrtc->started) | |
175 | return; | |
176 | ||
f4510a27 | 177 | format = shmob_drm_format_info(crtc->primary->fb->pixel_format); |
51c13278 LP |
178 | if (WARN_ON(format == NULL)) |
179 | return; | |
180 | ||
181 | /* Enable clocks before accessing the hardware. */ | |
c0c72a85 LP |
182 | ret = shmob_drm_clk_on(sdev); |
183 | if (ret < 0) | |
184 | return; | |
51c13278 LP |
185 | |
186 | /* Reset and enable the LCDC. */ | |
187 | lcdc_write(sdev, LDCNT2R, lcdc_read(sdev, LDCNT2R) | LDCNT2R_BR); | |
188 | lcdc_wait_bit(sdev, LDCNT2R, LDCNT2R_BR, 0); | |
189 | lcdc_write(sdev, LDCNT2R, LDCNT2R_ME); | |
190 | ||
191 | /* Stop the LCDC first and disable all interrupts. */ | |
192 | shmob_drm_crtc_start_stop(scrtc, false); | |
193 | lcdc_write(sdev, LDINTR, 0); | |
194 | ||
195 | /* Configure power supply, dot clocks and start them. */ | |
196 | lcdc_write(sdev, LDPMR, 0); | |
197 | ||
198 | value = sdev->lddckr; | |
199 | if (idata->clk_div) { | |
200 | /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider | |
201 | * denominator. | |
202 | */ | |
203 | lcdc_write(sdev, LDDCKPAT1R, 0); | |
204 | lcdc_write(sdev, LDDCKPAT2R, (1 << (idata->clk_div / 2)) - 1); | |
205 | ||
206 | if (idata->clk_div == 1) | |
207 | value |= LDDCKR_MOSEL; | |
208 | else | |
209 | value |= idata->clk_div; | |
210 | } | |
211 | ||
212 | lcdc_write(sdev, LDDCKR, value); | |
213 | lcdc_write(sdev, LDDCKSTPR, 0); | |
214 | lcdc_wait_bit(sdev, LDDCKSTPR, ~0, 0); | |
215 | ||
216 | /* TODO: Setup SYS panel */ | |
217 | ||
218 | /* Setup geometry, format, frame buffer memory and operation mode. */ | |
219 | shmob_drm_crtc_setup_geometry(scrtc); | |
220 | ||
221 | /* TODO: Handle YUV colorspaces. Hardcode REC709 for now. */ | |
222 | lcdc_write(sdev, LDDFR, format->lddfr | LDDFR_CF1); | |
223 | lcdc_write(sdev, LDMLSR, scrtc->line_size); | |
224 | lcdc_write(sdev, LDSA1R, scrtc->dma[0]); | |
225 | if (format->yuv) | |
226 | lcdc_write(sdev, LDSA2R, scrtc->dma[1]); | |
227 | lcdc_write(sdev, LDSM1R, 0); | |
228 | ||
229 | /* Word and long word swap. */ | |
230 | switch (format->fourcc) { | |
231 | case DRM_FORMAT_RGB565: | |
232 | case DRM_FORMAT_NV21: | |
233 | case DRM_FORMAT_NV61: | |
234 | case DRM_FORMAT_NV42: | |
235 | value = LDDDSR_LS | LDDDSR_WS; | |
236 | break; | |
237 | case DRM_FORMAT_RGB888: | |
238 | case DRM_FORMAT_NV12: | |
239 | case DRM_FORMAT_NV16: | |
240 | case DRM_FORMAT_NV24: | |
241 | value = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS; | |
242 | break; | |
243 | case DRM_FORMAT_ARGB8888: | |
244 | default: | |
245 | value = LDDDSR_LS; | |
246 | break; | |
247 | } | |
248 | lcdc_write(sdev, LDDDSR, value); | |
249 | ||
250 | /* Setup planes. */ | |
4ea50e99 | 251 | drm_for_each_legacy_plane(plane, dev) { |
51c13278 LP |
252 | if (plane->crtc == crtc) |
253 | shmob_drm_plane_setup(plane); | |
254 | } | |
255 | ||
256 | /* Enable the display output. */ | |
257 | lcdc_write(sdev, LDCNT1R, LDCNT1R_DE); | |
258 | ||
259 | shmob_drm_crtc_start_stop(scrtc, true); | |
260 | ||
261 | scrtc->started = true; | |
262 | } | |
263 | ||
264 | static void shmob_drm_crtc_stop(struct shmob_drm_crtc *scrtc) | |
265 | { | |
266 | struct drm_crtc *crtc = &scrtc->crtc; | |
267 | struct shmob_drm_device *sdev = crtc->dev->dev_private; | |
268 | ||
269 | if (!scrtc->started) | |
270 | return; | |
271 | ||
272 | /* Disable the MERAM cache. */ | |
273 | if (scrtc->cache) { | |
274 | sh_mobile_meram_cache_free(sdev->meram, scrtc->cache); | |
275 | scrtc->cache = NULL; | |
276 | } | |
277 | ||
278 | /* Stop the LCDC. */ | |
279 | shmob_drm_crtc_start_stop(scrtc, false); | |
280 | ||
281 | /* Disable the display output. */ | |
282 | lcdc_write(sdev, LDCNT1R, 0); | |
283 | ||
284 | /* Stop clocks. */ | |
285 | shmob_drm_clk_off(sdev); | |
286 | ||
287 | scrtc->started = false; | |
288 | } | |
289 | ||
290 | void shmob_drm_crtc_suspend(struct shmob_drm_crtc *scrtc) | |
291 | { | |
292 | shmob_drm_crtc_stop(scrtc); | |
293 | } | |
294 | ||
295 | void shmob_drm_crtc_resume(struct shmob_drm_crtc *scrtc) | |
296 | { | |
297 | if (scrtc->dpms != DRM_MODE_DPMS_ON) | |
298 | return; | |
299 | ||
300 | shmob_drm_crtc_start(scrtc); | |
301 | } | |
302 | ||
303 | static void shmob_drm_crtc_compute_base(struct shmob_drm_crtc *scrtc, | |
304 | int x, int y) | |
305 | { | |
306 | struct drm_crtc *crtc = &scrtc->crtc; | |
f4510a27 | 307 | struct drm_framebuffer *fb = crtc->primary->fb; |
51c13278 LP |
308 | struct shmob_drm_device *sdev = crtc->dev->dev_private; |
309 | struct drm_gem_cma_object *gem; | |
310 | unsigned int bpp; | |
311 | ||
312 | bpp = scrtc->format->yuv ? 8 : scrtc->format->bpp; | |
313 | gem = drm_fb_cma_get_gem_obj(fb, 0); | |
314 | scrtc->dma[0] = gem->paddr + fb->offsets[0] | |
315 | + y * fb->pitches[0] + x * bpp / 8; | |
316 | ||
317 | if (scrtc->format->yuv) { | |
318 | bpp = scrtc->format->bpp - 8; | |
319 | gem = drm_fb_cma_get_gem_obj(fb, 1); | |
320 | scrtc->dma[1] = gem->paddr + fb->offsets[1] | |
321 | + y / (bpp == 4 ? 2 : 1) * fb->pitches[1] | |
322 | + x * (bpp == 16 ? 2 : 1); | |
323 | } | |
324 | ||
325 | if (scrtc->cache) | |
326 | sh_mobile_meram_cache_update(sdev->meram, scrtc->cache, | |
327 | scrtc->dma[0], scrtc->dma[1], | |
328 | &scrtc->dma[0], &scrtc->dma[1]); | |
329 | } | |
330 | ||
331 | static void shmob_drm_crtc_update_base(struct shmob_drm_crtc *scrtc) | |
332 | { | |
333 | struct drm_crtc *crtc = &scrtc->crtc; | |
334 | struct shmob_drm_device *sdev = crtc->dev->dev_private; | |
335 | ||
336 | shmob_drm_crtc_compute_base(scrtc, crtc->x, crtc->y); | |
337 | ||
338 | lcdc_write_mirror(sdev, LDSA1R, scrtc->dma[0]); | |
339 | if (scrtc->format->yuv) | |
340 | lcdc_write_mirror(sdev, LDSA2R, scrtc->dma[1]); | |
341 | ||
342 | lcdc_write(sdev, LDRCNTR, lcdc_read(sdev, LDRCNTR) ^ LDRCNTR_MRS); | |
343 | } | |
344 | ||
345 | #define to_shmob_crtc(c) container_of(c, struct shmob_drm_crtc, crtc) | |
346 | ||
347 | static void shmob_drm_crtc_dpms(struct drm_crtc *crtc, int mode) | |
348 | { | |
349 | struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc); | |
350 | ||
351 | if (scrtc->dpms == mode) | |
352 | return; | |
353 | ||
354 | if (mode == DRM_MODE_DPMS_ON) | |
355 | shmob_drm_crtc_start(scrtc); | |
356 | else | |
357 | shmob_drm_crtc_stop(scrtc); | |
358 | ||
359 | scrtc->dpms = mode; | |
360 | } | |
361 | ||
51c13278 LP |
362 | static void shmob_drm_crtc_mode_prepare(struct drm_crtc *crtc) |
363 | { | |
364 | shmob_drm_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); | |
365 | } | |
366 | ||
367 | static int shmob_drm_crtc_mode_set(struct drm_crtc *crtc, | |
368 | struct drm_display_mode *mode, | |
369 | struct drm_display_mode *adjusted_mode, | |
370 | int x, int y, | |
371 | struct drm_framebuffer *old_fb) | |
372 | { | |
373 | struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc); | |
374 | struct shmob_drm_device *sdev = crtc->dev->dev_private; | |
375 | const struct sh_mobile_meram_cfg *mdata = sdev->pdata->meram; | |
376 | const struct shmob_drm_format_info *format; | |
377 | void *cache; | |
378 | ||
f4510a27 | 379 | format = shmob_drm_format_info(crtc->primary->fb->pixel_format); |
51c13278 LP |
380 | if (format == NULL) { |
381 | dev_dbg(sdev->dev, "mode_set: unsupported format %08x\n", | |
f4510a27 | 382 | crtc->primary->fb->pixel_format); |
51c13278 LP |
383 | return -EINVAL; |
384 | } | |
385 | ||
386 | scrtc->format = format; | |
f4510a27 | 387 | scrtc->line_size = crtc->primary->fb->pitches[0]; |
51c13278 LP |
388 | |
389 | if (sdev->meram) { | |
390 | /* Enable MERAM cache if configured. We need to de-init | |
391 | * configured ICBs before we can re-initialize them. | |
392 | */ | |
393 | if (scrtc->cache) { | |
394 | sh_mobile_meram_cache_free(sdev->meram, scrtc->cache); | |
395 | scrtc->cache = NULL; | |
396 | } | |
397 | ||
398 | cache = sh_mobile_meram_cache_alloc(sdev->meram, mdata, | |
f4510a27 | 399 | crtc->primary->fb->pitches[0], |
51c13278 LP |
400 | adjusted_mode->vdisplay, |
401 | format->meram, | |
402 | &scrtc->line_size); | |
403 | if (!IS_ERR(cache)) | |
404 | scrtc->cache = cache; | |
405 | } | |
406 | ||
407 | shmob_drm_crtc_compute_base(scrtc, x, y); | |
408 | ||
409 | return 0; | |
410 | } | |
411 | ||
412 | static void shmob_drm_crtc_mode_commit(struct drm_crtc *crtc) | |
413 | { | |
414 | shmob_drm_crtc_dpms(crtc, DRM_MODE_DPMS_ON); | |
415 | } | |
416 | ||
417 | static int shmob_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, | |
418 | struct drm_framebuffer *old_fb) | |
419 | { | |
420 | shmob_drm_crtc_update_base(to_shmob_crtc(crtc)); | |
421 | ||
422 | return 0; | |
423 | } | |
424 | ||
425 | static const struct drm_crtc_helper_funcs crtc_helper_funcs = { | |
426 | .dpms = shmob_drm_crtc_dpms, | |
51c13278 LP |
427 | .prepare = shmob_drm_crtc_mode_prepare, |
428 | .commit = shmob_drm_crtc_mode_commit, | |
429 | .mode_set = shmob_drm_crtc_mode_set, | |
430 | .mode_set_base = shmob_drm_crtc_mode_set_base, | |
431 | }; | |
432 | ||
51c13278 LP |
433 | void shmob_drm_crtc_finish_page_flip(struct shmob_drm_crtc *scrtc) |
434 | { | |
435 | struct drm_pending_vblank_event *event; | |
436 | struct drm_device *dev = scrtc->crtc.dev; | |
51c13278 LP |
437 | unsigned long flags; |
438 | ||
439 | spin_lock_irqsave(&dev->event_lock, flags); | |
440 | event = scrtc->event; | |
441 | scrtc->event = NULL; | |
f7e96d7e | 442 | if (event) { |
c05d3d73 | 443 | drm_crtc_send_vblank_event(&scrtc->crtc, event); |
097f0ab4 | 444 | drm_crtc_vblank_put(&scrtc->crtc); |
f7e96d7e | 445 | } |
51c13278 | 446 | spin_unlock_irqrestore(&dev->event_lock, flags); |
51c13278 LP |
447 | } |
448 | ||
449 | static int shmob_drm_crtc_page_flip(struct drm_crtc *crtc, | |
450 | struct drm_framebuffer *fb, | |
ed8d1975 KP |
451 | struct drm_pending_vblank_event *event, |
452 | uint32_t page_flip_flags) | |
51c13278 LP |
453 | { |
454 | struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc); | |
455 | struct drm_device *dev = scrtc->crtc.dev; | |
456 | unsigned long flags; | |
457 | ||
458 | spin_lock_irqsave(&dev->event_lock, flags); | |
459 | if (scrtc->event != NULL) { | |
460 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
461 | return -EBUSY; | |
462 | } | |
463 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
464 | ||
f4510a27 | 465 | crtc->primary->fb = fb; |
51c13278 LP |
466 | shmob_drm_crtc_update_base(scrtc); |
467 | ||
468 | if (event) { | |
469 | event->pipe = 0; | |
097f0ab4 | 470 | drm_crtc_vblank_get(&scrtc->crtc); |
51c13278 LP |
471 | spin_lock_irqsave(&dev->event_lock, flags); |
472 | scrtc->event = event; | |
473 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
51c13278 LP |
474 | } |
475 | ||
476 | return 0; | |
477 | } | |
478 | ||
479 | static const struct drm_crtc_funcs crtc_funcs = { | |
480 | .destroy = drm_crtc_cleanup, | |
481 | .set_config = drm_crtc_helper_set_config, | |
482 | .page_flip = shmob_drm_crtc_page_flip, | |
483 | }; | |
484 | ||
485 | int shmob_drm_crtc_create(struct shmob_drm_device *sdev) | |
486 | { | |
487 | struct drm_crtc *crtc = &sdev->crtc.crtc; | |
488 | int ret; | |
489 | ||
490 | sdev->crtc.dpms = DRM_MODE_DPMS_OFF; | |
491 | ||
492 | ret = drm_crtc_init(sdev->ddev, crtc, &crtc_funcs); | |
493 | if (ret < 0) | |
494 | return ret; | |
495 | ||
496 | drm_crtc_helper_add(crtc, &crtc_helper_funcs); | |
497 | ||
498 | return 0; | |
499 | } | |
500 | ||
501 | /* ----------------------------------------------------------------------------- | |
502 | * Encoder | |
503 | */ | |
504 | ||
505 | #define to_shmob_encoder(e) \ | |
506 | container_of(e, struct shmob_drm_encoder, encoder) | |
507 | ||
508 | static void shmob_drm_encoder_dpms(struct drm_encoder *encoder, int mode) | |
509 | { | |
510 | struct shmob_drm_encoder *senc = to_shmob_encoder(encoder); | |
511 | struct shmob_drm_device *sdev = encoder->dev->dev_private; | |
512 | struct shmob_drm_connector *scon = &sdev->connector; | |
513 | ||
514 | if (senc->dpms == mode) | |
515 | return; | |
516 | ||
517 | shmob_drm_backlight_dpms(scon, mode); | |
518 | ||
519 | senc->dpms = mode; | |
520 | } | |
521 | ||
522 | static bool shmob_drm_encoder_mode_fixup(struct drm_encoder *encoder, | |
523 | const struct drm_display_mode *mode, | |
524 | struct drm_display_mode *adjusted_mode) | |
525 | { | |
526 | struct drm_device *dev = encoder->dev; | |
527 | struct shmob_drm_device *sdev = dev->dev_private; | |
528 | struct drm_connector *connector = &sdev->connector.connector; | |
529 | const struct drm_display_mode *panel_mode; | |
530 | ||
531 | if (list_empty(&connector->modes)) { | |
532 | dev_dbg(dev->dev, "mode_fixup: empty modes list\n"); | |
533 | return false; | |
534 | } | |
535 | ||
536 | /* The flat panel mode is fixed, just copy it to the adjusted mode. */ | |
537 | panel_mode = list_first_entry(&connector->modes, | |
538 | struct drm_display_mode, head); | |
539 | drm_mode_copy(adjusted_mode, panel_mode); | |
540 | ||
541 | return true; | |
542 | } | |
543 | ||
544 | static void shmob_drm_encoder_mode_prepare(struct drm_encoder *encoder) | |
545 | { | |
546 | /* No-op, everything is handled in the CRTC code. */ | |
547 | } | |
548 | ||
549 | static void shmob_drm_encoder_mode_set(struct drm_encoder *encoder, | |
550 | struct drm_display_mode *mode, | |
551 | struct drm_display_mode *adjusted_mode) | |
552 | { | |
553 | /* No-op, everything is handled in the CRTC code. */ | |
554 | } | |
555 | ||
556 | static void shmob_drm_encoder_mode_commit(struct drm_encoder *encoder) | |
557 | { | |
558 | /* No-op, everything is handled in the CRTC code. */ | |
559 | } | |
560 | ||
561 | static const struct drm_encoder_helper_funcs encoder_helper_funcs = { | |
562 | .dpms = shmob_drm_encoder_dpms, | |
563 | .mode_fixup = shmob_drm_encoder_mode_fixup, | |
564 | .prepare = shmob_drm_encoder_mode_prepare, | |
565 | .commit = shmob_drm_encoder_mode_commit, | |
566 | .mode_set = shmob_drm_encoder_mode_set, | |
567 | }; | |
568 | ||
569 | static void shmob_drm_encoder_destroy(struct drm_encoder *encoder) | |
570 | { | |
571 | drm_encoder_cleanup(encoder); | |
572 | } | |
573 | ||
574 | static const struct drm_encoder_funcs encoder_funcs = { | |
575 | .destroy = shmob_drm_encoder_destroy, | |
576 | }; | |
577 | ||
578 | int shmob_drm_encoder_create(struct shmob_drm_device *sdev) | |
579 | { | |
580 | struct drm_encoder *encoder = &sdev->encoder.encoder; | |
581 | int ret; | |
582 | ||
583 | sdev->encoder.dpms = DRM_MODE_DPMS_OFF; | |
584 | ||
585 | encoder->possible_crtcs = 1; | |
586 | ||
587 | ret = drm_encoder_init(sdev->ddev, encoder, &encoder_funcs, | |
13a3d91f | 588 | DRM_MODE_ENCODER_LVDS, NULL); |
51c13278 LP |
589 | if (ret < 0) |
590 | return ret; | |
591 | ||
592 | drm_encoder_helper_add(encoder, &encoder_helper_funcs); | |
593 | ||
594 | return 0; | |
595 | } | |
596 | ||
597 | void shmob_drm_crtc_enable_vblank(struct shmob_drm_device *sdev, bool enable) | |
598 | { | |
599 | unsigned long flags; | |
600 | u32 ldintr; | |
601 | ||
602 | /* Be careful not to acknowledge any pending interrupt. */ | |
603 | spin_lock_irqsave(&sdev->irq_lock, flags); | |
604 | ldintr = lcdc_read(sdev, LDINTR) | LDINTR_STATUS_MASK; | |
605 | if (enable) | |
606 | ldintr |= LDINTR_VEE; | |
607 | else | |
608 | ldintr &= ~LDINTR_VEE; | |
609 | lcdc_write(sdev, LDINTR, ldintr); | |
610 | spin_unlock_irqrestore(&sdev->irq_lock, flags); | |
611 | } | |
612 | ||
613 | /* ----------------------------------------------------------------------------- | |
614 | * Connector | |
615 | */ | |
616 | ||
617 | #define to_shmob_connector(c) \ | |
618 | container_of(c, struct shmob_drm_connector, connector) | |
619 | ||
620 | static int shmob_drm_connector_get_modes(struct drm_connector *connector) | |
621 | { | |
622 | struct shmob_drm_device *sdev = connector->dev->dev_private; | |
623 | struct drm_display_mode *mode; | |
624 | ||
625 | mode = drm_mode_create(connector->dev); | |
626 | if (mode == NULL) | |
627 | return 0; | |
628 | ||
629 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | |
630 | mode->clock = sdev->pdata->panel.mode.clock; | |
631 | mode->hdisplay = sdev->pdata->panel.mode.hdisplay; | |
632 | mode->hsync_start = sdev->pdata->panel.mode.hsync_start; | |
633 | mode->hsync_end = sdev->pdata->panel.mode.hsync_end; | |
634 | mode->htotal = sdev->pdata->panel.mode.htotal; | |
635 | mode->vdisplay = sdev->pdata->panel.mode.vdisplay; | |
636 | mode->vsync_start = sdev->pdata->panel.mode.vsync_start; | |
637 | mode->vsync_end = sdev->pdata->panel.mode.vsync_end; | |
638 | mode->vtotal = sdev->pdata->panel.mode.vtotal; | |
639 | mode->flags = sdev->pdata->panel.mode.flags; | |
640 | ||
641 | drm_mode_set_name(mode); | |
642 | drm_mode_probed_add(connector, mode); | |
643 | ||
644 | connector->display_info.width_mm = sdev->pdata->panel.width_mm; | |
645 | connector->display_info.height_mm = sdev->pdata->panel.height_mm; | |
646 | ||
647 | return 1; | |
648 | } | |
649 | ||
51c13278 LP |
650 | static struct drm_encoder * |
651 | shmob_drm_connector_best_encoder(struct drm_connector *connector) | |
652 | { | |
653 | struct shmob_drm_connector *scon = to_shmob_connector(connector); | |
654 | ||
655 | return scon->encoder; | |
656 | } | |
657 | ||
658 | static const struct drm_connector_helper_funcs connector_helper_funcs = { | |
659 | .get_modes = shmob_drm_connector_get_modes, | |
51c13278 LP |
660 | .best_encoder = shmob_drm_connector_best_encoder, |
661 | }; | |
662 | ||
663 | static void shmob_drm_connector_destroy(struct drm_connector *connector) | |
664 | { | |
665 | struct shmob_drm_connector *scon = to_shmob_connector(connector); | |
666 | ||
667 | shmob_drm_backlight_exit(scon); | |
34ea3d38 | 668 | drm_connector_unregister(connector); |
51c13278 LP |
669 | drm_connector_cleanup(connector); |
670 | } | |
671 | ||
672 | static enum drm_connector_status | |
673 | shmob_drm_connector_detect(struct drm_connector *connector, bool force) | |
674 | { | |
675 | return connector_status_connected; | |
676 | } | |
677 | ||
678 | static const struct drm_connector_funcs connector_funcs = { | |
679 | .dpms = drm_helper_connector_dpms, | |
680 | .detect = shmob_drm_connector_detect, | |
681 | .fill_modes = drm_helper_probe_single_connector_modes, | |
682 | .destroy = shmob_drm_connector_destroy, | |
683 | }; | |
684 | ||
685 | int shmob_drm_connector_create(struct shmob_drm_device *sdev, | |
686 | struct drm_encoder *encoder) | |
687 | { | |
688 | struct drm_connector *connector = &sdev->connector.connector; | |
689 | int ret; | |
690 | ||
691 | sdev->connector.encoder = encoder; | |
692 | ||
693 | connector->display_info.width_mm = sdev->pdata->panel.width_mm; | |
694 | connector->display_info.height_mm = sdev->pdata->panel.height_mm; | |
695 | ||
696 | ret = drm_connector_init(sdev->ddev, connector, &connector_funcs, | |
697 | DRM_MODE_CONNECTOR_LVDS); | |
698 | if (ret < 0) | |
699 | return ret; | |
700 | ||
701 | drm_connector_helper_add(connector, &connector_helper_funcs); | |
34ea3d38 | 702 | ret = drm_connector_register(connector); |
51c13278 LP |
703 | if (ret < 0) |
704 | goto err_cleanup; | |
705 | ||
706 | ret = shmob_drm_backlight_init(&sdev->connector); | |
707 | if (ret < 0) | |
708 | goto err_sysfs; | |
709 | ||
710 | ret = drm_mode_connector_attach_encoder(connector, encoder); | |
711 | if (ret < 0) | |
712 | goto err_backlight; | |
713 | ||
51c13278 | 714 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF); |
c708a56d | 715 | drm_object_property_set_value(&connector->base, |
51c13278 LP |
716 | sdev->ddev->mode_config.dpms_property, DRM_MODE_DPMS_OFF); |
717 | ||
718 | return 0; | |
719 | ||
720 | err_backlight: | |
721 | shmob_drm_backlight_exit(&sdev->connector); | |
722 | err_sysfs: | |
34ea3d38 | 723 | drm_connector_unregister(connector); |
51c13278 LP |
724 | err_cleanup: |
725 | drm_connector_cleanup(connector); | |
726 | return ret; | |
727 | } |