[deliverable/linux.git] / drivers / gpu / drm / sti / sti_crtc.c

/*
 * Copyright (C) STMicroelectronics SA 2014
 * Authors: Benjamin Gaignard <benjamin.gaignard@st.com>
 *          Fabien Dessenne <fabien.dessenne@st.com>
 *          for STMicroelectronics.
 * License terms:  GNU General Public License (GPL), version 2
 */

#include <linux/clk.h>

#include <drm/drmP.h>
#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_plane_helper.h>

#include "sti_compositor.h"
#include "sti_crtc.h"
#include "sti_drv.h"
#include "sti_vid.h"
#include "sti_vtg.h"

static void sti_crtc_enable(struct drm_crtc *crtc)
{
	struct sti_mixer *mixer = to_sti_mixer(crtc);

	DRM_DEBUG_DRIVER("\n");

	mixer->status = STI_MIXER_READY;

	drm_crtc_vblank_on(crtc);
}

static void sti_crtc_disabling(struct drm_crtc *crtc)
{
	struct sti_mixer *mixer = to_sti_mixer(crtc);

	DRM_DEBUG_DRIVER("\n");

	mixer->status = STI_MIXER_DISABLING;
}

static int
sti_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode)
{
	struct sti_mixer *mixer = to_sti_mixer(crtc);
	struct device *dev = mixer->dev;
	struct sti_compositor *compo = dev_get_drvdata(dev);
	struct clk *compo_clk, *pix_clk;
	int rate = mode->clock * 1000;

	DRM_DEBUG_KMS("CRTC:%d (%s) mode:%d (%s)\n",
		      crtc->base.id, sti_mixer_to_str(mixer),
		      mode->base.id, mode->name);

	DRM_DEBUG_KMS("%d %d %d %d %d %d %d %d %d %d 0x%x 0x%x\n",
		      mode->vrefresh, mode->clock,
		      mode->hdisplay,
		      mode->hsync_start, mode->hsync_end,
		      mode->htotal,
		      mode->vdisplay,
		      mode->vsync_start, mode->vsync_end,
		      mode->vtotal, mode->type, mode->flags);

	if (mixer->id == STI_MIXER_MAIN) {
		compo_clk = compo->clk_compo_main;
		pix_clk = compo->clk_pix_main;
	} else {
		compo_clk = compo->clk_compo_aux;
		pix_clk = compo->clk_pix_aux;
	}

	/* Prepare and enable the compo IP clock */
	if (clk_prepare_enable(compo_clk)) {
		DRM_INFO("Failed to prepare/enable compositor clk\n");
		goto compo_error;
	}

	/* Set rate and prepare/enable pixel clock */
	if (clk_set_rate(pix_clk, rate) < 0) {
		DRM_ERROR("Cannot set rate (%dHz) for pix clk\n", rate);
		goto pix_error;
	}
	if (clk_prepare_enable(pix_clk)) {
		DRM_ERROR("Failed to prepare/enable pix clk\n");
		goto pix_error;
	}

	sti_vtg_set_config(mixer->id == STI_MIXER_MAIN ?
			compo->vtg_main : compo->vtg_aux, &crtc->mode);

	if (sti_mixer_active_video_area(mixer, &crtc->mode)) {
		DRM_ERROR("Can't set active video area\n");
		goto mixer_error;
	}

	return 0;

mixer_error:
	clk_disable_unprepare(pix_clk);
pix_error:
	clk_disable_unprepare(compo_clk);
compo_error:
	return -EINVAL;
}

static void sti_crtc_disable(struct drm_crtc *crtc)
{
	struct sti_mixer *mixer = to_sti_mixer(crtc);
	struct device *dev = mixer->dev;
	struct sti_compositor *compo = dev_get_drvdata(dev);

	DRM_DEBUG_KMS("CRTC:%d (%s)\n", crtc->base.id, sti_mixer_to_str(mixer));

	/* Disable Background */
	sti_mixer_set_background_status(mixer, false);

	drm_crtc_vblank_off(crtc);

	/* Disable pixel clock and compo IP clocks */
	if (mixer->id == STI_MIXER_MAIN) {
		clk_disable_unprepare(compo->clk_pix_main);
		clk_disable_unprepare(compo->clk_compo_main);
	} else {
		clk_disable_unprepare(compo->clk_pix_aux);
		clk_disable_unprepare(compo->clk_compo_aux);
	}

	mixer->status = STI_MIXER_DISABLED;
}

static void
sti_crtc_mode_set_nofb(struct drm_crtc *crtc)
{
	sti_crtc_mode_set(crtc, &crtc->state->adjusted_mode);
}

static void sti_crtc_atomic_begin(struct drm_crtc *crtc,
				  struct drm_crtc_state *old_crtc_state)
{
	struct sti_mixer *mixer = to_sti_mixer(crtc);

	if (crtc->state->event) {
		crtc->state->event->pipe = drm_crtc_index(crtc);

		WARN_ON(drm_crtc_vblank_get(crtc) != 0);

		mixer->pending_event = crtc->state->event;
		crtc->state->event = NULL;
	}
}

static void sti_crtc_atomic_flush(struct drm_crtc *crtc,
				  struct drm_crtc_state *old_crtc_state)
{
	struct drm_device *drm_dev = crtc->dev;
	struct sti_mixer *mixer = to_sti_mixer(crtc);
	struct sti_compositor *compo = dev_get_drvdata(mixer->dev);
	struct drm_plane *p;

	DRM_DEBUG_DRIVER("\n");

	/* perform plane actions */
	list_for_each_entry(p, &drm_dev->mode_config.plane_list, head) {
		struct sti_plane *plane = to_sti_plane(p);

		switch (plane->status) {
		case STI_PLANE_UPDATED:
			/* update planes tag as updated */
			DRM_DEBUG_DRIVER("update plane %s\n",
					 sti_plane_to_str(plane));

			if (sti_mixer_set_plane_depth(mixer, plane)) {
				DRM_ERROR("Cannot set plane %s depth\n",
					  sti_plane_to_str(plane));
				break;
			}

			if (sti_mixer_set_plane_status(mixer, plane, true)) {
				DRM_ERROR("Cannot enable plane %s at mixer\n",
					  sti_plane_to_str(plane));
				break;
			}

			/* if plane is HQVDP_0 then commit the vid[0] */
			if (plane->desc == STI_HQVDP_0)
				sti_vid_commit(compo->vid[0], p->state);

			plane->status = STI_PLANE_READY;

			break;
		case STI_PLANE_DISABLING:
			/* disabling sequence for planes tag as disabling */
			DRM_DEBUG_DRIVER("disable plane %s from mixer\n",
					 sti_plane_to_str(plane));

			if (sti_mixer_set_plane_status(mixer, plane, false)) {
				DRM_ERROR("Cannot disable plane %s at mixer\n",
					  sti_plane_to_str(plane));
				continue;
			}

			if (plane->desc == STI_CURSOR)
				/* tag plane status for disabled */
				plane->status = STI_PLANE_DISABLED;
			else
				/* tag plane status for flushing */
				plane->status = STI_PLANE_FLUSHING;

			/* if plane is HQVDP_0 then disable the vid[0] */
			if (plane->desc == STI_HQVDP_0)
				sti_vid_disable(compo->vid[0]);

			break;
		default:
			/* Other status case are not handled */
			break;
		}
	}
}

static const struct drm_crtc_helper_funcs sti_crtc_helper_funcs = {
	.enable = sti_crtc_enable,
	.disable = sti_crtc_disabling,
	.mode_set_nofb = sti_crtc_mode_set_nofb,
	.atomic_begin = sti_crtc_atomic_begin,
	.atomic_flush = sti_crtc_atomic_flush,
};

static void sti_crtc_destroy(struct drm_crtc *crtc)
{
	DRM_DEBUG_KMS("\n");
	drm_crtc_cleanup(crtc);
}

static int sti_crtc_set_property(struct drm_crtc *crtc,
				 struct drm_property *property,
				 uint64_t val)
{
	DRM_DEBUG_KMS("\n");
	return 0;
}

int sti_crtc_vblank_cb(struct notifier_block *nb,
		       unsigned long event, void *data)
{
	struct sti_compositor *compo =
		container_of(nb, struct sti_compositor, vtg_vblank_nb);
	struct drm_crtc *crtc = data;
	struct sti_mixer *mixer;
	unsigned long flags;
	struct sti_private *priv;
	unsigned int pipe;

	priv = crtc->dev->dev_private;
	pipe = drm_crtc_index(crtc);
	mixer = compo->mixer[pipe];

	if ((event != VTG_TOP_FIELD_EVENT) &&
	    (event != VTG_BOTTOM_FIELD_EVENT)) {
		DRM_ERROR("unknown event: %lu\n", event);
		return -EINVAL;
	}

	drm_crtc_handle_vblank(crtc);

	spin_lock_irqsave(&crtc->dev->event_lock, flags);
	if (mixer->pending_event) {
		drm_crtc_send_vblank_event(crtc, mixer->pending_event);
		drm_crtc_vblank_put(crtc);
		mixer->pending_event = NULL;
	}
	spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

	if (mixer->status == STI_MIXER_DISABLING) {
		struct drm_plane *p;

		/* Disable mixer only if all overlay planes (GDP and VDP)
		 * are disabled */
		list_for_each_entry(p, &crtc->dev->mode_config.plane_list,
				    head) {
			struct sti_plane *plane = to_sti_plane(p);

			if ((plane->desc & STI_PLANE_TYPE_MASK) <= STI_VDP)
				if (plane->status != STI_PLANE_DISABLED)
					return 0;
		}
		sti_crtc_disable(crtc);
	}

	return 0;
}

int sti_crtc_enable_vblank(struct drm_device *dev, unsigned int pipe)
{
	struct sti_private *dev_priv = dev->dev_private;
	struct sti_compositor *compo = dev_priv->compo;
	struct notifier_block *vtg_vblank_nb = &compo->vtg_vblank_nb;
	struct drm_crtc *crtc = &compo->mixer[pipe]->drm_crtc;

	DRM_DEBUG_DRIVER("\n");

	if (sti_vtg_register_client(pipe == STI_MIXER_MAIN ?
			compo->vtg_main : compo->vtg_aux,
			vtg_vblank_nb, crtc)) {
		DRM_ERROR("Cannot register VTG notifier\n");
		return -EINVAL;
	}

	return 0;
}

void sti_crtc_disable_vblank(struct drm_device *drm_dev, unsigned int pipe)
{
	struct sti_private *priv = drm_dev->dev_private;
	struct sti_compositor *compo = priv->compo;
	struct notifier_block *vtg_vblank_nb = &compo->vtg_vblank_nb;
	struct drm_crtc *crtc = &compo->mixer[pipe]->drm_crtc;

	DRM_DEBUG_DRIVER("\n");

	if (sti_vtg_unregister_client(pipe == STI_MIXER_MAIN ?
			compo->vtg_main : compo->vtg_aux, vtg_vblank_nb))
		DRM_DEBUG_DRIVER("Warning: cannot unregister VTG notifier\n");

	/* free the resources of the pending requests */
	if (compo->mixer[pipe]->pending_event) {
		drm_crtc_vblank_put(crtc);
		compo->mixer[pipe]->pending_event = NULL;
	}
}

static int sti_crtc_late_register(struct drm_crtc *crtc)
{
	struct sti_mixer *mixer = to_sti_mixer(crtc);
	struct sti_compositor *compo = dev_get_drvdata(mixer->dev);

	if (drm_crtc_index(crtc) == 0)
		return sti_compositor_debufs_init(compo, crtc->dev->primary);

	return 0;
}

static const struct drm_crtc_funcs sti_crtc_funcs = {
	.set_config = drm_atomic_helper_set_config,
	.page_flip = drm_atomic_helper_page_flip,
	.destroy = sti_crtc_destroy,
	.set_property = sti_crtc_set_property,
	.reset = drm_atomic_helper_crtc_reset,
	.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
	.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
	.late_register = sti_crtc_late_register,
};

bool sti_crtc_is_main(struct drm_crtc *crtc)
{
	struct sti_mixer *mixer = to_sti_mixer(crtc);

	if (mixer->id == STI_MIXER_MAIN)
		return true;

	return false;
}

int sti_crtc_init(struct drm_device *drm_dev, struct sti_mixer *mixer,
		  struct drm_plane *primary, struct drm_plane *cursor)
{
	struct drm_crtc *crtc = &mixer->drm_crtc;
	int res;

	res = drm_crtc_init_with_planes(drm_dev, crtc, primary, cursor,
					&sti_crtc_funcs, NULL);
	if (res) {
		DRM_ERROR("Can't initialze CRTC\n");
		return -EINVAL;
	}

	drm_crtc_helper_add(crtc, &sti_crtc_helper_funcs);

	DRM_DEBUG_DRIVER("drm CRTC:%d mapped to %s\n",
			 crtc->base.id, sti_mixer_to_str(mixer));

	return 0;
}
Commit	Line	Data
9bbf86fe BG	1	/*
	2	* Copyright (C) STMicroelectronics SA 2014
	3	* Authors: Benjamin Gaignard <benjamin.gaignard@st.com>
	4	* Fabien Dessenne <fabien.dessenne@st.com>
	5	* for STMicroelectronics.
	6	* License terms: GNU General Public License (GPL), version 2
	7	*/
	8
	9	#include <linux/clk.h>
	10
	11	#include <drm/drmP.h>
de4b00b0 BG	12	#include <drm/drm_atomic.h>
de4b00b0 BG	13	#include <drm/drm_atomic_helper.h>
9bbf86fe	14	#include <drm/drm_crtc_helper.h>
3cb9ae4f	15	#include <drm/drm_plane_helper.h>
9bbf86fe BG	16
9bbf86fe BG	17	#include "sti_compositor.h"
9e1f05b2 VA	18	#include "sti_crtc.h"
9e1f05b2 VA	19	#include "sti_drv.h"
29d1dc62	20	#include "sti_vid.h"
9bbf86fe BG	21	#include "sti_vtg.h"
9bbf86fe BG	22
29d1dc62	23	static void sti_crtc_enable(struct drm_crtc *crtc)
9bbf86fe BG	24	{
9bbf86fe BG	25	struct sti_mixer *mixer = to_sti_mixer(crtc);
9bbf86fe	26
29d1dc62 VA	27	DRM_DEBUG_DRIVER("\n");
	28
	29	mixer->status = STI_MIXER_READY;
9bbf86fe	30
29d1dc62	31	drm_crtc_vblank_on(crtc);
9bbf86fe BG	32	}
9bbf86fe BG	33
29d1dc62	34	static void sti_crtc_disabling(struct drm_crtc *crtc)
9bbf86fe BG	35	{
9bbf86fe BG	36	struct sti_mixer *mixer = to_sti_mixer(crtc);
9bbf86fe	37
29d1dc62	38	DRM_DEBUG_DRIVER("\n");
ca614aad	39
29d1dc62	40	mixer->status = STI_MIXER_DISABLING;
9bbf86fe BG	41	}
9bbf86fe BG	42
9bbf86fe	43	static int
9e1f05b2	44	sti_crtc_mode_set(struct drm_crtc crtc, struct drm_display_mode mode)
9bbf86fe BG	45	{
	46	struct sti_mixer *mixer = to_sti_mixer(crtc);
	47	struct device *dev = mixer->dev;
	48	struct sti_compositor *compo = dev_get_drvdata(dev);
32e14592	49	struct clk compo_clk, pix_clk;
9bbf86fe	50	int rate = mode->clock * 1000;
9bbf86fe	51
de4b00b0	52	DRM_DEBUG_KMS("CRTC:%d (%s) mode:%d (%s)\n",
9bbf86fe	53	crtc->base.id, sti_mixer_to_str(mixer),
de4b00b0	54	mode->base.id, mode->name);
9bbf86fe BG	55
	56	DRM_DEBUG_KMS("%d %d %d %d %d %d %d %d %d %d 0x%x 0x%x\n",
	57	mode->vrefresh, mode->clock,
	58	mode->hdisplay,
	59	mode->hsync_start, mode->hsync_end,
	60	mode->htotal,
	61	mode->vdisplay,
	62	mode->vsync_start, mode->vsync_end,
	63	mode->vtotal, mode->type, mode->flags);
	64
32e14592 BG	65	if (mixer->id == STI_MIXER_MAIN) {
	66	compo_clk = compo->clk_compo_main;
	67	pix_clk = compo->clk_pix_main;
	68	} else {
	69	compo_clk = compo->clk_compo_aux;
	70	pix_clk = compo->clk_pix_aux;
	71	}
	72
	73	/* Prepare and enable the compo IP clock */
	74	if (clk_prepare_enable(compo_clk)) {
	75	DRM_INFO("Failed to prepare/enable compositor clk\n");
	76	goto compo_error;
	77	}
9bbf86fe	78
32e14592 BG	79	/* Set rate and prepare/enable pixel clock */
32e14592 BG	80	if (clk_set_rate(pix_clk, rate) < 0) {
9bbf86fe	81	DRM_ERROR("Cannot set rate (%dHz) for pix clk\n", rate);
32e14592	82	goto pix_error;
9bbf86fe	83	}
32e14592	84	if (clk_prepare_enable(pix_clk)) {
9bbf86fe	85	DRM_ERROR("Failed to prepare/enable pix clk\n");
32e14592	86	goto pix_error;
9bbf86fe BG	87	}
	88
	89	sti_vtg_set_config(mixer->id == STI_MIXER_MAIN ?
	90	compo->vtg_main : compo->vtg_aux, &crtc->mode);
	91
32e14592	92	if (sti_mixer_active_video_area(mixer, &crtc->mode)) {
871bcdfe	93	DRM_ERROR("Can't set active video area\n");
32e14592	94	goto mixer_error;
9bbf86fe BG	95	}
9bbf86fe BG	96
32e14592 BG	97	return 0;
	98
	99	mixer_error:
	100	clk_disable_unprepare(pix_clk);
	101	pix_error:
	102	clk_disable_unprepare(compo_clk);
	103	compo_error:
	104	return -EINVAL;
9bbf86fe BG	105	}
9bbf86fe BG	106
9e1f05b2	107	static void sti_crtc_disable(struct drm_crtc *crtc)
9bbf86fe BG	108	{
	109	struct sti_mixer *mixer = to_sti_mixer(crtc);
	110	struct device *dev = mixer->dev;
	111	struct sti_compositor *compo = dev_get_drvdata(dev);
9bbf86fe	112
9bbf86fe BG	113	DRM_DEBUG_KMS("CRTC:%d (%s)\n", crtc->base.id, sti_mixer_to_str(mixer));
	114
	115	/* Disable Background */
	116	sti_mixer_set_background_status(mixer, false);
	117
ca614aad	118	drm_crtc_vblank_off(crtc);
9bbf86fe BG	119
	120	/* Disable pixel clock and compo IP clocks */
	121	if (mixer->id == STI_MIXER_MAIN) {
	122	clk_disable_unprepare(compo->clk_pix_main);
	123	clk_disable_unprepare(compo->clk_compo_main);
	124	} else {
	125	clk_disable_unprepare(compo->clk_pix_aux);
	126	clk_disable_unprepare(compo->clk_compo_aux);
	127	}
	128
29d1dc62	129	mixer->status = STI_MIXER_DISABLED;
9bbf86fe BG	130	}
9bbf86fe BG	131
de4b00b0	132	static void
9e1f05b2	133	sti_crtc_mode_set_nofb(struct drm_crtc *crtc)
de4b00b0	134	{
9e1f05b2	135	sti_crtc_mode_set(crtc, &crtc->state->adjusted_mode);
de4b00b0	136	}
9bbf86fe	137
e1474e7b DA	138	static void sti_crtc_atomic_begin(struct drm_crtc *crtc,
e1474e7b DA	139	struct drm_crtc_state *old_crtc_state)
9bbf86fe	140	{
9bbf86fe	141	struct sti_mixer *mixer = to_sti_mixer(crtc);
9bbf86fe	142
de4b00b0 BG	143	if (crtc->state->event) {
de4b00b0 BG	144	crtc->state->event->pipe = drm_crtc_index(crtc);
9bbf86fe	145
de4b00b0	146	WARN_ON(drm_crtc_vblank_get(crtc) != 0);
9bbf86fe	147
de4b00b0 BG	148	mixer->pending_event = crtc->state->event;
de4b00b0 BG	149	crtc->state->event = NULL;
9bbf86fe	150	}
de4b00b0	151	}
9bbf86fe	152
e1474e7b DA	153	static void sti_crtc_atomic_flush(struct drm_crtc *crtc,
e1474e7b DA	154	struct drm_crtc_state *old_crtc_state)
de4b00b0	155	{
29d1dc62 VA	156	struct drm_device *drm_dev = crtc->dev;
	157	struct sti_mixer *mixer = to_sti_mixer(crtc);
	158	struct sti_compositor *compo = dev_get_drvdata(mixer->dev);
	159	struct drm_plane *p;
	160
	161	DRM_DEBUG_DRIVER("\n");
	162
	163	/* perform plane actions */
	164	list_for_each_entry(p, &drm_dev->mode_config.plane_list, head) {
	165	struct sti_plane *plane = to_sti_plane(p);
	166
	167	switch (plane->status) {
	168	case STI_PLANE_UPDATED:
	169	/* update planes tag as updated */
	170	DRM_DEBUG_DRIVER("update plane %s\n",
	171	sti_plane_to_str(plane));
	172
	173	if (sti_mixer_set_plane_depth(mixer, plane)) {
	174	DRM_ERROR("Cannot set plane %s depth\n",
	175	sti_plane_to_str(plane));
	176	break;
	177	}
	178
	179	if (sti_mixer_set_plane_status(mixer, plane, true)) {
	180	DRM_ERROR("Cannot enable plane %s at mixer\n",
	181	sti_plane_to_str(plane));
	182	break;
	183	}
	184
	185	/* if plane is HQVDP_0 then commit the vid[0] */
	186	if (plane->desc == STI_HQVDP_0)
	187	sti_vid_commit(compo->vid[0], p->state);
	188
	189	plane->status = STI_PLANE_READY;
	190
	191	break;
	192	case STI_PLANE_DISABLING:
	193	/* disabling sequence for planes tag as disabling */
	194	DRM_DEBUG_DRIVER("disable plane %s from mixer\n",
	195	sti_plane_to_str(plane));
	196
	197	if (sti_mixer_set_plane_status(mixer, plane, false)) {
	198	DRM_ERROR("Cannot disable plane %s at mixer\n",
	199	sti_plane_to_str(plane));
	200	continue;
	201	}
	202
	203	if (plane->desc == STI_CURSOR)
	204	/* tag plane status for disabled */
	205	plane->status = STI_PLANE_DISABLED;
	206	else
	207	/* tag plane status for flushing */
	208	plane->status = STI_PLANE_FLUSHING;
	209
	210	/* if plane is HQVDP_0 then disable the vid[0] */
	211	if (plane->desc == STI_HQVDP_0)
	212	sti_vid_disable(compo->vid[0]);
	213
	214	break;
	215	default:
	216	/* Other status case are not handled */
	217	break;
	218	}
	219	}
9bbf86fe BG	220	}
9bbf86fe BG	221
c5de4853	222	static const struct drm_crtc_helper_funcs sti_crtc_helper_funcs = {
29d1dc62 VA	223	.enable = sti_crtc_enable,
29d1dc62 VA	224	.disable = sti_crtc_disabling,
9e1f05b2	225	.mode_set_nofb = sti_crtc_mode_set_nofb,
9e1f05b2 VA	226	.atomic_begin = sti_crtc_atomic_begin,
9e1f05b2 VA	227	.atomic_flush = sti_crtc_atomic_flush,
de4b00b0 BG	228	};
de4b00b0 BG	229
9e1f05b2	230	static void sti_crtc_destroy(struct drm_crtc *crtc)
9bbf86fe BG	231	{
	232	DRM_DEBUG_KMS("\n");
	233	drm_crtc_cleanup(crtc);
	234	}
	235
9e1f05b2 VA	236	static int sti_crtc_set_property(struct drm_crtc *crtc,
	237	struct drm_property *property,
	238	uint64_t val)
9bbf86fe BG	239	{
	240	DRM_DEBUG_KMS("\n");
	241	return 0;
	242	}
	243
9e1f05b2 VA	244	int sti_crtc_vblank_cb(struct notifier_block *nb,
9e1f05b2 VA	245	unsigned long event, void *data)
9bbf86fe	246	{
9bbf86fe BG	247	struct sti_compositor *compo =
9bbf86fe BG	248	container_of(nb, struct sti_compositor, vtg_vblank_nb);
2388693e TR	249	struct drm_crtc *crtc = data;
2388693e TR	250	struct sti_mixer *mixer;
9bbf86fe	251	unsigned long flags;
9e1f05b2	252	struct sti_private *priv;
2388693e	253	unsigned int pipe;
9bbf86fe	254
2388693e TR	255	priv = crtc->dev->dev_private;
	256	pipe = drm_crtc_index(crtc);
	257	mixer = compo->mixer[pipe];
9bbf86fe BG	258
	259	if ((event != VTG_TOP_FIELD_EVENT) &&
	260	(event != VTG_BOTTOM_FIELD_EVENT)) {
	261	DRM_ERROR("unknown event: %lu\n", event);
	262	return -EINVAL;
	263	}
	264
2388693e	265	drm_crtc_handle_vblank(crtc);
9bbf86fe	266
2388693e TR	267	spin_lock_irqsave(&crtc->dev->event_lock, flags);
	268	if (mixer->pending_event) {
	269	drm_crtc_send_vblank_event(crtc, mixer->pending_event);
	270	drm_crtc_vblank_put(crtc);
	271	mixer->pending_event = NULL;
9bbf86fe	272	}
2388693e	273	spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
9bbf86fe	274
2388693e	275	if (mixer->status == STI_MIXER_DISABLING) {
29d1dc62 VA	276	struct drm_plane *p;
	277
	278	/* Disable mixer only if all overlay planes (GDP and VDP)
	279	* are disabled */
2388693e TR	280	list_for_each_entry(p, &crtc->dev->mode_config.plane_list,
2388693e TR	281	head) {
29d1dc62 VA	282	struct sti_plane *plane = to_sti_plane(p);
	283
	284	if ((plane->desc & STI_PLANE_TYPE_MASK) <= STI_VDP)
	285	if (plane->status != STI_PLANE_DISABLED)
	286	return 0;
	287	}
2388693e	288	sti_crtc_disable(crtc);
29d1dc62 VA	289	}
29d1dc62 VA	290
9bbf86fe BG	291	return 0;
	292	}
	293
88e72717	294	int sti_crtc_enable_vblank(struct drm_device *dev, unsigned int pipe)
9bbf86fe	295	{
9e1f05b2	296	struct sti_private *dev_priv = dev->dev_private;
9bbf86fe BG	297	struct sti_compositor *compo = dev_priv->compo;
9bbf86fe BG	298	struct notifier_block *vtg_vblank_nb = &compo->vtg_vblank_nb;
2388693e	299	struct drm_crtc *crtc = &compo->mixer[pipe]->drm_crtc;
9bbf86fe	300
871bcdfe VA	301	DRM_DEBUG_DRIVER("\n");
871bcdfe VA	302
88e72717	303	if (sti_vtg_register_client(pipe == STI_MIXER_MAIN ?
9bbf86fe	304	compo->vtg_main : compo->vtg_aux,
2388693e	305	vtg_vblank_nb, crtc)) {
9bbf86fe BG	306	DRM_ERROR("Cannot register VTG notifier\n");
	307	return -EINVAL;
	308	}
	309
	310	return 0;
	311	}
9bbf86fe	312
88e72717	313	void sti_crtc_disable_vblank(struct drm_device *drm_dev, unsigned int pipe)
9bbf86fe	314	{
29d1dc62	315	struct sti_private *priv = drm_dev->dev_private;
9bbf86fe BG	316	struct sti_compositor *compo = priv->compo;
9bbf86fe BG	317	struct notifier_block *vtg_vblank_nb = &compo->vtg_vblank_nb;
2388693e	318	struct drm_crtc *crtc = &compo->mixer[pipe]->drm_crtc;
9bbf86fe BG	319
	320	DRM_DEBUG_DRIVER("\n");
	321
88e72717	322	if (sti_vtg_unregister_client(pipe == STI_MIXER_MAIN ?
9bbf86fe BG	323	compo->vtg_main : compo->vtg_aux, vtg_vblank_nb))
	324	DRM_DEBUG_DRIVER("Warning: cannot unregister VTG notifier\n");
	325
	326	/* free the resources of the pending requests */
88e72717	327	if (compo->mixer[pipe]->pending_event) {
2388693e	328	drm_crtc_vblank_put(crtc);
88e72717	329	compo->mixer[pipe]->pending_event = NULL;
9bbf86fe	330	}
9bbf86fe	331	}
9bbf86fe	332
83af0a48 BG	333	static int sti_crtc_late_register(struct drm_crtc *crtc)
	334	{
	335	struct sti_mixer *mixer = to_sti_mixer(crtc);
	336	struct sti_compositor *compo = dev_get_drvdata(mixer->dev);
	337
	338	if (drm_crtc_index(crtc) == 0)
	339	return sti_compositor_debufs_init(compo, crtc->dev->primary);
	340
	341	return 0;
	342	}
	343
c5de4853	344	static const struct drm_crtc_funcs sti_crtc_funcs = {
de4b00b0 BG	345	.set_config = drm_atomic_helper_set_config,
de4b00b0 BG	346	.page_flip = drm_atomic_helper_page_flip,
9e1f05b2 VA	347	.destroy = sti_crtc_destroy,
9e1f05b2 VA	348	.set_property = sti_crtc_set_property,
de4b00b0 BG	349	.reset = drm_atomic_helper_crtc_reset,
	350	.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
	351	.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
83af0a48	352	.late_register = sti_crtc_late_register,
9bbf86fe BG	353	};
9bbf86fe BG	354
9e1f05b2	355	bool sti_crtc_is_main(struct drm_crtc *crtc)
9bbf86fe BG	356	{
	357	struct sti_mixer *mixer = to_sti_mixer(crtc);
	358
	359	if (mixer->id == STI_MIXER_MAIN)
	360	return true;
	361
	362	return false;
	363	}
	364
9e1f05b2 VA	365	int sti_crtc_init(struct drm_device drm_dev, struct sti_mixer mixer,
9e1f05b2 VA	366	struct drm_plane primary, struct drm_plane cursor)
9bbf86fe BG	367	{
	368	struct drm_crtc *crtc = &mixer->drm_crtc;
	369	int res;
	370
	371	res = drm_crtc_init_with_planes(drm_dev, crtc, primary, cursor,
f9882876	372	&sti_crtc_funcs, NULL);
9bbf86fe	373	if (res) {
871bcdfe	374	DRM_ERROR("Can't initialze CRTC\n");
9bbf86fe BG	375	return -EINVAL;
	376	}
	377
	378	drm_crtc_helper_add(crtc, &sti_crtc_helper_funcs);
	379
	380	DRM_DEBUG_DRIVER("drm CRTC:%d mapped to %s\n",
	381	crtc->base.id, sti_mixer_to_str(mixer));
	382
	383	return 0;
	384	}