[deliverable/linux.git] / drivers / gpu / drm / sti / sti_crtc.c

/*
 * Copyright (C) STMicroelectronics SA 2014
 * Authors: Benjamin Gaignard <benjamin.gaignard@st.com>
 *          Fabien Dessenne <fabien.dessenne@st.com>
 *          for STMicroelectronics.
 * License terms:  GNU General Public License (GPL), version 2
 */

#include <linux/clk.h>

#include <drm/drmP.h>
#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_plane_helper.h>

#include "sti_compositor.h"
#include "sti_crtc.h"
#include "sti_drv.h"
#include "sti_vid.h"
#include "sti_vtg.h"

static void sti_crtc_enable(struct drm_crtc *crtc)
{
	struct sti_mixer *mixer = to_sti_mixer(crtc);
	struct device *dev = mixer->dev;
	struct sti_compositor *compo = dev_get_drvdata(dev);

	DRM_DEBUG_DRIVER("\n");

	mixer->status = STI_MIXER_READY;

	/* Prepare and enable the compo IP clock */
	if (mixer->id == STI_MIXER_MAIN) {
		if (clk_prepare_enable(compo->clk_compo_main))
			DRM_INFO("Failed to prepare/enable compo_main clk\n");
	} else {
		if (clk_prepare_enable(compo->clk_compo_aux))
			DRM_INFO("Failed to prepare/enable compo_aux clk\n");
	}

	drm_crtc_vblank_on(crtc);
}

static void sti_crtc_disabling(struct drm_crtc *crtc)
{
	struct sti_mixer *mixer = to_sti_mixer(crtc);

	DRM_DEBUG_DRIVER("\n");

	mixer->status = STI_MIXER_DISABLING;
}

static bool sti_crtc_mode_fixup(struct drm_crtc *crtc,
				const struct drm_display_mode *mode,
				struct drm_display_mode *adjusted_mode)
{
	/* accept the provided drm_display_mode, do not fix it up */
	return true;
}

static int
sti_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode)
{
	struct sti_mixer *mixer = to_sti_mixer(crtc);
	struct device *dev = mixer->dev;
	struct sti_compositor *compo = dev_get_drvdata(dev);
	struct clk *clk;
	int rate = mode->clock * 1000;
	int res;

	DRM_DEBUG_KMS("CRTC:%d (%s) mode:%d (%s)\n",
		      crtc->base.id, sti_mixer_to_str(mixer),
		      mode->base.id, mode->name);

	DRM_DEBUG_KMS("%d %d %d %d %d %d %d %d %d %d 0x%x 0x%x\n",
		      mode->vrefresh, mode->clock,
		      mode->hdisplay,
		      mode->hsync_start, mode->hsync_end,
		      mode->htotal,
		      mode->vdisplay,
		      mode->vsync_start, mode->vsync_end,
		      mode->vtotal, mode->type, mode->flags);

	/* Set rate and prepare/enable pixel clock */
	if (mixer->id == STI_MIXER_MAIN)
		clk = compo->clk_pix_main;
	else
		clk = compo->clk_pix_aux;

	res = clk_set_rate(clk, rate);
	if (res < 0) {
		DRM_ERROR("Cannot set rate (%dHz) for pix clk\n", rate);
		return -EINVAL;
	}
	if (clk_prepare_enable(clk)) {
		DRM_ERROR("Failed to prepare/enable pix clk\n");
		return -EINVAL;
	}

	sti_vtg_set_config(mixer->id == STI_MIXER_MAIN ?
			compo->vtg_main : compo->vtg_aux, &crtc->mode);

	res = sti_mixer_active_video_area(mixer, &crtc->mode);
	if (res) {
		DRM_ERROR("Can't set active video area\n");
		return -EINVAL;
	}

	return res;
}

static void sti_crtc_disable(struct drm_crtc *crtc)
{
	struct sti_mixer *mixer = to_sti_mixer(crtc);
	struct device *dev = mixer->dev;
	struct sti_compositor *compo = dev_get_drvdata(dev);

	DRM_DEBUG_KMS("CRTC:%d (%s)\n", crtc->base.id, sti_mixer_to_str(mixer));

	/* Disable Background */
	sti_mixer_set_background_status(mixer, false);

	drm_crtc_vblank_off(crtc);

	/* Disable pixel clock and compo IP clocks */
	if (mixer->id == STI_MIXER_MAIN) {
		clk_disable_unprepare(compo->clk_pix_main);
		clk_disable_unprepare(compo->clk_compo_main);
	} else {
		clk_disable_unprepare(compo->clk_pix_aux);
		clk_disable_unprepare(compo->clk_compo_aux);
	}

	mixer->status = STI_MIXER_DISABLED;
}

static void
sti_crtc_mode_set_nofb(struct drm_crtc *crtc)
{
	sti_crtc_enable(crtc);
	sti_crtc_mode_set(crtc, &crtc->state->adjusted_mode);
}

static void sti_crtc_atomic_begin(struct drm_crtc *crtc,
				  struct drm_crtc_state *old_crtc_state)
{
	struct sti_mixer *mixer = to_sti_mixer(crtc);

	if (crtc->state->event) {
		crtc->state->event->pipe = drm_crtc_index(crtc);

		WARN_ON(drm_crtc_vblank_get(crtc) != 0);

		mixer->pending_event = crtc->state->event;
		crtc->state->event = NULL;
	}
}

static void sti_crtc_atomic_flush(struct drm_crtc *crtc,
				  struct drm_crtc_state *old_crtc_state)
{
	struct drm_device *drm_dev = crtc->dev;
	struct sti_mixer *mixer = to_sti_mixer(crtc);
	struct sti_compositor *compo = dev_get_drvdata(mixer->dev);
	struct drm_plane *p;

	DRM_DEBUG_DRIVER("\n");

	/* perform plane actions */
	list_for_each_entry(p, &drm_dev->mode_config.plane_list, head) {
		struct sti_plane *plane = to_sti_plane(p);

		switch (plane->status) {
		case STI_PLANE_UPDATED:
			/* update planes tag as updated */
			DRM_DEBUG_DRIVER("update plane %s\n",
					 sti_plane_to_str(plane));

			if (sti_mixer_set_plane_depth(mixer, plane)) {
				DRM_ERROR("Cannot set plane %s depth\n",
					  sti_plane_to_str(plane));
				break;
			}

			if (sti_mixer_set_plane_status(mixer, plane, true)) {
				DRM_ERROR("Cannot enable plane %s at mixer\n",
					  sti_plane_to_str(plane));
				break;
			}

			/* if plane is HQVDP_0 then commit the vid[0] */
			if (plane->desc == STI_HQVDP_0)
				sti_vid_commit(compo->vid[0], p->state);

			plane->status = STI_PLANE_READY;

			break;
		case STI_PLANE_DISABLING:
			/* disabling sequence for planes tag as disabling */
			DRM_DEBUG_DRIVER("disable plane %s from mixer\n",
					 sti_plane_to_str(plane));

			if (sti_mixer_set_plane_status(mixer, plane, false)) {
				DRM_ERROR("Cannot disable plane %s at mixer\n",
					  sti_plane_to_str(plane));
				continue;
			}

			if (plane->desc == STI_CURSOR)
				/* tag plane status for disabled */
				plane->status = STI_PLANE_DISABLED;
			else
				/* tag plane status for flushing */
				plane->status = STI_PLANE_FLUSHING;

			/* if plane is HQVDP_0 then disable the vid[0] */
			if (plane->desc == STI_HQVDP_0)
				sti_vid_disable(compo->vid[0]);

			break;
		default:
			/* Other status case are not handled */
			break;
		}
	}
}

static struct drm_crtc_helper_funcs sti_crtc_helper_funcs = {
	.enable = sti_crtc_enable,
	.disable = sti_crtc_disabling,
	.mode_fixup = sti_crtc_mode_fixup,
	.mode_set = drm_helper_crtc_mode_set,
	.mode_set_nofb = sti_crtc_mode_set_nofb,
	.mode_set_base = drm_helper_crtc_mode_set_base,
	.atomic_begin = sti_crtc_atomic_begin,
	.atomic_flush = sti_crtc_atomic_flush,
};

static void sti_crtc_destroy(struct drm_crtc *crtc)
{
	DRM_DEBUG_KMS("\n");
	drm_crtc_cleanup(crtc);
}

static int sti_crtc_set_property(struct drm_crtc *crtc,
				 struct drm_property *property,
				 uint64_t val)
{
	DRM_DEBUG_KMS("\n");
	return 0;
}

int sti_crtc_vblank_cb(struct notifier_block *nb,
		       unsigned long event, void *data)
{
	struct drm_device *drm_dev;
	struct sti_compositor *compo =
		container_of(nb, struct sti_compositor, vtg_vblank_nb);
	int *crtc = data;
	unsigned long flags;
	struct sti_private *priv;

	drm_dev = compo->mixer[*crtc]->drm_crtc.dev;
	priv = drm_dev->dev_private;

	if ((event != VTG_TOP_FIELD_EVENT) &&
	    (event != VTG_BOTTOM_FIELD_EVENT)) {
		DRM_ERROR("unknown event: %lu\n", event);
		return -EINVAL;
	}

	drm_handle_vblank(drm_dev, *crtc);

	spin_lock_irqsave(&drm_dev->event_lock, flags);
	if (compo->mixer[*crtc]->pending_event) {
		drm_send_vblank_event(drm_dev, -1,
				      compo->mixer[*crtc]->pending_event);
		drm_vblank_put(drm_dev, *crtc);
		compo->mixer[*crtc]->pending_event = NULL;
	}
	spin_unlock_irqrestore(&drm_dev->event_lock, flags);

	if (compo->mixer[*crtc]->status == STI_MIXER_DISABLING) {
		struct drm_plane *p;

		/* Disable mixer only if all overlay planes (GDP and VDP)
		 * are disabled */
		list_for_each_entry(p, &drm_dev->mode_config.plane_list, head) {
			struct sti_plane *plane = to_sti_plane(p);

			if ((plane->desc & STI_PLANE_TYPE_MASK) <= STI_VDP)
				if (plane->status != STI_PLANE_DISABLED)
					return 0;
		}
		sti_crtc_disable(&compo->mixer[*crtc]->drm_crtc);
	}

	return 0;
}

int sti_crtc_enable_vblank(struct drm_device *dev, unsigned int pipe)
{
	struct sti_private *dev_priv = dev->dev_private;
	struct sti_compositor *compo = dev_priv->compo;
	struct notifier_block *vtg_vblank_nb = &compo->vtg_vblank_nb;

	DRM_DEBUG_DRIVER("\n");

	if (sti_vtg_register_client(pipe == STI_MIXER_MAIN ?
			compo->vtg_main : compo->vtg_aux,
			vtg_vblank_nb, pipe)) {
		DRM_ERROR("Cannot register VTG notifier\n");
		return -EINVAL;
	}

	return 0;
}
EXPORT_SYMBOL(sti_crtc_enable_vblank);

void sti_crtc_disable_vblank(struct drm_device *drm_dev, unsigned int pipe)
{
	struct sti_private *priv = drm_dev->dev_private;
	struct sti_compositor *compo = priv->compo;
	struct notifier_block *vtg_vblank_nb = &compo->vtg_vblank_nb;

	DRM_DEBUG_DRIVER("\n");

	if (sti_vtg_unregister_client(pipe == STI_MIXER_MAIN ?
			compo->vtg_main : compo->vtg_aux, vtg_vblank_nb))
		DRM_DEBUG_DRIVER("Warning: cannot unregister VTG notifier\n");

	/* free the resources of the pending requests */
	if (compo->mixer[pipe]->pending_event) {
		drm_vblank_put(drm_dev, pipe);
		compo->mixer[pipe]->pending_event = NULL;
	}
}
EXPORT_SYMBOL(sti_crtc_disable_vblank);

static struct drm_crtc_funcs sti_crtc_funcs = {
	.set_config = drm_atomic_helper_set_config,
	.page_flip = drm_atomic_helper_page_flip,
	.destroy = sti_crtc_destroy,
	.set_property = sti_crtc_set_property,
	.reset = drm_atomic_helper_crtc_reset,
	.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
	.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
};

bool sti_crtc_is_main(struct drm_crtc *crtc)
{
	struct sti_mixer *mixer = to_sti_mixer(crtc);

	if (mixer->id == STI_MIXER_MAIN)
		return true;

	return false;
}
EXPORT_SYMBOL(sti_crtc_is_main);

int sti_crtc_init(struct drm_device *drm_dev, struct sti_mixer *mixer,
		  struct drm_plane *primary, struct drm_plane *cursor)
{
	struct drm_crtc *crtc = &mixer->drm_crtc;
	int res;

	res = drm_crtc_init_with_planes(drm_dev, crtc, primary, cursor,
					&sti_crtc_funcs);
	if (res) {
		DRM_ERROR("Can't initialze CRTC\n");
		return -EINVAL;
	}

	drm_crtc_helper_add(crtc, &sti_crtc_helper_funcs);

	DRM_DEBUG_DRIVER("drm CRTC:%d mapped to %s\n",
			 crtc->base.id, sti_mixer_to_str(mixer));

	return 0;
}
Commit	Line	Data
9bbf86fe BG	1	/*
	2	* Copyright (C) STMicroelectronics SA 2014
	3	* Authors: Benjamin Gaignard <benjamin.gaignard@st.com>
	4	* Fabien Dessenne <fabien.dessenne@st.com>
	5	* for STMicroelectronics.
	6	* License terms: GNU General Public License (GPL), version 2
	7	*/
	8
	9	#include <linux/clk.h>
	10
	11	#include <drm/drmP.h>
de4b00b0 BG	12	#include <drm/drm_atomic.h>
de4b00b0 BG	13	#include <drm/drm_atomic_helper.h>
9bbf86fe	14	#include <drm/drm_crtc_helper.h>
3cb9ae4f	15	#include <drm/drm_plane_helper.h>
9bbf86fe BG	16
9bbf86fe BG	17	#include "sti_compositor.h"
9e1f05b2 VA	18	#include "sti_crtc.h"
9e1f05b2 VA	19	#include "sti_drv.h"
29d1dc62	20	#include "sti_vid.h"
9bbf86fe BG	21	#include "sti_vtg.h"
9bbf86fe BG	22
29d1dc62	23	static void sti_crtc_enable(struct drm_crtc *crtc)
9bbf86fe BG	24	{
	25	struct sti_mixer *mixer = to_sti_mixer(crtc);
	26	struct device *dev = mixer->dev;
	27	struct sti_compositor *compo = dev_get_drvdata(dev);
	28
29d1dc62 VA	29	DRM_DEBUG_DRIVER("\n");
	30
	31	mixer->status = STI_MIXER_READY;
9bbf86fe BG	32
	33	/* Prepare and enable the compo IP clock */
	34	if (mixer->id == STI_MIXER_MAIN) {
	35	if (clk_prepare_enable(compo->clk_compo_main))
	36	DRM_INFO("Failed to prepare/enable compo_main clk\n");
	37	} else {
	38	if (clk_prepare_enable(compo->clk_compo_aux))
	39	DRM_INFO("Failed to prepare/enable compo_aux clk\n");
	40	}
2f7d0e82	41
29d1dc62	42	drm_crtc_vblank_on(crtc);
9bbf86fe BG	43	}
9bbf86fe BG	44
29d1dc62	45	static void sti_crtc_disabling(struct drm_crtc *crtc)
9bbf86fe BG	46	{
9bbf86fe BG	47	struct sti_mixer *mixer = to_sti_mixer(crtc);
9bbf86fe	48
29d1dc62	49	DRM_DEBUG_DRIVER("\n");
ca614aad	50
29d1dc62	51	mixer->status = STI_MIXER_DISABLING;
9bbf86fe BG	52	}
9bbf86fe BG	53
9e1f05b2 VA	54	static bool sti_crtc_mode_fixup(struct drm_crtc *crtc,
	55	const struct drm_display_mode *mode,
	56	struct drm_display_mode *adjusted_mode)
9bbf86fe BG	57	{
	58	/* accept the provided drm_display_mode, do not fix it up */
	59	return true;
	60	}
	61
	62	static int
9e1f05b2	63	sti_crtc_mode_set(struct drm_crtc crtc, struct drm_display_mode mode)
9bbf86fe BG	64	{
	65	struct sti_mixer *mixer = to_sti_mixer(crtc);
	66	struct device *dev = mixer->dev;
	67	struct sti_compositor *compo = dev_get_drvdata(dev);
9bbf86fe BG	68	struct clk *clk;
	69	int rate = mode->clock * 1000;
	70	int res;
9bbf86fe	71
de4b00b0	72	DRM_DEBUG_KMS("CRTC:%d (%s) mode:%d (%s)\n",
9bbf86fe	73	crtc->base.id, sti_mixer_to_str(mixer),
de4b00b0	74	mode->base.id, mode->name);
9bbf86fe BG	75
	76	DRM_DEBUG_KMS("%d %d %d %d %d %d %d %d %d %d 0x%x 0x%x\n",
	77	mode->vrefresh, mode->clock,
	78	mode->hdisplay,
	79	mode->hsync_start, mode->hsync_end,
	80	mode->htotal,
	81	mode->vdisplay,
	82	mode->vsync_start, mode->vsync_end,
	83	mode->vtotal, mode->type, mode->flags);
	84
	85	/* Set rate and prepare/enable pixel clock */
	86	if (mixer->id == STI_MIXER_MAIN)
	87	clk = compo->clk_pix_main;
	88	else
	89	clk = compo->clk_pix_aux;
	90
	91	res = clk_set_rate(clk, rate);
	92	if (res < 0) {
	93	DRM_ERROR("Cannot set rate (%dHz) for pix clk\n", rate);
	94	return -EINVAL;
	95	}
	96	if (clk_prepare_enable(clk)) {
	97	DRM_ERROR("Failed to prepare/enable pix clk\n");
	98	return -EINVAL;
	99	}
	100
	101	sti_vtg_set_config(mixer->id == STI_MIXER_MAIN ?
	102	compo->vtg_main : compo->vtg_aux, &crtc->mode);
	103
9bbf86fe BG	104	res = sti_mixer_active_video_area(mixer, &crtc->mode);
9bbf86fe BG	105	if (res) {
871bcdfe	106	DRM_ERROR("Can't set active video area\n");
9bbf86fe BG	107	return -EINVAL;
	108	}
	109
de4b00b0	110	return res;
9bbf86fe BG	111	}
9bbf86fe BG	112
9e1f05b2	113	static void sti_crtc_disable(struct drm_crtc *crtc)
9bbf86fe BG	114	{
	115	struct sti_mixer *mixer = to_sti_mixer(crtc);
	116	struct device *dev = mixer->dev;
	117	struct sti_compositor *compo = dev_get_drvdata(dev);
9bbf86fe	118
9bbf86fe BG	119	DRM_DEBUG_KMS("CRTC:%d (%s)\n", crtc->base.id, sti_mixer_to_str(mixer));
	120
	121	/* Disable Background */
	122	sti_mixer_set_background_status(mixer, false);
	123
ca614aad	124	drm_crtc_vblank_off(crtc);
9bbf86fe BG	125
	126	/* Disable pixel clock and compo IP clocks */
	127	if (mixer->id == STI_MIXER_MAIN) {
	128	clk_disable_unprepare(compo->clk_pix_main);
	129	clk_disable_unprepare(compo->clk_compo_main);
	130	} else {
	131	clk_disable_unprepare(compo->clk_pix_aux);
	132	clk_disable_unprepare(compo->clk_compo_aux);
	133	}
	134
29d1dc62	135	mixer->status = STI_MIXER_DISABLED;
9bbf86fe BG	136	}
9bbf86fe BG	137
de4b00b0	138	static void
9e1f05b2	139	sti_crtc_mode_set_nofb(struct drm_crtc *crtc)
de4b00b0	140	{
29d1dc62	141	sti_crtc_enable(crtc);
9e1f05b2	142	sti_crtc_mode_set(crtc, &crtc->state->adjusted_mode);
de4b00b0	143	}
9bbf86fe	144
e1474e7b DA	145	static void sti_crtc_atomic_begin(struct drm_crtc *crtc,
e1474e7b DA	146	struct drm_crtc_state *old_crtc_state)
9bbf86fe	147	{
9bbf86fe	148	struct sti_mixer *mixer = to_sti_mixer(crtc);
9bbf86fe	149
de4b00b0 BG	150	if (crtc->state->event) {
de4b00b0 BG	151	crtc->state->event->pipe = drm_crtc_index(crtc);
9bbf86fe	152
de4b00b0	153	WARN_ON(drm_crtc_vblank_get(crtc) != 0);
9bbf86fe	154
de4b00b0 BG	155	mixer->pending_event = crtc->state->event;
de4b00b0 BG	156	crtc->state->event = NULL;
9bbf86fe	157	}
de4b00b0	158	}
9bbf86fe	159
e1474e7b DA	160	static void sti_crtc_atomic_flush(struct drm_crtc *crtc,
e1474e7b DA	161	struct drm_crtc_state *old_crtc_state)
de4b00b0	162	{
29d1dc62 VA	163	struct drm_device *drm_dev = crtc->dev;
	164	struct sti_mixer *mixer = to_sti_mixer(crtc);
	165	struct sti_compositor *compo = dev_get_drvdata(mixer->dev);
	166	struct drm_plane *p;
	167
	168	DRM_DEBUG_DRIVER("\n");
	169
	170	/* perform plane actions */
	171	list_for_each_entry(p, &drm_dev->mode_config.plane_list, head) {
	172	struct sti_plane *plane = to_sti_plane(p);
	173
	174	switch (plane->status) {
	175	case STI_PLANE_UPDATED:
	176	/* update planes tag as updated */
	177	DRM_DEBUG_DRIVER("update plane %s\n",
	178	sti_plane_to_str(plane));
	179
	180	if (sti_mixer_set_plane_depth(mixer, plane)) {
	181	DRM_ERROR("Cannot set plane %s depth\n",
	182	sti_plane_to_str(plane));
	183	break;
	184	}
	185
	186	if (sti_mixer_set_plane_status(mixer, plane, true)) {
	187	DRM_ERROR("Cannot enable plane %s at mixer\n",
	188	sti_plane_to_str(plane));
	189	break;
	190	}
	191
	192	/* if plane is HQVDP_0 then commit the vid[0] */
	193	if (plane->desc == STI_HQVDP_0)
	194	sti_vid_commit(compo->vid[0], p->state);
	195
	196	plane->status = STI_PLANE_READY;
	197
	198	break;
	199	case STI_PLANE_DISABLING:
	200	/* disabling sequence for planes tag as disabling */
	201	DRM_DEBUG_DRIVER("disable plane %s from mixer\n",
	202	sti_plane_to_str(plane));
	203
	204	if (sti_mixer_set_plane_status(mixer, plane, false)) {
	205	DRM_ERROR("Cannot disable plane %s at mixer\n",
	206	sti_plane_to_str(plane));
	207	continue;
	208	}
	209
	210	if (plane->desc == STI_CURSOR)
	211	/* tag plane status for disabled */
	212	plane->status = STI_PLANE_DISABLED;
	213	else
	214	/* tag plane status for flushing */
	215	plane->status = STI_PLANE_FLUSHING;
	216
	217	/* if plane is HQVDP_0 then disable the vid[0] */
	218	if (plane->desc == STI_HQVDP_0)
	219	sti_vid_disable(compo->vid[0]);
	220
	221	break;
	222	default:
	223	/* Other status case are not handled */
	224	break;
	225	}
	226	}
9bbf86fe BG	227	}
9bbf86fe BG	228
de4b00b0	229	static struct drm_crtc_helper_funcs sti_crtc_helper_funcs = {
29d1dc62 VA	230	.enable = sti_crtc_enable,
29d1dc62 VA	231	.disable = sti_crtc_disabling,
9e1f05b2	232	.mode_fixup = sti_crtc_mode_fixup,
de4b00b0	233	.mode_set = drm_helper_crtc_mode_set,
9e1f05b2	234	.mode_set_nofb = sti_crtc_mode_set_nofb,
de4b00b0	235	.mode_set_base = drm_helper_crtc_mode_set_base,
9e1f05b2 VA	236	.atomic_begin = sti_crtc_atomic_begin,
9e1f05b2 VA	237	.atomic_flush = sti_crtc_atomic_flush,
de4b00b0 BG	238	};
de4b00b0 BG	239
9e1f05b2	240	static void sti_crtc_destroy(struct drm_crtc *crtc)
9bbf86fe BG	241	{
	242	DRM_DEBUG_KMS("\n");
	243	drm_crtc_cleanup(crtc);
	244	}
	245
9e1f05b2 VA	246	static int sti_crtc_set_property(struct drm_crtc *crtc,
	247	struct drm_property *property,
	248	uint64_t val)
9bbf86fe BG	249	{
	250	DRM_DEBUG_KMS("\n");
	251	return 0;
	252	}
	253
9e1f05b2 VA	254	int sti_crtc_vblank_cb(struct notifier_block *nb,
9e1f05b2 VA	255	unsigned long event, void *data)
9bbf86fe BG	256	{
	257	struct drm_device *drm_dev;
	258	struct sti_compositor *compo =
	259	container_of(nb, struct sti_compositor, vtg_vblank_nb);
	260	int *crtc = data;
	261	unsigned long flags;
9e1f05b2	262	struct sti_private *priv;
9bbf86fe BG	263
	264	drm_dev = compo->mixer[*crtc]->drm_crtc.dev;
	265	priv = drm_dev->dev_private;
	266
	267	if ((event != VTG_TOP_FIELD_EVENT) &&
	268	(event != VTG_BOTTOM_FIELD_EVENT)) {
	269	DRM_ERROR("unknown event: %lu\n", event);
	270	return -EINVAL;
	271	}
	272
	273	drm_handle_vblank(drm_dev, *crtc);
	274
	275	spin_lock_irqsave(&drm_dev->event_lock, flags);
	276	if (compo->mixer[*crtc]->pending_event) {
	277	drm_send_vblank_event(drm_dev, -1,
9e1f05b2	278	compo->mixer[*crtc]->pending_event);
9bbf86fe BG	279	drm_vblank_put(drm_dev, *crtc);
	280	compo->mixer[*crtc]->pending_event = NULL;
	281	}
	282	spin_unlock_irqrestore(&drm_dev->event_lock, flags);
	283
29d1dc62 VA	284	if (compo->mixer[*crtc]->status == STI_MIXER_DISABLING) {
	285	struct drm_plane *p;
	286
	287	/* Disable mixer only if all overlay planes (GDP and VDP)
	288	* are disabled */
	289	list_for_each_entry(p, &drm_dev->mode_config.plane_list, head) {
	290	struct sti_plane *plane = to_sti_plane(p);
	291
	292	if ((plane->desc & STI_PLANE_TYPE_MASK) <= STI_VDP)
	293	if (plane->status != STI_PLANE_DISABLED)
	294	return 0;
	295	}
	296	sti_crtc_disable(&compo->mixer[*crtc]->drm_crtc);
	297	}
	298
9bbf86fe BG	299	return 0;
	300	}
	301
88e72717	302	int sti_crtc_enable_vblank(struct drm_device *dev, unsigned int pipe)
9bbf86fe	303	{
9e1f05b2	304	struct sti_private *dev_priv = dev->dev_private;
9bbf86fe BG	305	struct sti_compositor *compo = dev_priv->compo;
	306	struct notifier_block *vtg_vblank_nb = &compo->vtg_vblank_nb;
	307
871bcdfe VA	308	DRM_DEBUG_DRIVER("\n");
871bcdfe VA	309
88e72717	310	if (sti_vtg_register_client(pipe == STI_MIXER_MAIN ?
9bbf86fe	311	compo->vtg_main : compo->vtg_aux,
88e72717	312	vtg_vblank_nb, pipe)) {
9bbf86fe BG	313	DRM_ERROR("Cannot register VTG notifier\n");
	314	return -EINVAL;
	315	}
	316
	317	return 0;
	318	}
9e1f05b2	319	EXPORT_SYMBOL(sti_crtc_enable_vblank);
9bbf86fe	320
88e72717	321	void sti_crtc_disable_vblank(struct drm_device *drm_dev, unsigned int pipe)
9bbf86fe	322	{
29d1dc62	323	struct sti_private *priv = drm_dev->dev_private;
9bbf86fe BG	324	struct sti_compositor *compo = priv->compo;
9bbf86fe BG	325	struct notifier_block *vtg_vblank_nb = &compo->vtg_vblank_nb;
9bbf86fe BG	326
	327	DRM_DEBUG_DRIVER("\n");
	328
88e72717	329	if (sti_vtg_unregister_client(pipe == STI_MIXER_MAIN ?
9bbf86fe BG	330	compo->vtg_main : compo->vtg_aux, vtg_vblank_nb))
	331	DRM_DEBUG_DRIVER("Warning: cannot unregister VTG notifier\n");
	332
	333	/* free the resources of the pending requests */
88e72717 TR	334	if (compo->mixer[pipe]->pending_event) {
	335	drm_vblank_put(drm_dev, pipe);
	336	compo->mixer[pipe]->pending_event = NULL;
9bbf86fe	337	}
9bbf86fe	338	}
9e1f05b2	339	EXPORT_SYMBOL(sti_crtc_disable_vblank);
9bbf86fe BG	340
9bbf86fe BG	341	static struct drm_crtc_funcs sti_crtc_funcs = {
de4b00b0 BG	342	.set_config = drm_atomic_helper_set_config,
de4b00b0 BG	343	.page_flip = drm_atomic_helper_page_flip,
9e1f05b2 VA	344	.destroy = sti_crtc_destroy,
9e1f05b2 VA	345	.set_property = sti_crtc_set_property,
de4b00b0 BG	346	.reset = drm_atomic_helper_crtc_reset,
	347	.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
	348	.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
9bbf86fe BG	349	};
9bbf86fe BG	350
9e1f05b2	351	bool sti_crtc_is_main(struct drm_crtc *crtc)
9bbf86fe BG	352	{
	353	struct sti_mixer *mixer = to_sti_mixer(crtc);
	354
	355	if (mixer->id == STI_MIXER_MAIN)
	356	return true;
	357
	358	return false;
	359	}
9e1f05b2	360	EXPORT_SYMBOL(sti_crtc_is_main);
9bbf86fe	361
9e1f05b2 VA	362	int sti_crtc_init(struct drm_device drm_dev, struct sti_mixer mixer,
9e1f05b2 VA	363	struct drm_plane primary, struct drm_plane cursor)
9bbf86fe BG	364	{
	365	struct drm_crtc *crtc = &mixer->drm_crtc;
	366	int res;
	367
	368	res = drm_crtc_init_with_planes(drm_dev, crtc, primary, cursor,
9e1f05b2	369	&sti_crtc_funcs);
9bbf86fe	370	if (res) {
871bcdfe	371	DRM_ERROR("Can't initialze CRTC\n");
9bbf86fe BG	372	return -EINVAL;
	373	}
	374
	375	drm_crtc_helper_add(crtc, &sti_crtc_helper_funcs);
	376
	377	DRM_DEBUG_DRIVER("drm CRTC:%d mapped to %s\n",
	378	crtc->base.id, sti_mixer_to_str(mixer));
	379
	380	return 0;
	381	}